pcmciareg.h revision 1.2
1 /* $NetBSD: pcmciareg.h,v 1.2 1997/10/16 23:27:38 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Marc Horowitz. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Marc Horowitz. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* most of this is from the PCMCIA PC Card Standard, Release 2.1 */ 33 34 /* 35 * CIS Tuples 36 */ 37 38 /* Layer 1 Basic Compatibility Tuples */ 39 #define PCMCIA_CISTPL_NULL 0x00 40 #define PCMCIA_CISTPL_DEVICE 0x01 41 #define PCMCIA_DTYPE_MASK 0xF0 42 #define PCMCIA_DTYPE_NULL 0x00 43 #define PCMCIA_DTYPE_ROM 0x10 44 #define PCMCIA_DTYPE_OTPROM 0x20 45 #define PCMCIA_DTYPE_EPROM 0x30 46 #define PCMCIA_DTYPE_EEPROM 0x40 47 #define PCMCIA_DTYPE_FLASH 0x50 48 #define PCMCIA_DTYPE_SRAM 0x60 49 #define PCMCIA_DTYPE_DRAM 0x70 50 #define PCMCIA_DTYPE_FUNCSPEC 0xD0 51 #define PCMCIA_DTYPE_EXTEND 0xE0 52 #define PCMCIA_DSPEED_MASK 0x07 53 #define PCMCIA_DSPEED_NULL 0x00 54 #define PCMCIA_DSPEED_250NS 0x01 55 #define PCMCIA_DSPEED_200NS 0x02 56 #define PCMCIA_DSPEED_150NS 0x03 57 #define PCMCIA_DSPEED_100NS 0x04 58 #define PCMCIA_DSPEED_EXT 0x05 59 60 /* 61 * the 2.1 docs have 0x02-0x07 as reserved, but the linux drivers list the 62 * follwing tuple code values. I have at least one card (3com 3c562 63 * lan+modem) which has a code 0x06 tuple, so I'm going to assume that these 64 * are for real 65 */ 66 67 #define PCMCIA_CISTPL_LONGLINK_CB 0x02 68 #define PCMCIA_CISTPL_CONFIG_CB 0x04 69 #define PCMCIA_CISTPL_CFTABLE_ENTRY_CB 0x05 70 #define PCMCIA_CISTPL_LONGLINK_MFC 0x06 71 #define PCMCIA_MFC_MEM_ATTR 0x00 72 #define PCMCIA_MFC_MEM_COMMON 0x01 73 #define PCMCIA_CISTPL_BAR 0x07 74 75 #define PCMCIA_CISTPL_CHECKSUM 0x10 76 #define PCMCIA_CISTPL_LONGLINK_A 0x11 77 #define PCMCIA_CISTPL_LONGLINK_C 0x12 78 #define PCMCIA_CISTPL_LINKTARGET 0x13 79 #define PCMCIA_CISTPL_NO_LINK 0x14 80 #define PCMCIA_CISTPL_VERS_1 0x15 81 #define PCMCIA_CISTPL_ALTSTR 0x16 82 #define PCMCIA_CISTPL_DEVICE_A 0x17 83 #define PCMCIA_CISTPL_JEDEC_C 0x18 84 #define PCMCIA_CISTPL_JEDEC_A 0x19 85 #define PCMCIA_CISTPL_CONFIG 0x1A 86 #define PCMCIA_TPCC_RASZ_MASK 0x03 87 #define PCMCIA_TPCC_RASZ_SHIFT 0 88 #define PCMCIA_TPCC_RMSZ_MASK 0x3C 89 #define PCMCIA_TPCC_RMSZ_SHIFT 2 90 #define PCMCIA_TPCC_RFSZ_MASK 0xC0 91 #define PCMCIA_TPCC_RFSZ_SHIFT 6 92 #define PCMCIA_CISTPL_CFTABLE_ENTRY 0x1B 93 #define PCMCIA_TPCE_INDX_INTFACE 0x80 94 #define PCMCIA_TPCE_INDX_DEFAULT 0x40 95 #define PCMCIA_TPCE_INDX_NUM_MASK 0x3F 96 #define PCMCIA_TPCE_IF_MWAIT 0x80 97 #define PCMCIA_TPCE_IF_RDYBSY 0x40 98 #define PCMCIA_TPCE_IF_WP 0x20 99 #define PCMCIA_TPCE_IF_BVD 0x10 100 #define PCMCIA_TPCE_IF_IFTYPE 0x0F 101 #define PCMCIA_IFTYPE_MEMORY 0 102 #define PCMCIA_IFTYPE_IO 1 103 #define PCMCIA_TPCE_FS_MISC 0x80 104 #define PCMCIA_TPCE_FS_MEMSPACE_MASK 0x60 105 #define PCMCIA_TPCE_FS_MEMSPACE_NONE 0x00 106 #define PCMCIA_TPCE_FS_MEMSPACE_LENGTH 0x20 107 #define PCMCIA_TPCE_FS_MEMSPACE_LENGTHADDR 0x40 108 #define PCMCIA_TPCE_FS_MEMSPACE_TABLE 0x60 109 #define PCMCIA_TPCE_FS_IRQ 0x10 110 #define PCMCIA_TPCE_FS_IOSPACE 0x08 111 #define PCMCIA_TPCE_FS_TIMING 0x04 112 #define PCMCIA_TPCE_FS_POWER_MASK 0x03 113 #define PCMCIA_TPCE_FS_POWER_NONE 0x00 114 #define PCMCIA_TPCE_FS_POWER_VCC 0x01 115 #define PCMCIA_TPCE_FS_POWER_VCCVPP1 0x02 116 #define PCMCIA_TPCE_FS_POWER_VCCVPP1VPP2 0x03 117 #define PCMCIA_TPCE_TD_RESERVED_MASK 0xE0 118 #define PCMCIA_TPCE_TD_RDYBSY_MASK 0x1C 119 #define PCMCIA_TPCE_TD_WAIT_MASK 0x03 120 #define PCMCIA_TPCE_IO_HASRANGE 0x80 121 #define PCMCIA_TPCE_IO_BUSWIDTH_16BIT 0x40 122 #define PCMCIA_TPCE_IO_BUSWIDTH_8BIT 0x20 123 #define PCMCIA_TPCE_IO_IOADDRLINES_MASK 0x1F 124 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_MASK 0xC0 125 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_NONE 0x00 126 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_ONE 0x40 127 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_TWO 0x80 128 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_FOUR 0xC0 129 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_MASK 0x30 130 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_NONE 0x00 131 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_ONE 0x10 132 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_TWO 0x20 133 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_FOUR 0x30 134 #define PCMCIA_TPCE_IO_RANGE_COUNT 0x0F 135 #define PCMCIA_TPCE_IR_SHARE 0x80 136 #define PCMCIA_TPCE_IR_PULSE 0x40 137 #define PCMCIA_TPCE_IR_LEVEL 0x20 138 #define PCMCIA_TPCE_IR_HASMASK 0x10 139 #define PCMCIA_TPCE_IR_IRQ 0x0F 140 #define PCMCIA_TPCE_MS_HOSTADDR 0x80 141 #define PCMCIA_TPCE_MS_CARDADDR_SIZE_MASK 0x60 142 #define PCMCIA_TPCE_MS_CARDADDR_SIZE_SHIFT 5 143 #define PCMCIA_TPCE_MS_LENGTH_SIZE_MASK 0x18 144 #define PCMCIA_TPCE_MS_LENGTH_SIZE_SHIFT 3 145 #define PCMCIA_TPCE_MS_COUNT 0x07 146 #define PCMCIA_TPCE_MI_EXT 0x80 147 #define PCMCIA_TPCE_MI_RESERVED 0x40 148 #define PCMCIA_TPCE_MI_PWRDOWN 0x20 149 #define PCMCIA_TPCE_MI_READONLY 0x10 150 #define PCMCIA_TPCE_MI_AUDIO 0x08 151 #define PCMCIA_TPCE_MI_MAXTWINS 0x07 152 #define PCMCIA_CISTPL_DEVICE_OC 0x1C 153 #define PCMCIA_CISTPL_DEVICE_OA 0x1D 154 #define PCMCIA_CISTPL_DEVICE_GEO 0x1E 155 #define PCMCIA_CISTPL_DEVICE_GEO_A 0x1F 156 157 /* Layer 2 Data Recording Format Tuples */ 158 159 #define PCMCIA_CISTPL_MANFID 0x20 160 #define PCMCIA_CISTPL_FUNCID 0x21 161 #define PCMCIA_CISTPL_FUNCE 0x22 162 #define PCMCIA_CISTPL_SWIL 0x23 163 /* #define PCMCIA_CISTPL_RESERVED 0x24-0x3F */ 164 #define PCMCIA_CISTPL_VERS_2 0x40 165 #define PCMCIA_CISTPL_FORMAT 0x41 166 #define PCMCIA_CISTPL_GEOMETRY 0x42 167 #define PCMCIA_CISTPL_BYTEORDER 0x43 168 #define PCMCIA_CISTPL_DATE 0x44 169 #define PCMCIA_CISTPL_BATTERY 0x45 170 171 /* Layer 3 Data Organization Tuples */ 172 173 #define PCMCIA_CISTPL_ORG 0x46 174 /* #define PCMCIA_CISTPL_RESERVED 0x47-0x7F */ 175 176 /* Layer 4 System-Specific Standard Tuples */ 177 178 /* #define PCMCIA_CISTPL_RESERVED 0x80-0xFE */ 179 #define PCMCIA_CISTPL_END 0xFF 180 181 /* 182 * Card Configuration Registers 183 */ 184 185 #define PCMCIA_CCR_OPTION 0x00 186 #define PCMCIA_CCR_OPTION_SRESET 0x80 187 #define PCMCIA_CCR_OPTION_LEVIREQ 0x40 188 #define PCMCIA_CCR_OPTION_CFINDEX 0x3F 189 #define PCMCIA_CCR_OPTION_IREQ_ENABLE 0x04 190 #define PCMCIA_CCR_OPTION_ADDR_DECODE 0x02 191 #define PCMCIA_CCR_OPTION_FUNC_ENABLE 0x01 192 #define PCMCIA_CCR_STATUS 0x02 193 #define PCMCIA_CCR_STATUS_PINCHANGED 0x80 194 #define PCMCIA_CCR_STATUS_SIGCHG 0x40 195 #define PCMCIA_CCR_STATUS_IOIS8 0x20 196 #define PCMCIA_CCR_STATUS_RESERVED1 0x10 197 #define PCMCIA_CCR_STATUS_AUDIO 0x08 198 #define PCMCIA_CCR_STATUS_PWRDWN 0x04 199 #define PCMCIA_CCR_STATUS_INTR 0x02 200 #define PCMCIA_CCR_STATUS_INTRACK 0x01 201 #define PCMCIA_CCR_PIN 0x04 202 #define PCMCIA_CCR_PIN_CBVD1 0x80 203 #define PCMCIA_CCR_PIN_CBVD2 0x40 204 #define PCMCIA_CCR_PIN_CRDYBSY 0x20 205 #define PCMCIA_CCR_PIN_CWPROT 0x10 206 #define PCMCIA_CCR_PIN_RBVD1 0x08 207 #define PCMCIA_CCR_PIN_RBVD2 0x04 208 #define PCMCIA_CCR_PIN_RRDYBSY 0x02 209 #define PCMCIA_CCR_PIN_RWPROT 0x01 210 #define PCMCIA_CCR_SOCKETCOPY 0x06 211 #define PCMCIA_CCR_SOCKETCOPY_RESERVED 0x80 212 #define PCMCIA_CCR_SOCKETCOPY_COPY_MASK 0x70 213 #define PCMCIA_CCR_SOCKETCOPY_COPY_SHIFT 4 214 #define PCMCIA_CCR_SOCKETCOPY_SOCKET_MASK 0x0F 215 #define PCMCIA_CCR_IOBASE0 0x0A 216 #define PCMCIA_CCR_IOBASE1 0x0C 217 #define PCMCIA_CCR_IOBASE2 0x0E 218 #define PCMCIA_CCR_IOBASE3 0x10 219 #define PCMCIA_CCR_IOSIZE 0x12 220 221 #define PCMCIA_CCR_SIZE 0x14 222
Indexes created Tue Sep 30 11:09:46 GMT 2025