pcmciavar.h revision 1.1.2.7 1 /* $NetBSD: pcmciavar.h,v 1.1.2.7 1997/10/16 19:42:05 thorpej Exp $ */
2
3 #include <sys/types.h>
4 #include <sys/queue.h>
5
6 #include <machine/bus.h>
7
8 #include <dev/pcmcia/pcmciachip.h>
9
10 /*
11 * Contains information about mapped/allocated i/o spaces.
12 */
13 struct pcmcia_io_handle {
14 bus_space_tag_t iot; /* bus space tag (from chipset) */
15 bus_space_handle_t ioh; /* mapped space handle */
16 bus_addr_t addr; /* resulting address in bus space */
17 bus_size_t size; /* size of i/o space */
18 int flags; /* misc. information */
19 };
20
21 #define PCMCIA_IO_ALLOCATED 0x01 /* i/o space was allocated */
22
23 /*
24 * Contains information about allocated memory space.
25 */
26 struct pcmcia_mem_handle {
27 bus_space_tag_t memt; /* bus space tag (from chipset) */
28 bus_space_handle_t memh; /* mapped space handle */
29 bus_addr_t addr; /* resulting address in bus space */
30 bus_size_t size; /* size of mem space */
31 pcmcia_mem_handle_t mhandle; /* opaque memory handle */
32 bus_size_t realsize; /* how much we really allocated */
33 };
34
35 /* pcmcia itself */
36
37 #define PCMCIA_CFE_MWAIT_REQUIRED 0x0001
38 #define PCMCIA_CFE_RDYBSY_ACTIVE 0x0002
39 #define PCMCIA_CFE_WP_ACTIVE 0x0004
40 #define PCMCIA_CFE_BVD_ACTIVE 0x0008
41 #define PCMCIA_CFE_IO8 0x0010
42 #define PCMCIA_CFE_IO16 0x0020
43 #define PCMCIA_CFE_IRQSHARE 0x0040
44 #define PCMCIA_CFE_IRQPULSE 0x0080
45 #define PCMCIA_CFE_IRQLEVEL 0x0100
46 #define PCMCIA_CFE_POWERDOWN 0x0200
47 #define PCMCIA_CFE_READONLY 0x0400
48 #define PCMCIA_CFE_AUDIO 0x0800
49
50 struct pcmcia_config_entry {
51 int number;
52 u_int32_t flags;
53 int iftype;
54 int num_iospace;
55
56 /*
57 * The card will only decode this mask in any case, so we can
58 * do dynamic allocation with this in mind, in case the suggestions
59 * below are no good.
60 */
61 u_long iomask;
62 struct {
63 u_long length;
64 u_long start;
65 } iospace[4]; /* XXX this could be as high as 16 */
66 u_int16_t irqmask;
67 int num_memspace;
68 struct {
69 u_long length;
70 u_long cardaddr;
71 u_long hostaddr;
72 } memspace[2]; /* XXX this could be as high as 8 */
73 int maxtwins;
74 SIMPLEQ_ENTRY(pcmcia_config_entry) cfe_list;
75 };
76
77 struct pcmcia_function {
78 /* read off the card */
79 int number;
80 int function;
81 int last_config_index;
82 u_long ccr_base;
83 u_long ccr_mask;
84 SIMPLEQ_HEAD(, pcmcia_config_entry) cfe_head;
85 SIMPLEQ_ENTRY(pcmcia_function) pf_list;
86 /* run-time state */
87 struct pcmcia_softc *sc;
88 struct pcmcia_config_entry *cfe;
89 struct pcmcia_mem_handle pf_pcmh;
90 #define pf_ccrt pf_pcmh.memt
91 #define pf_ccrh pf_pcmh.memh
92 #define pf_ccr_mhandle pf_pcmh.mhandle
93 #define pf_ccr_realsize pf_pcmh.realsize
94 bus_addr_t pf_ccr_offset;
95 int pf_ccr_window;
96 int (*ih_fct) __P((void *));
97 void *ih_arg;
98 int ih_ipl;
99 int pf_flags;
100 };
101
102 /* pf_flags */
103 #define PFF_ENABLED 0x0001 /* function is enabled */
104
105 struct pcmcia_card {
106 int cis1_major;
107 int cis1_minor;
108 /* XXX waste of space? */
109 char cis1_info_buf[256];
110 char *cis1_info[4];
111 int manufacturer;
112 u_int16_t product;
113 u_int16_t error;
114 SIMPLEQ_HEAD(, pcmcia_function) pf_head;
115 };
116
117 struct pcmcia_softc {
118 struct device dev;
119
120 /* this stuff is for the socket */
121 pcmcia_chipset_tag_t pct;
122 pcmcia_chipset_handle_t pch;
123
124 /* this stuff is for the card */
125 struct pcmcia_card card;
126 void *ih;
127 int sc_enabled_count; /* how many functions are
128 enabled */
129
130 /*
131 * These are passed down from the PCMCIA chip, and exist only
132 * so that cards with Very Special address allocation needs
133 * know what range they should be dealing with.
134 */
135 bus_addr_t iobase; /* start i/o space allocation here */
136 bus_size_t iosize; /* size of the i/o space range */
137 };
138
139 struct pcmcia_attach_args {
140 u_int16_t manufacturer;
141 u_int16_t product;
142 struct pcmcia_card *card;
143 struct pcmcia_function *pf;
144 };
145
146 struct pcmcia_tuple {
147 unsigned int code;
148 unsigned int length;
149 u_long mult;
150 bus_addr_t ptr;
151 bus_space_tag_t memt;
152 bus_space_handle_t memh;
153 };
154
155 void pcmcia_read_cis __P((struct pcmcia_softc *));
156 void pcmcia_print_cis __P((struct pcmcia_softc *));
157 int pcmcia_scan_cis __P((struct device * dev,
158 int (*) (struct pcmcia_tuple *, void *), void *));
159
160 #define pcmcia_cis_read_1(tuple, idx0) \
161 (bus_space_read_1((tuple)->memt, (tuple)->memh, (tuple)->mult*(idx0)))
162
163 #define pcmcia_tuple_read_1(tuple, idx1) \
164 (pcmcia_cis_read_1((tuple), ((tuple)->ptr+(2+(idx1)))))
165
166 #define pcmcia_tuple_read_2(tuple, idx2) \
167 (pcmcia_tuple_read_1((tuple), (idx2)) | \
168 (pcmcia_tuple_read_1((tuple), (idx2)+1)<<8))
169
170 #define pcmcia_tuple_read_3(tuple, idx3) \
171 (pcmcia_tuple_read_1((tuple), (idx3)) | \
172 (pcmcia_tuple_read_1((tuple), (idx3)+1)<<8) | \
173 (pcmcia_tuple_read_1((tuple), (idx3)+2)<<16))
174
175 #define pcmcia_tuple_read_4(tuple, idx4) \
176 (pcmcia_tuple_read_1((tuple), (idx4)) | \
177 (pcmcia_tuple_read_1((tuple), (idx4)+1)<<8) | \
178 (pcmcia_tuple_read_1((tuple), (idx4)+2)<<16) | \
179 (pcmcia_tuple_read_1((tuple), (idx4)+3)<<24))
180
181 #define pcmcia_tuple_read_n(tuple, n, idxn) \
182 (((n)==1)?pcmcia_tuple_read_1((tuple), (idxn)) : \
183 (((n)==2)?pcmcia_tuple_read_2((tuple), (idxn)) : \
184 (((n)==3)?pcmcia_tuple_read_3((tuple), (idxn)) : \
185 /* n == 4 */ pcmcia_tuple_read_4((tuple), (idxn)))))
186
187 #define PCMCIA_SPACE_MEMORY 1
188 #define PCMCIA_SPACE_IO 2
189
190 int pcmcia_ccr_read __P((struct pcmcia_function *, int));
191 void pcmcia_ccr_write __P((struct pcmcia_function *, int, int));
192
193 #define pcmcia_mfc(sc) ((sc)->card.pf_head.sqh_first && \
194 (sc)->card.pf_head.sqh_first->pf_list.sqe_next)
195
196 void pcmcia_function_init __P((struct pcmcia_function *,
197 struct pcmcia_config_entry *));
198 int pcmcia_function_enable __P((struct pcmcia_function *));
199 void pcmcia_function_disable __P((struct pcmcia_function *));
200
201 #define pcmcia_io_alloc(pf, start, size, align, pciop) \
202 (pcmcia_chip_io_alloc((pf)->sc->pct, pf->sc->pch, (start), \
203 (size), (align), (pciop)))
204
205 int pcmcia_io_map __P((struct pcmcia_function *, int, bus_addr_t,
206 bus_size_t, struct pcmcia_io_handle *, int *));
207
208 #define pcmcia_mem_alloc(pf, size, pcmhp) \
209 (pcmcia_chip_mem_alloc((pf)->sc->pct, (pf)->sc->pch, (size), (pcmhp)))
210
211 #define pcmcia_mem_free(pf, pcmhp) \
212 (pcmcia_chip_mem_free((pf)->sc->pct, (pf)->sc->pch, (pcmhp)))
213
214 #define pcmcia_mem_map(pf, kind, card_addr, size, pcmhp, offsetp, windowp) \
215 (pcmcia_chip_mem_map((pf)->sc->pct, (pf)->sc->pch, (kind), \
216 (card_addr), (size), (pcmhp), (offsetp), (windowp)))
217
218 #define pcmcia_mem_unmap(pf, window) \
219 (pcmcia_chip_mem_unmap((pf)->sc->pct, (pf)->sc->pch, (window)))
220
221 void *pcmcia_intr_establish __P((struct pcmcia_function *, int,
222 int (*) (void *), void *));
223 void pcmcia_intr_disestablish __P((struct pcmcia_function *, void *));
224