pcmciavar.h revision 1.6
1 /* $NetBSD: pcmciavar.h,v 1.6 1998/10/10 21:59:40 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Marc Horowitz. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Marc Horowitz. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/types.h> 33 #include <sys/queue.h> 34 35 #include <machine/bus.h> 36 37 #include <dev/pcmcia/pcmciachip.h> 38 39 /* 40 * Contains information about mapped/allocated i/o spaces. 41 */ 42 struct pcmcia_io_handle { 43 bus_space_tag_t iot; /* bus space tag (from chipset) */ 44 bus_space_handle_t ioh; /* mapped space handle */ 45 bus_addr_t addr; /* resulting address in bus space */ 46 bus_size_t size; /* size of i/o space */ 47 int flags; /* misc. information */ 48 }; 49 50 #define PCMCIA_IO_ALLOCATED 0x01 /* i/o space was allocated */ 51 52 /* 53 * Contains information about allocated memory space. 54 */ 55 struct pcmcia_mem_handle { 56 bus_space_tag_t memt; /* bus space tag (from chipset) */ 57 bus_space_handle_t memh; /* mapped space handle */ 58 bus_addr_t addr; /* resulting address in bus space */ 59 bus_size_t size; /* size of mem space */ 60 pcmcia_mem_handle_t mhandle; /* opaque memory handle */ 61 bus_size_t realsize; /* how much we really allocated */ 62 }; 63 64 /* pcmcia itself */ 65 66 #define PCMCIA_CFE_MWAIT_REQUIRED 0x0001 67 #define PCMCIA_CFE_RDYBSY_ACTIVE 0x0002 68 #define PCMCIA_CFE_WP_ACTIVE 0x0004 69 #define PCMCIA_CFE_BVD_ACTIVE 0x0008 70 #define PCMCIA_CFE_IO8 0x0010 71 #define PCMCIA_CFE_IO16 0x0020 72 #define PCMCIA_CFE_IRQSHARE 0x0040 73 #define PCMCIA_CFE_IRQPULSE 0x0080 74 #define PCMCIA_CFE_IRQLEVEL 0x0100 75 #define PCMCIA_CFE_POWERDOWN 0x0200 76 #define PCMCIA_CFE_READONLY 0x0400 77 #define PCMCIA_CFE_AUDIO 0x0800 78 79 struct pcmcia_config_entry { 80 int number; 81 u_int32_t flags; 82 int iftype; 83 int num_iospace; 84 85 /* 86 * The card will only decode this mask in any case, so we can 87 * do dynamic allocation with this in mind, in case the suggestions 88 * below are no good. 89 */ 90 u_long iomask; 91 struct { 92 u_long length; 93 u_long start; 94 } iospace[4]; /* XXX this could be as high as 16 */ 95 u_int16_t irqmask; 96 int num_memspace; 97 struct { 98 u_long length; 99 u_long cardaddr; 100 u_long hostaddr; 101 } memspace[2]; /* XXX this could be as high as 8 */ 102 int maxtwins; 103 SIMPLEQ_ENTRY(pcmcia_config_entry) cfe_list; 104 }; 105 106 struct pcmcia_function { 107 /* read off the card */ 108 int number; 109 int function; 110 int last_config_index; 111 u_long ccr_base; 112 u_long ccr_mask; 113 SIMPLEQ_HEAD(, pcmcia_config_entry) cfe_head; 114 SIMPLEQ_ENTRY(pcmcia_function) pf_list; 115 /* run-time state */ 116 struct pcmcia_softc *sc; 117 struct pcmcia_config_entry *cfe; 118 struct pcmcia_mem_handle pf_pcmh; 119 #define pf_ccrt pf_pcmh.memt 120 #define pf_ccrh pf_pcmh.memh 121 #define pf_ccr_mhandle pf_pcmh.mhandle 122 #define pf_ccr_realsize pf_pcmh.realsize 123 bus_addr_t pf_ccr_offset; 124 int pf_ccr_window; 125 long pf_mfc_iobase; 126 long pf_mfc_iomax; 127 int (*ih_fct) __P((void *)); 128 void *ih_arg; 129 int ih_ipl; 130 int pf_flags; 131 }; 132 133 /* pf_flags */ 134 #define PFF_ENABLED 0x0001 /* function is enabled */ 135 136 struct pcmcia_card { 137 int cis1_major; 138 int cis1_minor; 139 /* XXX waste of space? */ 140 char cis1_info_buf[256]; 141 char *cis1_info[4]; 142 /* 143 * Use int32_t for manufacturer and product so that they can 144 * hold the id value found in card CIS and special value that 145 * indicates no id was found. 146 */ 147 int32_t manufacturer; 148 #define PCMCIA_VENDOR_INVALID -1 149 int32_t product; 150 #define PCMCIA_PRODUCT_INVALID -1 151 u_int16_t error; 152 #define PCMCIA_CIS_INVALID { NULL, NULL, NULL, NULL } 153 SIMPLEQ_HEAD(, pcmcia_function) pf_head; 154 }; 155 156 struct pcmcia_softc { 157 struct device dev; 158 159 /* this stuff is for the socket */ 160 pcmcia_chipset_tag_t pct; 161 pcmcia_chipset_handle_t pch; 162 163 /* this stuff is for the card */ 164 struct pcmcia_card card; 165 void *ih; 166 int sc_enabled_count; /* how many functions are 167 enabled */ 168 169 /* 170 * These are passed down from the PCMCIA chip, and exist only 171 * so that cards with Very Special address allocation needs 172 * know what range they should be dealing with. 173 */ 174 bus_addr_t iobase; /* start i/o space allocation here */ 175 bus_size_t iosize; /* size of the i/o space range */ 176 }; 177 178 struct pcmcia_attach_args { 179 int32_t manufacturer; 180 int32_t product; 181 struct pcmcia_card *card; 182 struct pcmcia_function *pf; 183 }; 184 185 struct pcmcia_tuple { 186 unsigned int code; 187 unsigned int length; 188 u_long mult; 189 bus_addr_t ptr; 190 bus_space_tag_t memt; 191 bus_space_handle_t memh; 192 }; 193 194 void pcmcia_read_cis __P((struct pcmcia_softc *)); 195 void pcmcia_print_cis __P((struct pcmcia_softc *)); 196 int pcmcia_scan_cis __P((struct device * dev, 197 int (*) (struct pcmcia_tuple *, void *), void *)); 198 199 #define pcmcia_cis_read_1(tuple, idx0) \ 200 (bus_space_read_1((tuple)->memt, (tuple)->memh, (tuple)->mult*(idx0))) 201 202 #define pcmcia_tuple_read_1(tuple, idx1) \ 203 (pcmcia_cis_read_1((tuple), ((tuple)->ptr+(2+(idx1))))) 204 205 #define pcmcia_tuple_read_2(tuple, idx2) \ 206 (pcmcia_tuple_read_1((tuple), (idx2)) | \ 207 (pcmcia_tuple_read_1((tuple), (idx2)+1)<<8)) 208 209 #define pcmcia_tuple_read_3(tuple, idx3) \ 210 (pcmcia_tuple_read_1((tuple), (idx3)) | \ 211 (pcmcia_tuple_read_1((tuple), (idx3)+1)<<8) | \ 212 (pcmcia_tuple_read_1((tuple), (idx3)+2)<<16)) 213 214 #define pcmcia_tuple_read_4(tuple, idx4) \ 215 (pcmcia_tuple_read_1((tuple), (idx4)) | \ 216 (pcmcia_tuple_read_1((tuple), (idx4)+1)<<8) | \ 217 (pcmcia_tuple_read_1((tuple), (idx4)+2)<<16) | \ 218 (pcmcia_tuple_read_1((tuple), (idx4)+3)<<24)) 219 220 #define pcmcia_tuple_read_n(tuple, n, idxn) \ 221 (((n)==1)?pcmcia_tuple_read_1((tuple), (idxn)) : \ 222 (((n)==2)?pcmcia_tuple_read_2((tuple), (idxn)) : \ 223 (((n)==3)?pcmcia_tuple_read_3((tuple), (idxn)) : \ 224 /* n == 4 */ pcmcia_tuple_read_4((tuple), (idxn))))) 225 226 #define PCMCIA_SPACE_MEMORY 1 227 #define PCMCIA_SPACE_IO 2 228 229 int pcmcia_ccr_read __P((struct pcmcia_function *, int)); 230 void pcmcia_ccr_write __P((struct pcmcia_function *, int, int)); 231 232 #define pcmcia_mfc(sc) ((sc)->card.pf_head.sqh_first && \ 233 (sc)->card.pf_head.sqh_first->pf_list.sqe_next) 234 235 void pcmcia_function_init __P((struct pcmcia_function *, 236 struct pcmcia_config_entry *)); 237 int pcmcia_function_enable __P((struct pcmcia_function *)); 238 void pcmcia_function_disable __P((struct pcmcia_function *)); 239 240 #define pcmcia_io_alloc(pf, start, size, align, pciop) \ 241 (pcmcia_chip_io_alloc((pf)->sc->pct, pf->sc->pch, (start), \ 242 (size), (align), (pciop))) 243 244 #define pcmcia_io_free(pf, pciohp) \ 245 (pcmcia_chip_io_free((pf)->sc->pct, (pf)->sc->pch, (pciohp))) 246 247 int pcmcia_io_map __P((struct pcmcia_function *, int, bus_addr_t, 248 bus_size_t, struct pcmcia_io_handle *, int *)); 249 250 #define pcmcia_mem_alloc(pf, size, pcmhp) \ 251 (pcmcia_chip_mem_alloc((pf)->sc->pct, (pf)->sc->pch, (size), (pcmhp))) 252 253 #define pcmcia_mem_free(pf, pcmhp) \ 254 (pcmcia_chip_mem_free((pf)->sc->pct, (pf)->sc->pch, (pcmhp))) 255 256 #define pcmcia_mem_map(pf, kind, card_addr, size, pcmhp, offsetp, windowp) \ 257 (pcmcia_chip_mem_map((pf)->sc->pct, (pf)->sc->pch, (kind), \ 258 (card_addr), (size), (pcmhp), (offsetp), (windowp))) 259 260 #define pcmcia_mem_unmap(pf, window) \ 261 (pcmcia_chip_mem_unmap((pf)->sc->pct, (pf)->sc->pch, (window))) 262 263 void *pcmcia_intr_establish __P((struct pcmcia_function *, int, 264 int (*) (void *), void *)); 265 void pcmcia_intr_disestablish __P((struct pcmcia_function *, void *)); 266
Indexes created Mon Sep 29 03:10:08 GMT 2025