acemidi.c revision 1.2
1/* $NetBSD: acemidi.c,v 1.2 2001/06/12 11:49:18 bjh21 Exp $ */ 2 3/*- 4 * Copyright (c) 2001 Ben Harris 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#include <sys/param.h> 31 32__KERNEL_RCSID(0, "$NetBSD: acemidi.c,v 1.2 2001/06/12 11:49:18 bjh21 Exp $"); 33 34#include <sys/device.h> 35#include <sys/systm.h> 36 37#include <machine/bus.h> 38 39#include <dev/podulebus/podulebus.h> 40#include <dev/podulebus/podules.h> 41#include <dev/podulebus/acemidireg.h> 42 43#include <sys/termios.h> 44#include <dev/ic/comvar.h> 45#include <dev/ic/comreg.h> 46 47struct acemidi_softc { 48 struct device sc_dev; 49}; 50 51struct com_acemidi_softc { 52 struct com_softc sc_com; 53 struct evcnt sc_intrcnt; 54}; 55 56static int acemidi_match(struct device *, struct cfdata *, void *); 57static void acemidi_attach(struct device *, struct device *, void *); 58static int com_acemidi_match(struct device *, struct cfdata *, void *); 59static void com_acemidi_attach(struct device *, struct device *, void *); 60 61struct cfattach acemidi_ca = { 62 sizeof(struct acemidi_softc), acemidi_match, acemidi_attach 63}; 64 65struct cfattach com_acemidi_ca = { 66 sizeof(struct com_acemidi_softc), com_acemidi_match, com_acemidi_attach 67}; 68 69static int 70acemidi_match(struct device *parent, struct cfdata *cf, void *aux) 71{ 72 struct podulebus_attach_args *pa = aux; 73 74 if (pa->pa_product == PODULE_MCS_MIDICONNECT) 75 return 1; 76 return 0; 77} 78 79static void 80acemidi_attach(struct device *parent, struct device *self, void *aux) 81{ 82/* struct acemidi_softc *sc = (void *)self; */ 83/* struct podulebus_attach_args *pa = aux; */ 84 85 printf("\n"); 86 config_found_sm(self, aux, NULL, NULL); 87} 88 89static int 90com_acemidi_match(struct device *parent, struct cfdata *cf, void *aux) 91{ 92 93 return 1; 94} 95 96static void 97com_acemidi_attach(struct device *parent, struct device *self, void *aux) 98{ 99 struct com_acemidi_softc *sc = (void *)self; 100 struct com_softc *csc = &sc->sc_com; 101 struct podulebus_attach_args *pa = aux; 102 103 csc->sc_iobase = pa->pa_fast_base + ACEMIDI_16550_BASE; 104 csc->sc_iot = pa->pa_fast_t; 105 bus_space_map(csc->sc_iot, csc->sc_iobase, COM_NPORTS, 0, 106 &csc->sc_ioh); 107 csc->sc_frequency = ACEMIDI_16550_FREQ; 108 109 com_attach_subr(csc); 110 111 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 112 self->dv_xname, "intr"); 113 podulebus_irq_establish(pa->pa_ih, IPL_SERIAL, comintr, sc, 114 &sc->sc_intrcnt); 115} 116 117/* 118 * Stray IRQ bug: 119 * 120 * Occasionally, when receiving, we get a stray IRQ. Sometimes, the interrupt 121 * bit on the unixbp reads as clear. In any case, comintr() gets an IIR 122 * of 0xc1 (no interrupts pending). 123 * 124 * The behaviour can be observed with a logic probe: 125 * 126 * Channel 1 to PIRQ* (pin 19 on IC3 on A540 backplane) 127 * Channel 2 to INTR on 16550 128 * trigger on ch1 low, ch2 falling 129 * 2 us/div 130 * 131 * This catches cases where the 16550 de-asserts the interrupt before 132 * irq_handler is entered and disables the interrupt at unixbp (by calling 133 * splhigh()). 134 * 135 * This gets us 5us pulses on INTR and PIRQ*. Now to work out why. 136 * 137 * Connecting channel 3 to the CS2* pin on the 16550 shows it high throughout, 138 * so the interrupt isn't being cleared by the host. MR, similarly, is low 139 * throughout, so it's not being cleared by a reset. 140 */ 141