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dhu.c revision 1.47.20.3
      1  1.47.20.1    bouyer /*	$NetBSD: dhu.c,v 1.47.20.3 2007/11/21 21:19:39 bouyer Exp $	*/
      2       1.34       agc /*
      3       1.36       wiz  * Copyright (c) 2003, Hugh Graham.
      4       1.34       agc  * Copyright (c) 1992, 1993
      5       1.34       agc  *	The Regents of the University of California.  All rights reserved.
      6       1.34       agc  *
      7       1.34       agc  * This code is derived from software contributed to Berkeley by
      8       1.34       agc  * Ralph Campbell and Rick Macklem.
      9       1.34       agc  *
     10       1.34       agc  * Redistribution and use in source and binary forms, with or without
     11       1.34       agc  * modification, are permitted provided that the following conditions
     12       1.34       agc  * are met:
     13       1.34       agc  * 1. Redistributions of source code must retain the above copyright
     14       1.34       agc  *    notice, this list of conditions and the following disclaimer.
     15       1.34       agc  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.34       agc  *    notice, this list of conditions and the following disclaimer in the
     17       1.34       agc  *    documentation and/or other materials provided with the distribution.
     18       1.34       agc  * 3. Neither the name of the University nor the names of its contributors
     19       1.34       agc  *    may be used to endorse or promote products derived from this software
     20       1.34       agc  *    without specific prior written permission.
     21       1.34       agc  *
     22       1.34       agc  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     23       1.34       agc  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24       1.34       agc  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25       1.34       agc  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     26       1.34       agc  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27       1.34       agc  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28       1.34       agc  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29       1.34       agc  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30       1.34       agc  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31       1.34       agc  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32       1.34       agc  * SUCH DAMAGE.
     33       1.34       agc  */
     34       1.34       agc 
     35        1.1     ragge /*
     36        1.1     ragge  * Copyright (c) 1996  Ken C. Wellsch.  All rights reserved.
     37        1.1     ragge  *
     38        1.1     ragge  * This code is derived from software contributed to Berkeley by
     39        1.1     ragge  * Ralph Campbell and Rick Macklem.
     40        1.1     ragge  *
     41        1.1     ragge  * Redistribution and use in source and binary forms, with or without
     42        1.1     ragge  * modification, are permitted provided that the following conditions
     43        1.1     ragge  * are met:
     44        1.1     ragge  * 1. Redistributions of source code must retain the above copyright
     45        1.1     ragge  *    notice, this list of conditions and the following disclaimer.
     46        1.1     ragge  * 2. Redistributions in binary form must reproduce the above copyright
     47        1.1     ragge  *    notice, this list of conditions and the following disclaimer in the
     48        1.1     ragge  *    documentation and/or other materials provided with the distribution.
     49        1.1     ragge  * 3. All advertising materials mentioning features or use of this software
     50        1.1     ragge  *    must display the following acknowledgement:
     51        1.1     ragge  *	This product includes software developed by the University of
     52        1.1     ragge  *	California, Berkeley and its contributors.
     53        1.1     ragge  * 4. Neither the name of the University nor the names of its contributors
     54        1.1     ragge  *    may be used to endorse or promote products derived from this software
     55        1.1     ragge  *    without specific prior written permission.
     56        1.1     ragge  *
     57        1.1     ragge  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     58        1.1     ragge  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     59        1.1     ragge  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     60        1.1     ragge  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     61        1.1     ragge  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     62        1.1     ragge  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     63        1.1     ragge  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     64        1.1     ragge  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     65        1.1     ragge  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     66        1.1     ragge  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     67        1.1     ragge  * SUCH DAMAGE.
     68        1.1     ragge  */
     69       1.25     lukem 
     70       1.25     lukem #include <sys/cdefs.h>
     71  1.47.20.1    bouyer __KERNEL_RCSID(0, "$NetBSD: dhu.c,v 1.47.20.3 2007/11/21 21:19:39 bouyer Exp $");
     72        1.1     ragge 
     73        1.1     ragge #include <sys/param.h>
     74        1.1     ragge #include <sys/systm.h>
     75        1.1     ragge #include <sys/ioctl.h>
     76        1.1     ragge #include <sys/tty.h>
     77        1.1     ragge #include <sys/proc.h>
     78        1.1     ragge #include <sys/buf.h>
     79        1.1     ragge #include <sys/conf.h>
     80        1.1     ragge #include <sys/file.h>
     81        1.1     ragge #include <sys/uio.h>
     82        1.1     ragge #include <sys/kernel.h>
     83        1.1     ragge #include <sys/syslog.h>
     84        1.1     ragge #include <sys/device.h>
     85       1.44      yamt #include <sys/kauth.h>
     86        1.1     ragge 
     87  1.47.20.1    bouyer #include <sys/bus.h>
     88       1.13     ragge #include <machine/scb.h>
     89        1.1     ragge 
     90       1.15     ragge #include <dev/qbus/ubavar.h>
     91       1.15     ragge 
     92       1.15     ragge #include <dev/qbus/dhureg.h>
     93       1.15     ragge 
     94       1.15     ragge #include "ioconf.h"
     95        1.1     ragge 
     96        1.5     ragge /* A DHU-11 has 16 ports while a DHV-11 has only 8. We use 16 by default */
     97        1.1     ragge 
     98       1.38    simonb #define	NDHULINE	16
     99        1.2     ragge 
    100        1.5     ragge #define DHU_M2U(c)	((c)>>4)	/* convert minor(dev) to unit # */
    101        1.5     ragge #define DHU_LINE(u)	((u)&0xF)	/* extract line # from minor(dev) */
    102        1.2     ragge 
    103        1.5     ragge struct	dhu_softc {
    104        1.5     ragge 	struct	device	sc_dev;		/* Device struct used by config */
    105       1.19      matt 	struct	evcnt	sc_rintrcnt;	/* Interrupt statistics */
    106       1.19      matt 	struct	evcnt	sc_tintrcnt;	/* Interrupt statistics */
    107        1.5     ragge 	int		sc_type;	/* controller type, DHU or DHV */
    108       1.33     ragge 	int		sc_lines;	/* number of lines */
    109       1.15     ragge 	bus_space_tag_t	sc_iot;
    110       1.15     ragge 	bus_space_handle_t sc_ioh;
    111       1.16     ragge 	bus_dma_tag_t	sc_dmat;
    112        1.5     ragge 	struct {
    113        1.5     ragge 		struct	tty *dhu_tty;	/* what we work on */
    114       1.16     ragge 		bus_dmamap_t dhu_dmah;
    115        1.5     ragge 		int	dhu_state;	/* to manage TX output status */
    116        1.5     ragge 		short	dhu_cc;		/* character count on TX */
    117        1.5     ragge 		short	dhu_modem;	/* modem bits state */
    118        1.5     ragge 	} sc_dhu[NDHULINE];
    119        1.1     ragge };
    120        1.1     ragge 
    121        1.5     ragge #define IS_DHU			16	/* Unibus DHU-11 board linecount */
    122        1.5     ragge #define IS_DHV			 8	/* Q-bus DHV-11 or DHQ-11 */
    123        1.2     ragge 
    124        1.2     ragge #define STATE_IDLE		000	/* no current output in progress */
    125        1.2     ragge #define STATE_DMA_RUNNING	001	/* DMA TX in progress */
    126        1.2     ragge #define STATE_DMA_STOPPED	002	/* DMA TX was aborted */
    127        1.2     ragge #define STATE_TX_ONE_CHAR	004	/* did a single char directly */
    128        1.2     ragge 
    129        1.2     ragge /* Flags used to monitor modem bits, make them understood outside driver */
    130        1.2     ragge 
    131        1.2     ragge #define DML_DTR		TIOCM_DTR
    132        1.2     ragge #define DML_RTS		TIOCM_RTS
    133        1.2     ragge #define DML_CTS		TIOCM_CTS
    134        1.2     ragge #define DML_DCD		TIOCM_CD
    135        1.2     ragge #define DML_RI		TIOCM_RI
    136        1.2     ragge #define DML_DSR		TIOCM_DSR
    137        1.2     ragge #define DML_BRK		0100000		/* no equivalent, we will mask */
    138        1.2     ragge 
    139       1.15     ragge #define DHU_READ_WORD(reg) \
    140       1.15     ragge 	bus_space_read_2(sc->sc_iot, sc->sc_ioh, reg)
    141       1.15     ragge #define DHU_WRITE_WORD(reg, val) \
    142       1.15     ragge 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val)
    143       1.15     ragge #define DHU_READ_BYTE(reg) \
    144       1.15     ragge 	bus_space_read_1(sc->sc_iot, sc->sc_ioh, reg)
    145       1.15     ragge #define DHU_WRITE_BYTE(reg, val) \
    146       1.15     ragge 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val)
    147       1.15     ragge 
    148       1.15     ragge 
    149        1.1     ragge /*  On a stock DHV, channel pairs (0/1, 2/3, etc.) must use */
    150        1.1     ragge /* a baud rate from the same group.  So limiting to B is likely */
    151        1.1     ragge /* best, although clone boards like the ABLE QHV allow all settings. */
    152        1.1     ragge 
    153       1.35      matt static const struct speedtab dhuspeedtab[] = {
    154        1.1     ragge   {       0,	0		},	/* Groups  */
    155        1.1     ragge   {      50,	DHU_LPR_B50	},	/* A	   */
    156        1.1     ragge   {      75,	DHU_LPR_B75	},	/* 	 B */
    157        1.1     ragge   {     110,	DHU_LPR_B110	},	/* A and B */
    158        1.1     ragge   {     134,	DHU_LPR_B134	},	/* A and B */
    159        1.1     ragge   {     150,	DHU_LPR_B150	},	/* 	 B */
    160        1.1     ragge   {     300,	DHU_LPR_B300	},	/* A and B */
    161        1.1     ragge   {     600,	DHU_LPR_B600	},	/* A and B */
    162        1.1     ragge   {    1200,	DHU_LPR_B1200	},	/* A and B */
    163        1.1     ragge   {    1800,	DHU_LPR_B1800	},	/* 	 B */
    164        1.1     ragge   {    2000,	DHU_LPR_B2000	},	/* 	 B */
    165        1.1     ragge   {    2400,	DHU_LPR_B2400	},	/* A and B */
    166        1.1     ragge   {    4800,	DHU_LPR_B4800	},	/* A and B */
    167        1.1     ragge   {    7200,	DHU_LPR_B7200	},	/* A	   */
    168        1.1     ragge   {    9600,	DHU_LPR_B9600	},	/* A and B */
    169        1.1     ragge   {   19200,	DHU_LPR_B19200	},	/* 	 B */
    170        1.1     ragge   {   38400,	DHU_LPR_B38400	},	/* A	   */
    171        1.1     ragge   {      -1,	-1		}
    172        1.1     ragge };
    173        1.1     ragge 
    174       1.37     perry static int	dhu_match(struct device *, struct cfdata *, void *);
    175       1.37     perry static void	dhu_attach(struct device *, struct device *, void *);
    176       1.37     perry static	void	dhurint(void *);
    177       1.37     perry static	void	dhuxint(void *);
    178       1.37     perry static	void	dhustart(struct tty *);
    179       1.37     perry static	int	dhuparam(struct tty *, struct termios *);
    180       1.37     perry static	int	dhuiflow(struct tty *, int);
    181       1.37     perry static unsigned	dhumctl(struct dhu_softc *,int, int, int);
    182       1.24     ragge 
    183       1.30   thorpej CFATTACH_DECL(dhu, sizeof(struct dhu_softc),
    184       1.31   thorpej     dhu_match, dhu_attach, NULL, NULL);
    185       1.10   thorpej 
    186       1.27   gehenna dev_type_open(dhuopen);
    187       1.27   gehenna dev_type_close(dhuclose);
    188       1.27   gehenna dev_type_read(dhuread);
    189       1.27   gehenna dev_type_write(dhuwrite);
    190       1.27   gehenna dev_type_ioctl(dhuioctl);
    191       1.27   gehenna dev_type_stop(dhustop);
    192       1.27   gehenna dev_type_tty(dhutty);
    193       1.27   gehenna dev_type_poll(dhupoll);
    194       1.27   gehenna 
    195       1.27   gehenna const struct cdevsw dhu_cdevsw = {
    196       1.27   gehenna 	dhuopen, dhuclose, dhuread, dhuwrite, dhuioctl,
    197       1.32  jdolecek 	dhustop, dhutty, dhupoll, nommap, ttykqfilter, D_TTY
    198       1.27   gehenna };
    199       1.27   gehenna 
    200        1.1     ragge /* Autoconfig handles: setup the controller to interrupt, */
    201        1.1     ragge /* then complete the housecleaning for full operation */
    202        1.1     ragge 
    203        1.1     ragge static int
    204       1.11     ragge dhu_match(parent, cf, aux)
    205       1.38    simonb 	struct device *parent;
    206       1.11     ragge 	struct cfdata *cf;
    207       1.38    simonb 	void *aux;
    208        1.1     ragge {
    209        1.1     ragge 	struct uba_attach_args *ua = aux;
    210       1.18  augustss 	int n;
    211        1.1     ragge 
    212        1.2     ragge 	/* Reset controller to initialize, enable TX/RX interrupts */
    213        1.1     ragge 	/* to catch floating vector info elsewhere when completed */
    214        1.1     ragge 
    215       1.15     ragge 	bus_space_write_2(ua->ua_iot, ua->ua_ioh, DHU_UBA_CSR,
    216       1.15     ragge 	    DHU_CSR_MASTER_RESET | DHU_CSR_RXIE | DHU_CSR_TXIE);
    217        1.1     ragge 
    218        1.1     ragge 	/* Now wait up to 3 seconds for self-test to complete. */
    219        1.1     ragge 
    220        1.1     ragge 	for (n = 0; n < 300; n++) {
    221        1.1     ragge 		DELAY(10000);
    222       1.15     ragge 		if ((bus_space_read_2(ua->ua_iot, ua->ua_ioh, DHU_UBA_CSR) &
    223       1.15     ragge 		    DHU_CSR_MASTER_RESET) == 0)
    224        1.1     ragge 			break;
    225        1.1     ragge 	}
    226        1.1     ragge 
    227        1.1     ragge 	/* If the RESET did not clear after 3 seconds, */
    228        1.1     ragge 	/* the controller must be broken. */
    229        1.1     ragge 
    230        1.2     ragge 	if (n >= 300)
    231        1.1     ragge 		return 0;
    232        1.1     ragge 
    233        1.1     ragge 	/* Check whether diagnostic run has signalled a failure. */
    234        1.1     ragge 
    235       1.15     ragge 	if ((bus_space_read_2(ua->ua_iot, ua->ua_ioh, DHU_UBA_CSR) &
    236       1.15     ragge 	    DHU_CSR_DIAG_FAIL) != 0)
    237        1.1     ragge 		return 0;
    238        1.1     ragge 
    239       1.38    simonb 	return 1;
    240        1.1     ragge }
    241        1.1     ragge 
    242        1.1     ragge static void
    243        1.5     ragge dhu_attach(parent, self, aux)
    244       1.38    simonb 	struct device *parent, *self;
    245       1.38    simonb 	void *aux;
    246        1.1     ragge {
    247       1.42   thorpej 	struct dhu_softc *sc = device_private(self);
    248       1.18  augustss 	struct uba_attach_args *ua = aux;
    249       1.18  augustss 	unsigned c;
    250       1.18  augustss 	int n, i;
    251        1.1     ragge 
    252       1.15     ragge 	sc->sc_iot = ua->ua_iot;
    253       1.15     ragge 	sc->sc_ioh = ua->ua_ioh;
    254       1.16     ragge 	sc->sc_dmat = ua->ua_dmat;
    255        1.1     ragge 	/* Process the 8 bytes of diagnostic info put into */
    256        1.1     ragge 	/* the FIFO following the master reset operation. */
    257        1.1     ragge 
    258        1.8  christos 	printf("\n%s:", self->dv_xname);
    259        1.1     ragge 	for (n = 0; n < 8; n++) {
    260       1.15     ragge 		c = DHU_READ_WORD(DHU_UBA_RBUF);
    261        1.1     ragge 
    262        1.2     ragge 		if ((c&DHU_DIAG_CODE) == DHU_DIAG_CODE) {
    263        1.2     ragge 			if ((c&0200) == 0000)
    264        1.8  christos 				printf(" rom(%d) version %d",
    265        1.1     ragge 					((c>>1)&01), ((c>>2)&037));
    266        1.2     ragge 			else if (((c>>2)&07) != 0)
    267        1.8  christos 				printf(" diag-error(proc%d)=%x",
    268        1.1     ragge 					((c>>1)&01), ((c>>2)&07));
    269        1.1     ragge 		}
    270        1.1     ragge 	}
    271        1.1     ragge 
    272       1.15     ragge 	c = DHU_READ_WORD(DHU_UBA_STAT);
    273        1.2     ragge 
    274        1.5     ragge 	sc->sc_type = (c & DHU_STAT_DHU)? IS_DHU: IS_DHV;
    275        1.1     ragge 
    276       1.33     ragge 	sc->sc_lines = 8;	/* default */
    277       1.33     ragge 	if (sc->sc_type == IS_DHU && (c & DHU_STAT_MDL))
    278       1.33     ragge 		sc->sc_lines = 16;
    279       1.33     ragge 
    280       1.33     ragge 	printf("\n%s: DH%s-11\n", self->dv_xname,
    281       1.33     ragge 	    sc->sc_type == IS_DHU ? "U" : "V");
    282       1.33     ragge 
    283       1.33     ragge 	for (i = 0; i < sc->sc_lines; i++) {
    284       1.16     ragge 		struct tty *tp;
    285       1.16     ragge 		tp = sc->sc_dhu[i].dhu_tty = ttymalloc();
    286       1.16     ragge 		sc->sc_dhu[i].dhu_state = STATE_IDLE;
    287       1.38    simonb 		bus_dmamap_create(sc->sc_dmat, tp->t_outq.c_cn, 1,
    288       1.16     ragge 		    tp->t_outq.c_cn, 0, BUS_DMA_ALLOCNOW|BUS_DMA_NOWAIT,
    289       1.16     ragge 		    &sc->sc_dhu[i].dhu_dmah);
    290       1.16     ragge 		bus_dmamap_load(sc->sc_dmat, sc->sc_dhu[i].dhu_dmah,
    291       1.16     ragge 		    tp->t_outq.c_cs, tp->t_outq.c_cn, 0, BUS_DMA_NOWAIT);
    292       1.38    simonb 
    293       1.16     ragge 	}
    294       1.16     ragge 
    295       1.17      matt 	/* Now establish RX & TX interrupt handlers */
    296       1.17      matt 
    297       1.19      matt 	uba_intr_establish(ua->ua_icookie, ua->ua_cvec,
    298       1.19      matt 		dhurint, sc, &sc->sc_rintrcnt);
    299       1.19      matt 	uba_intr_establish(ua->ua_icookie, ua->ua_cvec + 4,
    300       1.19      matt 		dhuxint, sc, &sc->sc_tintrcnt);
    301       1.20      matt 	evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
    302       1.20      matt 		sc->sc_dev.dv_xname, "rintr");
    303       1.20      matt 	evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
    304       1.20      matt 		sc->sc_dev.dv_xname, "tintr");
    305        1.1     ragge }
    306        1.1     ragge 
    307        1.2     ragge /* Receiver Interrupt */
    308        1.2     ragge 
    309        1.1     ragge static void
    310       1.17      matt dhurint(arg)
    311       1.17      matt 	void *arg;
    312        1.1     ragge {
    313       1.17      matt 	struct	dhu_softc *sc = arg;
    314       1.18  augustss 	struct tty *tp;
    315       1.18  augustss 	int cc, line;
    316       1.18  augustss 	unsigned c, delta;
    317        1.1     ragge 	int overrun = 0;
    318        1.2     ragge 
    319       1.15     ragge 	while ((c = DHU_READ_WORD(DHU_UBA_RBUF)) & DHU_RBUF_DATA_VALID) {
    320        1.1     ragge 
    321        1.1     ragge 		/* Ignore diagnostic FIFO entries. */
    322        1.1     ragge 
    323        1.5     ragge 		if ((c & DHU_DIAG_CODE) == DHU_DIAG_CODE)
    324        1.1     ragge 			continue;
    325        1.1     ragge 
    326        1.5     ragge 		cc = c & 0xFF;
    327        1.5     ragge 		line = DHU_LINE(c>>8);
    328        1.5     ragge 		tp = sc->sc_dhu[line].dhu_tty;
    329        1.1     ragge 
    330        1.1     ragge 		/* LINK.TYPE is set so we get modem control FIFO entries */
    331        1.1     ragge 
    332        1.1     ragge 		if ((c & DHU_DIAG_CODE) == DHU_MODEM_CODE) {
    333        1.2     ragge 			c = (c << 8);
    334        1.1     ragge 			/* Do MDMBUF flow control, wakeup sleeping opens */
    335        1.1     ragge 			if (c & DHU_STAT_DCD) {
    336        1.1     ragge 				if (!(tp->t_state & TS_CARR_ON))
    337       1.21       eeh 				    (void)(*tp->t_linesw->l_modem)(tp, 1);
    338        1.1     ragge 			}
    339        1.1     ragge 			else if ((tp->t_state & TS_CARR_ON) &&
    340       1.21       eeh 				(*tp->t_linesw->l_modem)(tp, 0) == 0)
    341        1.5     ragge 					(void) dhumctl(sc, line, 0, DMSET);
    342        1.2     ragge 
    343        1.2     ragge 			/* Do CRTSCTS flow control */
    344        1.5     ragge 			delta = c ^ sc->sc_dhu[line].dhu_modem;
    345        1.5     ragge 			sc->sc_dhu[line].dhu_modem = c;
    346        1.2     ragge 			if ((delta & DHU_STAT_CTS) &&
    347        1.2     ragge 			    (tp->t_state & TS_ISOPEN) &&
    348        1.2     ragge 			    (tp->t_cflag & CRTSCTS)) {
    349        1.2     ragge 				if (c & DHU_STAT_CTS) {
    350        1.2     ragge 					tp->t_state &= ~TS_TTSTOP;
    351        1.5     ragge 					ttstart(tp);
    352        1.2     ragge 				} else {
    353        1.2     ragge 					tp->t_state |= TS_TTSTOP;
    354        1.5     ragge 					dhustop(tp, 0);
    355        1.2     ragge 				}
    356        1.2     ragge 			}
    357        1.2     ragge 			continue;
    358        1.1     ragge 		}
    359        1.1     ragge 
    360        1.5     ragge 		if (!(tp->t_state & TS_ISOPEN)) {
    361  1.47.20.3    bouyer 			clwakeup(&tp->t_rawq);
    362        1.5     ragge 			continue;
    363        1.5     ragge 		}
    364        1.5     ragge 
    365        1.1     ragge 		if ((c & DHU_RBUF_OVERRUN_ERR) && overrun == 0) {
    366        1.5     ragge 			log(LOG_WARNING, "%s: silo overflow, line %d\n",
    367        1.5     ragge 				sc->sc_dev.dv_xname, line);
    368        1.1     ragge 			overrun = 1;
    369        1.1     ragge 		}
    370        1.1     ragge 		/* A BREAK key will appear as a NULL with a framing error */
    371        1.1     ragge 		if (c & DHU_RBUF_FRAMING_ERR)
    372        1.1     ragge 			cc |= TTY_FE;
    373        1.1     ragge 		if (c & DHU_RBUF_PARITY_ERR)
    374        1.1     ragge 			cc |= TTY_PE;
    375        1.1     ragge 
    376       1.21       eeh 		(*tp->t_linesw->l_rint)(cc, tp);
    377        1.1     ragge 	}
    378        1.1     ragge }
    379        1.1     ragge 
    380        1.1     ragge /* Transmitter Interrupt */
    381        1.1     ragge 
    382        1.1     ragge static void
    383       1.17      matt dhuxint(arg)
    384       1.17      matt 	void *arg;
    385        1.1     ragge {
    386       1.18  augustss 	struct	dhu_softc *sc = arg;
    387       1.18  augustss 	struct tty *tp;
    388       1.33     ragge 	int line, i;
    389        1.2     ragge 
    390       1.33     ragge 	while ((i = DHU_READ_BYTE(DHU_UBA_CSR_HI)) & (DHU_CSR_TX_ACTION >> 8)) {
    391        1.1     ragge 
    392       1.33     ragge 		line = DHU_LINE(i);
    393       1.33     ragge 		tp = sc->sc_dhu[line].dhu_tty;
    394        1.2     ragge 
    395       1.33     ragge 		if (i & (DHU_CSR_TX_DMA_ERROR >> 8))
    396       1.33     ragge 			printf("%s: DMA ERROR on line: %d\n",
    397       1.33     ragge 			    sc->sc_dev.dv_xname, line);
    398       1.33     ragge 		if (i & (DHU_CSR_DIAG_FAIL >> 8))
    399       1.33     ragge 			printf("%s: DIAG FAIL on line: %d\n",
    400       1.33     ragge 			    sc->sc_dev.dv_xname, line);
    401       1.33     ragge 
    402       1.33     ragge 		tp->t_state &= ~TS_BUSY;
    403       1.33     ragge 		if (tp->t_state & TS_FLUSH)
    404       1.33     ragge 			tp->t_state &= ~TS_FLUSH;
    405       1.33     ragge 		else {
    406       1.33     ragge 			if (sc->sc_dhu[line].dhu_state == STATE_DMA_STOPPED)
    407       1.38    simonb 				sc->sc_dhu[line].dhu_cc -=
    408       1.33     ragge 				    DHU_READ_WORD(DHU_UBA_TBUFCNT);
    409       1.33     ragge 			ndflush(&tp->t_outq, sc->sc_dhu[line].dhu_cc);
    410       1.33     ragge 			sc->sc_dhu[line].dhu_cc = 0;
    411       1.33     ragge 		}
    412        1.1     ragge 
    413       1.33     ragge 		sc->sc_dhu[line].dhu_state = STATE_IDLE;
    414        1.2     ragge 
    415       1.33     ragge 		(*tp->t_linesw->l_start)(tp);
    416       1.33     ragge 	}
    417        1.1     ragge }
    418        1.1     ragge 
    419        1.1     ragge int
    420       1.40  christos dhuopen(dev, flag, mode, l)
    421        1.1     ragge 	dev_t dev;
    422        1.1     ragge 	int flag, mode;
    423       1.40  christos 	struct lwp *l;
    424        1.1     ragge {
    425       1.18  augustss 	struct tty *tp;
    426       1.18  augustss 	int unit, line;
    427        1.5     ragge 	struct dhu_softc *sc;
    428  1.47.20.2    bouyer 	int error = 0;
    429        1.1     ragge 
    430        1.5     ragge 	unit = DHU_M2U(minor(dev));
    431        1.5     ragge 	line = DHU_LINE(minor(dev));
    432        1.5     ragge 
    433        1.5     ragge 	if (unit >= dhu_cd.cd_ndevs || dhu_cd.cd_devs[unit] == NULL)
    434        1.1     ragge 		return (ENXIO);
    435        1.5     ragge 
    436        1.5     ragge 	sc = dhu_cd.cd_devs[unit];
    437        1.5     ragge 
    438       1.33     ragge 	if (line >= sc->sc_lines)
    439        1.5     ragge 		return ENXIO;
    440        1.5     ragge 
    441  1.47.20.2    bouyer 	if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
    442  1.47.20.2    bouyer 		return (EBUSY);
    443  1.47.20.2    bouyer 
    444  1.47.20.2    bouyer 	mutex_spin_enter(&tty_lock);
    445       1.33     ragge 	if (sc->sc_type == IS_DHU) {
    446  1.47.20.2    bouyer 		/* CSR 3:0 must be 0 */
    447       1.33     ragge 		DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE);
    448  1.47.20.2    bouyer 		/* RX int delay 10ms */
    449       1.33     ragge 		DHU_WRITE_BYTE(DHU_UBA_RXTIME, 10);
    450       1.33     ragge 	}
    451       1.16     ragge 	DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line);
    452       1.16     ragge 	sc->sc_dhu[line].dhu_modem = DHU_READ_WORD(DHU_UBA_STAT);
    453       1.16     ragge 
    454        1.5     ragge 	tp = sc->sc_dhu[line].dhu_tty;
    455        1.2     ragge 	tp->t_oproc   = dhustart;
    456        1.2     ragge 	tp->t_param   = dhuparam;
    457        1.2     ragge 	tp->t_hwiflow = dhuiflow;
    458        1.1     ragge 	tp->t_dev = dev;
    459       1.46      elad 
    460        1.1     ragge 	if ((tp->t_state & TS_ISOPEN) == 0) {
    461        1.1     ragge 		ttychars(tp);
    462        1.2     ragge 		if (tp->t_ispeed == 0) {
    463        1.2     ragge 			tp->t_iflag = TTYDEF_IFLAG;
    464        1.2     ragge 			tp->t_oflag = TTYDEF_OFLAG;
    465        1.2     ragge 			tp->t_cflag = TTYDEF_CFLAG;
    466        1.2     ragge 			tp->t_lflag = TTYDEF_LFLAG;
    467        1.2     ragge 			tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
    468        1.2     ragge 		}
    469        1.1     ragge 		(void) dhuparam(tp, &tp->t_termios);
    470        1.1     ragge 		ttsetwater(tp);
    471       1.46      elad 	}
    472        1.1     ragge 	/* Use DMBIS and *not* DMSET or else we clobber incoming bits */
    473        1.5     ragge 	if (dhumctl(sc, line, DML_DTR|DML_RTS, DMBIS) & DML_DCD)
    474        1.1     ragge 		tp->t_state |= TS_CARR_ON;
    475        1.1     ragge 	while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
    476       1.38    simonb 	    !(tp->t_state & TS_CARR_ON)) {
    477       1.12     ragge 		tp->t_wopen++;
    478  1.47.20.2    bouyer 		error = ttysleep(tp, &tp->t_rawq.c_cv, true, 0);
    479       1.12     ragge 		tp->t_wopen--;
    480        1.1     ragge 		if (error)
    481        1.1     ragge 			break;
    482        1.1     ragge 	}
    483  1.47.20.2    bouyer 	mutex_spin_exit(&tty_lock);
    484        1.1     ragge 	if (error)
    485        1.1     ragge 		return (error);
    486       1.21       eeh 	return ((*tp->t_linesw->l_open)(dev, tp));
    487        1.1     ragge }
    488        1.1     ragge 
    489        1.1     ragge /*ARGSUSED*/
    490        1.1     ragge int
    491       1.40  christos dhuclose(dev, flag, mode, l)
    492        1.1     ragge 	dev_t dev;
    493        1.1     ragge 	int flag, mode;
    494       1.40  christos 	struct lwp *l;
    495        1.1     ragge {
    496       1.18  augustss 	struct tty *tp;
    497       1.18  augustss 	int unit, line;
    498        1.5     ragge 	struct dhu_softc *sc;
    499        1.5     ragge 
    500        1.5     ragge 	unit = DHU_M2U(minor(dev));
    501        1.5     ragge 	line = DHU_LINE(minor(dev));
    502        1.1     ragge 
    503        1.5     ragge 	sc = dhu_cd.cd_devs[unit];
    504        1.5     ragge 
    505        1.5     ragge 	tp = sc->sc_dhu[line].dhu_tty;
    506        1.1     ragge 
    507       1.21       eeh 	(*tp->t_linesw->l_close)(tp, flag);
    508        1.1     ragge 
    509        1.1     ragge 	/* Make sure a BREAK state is not left enabled. */
    510        1.1     ragge 
    511        1.5     ragge 	(void) dhumctl(sc, line, DML_BRK, DMBIC);
    512        1.1     ragge 
    513        1.1     ragge 	/* Do a hangup if so required. */
    514        1.1     ragge 
    515       1.12     ragge 	if ((tp->t_cflag & HUPCL) || tp->t_wopen ||
    516        1.1     ragge 	    !(tp->t_state & TS_ISOPEN))
    517        1.5     ragge 		(void) dhumctl(sc, line, 0, DMSET);
    518        1.1     ragge 
    519        1.1     ragge 	return (ttyclose(tp));
    520        1.1     ragge }
    521        1.1     ragge 
    522        1.1     ragge int
    523        1.5     ragge dhuread(dev, uio, flag)
    524        1.1     ragge 	dev_t dev;
    525        1.1     ragge 	struct uio *uio;
    526       1.27   gehenna 	int flag;
    527        1.1     ragge {
    528       1.18  augustss 	struct dhu_softc *sc;
    529       1.18  augustss 	struct tty *tp;
    530        1.1     ragge 
    531        1.5     ragge 	sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))];
    532        1.5     ragge 
    533        1.5     ragge 	tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty;
    534       1.21       eeh 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    535        1.1     ragge }
    536        1.1     ragge 
    537        1.1     ragge int
    538        1.5     ragge dhuwrite(dev, uio, flag)
    539        1.1     ragge 	dev_t dev;
    540        1.1     ragge 	struct uio *uio;
    541       1.27   gehenna 	int flag;
    542        1.1     ragge {
    543       1.18  augustss 	struct dhu_softc *sc;
    544       1.18  augustss 	struct tty *tp;
    545        1.1     ragge 
    546        1.5     ragge 	sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))];
    547        1.5     ragge 
    548        1.5     ragge 	tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty;
    549       1.21       eeh 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    550       1.23       scw }
    551       1.23       scw 
    552       1.23       scw int
    553       1.40  christos dhupoll(dev, events, l)
    554       1.23       scw 	dev_t dev;
    555       1.23       scw 	int events;
    556       1.40  christos 	struct lwp *l;
    557       1.23       scw {
    558       1.23       scw 	struct dhu_softc *sc;
    559       1.23       scw 	struct tty *tp;
    560       1.23       scw 
    561       1.23       scw 	sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))];
    562       1.23       scw 
    563       1.23       scw 	tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty;
    564       1.40  christos 	return ((*tp->t_linesw->l_poll)(tp, events, l));
    565        1.1     ragge }
    566        1.1     ragge 
    567        1.1     ragge /*ARGSUSED*/
    568        1.1     ragge int
    569       1.40  christos dhuioctl(dev, cmd, data, flag, l)
    570        1.1     ragge 	dev_t dev;
    571        1.4     ragge 	u_long cmd;
    572       1.47  christos 	void *data;
    573        1.1     ragge 	int flag;
    574       1.40  christos 	struct lwp *l;
    575        1.1     ragge {
    576       1.18  augustss 	struct dhu_softc *sc;
    577       1.18  augustss 	struct tty *tp;
    578       1.18  augustss 	int unit, line;
    579        1.1     ragge 	int error;
    580        1.1     ragge 
    581        1.5     ragge 	unit = DHU_M2U(minor(dev));
    582        1.5     ragge 	line = DHU_LINE(minor(dev));
    583        1.5     ragge 	sc = dhu_cd.cd_devs[unit];
    584        1.5     ragge 	tp = sc->sc_dhu[line].dhu_tty;
    585        1.5     ragge 
    586       1.40  christos 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
    587       1.26    atatat 	if (error != EPASSTHROUGH)
    588        1.1     ragge 		return (error);
    589       1.26    atatat 
    590       1.40  christos 	error = ttioctl(tp, cmd, data, flag, l);
    591       1.26    atatat 	if (error != EPASSTHROUGH)
    592        1.1     ragge 		return (error);
    593        1.1     ragge 
    594        1.1     ragge 	switch (cmd) {
    595        1.1     ragge 
    596        1.1     ragge 	case TIOCSBRK:
    597        1.5     ragge 		(void) dhumctl(sc, line, DML_BRK, DMBIS);
    598        1.1     ragge 		break;
    599        1.1     ragge 
    600        1.1     ragge 	case TIOCCBRK:
    601        1.5     ragge 		(void) dhumctl(sc, line, DML_BRK, DMBIC);
    602        1.1     ragge 		break;
    603        1.1     ragge 
    604        1.1     ragge 	case TIOCSDTR:
    605        1.5     ragge 		(void) dhumctl(sc, line, DML_DTR|DML_RTS, DMBIS);
    606        1.1     ragge 		break;
    607        1.1     ragge 
    608        1.1     ragge 	case TIOCCDTR:
    609        1.5     ragge 		(void) dhumctl(sc, line, DML_DTR|DML_RTS, DMBIC);
    610        1.1     ragge 		break;
    611        1.1     ragge 
    612        1.1     ragge 	case TIOCMSET:
    613        1.5     ragge 		(void) dhumctl(sc, line, *(int *)data, DMSET);
    614        1.1     ragge 		break;
    615        1.1     ragge 
    616        1.1     ragge 	case TIOCMBIS:
    617        1.5     ragge 		(void) dhumctl(sc, line, *(int *)data, DMBIS);
    618        1.1     ragge 		break;
    619        1.1     ragge 
    620        1.1     ragge 	case TIOCMBIC:
    621        1.5     ragge 		(void) dhumctl(sc, line, *(int *)data, DMBIC);
    622        1.1     ragge 		break;
    623        1.1     ragge 
    624        1.1     ragge 	case TIOCMGET:
    625        1.5     ragge 		*(int *)data = (dhumctl(sc, line, 0, DMGET) & ~DML_BRK);
    626        1.1     ragge 		break;
    627        1.1     ragge 
    628        1.1     ragge 	default:
    629       1.26    atatat 		return (EPASSTHROUGH);
    630        1.1     ragge 	}
    631        1.1     ragge 	return (0);
    632        1.1     ragge }
    633        1.1     ragge 
    634        1.2     ragge struct tty *
    635        1.5     ragge dhutty(dev)
    636       1.38    simonb 	dev_t dev;
    637        1.2     ragge {
    638        1.5     ragge 	struct dhu_softc *sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))];
    639        1.5     ragge 	struct tty *tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty;
    640       1.38    simonb 	return (tp);
    641        1.2     ragge }
    642        1.2     ragge 
    643        1.1     ragge /*ARGSUSED*/
    644        1.6   mycroft void
    645        1.5     ragge dhustop(tp, flag)
    646       1.18  augustss 	struct tty *tp;
    647       1.27   gehenna 	int flag;
    648        1.1     ragge {
    649       1.18  augustss 	struct dhu_softc *sc;
    650       1.18  augustss 	int line;
    651        1.1     ragge 	int s;
    652        1.1     ragge 
    653        1.1     ragge 	s = spltty();
    654        1.1     ragge 
    655        1.5     ragge 	if (tp->t_state & TS_BUSY) {
    656        1.5     ragge 
    657        1.5     ragge 		sc = dhu_cd.cd_devs[DHU_M2U(minor(tp->t_dev))];
    658        1.5     ragge 		line = DHU_LINE(minor(tp->t_dev));
    659        1.5     ragge 
    660        1.5     ragge 		if (sc->sc_dhu[line].dhu_state == STATE_DMA_RUNNING) {
    661        1.5     ragge 
    662        1.5     ragge 			sc->sc_dhu[line].dhu_state = STATE_DMA_STOPPED;
    663        1.2     ragge 
    664       1.15     ragge 			DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line);
    665       1.38    simonb 			DHU_WRITE_WORD(DHU_UBA_LNCTRL,
    666       1.38    simonb 			    DHU_READ_WORD(DHU_UBA_LNCTRL) |
    667       1.15     ragge 			    DHU_LNCTRL_DMA_ABORT);
    668        1.2     ragge 		}
    669        1.1     ragge 
    670        1.1     ragge 		if (!(tp->t_state & TS_TTSTOP))
    671        1.1     ragge 			tp->t_state |= TS_FLUSH;
    672        1.1     ragge 	}
    673        1.1     ragge 	(void) splx(s);
    674        1.1     ragge }
    675        1.1     ragge 
    676        1.1     ragge static void
    677        1.5     ragge dhustart(tp)
    678       1.18  augustss 	struct tty *tp;
    679        1.1     ragge {
    680       1.18  augustss 	struct dhu_softc *sc;
    681       1.18  augustss 	int line, cc;
    682       1.18  augustss 	int addr;
    683        1.1     ragge 	int s;
    684        1.1     ragge 
    685        1.1     ragge 	s = spltty();
    686        1.1     ragge 	if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
    687        1.1     ragge 		goto out;
    688  1.47.20.3    bouyer 	if (!ttypull(tp))
    689        1.1     ragge 		goto out;
    690        1.1     ragge 	cc = ndqb(&tp->t_outq, 0);
    691       1.38    simonb 	if (cc == 0)
    692        1.1     ragge 		goto out;
    693        1.1     ragge 
    694        1.1     ragge 	tp->t_state |= TS_BUSY;
    695        1.1     ragge 
    696        1.5     ragge 	sc = dhu_cd.cd_devs[DHU_M2U(minor(tp->t_dev))];
    697        1.5     ragge 
    698        1.5     ragge 	line = DHU_LINE(minor(tp->t_dev));
    699        1.1     ragge 
    700       1.15     ragge 	DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line);
    701        1.5     ragge 
    702        1.5     ragge 	sc->sc_dhu[line].dhu_cc = cc;
    703        1.2     ragge 
    704       1.33     ragge 	if (cc == 1 && sc->sc_type == IS_DHV) {
    705        1.2     ragge 
    706        1.5     ragge 		sc->sc_dhu[line].dhu_state = STATE_TX_ONE_CHAR;
    707       1.38    simonb 
    708       1.38    simonb 		DHU_WRITE_WORD(DHU_UBA_TXCHAR,
    709       1.15     ragge 		    DHU_TXCHAR_DATA_VALID | *tp->t_outq.c_cf);
    710        1.2     ragge 
    711        1.5     ragge 	} else {
    712        1.5     ragge 
    713        1.5     ragge 		sc->sc_dhu[line].dhu_state = STATE_DMA_RUNNING;
    714        1.5     ragge 
    715       1.16     ragge 		addr = sc->sc_dhu[line].dhu_dmah->dm_segs[0].ds_addr +
    716        1.2     ragge 			(tp->t_outq.c_cf - tp->t_outq.c_cs);
    717        1.2     ragge 
    718       1.15     ragge 		DHU_WRITE_WORD(DHU_UBA_TBUFCNT, cc);
    719       1.15     ragge 		DHU_WRITE_WORD(DHU_UBA_TBUFAD1, addr & 0xFFFF);
    720       1.15     ragge 		DHU_WRITE_WORD(DHU_UBA_TBUFAD2, ((addr>>16) & 0x3F) |
    721       1.15     ragge 		    DHU_TBUFAD2_TX_ENABLE);
    722       1.38    simonb 		DHU_WRITE_WORD(DHU_UBA_LNCTRL,
    723       1.15     ragge 		    DHU_READ_WORD(DHU_UBA_LNCTRL) & ~DHU_LNCTRL_DMA_ABORT);
    724       1.15     ragge 		DHU_WRITE_WORD(DHU_UBA_TBUFAD2,
    725       1.15     ragge 		    DHU_READ_WORD(DHU_UBA_TBUFAD2) | DHU_TBUFAD2_DMA_START);
    726        1.2     ragge 	}
    727        1.1     ragge out:
    728        1.1     ragge 	(void) splx(s);
    729        1.1     ragge 	return;
    730        1.1     ragge }
    731        1.1     ragge 
    732        1.1     ragge static int
    733        1.5     ragge dhuparam(tp, t)
    734       1.18  augustss 	struct tty *tp;
    735       1.18  augustss 	struct termios *t;
    736        1.1     ragge {
    737        1.5     ragge 	struct dhu_softc *sc;
    738       1.18  augustss 	int cflag = t->c_cflag;
    739        1.1     ragge 	int ispeed = ttspeedtab(t->c_ispeed, dhuspeedtab);
    740        1.1     ragge 	int ospeed = ttspeedtab(t->c_ospeed, dhuspeedtab);
    741       1.18  augustss 	unsigned lpr, lnctrl;
    742        1.5     ragge 	int unit, line;
    743        1.1     ragge 	int s;
    744        1.1     ragge 
    745        1.5     ragge 	unit = DHU_M2U(minor(tp->t_dev));
    746        1.5     ragge 	line = DHU_LINE(minor(tp->t_dev));
    747        1.5     ragge 
    748        1.5     ragge 	sc = dhu_cd.cd_devs[unit];
    749        1.5     ragge 
    750        1.1     ragge 	/* check requested parameters */
    751       1.38    simonb 	if (ospeed < 0 || ispeed < 0)
    752       1.38    simonb 		return (EINVAL);
    753        1.1     ragge 
    754       1.38    simonb 	tp->t_ispeed = t->c_ispeed;
    755       1.38    simonb 	tp->t_ospeed = t->c_ospeed;
    756       1.38    simonb 	tp->t_cflag = cflag;
    757        1.1     ragge 
    758        1.1     ragge 	if (ospeed == 0) {
    759        1.5     ragge 		(void) dhumctl(sc, line, 0, DMSET);	/* hang up line */
    760        1.1     ragge 		return (0);
    761        1.1     ragge 	}
    762        1.1     ragge 
    763        1.1     ragge 	s = spltty();
    764       1.15     ragge 	DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line);
    765        1.1     ragge 
    766        1.1     ragge 	lpr = ((ispeed&017)<<8) | ((ospeed&017)<<12) ;
    767        1.1     ragge 
    768        1.5     ragge 	switch (cflag & CSIZE) {
    769        1.5     ragge 
    770        1.5     ragge 	case CS5:
    771        1.1     ragge 		lpr |= DHU_LPR_5_BIT_CHAR;
    772        1.1     ragge 		break;
    773        1.5     ragge 
    774        1.5     ragge 	case CS6:
    775        1.1     ragge 		lpr |= DHU_LPR_6_BIT_CHAR;
    776        1.1     ragge 		break;
    777        1.5     ragge 
    778        1.5     ragge 	case CS7:
    779        1.1     ragge 		lpr |= DHU_LPR_7_BIT_CHAR;
    780        1.1     ragge 		break;
    781        1.5     ragge 
    782        1.5     ragge 	default:
    783        1.1     ragge 		lpr |= DHU_LPR_8_BIT_CHAR;
    784        1.1     ragge 		break;
    785        1.1     ragge 	}
    786        1.5     ragge 
    787        1.1     ragge 	if (cflag & PARENB)
    788        1.1     ragge 		lpr |= DHU_LPR_PARENB;
    789        1.1     ragge 	if (!(cflag & PARODD))
    790        1.1     ragge 		lpr |= DHU_LPR_EPAR;
    791        1.1     ragge 	if (cflag & CSTOPB)
    792        1.1     ragge 		lpr |= DHU_LPR_2_STOP;
    793        1.1     ragge 
    794       1.15     ragge 	DHU_WRITE_WORD(DHU_UBA_LPR, lpr);
    795        1.1     ragge 
    796       1.38    simonb 	DHU_WRITE_WORD(DHU_UBA_TBUFAD2,
    797       1.15     ragge 	    DHU_READ_WORD(DHU_UBA_TBUFAD2) | DHU_TBUFAD2_TX_ENABLE);
    798        1.2     ragge 
    799       1.15     ragge 	lnctrl = DHU_READ_WORD(DHU_UBA_LNCTRL);
    800        1.2     ragge 
    801        1.1     ragge 	/* Setting LINK.TYPE enables modem signal change interrupts. */
    802        1.1     ragge 
    803        1.2     ragge 	lnctrl |= (DHU_LNCTRL_RX_ENABLE | DHU_LNCTRL_LINK_TYPE);
    804        1.2     ragge 
    805        1.5     ragge 	/* Enable the auto XON/XOFF feature on the controller */
    806        1.5     ragge 
    807        1.2     ragge 	if (t->c_iflag & IXON)
    808        1.2     ragge 		lnctrl |= DHU_LNCTRL_OAUTO;
    809        1.2     ragge 	else
    810        1.2     ragge 		lnctrl &= ~DHU_LNCTRL_OAUTO;
    811        1.2     ragge 
    812        1.2     ragge 	if (t->c_iflag & IXOFF)
    813        1.2     ragge 		lnctrl |= DHU_LNCTRL_IAUTO;
    814        1.2     ragge 	else
    815        1.2     ragge 		lnctrl &= ~DHU_LNCTRL_IAUTO;
    816        1.2     ragge 
    817       1.15     ragge 	DHU_WRITE_WORD(DHU_UBA_LNCTRL, lnctrl);
    818        1.2     ragge 
    819        1.1     ragge 	(void) splx(s);
    820        1.1     ragge 	return (0);
    821        1.1     ragge }
    822        1.1     ragge 
    823        1.1     ragge static int
    824        1.5     ragge dhuiflow(tp, flag)
    825        1.2     ragge 	struct tty *tp;
    826        1.2     ragge 	int flag;
    827        1.2     ragge {
    828       1.18  augustss 	struct dhu_softc *sc;
    829       1.18  augustss 	int line = DHU_LINE(minor(tp->t_dev));
    830        1.2     ragge 
    831        1.2     ragge 	if (tp->t_cflag & CRTSCTS) {
    832        1.5     ragge 		sc = dhu_cd.cd_devs[DHU_M2U(minor(tp->t_dev))];
    833        1.5     ragge 		(void) dhumctl(sc, line, DML_RTS, ((flag)? DMBIC: DMBIS));
    834        1.2     ragge 		return (1);
    835        1.2     ragge 	}
    836        1.2     ragge 	return (0);
    837        1.2     ragge }
    838        1.2     ragge 
    839        1.2     ragge static unsigned
    840        1.5     ragge dhumctl(sc, line, bits, how)
    841        1.5     ragge 	struct dhu_softc *sc;
    842        1.5     ragge 	int line, bits, how;
    843        1.1     ragge {
    844       1.18  augustss 	unsigned status;
    845       1.18  augustss 	unsigned lnctrl;
    846       1.18  augustss 	unsigned mbits;
    847        1.1     ragge 	int s;
    848        1.1     ragge 
    849        1.1     ragge 	s = spltty();
    850        1.1     ragge 
    851       1.15     ragge 	DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line);
    852        1.1     ragge 
    853        1.1     ragge 	mbits = 0;
    854        1.1     ragge 
    855        1.1     ragge 	/* external signals as seen from the port */
    856        1.1     ragge 
    857       1.15     ragge 	status = DHU_READ_WORD(DHU_UBA_STAT);
    858        1.1     ragge 
    859        1.2     ragge 	if (status & DHU_STAT_CTS)
    860        1.1     ragge 		mbits |= DML_CTS;
    861        1.1     ragge 
    862        1.2     ragge 	if (status & DHU_STAT_DCD)
    863        1.1     ragge 		mbits |= DML_DCD;
    864        1.1     ragge 
    865        1.2     ragge 	if (status & DHU_STAT_DSR)
    866        1.1     ragge 		mbits |= DML_DSR;
    867        1.1     ragge 
    868        1.2     ragge 	if (status & DHU_STAT_RI)
    869        1.1     ragge 		mbits |= DML_RI;
    870        1.1     ragge 
    871        1.1     ragge 	/* internal signals/state delivered to port */
    872        1.1     ragge 
    873       1.15     ragge 	lnctrl = DHU_READ_WORD(DHU_UBA_LNCTRL);
    874        1.1     ragge 
    875        1.2     ragge 	if (lnctrl & DHU_LNCTRL_RTS)
    876        1.1     ragge 		mbits |= DML_RTS;
    877        1.1     ragge 
    878        1.2     ragge 	if (lnctrl & DHU_LNCTRL_DTR)
    879        1.1     ragge 		mbits |= DML_DTR;
    880        1.1     ragge 
    881        1.2     ragge 	if (lnctrl & DHU_LNCTRL_BREAK)
    882        1.1     ragge 		mbits |= DML_BRK;
    883        1.1     ragge 
    884        1.5     ragge 	switch (how) {
    885        1.5     ragge 
    886        1.5     ragge 	case DMSET:
    887        1.1     ragge 		mbits = bits;
    888        1.1     ragge 		break;
    889        1.1     ragge 
    890        1.5     ragge 	case DMBIS:
    891        1.1     ragge 		mbits |= bits;
    892        1.1     ragge 		break;
    893        1.1     ragge 
    894        1.5     ragge 	case DMBIC:
    895        1.1     ragge 		mbits &= ~bits;
    896        1.1     ragge 		break;
    897        1.1     ragge 
    898        1.5     ragge 	case DMGET:
    899        1.1     ragge 		(void) splx(s);
    900        1.1     ragge 		return (mbits);
    901        1.1     ragge 	}
    902        1.1     ragge 
    903        1.1     ragge 	if (mbits & DML_RTS)
    904        1.2     ragge 		lnctrl |= DHU_LNCTRL_RTS;
    905        1.1     ragge 	else
    906        1.2     ragge 		lnctrl &= ~DHU_LNCTRL_RTS;
    907        1.1     ragge 
    908        1.1     ragge 	if (mbits & DML_DTR)
    909        1.2     ragge 		lnctrl |= DHU_LNCTRL_DTR;
    910        1.1     ragge 	else
    911        1.2     ragge 		lnctrl &= ~DHU_LNCTRL_DTR;
    912        1.1     ragge 
    913        1.1     ragge 	if (mbits & DML_BRK)
    914        1.2     ragge 		lnctrl |= DHU_LNCTRL_BREAK;
    915        1.1     ragge 	else
    916        1.2     ragge 		lnctrl &= ~DHU_LNCTRL_BREAK;
    917        1.2     ragge 
    918       1.15     ragge 	DHU_WRITE_WORD(DHU_UBA_LNCTRL, lnctrl);
    919        1.1     ragge 
    920        1.1     ragge 	(void) splx(s);
    921        1.1     ragge 	return (mbits);
    922        1.1     ragge }
    923