dhu.c revision 1.51
1 /* $NetBSD: dhu.c,v 1.51 2007/12/03 15:34:32 ad Exp $ */ 2 /* 3 * Copyright (c) 2003, Hugh Graham. 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell and Rick Macklem. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright (c) 1996 Ken C. Wellsch. All rights reserved. 37 * 38 * This code is derived from software contributed to Berkeley by 39 * Ralph Campbell and Rick Macklem. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by the University of 52 * California, Berkeley and its contributors. 53 * 4. Neither the name of the University nor the names of its contributors 54 * may be used to endorse or promote products derived from this software 55 * without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 58 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 59 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 60 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 61 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 62 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 63 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 64 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 65 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 66 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 67 * SUCH DAMAGE. 68 */ 69 70 #include <sys/cdefs.h> 71 __KERNEL_RCSID(0, "$NetBSD: dhu.c,v 1.51 2007/12/03 15:34:32 ad Exp $"); 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/ioctl.h> 76 #include <sys/tty.h> 77 #include <sys/proc.h> 78 #include <sys/buf.h> 79 #include <sys/conf.h> 80 #include <sys/file.h> 81 #include <sys/uio.h> 82 #include <sys/kernel.h> 83 #include <sys/syslog.h> 84 #include <sys/device.h> 85 #include <sys/kauth.h> 86 87 #include <sys/bus.h> 88 #include <machine/scb.h> 89 90 #include <dev/qbus/ubavar.h> 91 92 #include <dev/qbus/dhureg.h> 93 94 #include "ioconf.h" 95 96 /* A DHU-11 has 16 ports while a DHV-11 has only 8. We use 16 by default */ 97 98 #define NDHULINE 16 99 100 #define DHU_M2U(c) ((c)>>4) /* convert minor(dev) to unit # */ 101 #define DHU_LINE(u) ((u)&0xF) /* extract line # from minor(dev) */ 102 103 struct dhu_softc { 104 struct device sc_dev; /* Device struct used by config */ 105 struct evcnt sc_rintrcnt; /* Interrupt statistics */ 106 struct evcnt sc_tintrcnt; /* Interrupt statistics */ 107 int sc_type; /* controller type, DHU or DHV */ 108 int sc_lines; /* number of lines */ 109 bus_space_tag_t sc_iot; 110 bus_space_handle_t sc_ioh; 111 bus_dma_tag_t sc_dmat; 112 struct { 113 struct tty *dhu_tty; /* what we work on */ 114 bus_dmamap_t dhu_dmah; 115 int dhu_state; /* to manage TX output status */ 116 short dhu_cc; /* character count on TX */ 117 short dhu_modem; /* modem bits state */ 118 } sc_dhu[NDHULINE]; 119 }; 120 121 #define IS_DHU 16 /* Unibus DHU-11 board linecount */ 122 #define IS_DHV 8 /* Q-bus DHV-11 or DHQ-11 */ 123 124 #define STATE_IDLE 000 /* no current output in progress */ 125 #define STATE_DMA_RUNNING 001 /* DMA TX in progress */ 126 #define STATE_DMA_STOPPED 002 /* DMA TX was aborted */ 127 #define STATE_TX_ONE_CHAR 004 /* did a single char directly */ 128 129 /* Flags used to monitor modem bits, make them understood outside driver */ 130 131 #define DML_DTR TIOCM_DTR 132 #define DML_RTS TIOCM_RTS 133 #define DML_CTS TIOCM_CTS 134 #define DML_DCD TIOCM_CD 135 #define DML_RI TIOCM_RI 136 #define DML_DSR TIOCM_DSR 137 #define DML_BRK 0100000 /* no equivalent, we will mask */ 138 139 #define DHU_READ_WORD(reg) \ 140 bus_space_read_2(sc->sc_iot, sc->sc_ioh, reg) 141 #define DHU_WRITE_WORD(reg, val) \ 142 bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val) 143 #define DHU_READ_BYTE(reg) \ 144 bus_space_read_1(sc->sc_iot, sc->sc_ioh, reg) 145 #define DHU_WRITE_BYTE(reg, val) \ 146 bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val) 147 148 149 /* On a stock DHV, channel pairs (0/1, 2/3, etc.) must use */ 150 /* a baud rate from the same group. So limiting to B is likely */ 151 /* best, although clone boards like the ABLE QHV allow all settings. */ 152 153 static const struct speedtab dhuspeedtab[] = { 154 { 0, 0 }, /* Groups */ 155 { 50, DHU_LPR_B50 }, /* A */ 156 { 75, DHU_LPR_B75 }, /* B */ 157 { 110, DHU_LPR_B110 }, /* A and B */ 158 { 134, DHU_LPR_B134 }, /* A and B */ 159 { 150, DHU_LPR_B150 }, /* B */ 160 { 300, DHU_LPR_B300 }, /* A and B */ 161 { 600, DHU_LPR_B600 }, /* A and B */ 162 { 1200, DHU_LPR_B1200 }, /* A and B */ 163 { 1800, DHU_LPR_B1800 }, /* B */ 164 { 2000, DHU_LPR_B2000 }, /* B */ 165 { 2400, DHU_LPR_B2400 }, /* A and B */ 166 { 4800, DHU_LPR_B4800 }, /* A and B */ 167 { 7200, DHU_LPR_B7200 }, /* A */ 168 { 9600, DHU_LPR_B9600 }, /* A and B */ 169 { 19200, DHU_LPR_B19200 }, /* B */ 170 { 38400, DHU_LPR_B38400 }, /* A */ 171 { -1, -1 } 172 }; 173 174 static int dhu_match(struct device *, struct cfdata *, void *); 175 static void dhu_attach(struct device *, struct device *, void *); 176 static void dhurint(void *); 177 static void dhuxint(void *); 178 static void dhustart(struct tty *); 179 static int dhuparam(struct tty *, struct termios *); 180 static int dhuiflow(struct tty *, int); 181 static unsigned dhumctl(struct dhu_softc *,int, int, int); 182 183 CFATTACH_DECL(dhu, sizeof(struct dhu_softc), 184 dhu_match, dhu_attach, NULL, NULL); 185 186 dev_type_open(dhuopen); 187 dev_type_close(dhuclose); 188 dev_type_read(dhuread); 189 dev_type_write(dhuwrite); 190 dev_type_ioctl(dhuioctl); 191 dev_type_stop(dhustop); 192 dev_type_tty(dhutty); 193 dev_type_poll(dhupoll); 194 195 const struct cdevsw dhu_cdevsw = { 196 dhuopen, dhuclose, dhuread, dhuwrite, dhuioctl, 197 dhustop, dhutty, dhupoll, nommap, ttykqfilter, D_TTY 198 }; 199 200 /* Autoconfig handles: setup the controller to interrupt, */ 201 /* then complete the housecleaning for full operation */ 202 203 static int 204 dhu_match(parent, cf, aux) 205 struct device *parent; 206 struct cfdata *cf; 207 void *aux; 208 { 209 struct uba_attach_args *ua = aux; 210 int n; 211 212 /* Reset controller to initialize, enable TX/RX interrupts */ 213 /* to catch floating vector info elsewhere when completed */ 214 215 bus_space_write_2(ua->ua_iot, ua->ua_ioh, DHU_UBA_CSR, 216 DHU_CSR_MASTER_RESET | DHU_CSR_RXIE | DHU_CSR_TXIE); 217 218 /* Now wait up to 3 seconds for self-test to complete. */ 219 220 for (n = 0; n < 300; n++) { 221 DELAY(10000); 222 if ((bus_space_read_2(ua->ua_iot, ua->ua_ioh, DHU_UBA_CSR) & 223 DHU_CSR_MASTER_RESET) == 0) 224 break; 225 } 226 227 /* If the RESET did not clear after 3 seconds, */ 228 /* the controller must be broken. */ 229 230 if (n >= 300) 231 return 0; 232 233 /* Check whether diagnostic run has signalled a failure. */ 234 235 if ((bus_space_read_2(ua->ua_iot, ua->ua_ioh, DHU_UBA_CSR) & 236 DHU_CSR_DIAG_FAIL) != 0) 237 return 0; 238 239 return 1; 240 } 241 242 static void 243 dhu_attach(parent, self, aux) 244 struct device *parent, *self; 245 void *aux; 246 { 247 struct dhu_softc *sc = device_private(self); 248 struct uba_attach_args *ua = aux; 249 unsigned c; 250 int n, i; 251 252 sc->sc_iot = ua->ua_iot; 253 sc->sc_ioh = ua->ua_ioh; 254 sc->sc_dmat = ua->ua_dmat; 255 /* Process the 8 bytes of diagnostic info put into */ 256 /* the FIFO following the master reset operation. */ 257 258 printf("\n%s:", self->dv_xname); 259 for (n = 0; n < 8; n++) { 260 c = DHU_READ_WORD(DHU_UBA_RBUF); 261 262 if ((c&DHU_DIAG_CODE) == DHU_DIAG_CODE) { 263 if ((c&0200) == 0000) 264 printf(" rom(%d) version %d", 265 ((c>>1)&01), ((c>>2)&037)); 266 else if (((c>>2)&07) != 0) 267 printf(" diag-error(proc%d)=%x", 268 ((c>>1)&01), ((c>>2)&07)); 269 } 270 } 271 272 c = DHU_READ_WORD(DHU_UBA_STAT); 273 274 sc->sc_type = (c & DHU_STAT_DHU)? IS_DHU: IS_DHV; 275 276 sc->sc_lines = 8; /* default */ 277 if (sc->sc_type == IS_DHU && (c & DHU_STAT_MDL)) 278 sc->sc_lines = 16; 279 280 printf("\n%s: DH%s-11\n", self->dv_xname, 281 sc->sc_type == IS_DHU ? "U" : "V"); 282 283 for (i = 0; i < sc->sc_lines; i++) { 284 struct tty *tp; 285 tp = sc->sc_dhu[i].dhu_tty = ttymalloc(); 286 sc->sc_dhu[i].dhu_state = STATE_IDLE; 287 bus_dmamap_create(sc->sc_dmat, tp->t_outq.c_cn, 1, 288 tp->t_outq.c_cn, 0, BUS_DMA_ALLOCNOW|BUS_DMA_NOWAIT, 289 &sc->sc_dhu[i].dhu_dmah); 290 bus_dmamap_load(sc->sc_dmat, sc->sc_dhu[i].dhu_dmah, 291 tp->t_outq.c_cs, tp->t_outq.c_cn, 0, BUS_DMA_NOWAIT); 292 293 } 294 295 /* Now establish RX & TX interrupt handlers */ 296 297 uba_intr_establish(ua->ua_icookie, ua->ua_cvec, 298 dhurint, sc, &sc->sc_rintrcnt); 299 uba_intr_establish(ua->ua_icookie, ua->ua_cvec + 4, 300 dhuxint, sc, &sc->sc_tintrcnt); 301 evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt, 302 sc->sc_dev.dv_xname, "rintr"); 303 evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt, 304 sc->sc_dev.dv_xname, "tintr"); 305 } 306 307 /* Receiver Interrupt */ 308 309 static void 310 dhurint(arg) 311 void *arg; 312 { 313 struct dhu_softc *sc = arg; 314 struct tty *tp; 315 int cc, line; 316 unsigned c, delta; 317 int overrun = 0; 318 319 while ((c = DHU_READ_WORD(DHU_UBA_RBUF)) & DHU_RBUF_DATA_VALID) { 320 321 /* Ignore diagnostic FIFO entries. */ 322 323 if ((c & DHU_DIAG_CODE) == DHU_DIAG_CODE) 324 continue; 325 326 cc = c & 0xFF; 327 line = DHU_LINE(c>>8); 328 tp = sc->sc_dhu[line].dhu_tty; 329 330 /* LINK.TYPE is set so we get modem control FIFO entries */ 331 332 if ((c & DHU_DIAG_CODE) == DHU_MODEM_CODE) { 333 c = (c << 8); 334 /* Do MDMBUF flow control, wakeup sleeping opens */ 335 if (c & DHU_STAT_DCD) { 336 if (!(tp->t_state & TS_CARR_ON)) 337 (void)(*tp->t_linesw->l_modem)(tp, 1); 338 } 339 else if ((tp->t_state & TS_CARR_ON) && 340 (*tp->t_linesw->l_modem)(tp, 0) == 0) 341 (void) dhumctl(sc, line, 0, DMSET); 342 343 /* Do CRTSCTS flow control */ 344 delta = c ^ sc->sc_dhu[line].dhu_modem; 345 sc->sc_dhu[line].dhu_modem = c; 346 if ((delta & DHU_STAT_CTS) && 347 (tp->t_state & TS_ISOPEN) && 348 (tp->t_cflag & CRTSCTS)) { 349 if (c & DHU_STAT_CTS) { 350 tp->t_state &= ~TS_TTSTOP; 351 ttstart(tp); 352 } else { 353 tp->t_state |= TS_TTSTOP; 354 dhustop(tp, 0); 355 } 356 } 357 continue; 358 } 359 360 if (!(tp->t_state & TS_ISOPEN)) { 361 clwakeup(&tp->t_rawq); 362 continue; 363 } 364 365 if ((c & DHU_RBUF_OVERRUN_ERR) && overrun == 0) { 366 log(LOG_WARNING, "%s: silo overflow, line %d\n", 367 sc->sc_dev.dv_xname, line); 368 overrun = 1; 369 } 370 /* A BREAK key will appear as a NULL with a framing error */ 371 if (c & DHU_RBUF_FRAMING_ERR) 372 cc |= TTY_FE; 373 if (c & DHU_RBUF_PARITY_ERR) 374 cc |= TTY_PE; 375 376 (*tp->t_linesw->l_rint)(cc, tp); 377 } 378 } 379 380 /* Transmitter Interrupt */ 381 382 static void 383 dhuxint(arg) 384 void *arg; 385 { 386 struct dhu_softc *sc = arg; 387 struct tty *tp; 388 int line, i; 389 390 while ((i = DHU_READ_BYTE(DHU_UBA_CSR_HI)) & (DHU_CSR_TX_ACTION >> 8)) { 391 392 line = DHU_LINE(i); 393 tp = sc->sc_dhu[line].dhu_tty; 394 395 if (i & (DHU_CSR_TX_DMA_ERROR >> 8)) 396 printf("%s: DMA ERROR on line: %d\n", 397 sc->sc_dev.dv_xname, line); 398 if (i & (DHU_CSR_DIAG_FAIL >> 8)) 399 printf("%s: DIAG FAIL on line: %d\n", 400 sc->sc_dev.dv_xname, line); 401 402 tp->t_state &= ~TS_BUSY; 403 if (tp->t_state & TS_FLUSH) 404 tp->t_state &= ~TS_FLUSH; 405 else { 406 if (sc->sc_dhu[line].dhu_state == STATE_DMA_STOPPED) 407 sc->sc_dhu[line].dhu_cc -= 408 DHU_READ_WORD(DHU_UBA_TBUFCNT); 409 ndflush(&tp->t_outq, sc->sc_dhu[line].dhu_cc); 410 sc->sc_dhu[line].dhu_cc = 0; 411 } 412 413 sc->sc_dhu[line].dhu_state = STATE_IDLE; 414 415 (*tp->t_linesw->l_start)(tp); 416 } 417 } 418 419 int 420 dhuopen(dev, flag, mode, l) 421 dev_t dev; 422 int flag, mode; 423 struct lwp *l; 424 { 425 struct tty *tp; 426 int unit, line; 427 struct dhu_softc *sc; 428 int error = 0; 429 430 unit = DHU_M2U(minor(dev)); 431 line = DHU_LINE(minor(dev)); 432 433 if (unit >= dhu_cd.cd_ndevs || dhu_cd.cd_devs[unit] == NULL) 434 return (ENXIO); 435 436 sc = dhu_cd.cd_devs[unit]; 437 438 if (line >= sc->sc_lines) 439 return ENXIO; 440 441 mutex_spin_enter(&tty_lock); 442 if (sc->sc_type == IS_DHU) { 443 /* CSR 3:0 must be 0 */ 444 DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE); 445 /* RX int delay 10ms */ 446 DHU_WRITE_BYTE(DHU_UBA_RXTIME, 10); 447 } 448 DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line); 449 sc->sc_dhu[line].dhu_modem = DHU_READ_WORD(DHU_UBA_STAT); 450 451 tp = sc->sc_dhu[line].dhu_tty; 452 453 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 454 return (EBUSY); 455 456 tp->t_oproc = dhustart; 457 tp->t_param = dhuparam; 458 tp->t_hwiflow = dhuiflow; 459 tp->t_dev = dev; 460 461 if ((tp->t_state & TS_ISOPEN) == 0) { 462 ttychars(tp); 463 if (tp->t_ispeed == 0) { 464 tp->t_iflag = TTYDEF_IFLAG; 465 tp->t_oflag = TTYDEF_OFLAG; 466 tp->t_cflag = TTYDEF_CFLAG; 467 tp->t_lflag = TTYDEF_LFLAG; 468 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 469 } 470 (void) dhuparam(tp, &tp->t_termios); 471 ttsetwater(tp); 472 } 473 /* Use DMBIS and *not* DMSET or else we clobber incoming bits */ 474 if (dhumctl(sc, line, DML_DTR|DML_RTS, DMBIS) & DML_DCD) 475 tp->t_state |= TS_CARR_ON; 476 while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) && 477 !(tp->t_state & TS_CARR_ON)) { 478 tp->t_wopen++; 479 error = ttysleep(tp, &tp->t_rawq.c_cv, true, 0); 480 tp->t_wopen--; 481 if (error) 482 break; 483 } 484 mutex_spin_exit(&tty_lock); 485 if (error) 486 return (error); 487 return ((*tp->t_linesw->l_open)(dev, tp)); 488 } 489 490 /*ARGSUSED*/ 491 int 492 dhuclose(dev, flag, mode, l) 493 dev_t dev; 494 int flag, mode; 495 struct lwp *l; 496 { 497 struct tty *tp; 498 int unit, line; 499 struct dhu_softc *sc; 500 501 unit = DHU_M2U(minor(dev)); 502 line = DHU_LINE(minor(dev)); 503 504 sc = dhu_cd.cd_devs[unit]; 505 506 tp = sc->sc_dhu[line].dhu_tty; 507 508 (*tp->t_linesw->l_close)(tp, flag); 509 510 /* Make sure a BREAK state is not left enabled. */ 511 512 (void) dhumctl(sc, line, DML_BRK, DMBIC); 513 514 /* Do a hangup if so required. */ 515 516 if ((tp->t_cflag & HUPCL) || tp->t_wopen || 517 !(tp->t_state & TS_ISOPEN)) 518 (void) dhumctl(sc, line, 0, DMSET); 519 520 return (ttyclose(tp)); 521 } 522 523 int 524 dhuread(dev, uio, flag) 525 dev_t dev; 526 struct uio *uio; 527 int flag; 528 { 529 struct dhu_softc *sc; 530 struct tty *tp; 531 532 sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))]; 533 534 tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty; 535 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 536 } 537 538 int 539 dhuwrite(dev, uio, flag) 540 dev_t dev; 541 struct uio *uio; 542 int flag; 543 { 544 struct dhu_softc *sc; 545 struct tty *tp; 546 547 sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))]; 548 549 tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty; 550 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 551 } 552 553 int 554 dhupoll(dev, events, l) 555 dev_t dev; 556 int events; 557 struct lwp *l; 558 { 559 struct dhu_softc *sc; 560 struct tty *tp; 561 562 sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))]; 563 564 tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty; 565 return ((*tp->t_linesw->l_poll)(tp, events, l)); 566 } 567 568 /*ARGSUSED*/ 569 int 570 dhuioctl(dev, cmd, data, flag, l) 571 dev_t dev; 572 u_long cmd; 573 void *data; 574 int flag; 575 struct lwp *l; 576 { 577 struct dhu_softc *sc; 578 struct tty *tp; 579 int unit, line; 580 int error; 581 582 unit = DHU_M2U(minor(dev)); 583 line = DHU_LINE(minor(dev)); 584 sc = dhu_cd.cd_devs[unit]; 585 tp = sc->sc_dhu[line].dhu_tty; 586 587 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 588 if (error != EPASSTHROUGH) 589 return (error); 590 591 error = ttioctl(tp, cmd, data, flag, l); 592 if (error != EPASSTHROUGH) 593 return (error); 594 595 switch (cmd) { 596 597 case TIOCSBRK: 598 (void) dhumctl(sc, line, DML_BRK, DMBIS); 599 break; 600 601 case TIOCCBRK: 602 (void) dhumctl(sc, line, DML_BRK, DMBIC); 603 break; 604 605 case TIOCSDTR: 606 (void) dhumctl(sc, line, DML_DTR|DML_RTS, DMBIS); 607 break; 608 609 case TIOCCDTR: 610 (void) dhumctl(sc, line, DML_DTR|DML_RTS, DMBIC); 611 break; 612 613 case TIOCMSET: 614 (void) dhumctl(sc, line, *(int *)data, DMSET); 615 break; 616 617 case TIOCMBIS: 618 (void) dhumctl(sc, line, *(int *)data, DMBIS); 619 break; 620 621 case TIOCMBIC: 622 (void) dhumctl(sc, line, *(int *)data, DMBIC); 623 break; 624 625 case TIOCMGET: 626 *(int *)data = (dhumctl(sc, line, 0, DMGET) & ~DML_BRK); 627 break; 628 629 default: 630 return (EPASSTHROUGH); 631 } 632 return (0); 633 } 634 635 struct tty * 636 dhutty(dev) 637 dev_t dev; 638 { 639 struct dhu_softc *sc = dhu_cd.cd_devs[DHU_M2U(minor(dev))]; 640 struct tty *tp = sc->sc_dhu[DHU_LINE(minor(dev))].dhu_tty; 641 return (tp); 642 } 643 644 /*ARGSUSED*/ 645 void 646 dhustop(tp, flag) 647 struct tty *tp; 648 int flag; 649 { 650 struct dhu_softc *sc; 651 int line; 652 int s; 653 654 s = spltty(); 655 656 if (tp->t_state & TS_BUSY) { 657 658 sc = dhu_cd.cd_devs[DHU_M2U(minor(tp->t_dev))]; 659 line = DHU_LINE(minor(tp->t_dev)); 660 661 if (sc->sc_dhu[line].dhu_state == STATE_DMA_RUNNING) { 662 663 sc->sc_dhu[line].dhu_state = STATE_DMA_STOPPED; 664 665 DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line); 666 DHU_WRITE_WORD(DHU_UBA_LNCTRL, 667 DHU_READ_WORD(DHU_UBA_LNCTRL) | 668 DHU_LNCTRL_DMA_ABORT); 669 } 670 671 if (!(tp->t_state & TS_TTSTOP)) 672 tp->t_state |= TS_FLUSH; 673 } 674 (void) splx(s); 675 } 676 677 static void 678 dhustart(tp) 679 struct tty *tp; 680 { 681 struct dhu_softc *sc; 682 int line, cc; 683 int addr; 684 int s; 685 686 s = spltty(); 687 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP)) 688 goto out; 689 if (!ttypull(tp)) 690 goto out; 691 cc = ndqb(&tp->t_outq, 0); 692 if (cc == 0) 693 goto out; 694 695 tp->t_state |= TS_BUSY; 696 697 sc = dhu_cd.cd_devs[DHU_M2U(minor(tp->t_dev))]; 698 699 line = DHU_LINE(minor(tp->t_dev)); 700 701 DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line); 702 703 sc->sc_dhu[line].dhu_cc = cc; 704 705 if (cc == 1 && sc->sc_type == IS_DHV) { 706 707 sc->sc_dhu[line].dhu_state = STATE_TX_ONE_CHAR; 708 709 DHU_WRITE_WORD(DHU_UBA_TXCHAR, 710 DHU_TXCHAR_DATA_VALID | *tp->t_outq.c_cf); 711 712 } else { 713 714 sc->sc_dhu[line].dhu_state = STATE_DMA_RUNNING; 715 716 addr = sc->sc_dhu[line].dhu_dmah->dm_segs[0].ds_addr + 717 (tp->t_outq.c_cf - tp->t_outq.c_cs); 718 719 DHU_WRITE_WORD(DHU_UBA_TBUFCNT, cc); 720 DHU_WRITE_WORD(DHU_UBA_TBUFAD1, addr & 0xFFFF); 721 DHU_WRITE_WORD(DHU_UBA_TBUFAD2, ((addr>>16) & 0x3F) | 722 DHU_TBUFAD2_TX_ENABLE); 723 DHU_WRITE_WORD(DHU_UBA_LNCTRL, 724 DHU_READ_WORD(DHU_UBA_LNCTRL) & ~DHU_LNCTRL_DMA_ABORT); 725 DHU_WRITE_WORD(DHU_UBA_TBUFAD2, 726 DHU_READ_WORD(DHU_UBA_TBUFAD2) | DHU_TBUFAD2_DMA_START); 727 } 728 out: 729 (void) splx(s); 730 return; 731 } 732 733 static int 734 dhuparam(tp, t) 735 struct tty *tp; 736 struct termios *t; 737 { 738 struct dhu_softc *sc; 739 int cflag = t->c_cflag; 740 int ispeed = ttspeedtab(t->c_ispeed, dhuspeedtab); 741 int ospeed = ttspeedtab(t->c_ospeed, dhuspeedtab); 742 unsigned lpr, lnctrl; 743 int unit, line; 744 int s; 745 746 unit = DHU_M2U(minor(tp->t_dev)); 747 line = DHU_LINE(minor(tp->t_dev)); 748 749 sc = dhu_cd.cd_devs[unit]; 750 751 /* check requested parameters */ 752 if (ospeed < 0 || ispeed < 0) 753 return (EINVAL); 754 755 tp->t_ispeed = t->c_ispeed; 756 tp->t_ospeed = t->c_ospeed; 757 tp->t_cflag = cflag; 758 759 if (ospeed == 0) { 760 (void) dhumctl(sc, line, 0, DMSET); /* hang up line */ 761 return (0); 762 } 763 764 s = spltty(); 765 DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line); 766 767 lpr = ((ispeed&017)<<8) | ((ospeed&017)<<12) ; 768 769 switch (cflag & CSIZE) { 770 771 case CS5: 772 lpr |= DHU_LPR_5_BIT_CHAR; 773 break; 774 775 case CS6: 776 lpr |= DHU_LPR_6_BIT_CHAR; 777 break; 778 779 case CS7: 780 lpr |= DHU_LPR_7_BIT_CHAR; 781 break; 782 783 default: 784 lpr |= DHU_LPR_8_BIT_CHAR; 785 break; 786 } 787 788 if (cflag & PARENB) 789 lpr |= DHU_LPR_PARENB; 790 if (!(cflag & PARODD)) 791 lpr |= DHU_LPR_EPAR; 792 if (cflag & CSTOPB) 793 lpr |= DHU_LPR_2_STOP; 794 795 DHU_WRITE_WORD(DHU_UBA_LPR, lpr); 796 797 DHU_WRITE_WORD(DHU_UBA_TBUFAD2, 798 DHU_READ_WORD(DHU_UBA_TBUFAD2) | DHU_TBUFAD2_TX_ENABLE); 799 800 lnctrl = DHU_READ_WORD(DHU_UBA_LNCTRL); 801 802 /* Setting LINK.TYPE enables modem signal change interrupts. */ 803 804 lnctrl |= (DHU_LNCTRL_RX_ENABLE | DHU_LNCTRL_LINK_TYPE); 805 806 /* Enable the auto XON/XOFF feature on the controller */ 807 808 if (t->c_iflag & IXON) 809 lnctrl |= DHU_LNCTRL_OAUTO; 810 else 811 lnctrl &= ~DHU_LNCTRL_OAUTO; 812 813 if (t->c_iflag & IXOFF) 814 lnctrl |= DHU_LNCTRL_IAUTO; 815 else 816 lnctrl &= ~DHU_LNCTRL_IAUTO; 817 818 DHU_WRITE_WORD(DHU_UBA_LNCTRL, lnctrl); 819 820 (void) splx(s); 821 return (0); 822 } 823 824 static int 825 dhuiflow(tp, flag) 826 struct tty *tp; 827 int flag; 828 { 829 struct dhu_softc *sc; 830 int line = DHU_LINE(minor(tp->t_dev)); 831 832 if (tp->t_cflag & CRTSCTS) { 833 sc = dhu_cd.cd_devs[DHU_M2U(minor(tp->t_dev))]; 834 (void) dhumctl(sc, line, DML_RTS, ((flag)? DMBIC: DMBIS)); 835 return (1); 836 } 837 return (0); 838 } 839 840 static unsigned 841 dhumctl(sc, line, bits, how) 842 struct dhu_softc *sc; 843 int line, bits, how; 844 { 845 unsigned status; 846 unsigned lnctrl; 847 unsigned mbits; 848 int s; 849 850 s = spltty(); 851 852 DHU_WRITE_BYTE(DHU_UBA_CSR, DHU_CSR_RXIE | line); 853 854 mbits = 0; 855 856 /* external signals as seen from the port */ 857 858 status = DHU_READ_WORD(DHU_UBA_STAT); 859 860 if (status & DHU_STAT_CTS) 861 mbits |= DML_CTS; 862 863 if (status & DHU_STAT_DCD) 864 mbits |= DML_DCD; 865 866 if (status & DHU_STAT_DSR) 867 mbits |= DML_DSR; 868 869 if (status & DHU_STAT_RI) 870 mbits |= DML_RI; 871 872 /* internal signals/state delivered to port */ 873 874 lnctrl = DHU_READ_WORD(DHU_UBA_LNCTRL); 875 876 if (lnctrl & DHU_LNCTRL_RTS) 877 mbits |= DML_RTS; 878 879 if (lnctrl & DHU_LNCTRL_DTR) 880 mbits |= DML_DTR; 881 882 if (lnctrl & DHU_LNCTRL_BREAK) 883 mbits |= DML_BRK; 884 885 switch (how) { 886 887 case DMSET: 888 mbits = bits; 889 break; 890 891 case DMBIS: 892 mbits |= bits; 893 break; 894 895 case DMBIC: 896 mbits &= ~bits; 897 break; 898 899 case DMGET: 900 (void) splx(s); 901 return (mbits); 902 } 903 904 if (mbits & DML_RTS) 905 lnctrl |= DHU_LNCTRL_RTS; 906 else 907 lnctrl &= ~DHU_LNCTRL_RTS; 908 909 if (mbits & DML_DTR) 910 lnctrl |= DHU_LNCTRL_DTR; 911 else 912 lnctrl &= ~DHU_LNCTRL_DTR; 913 914 if (mbits & DML_BRK) 915 lnctrl |= DHU_LNCTRL_BREAK; 916 else 917 lnctrl &= ~DHU_LNCTRL_BREAK; 918 919 DHU_WRITE_WORD(DHU_UBA_LNCTRL, lnctrl); 920 921 (void) splx(s); 922 return (mbits); 923 } 924
Indexes created Tue Sep 23 14:10:03 GMT 2025