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dz_uba.c revision 1.7
      1  1.7  ragge /*	$NetBSD: dz_uba.c,v 1.7 1999/06/06 19:14:49 ragge Exp $ */
      2  1.1  ragge /*
      3  1.1  ragge  * Copyright (c) 1998 Ludd, University of Lule}, Sweden. All rights reserved.
      4  1.1  ragge  * Copyright (c) 1996  Ken C. Wellsch.  All rights reserved.
      5  1.1  ragge  *
      6  1.1  ragge  * Redistribution and use in source and binary forms, with or without
      7  1.1  ragge  * modification, are permitted provided that the following conditions
      8  1.1  ragge  * are met:
      9  1.1  ragge  * 1. Redistributions of source code must retain the above copyright
     10  1.1  ragge  *    notice, this list of conditions and the following disclaimer.
     11  1.1  ragge  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.1  ragge  *    notice, this list of conditions and the following disclaimer in the
     13  1.1  ragge  *    documentation and/or other materials provided with the distribution.
     14  1.1  ragge  * 3. All advertising materials mentioning features or use of this software
     15  1.1  ragge  *    must display the following acknowledgement:
     16  1.1  ragge  *      This product includes software developed at Ludd, University of
     17  1.1  ragge  *      Lule}, Sweden and its contributors.
     18  1.1  ragge  * 4. The name of the author may not be used to endorse or promote products
     19  1.1  ragge  *    derived from this software without specific prior written permission
     20  1.1  ragge  *
     21  1.1  ragge  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  1.1  ragge  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  1.1  ragge  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  1.1  ragge  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  1.1  ragge  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  1.1  ragge  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  1.1  ragge  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  1.1  ragge  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  1.1  ragge  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  1.1  ragge  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  1.1  ragge  */
     32  1.1  ragge 
     33  1.1  ragge #include <sys/param.h>
     34  1.1  ragge #include <sys/systm.h>
     35  1.1  ragge #include <sys/ioctl.h>
     36  1.1  ragge #include <sys/tty.h>
     37  1.1  ragge #include <sys/proc.h>
     38  1.1  ragge #include <sys/map.h>
     39  1.1  ragge #include <sys/buf.h>
     40  1.1  ragge #include <sys/conf.h>
     41  1.1  ragge #include <sys/file.h>
     42  1.1  ragge #include <sys/uio.h>
     43  1.1  ragge #include <sys/kernel.h>
     44  1.1  ragge #include <sys/syslog.h>
     45  1.1  ragge #include <sys/device.h>
     46  1.1  ragge 
     47  1.4  ragge #include <machine/bus.h>
     48  1.1  ragge #include <machine/pte.h>
     49  1.1  ragge #include <machine/trap.h>
     50  1.2  ragge #include <machine/scb.h>
     51  1.1  ragge 
     52  1.7  ragge #include <dev/qbus/ubavar.h>
     53  1.1  ragge 
     54  1.7  ragge #include <dev/qbus/dzreg.h>
     55  1.7  ragge #include <dev/qbus/dzvar.h>
     56  1.1  ragge 
     57  1.1  ragge #include "ioconf.h"
     58  1.1  ragge 
     59  1.1  ragge static	int	dz_uba_match __P((struct device *, struct cfdata *, void *));
     60  1.1  ragge static	void	dz_uba_attach __P((struct device *, struct device *, void *));
     61  1.1  ragge 
     62  1.1  ragge struct	cfattach dz_uba_ca = {
     63  1.1  ragge 	sizeof(struct dz_softc), dz_uba_match, dz_uba_attach
     64  1.1  ragge };
     65  1.1  ragge 
     66  1.1  ragge /* Autoconfig handles: setup the controller to interrupt, */
     67  1.1  ragge /* then complete the housecleaning for full operation */
     68  1.1  ragge 
     69  1.1  ragge static int
     70  1.1  ragge dz_uba_match(parent, cf, aux)
     71  1.1  ragge         struct device *parent;
     72  1.1  ragge 	struct cfdata *cf;
     73  1.1  ragge         void *aux;
     74  1.1  ragge {
     75  1.1  ragge 	struct uba_attach_args *ua = aux;
     76  1.4  ragge 	bus_space_tag_t	iot = ua->ua_iot;
     77  1.4  ragge 	bus_space_handle_t ioh = ua->ua_ioh;
     78  1.1  ragge 	register int n;
     79  1.1  ragge 
     80  1.4  ragge 	iot = iot; /* Silly GCC */
     81  1.1  ragge 	/* Reset controller to initialize, enable TX interrupts */
     82  1.1  ragge 	/* to catch floating vector info elsewhere when completed */
     83  1.1  ragge 
     84  1.4  ragge 	bus_space_write_2(iot, ioh, DZ_UBA_CSR, DZ_CSR_MSE | DZ_CSR_TXIE);
     85  1.4  ragge 	bus_space_write_1(iot, ioh, DZ_UBA_TCR, 1);
     86  1.1  ragge 
     87  1.1  ragge 	DELAY(100000);	/* delay 1/10 second */
     88  1.1  ragge 
     89  1.4  ragge 	bus_space_write_2(iot, ioh, DZ_UBA_CSR, DZ_CSR_RESET);
     90  1.1  ragge 
     91  1.1  ragge 	/* Now wait up to 3 seconds for reset/clear to complete. */
     92  1.1  ragge 
     93  1.1  ragge 	for (n = 0; n < 300; n++) {
     94  1.1  ragge 		DELAY(10000);
     95  1.4  ragge 		if ((bus_space_read_2(iot, ioh, DZ_UBA_CSR)&DZ_CSR_RESET) == 0)
     96  1.1  ragge 			break;
     97  1.1  ragge 	}
     98  1.1  ragge 
     99  1.1  ragge 	/* If the RESET did not clear after 3 seconds, */
    100  1.1  ragge 	/* the controller must be broken. */
    101  1.1  ragge 
    102  1.1  ragge 	if (n >= 300)
    103  1.1  ragge 		return (0);
    104  1.1  ragge 
    105  1.1  ragge 	/* Register the TX interrupt handler */
    106  1.1  ragge 
    107  1.1  ragge 	ua->ua_ivec = dzxint;
    108  1.1  ragge 
    109  1.1  ragge        	return (1);
    110  1.1  ragge }
    111  1.1  ragge 
    112  1.1  ragge static void
    113  1.1  ragge dz_uba_attach(parent, self, aux)
    114  1.1  ragge         struct device *parent, *self;
    115  1.1  ragge         void *aux;
    116  1.1  ragge {
    117  1.1  ragge 	struct	dz_softc *sc = (void *)self;
    118  1.1  ragge 	register struct uba_attach_args *ua = aux;
    119  1.1  ragge 
    120  1.4  ragge 	sc->sc_iot = ua->ua_iot;
    121  1.4  ragge 	sc->sc_ioh = ua->ua_ioh;
    122  1.4  ragge 
    123  1.4  ragge 	sc->sc_dr.dr_csr = DZ_UBA_CSR;
    124  1.4  ragge 	sc->sc_dr.dr_rbuf = DZ_UBA_RBUF;
    125  1.4  ragge 	sc->sc_dr.dr_dtr = DZ_UBA_DTR;
    126  1.4  ragge 	sc->sc_dr.dr_break = DZ_UBA_BREAK;
    127  1.4  ragge 	sc->sc_dr.dr_tbuf = DZ_UBA_TBUF;
    128  1.4  ragge 	sc->sc_dr.dr_tcr = DZ_UBA_TCR;
    129  1.4  ragge 	sc->sc_dr.dr_dcd = DZ_UBA_DCD;
    130  1.4  ragge 	sc->sc_dr.dr_ring = DZ_UBA_RING;
    131  1.4  ragge 
    132  1.4  ragge 	sc->sc_type = DZ_DZ;
    133  1.1  ragge 
    134  1.1  ragge 	/* Now register the RX interrupt handler */
    135  1.2  ragge 	scb_vecalloc(ua->ua_cvec - 4, dzrint, self->dv_unit, SCB_ISTACK);
    136  1.1  ragge 
    137  1.1  ragge 	dzattach(sc);
    138  1.1  ragge }
    139