1 1.36 andvar /* $NetBSD: if_de.c,v 1.36 2021/08/01 15:29:30 andvar Exp $ */ 2 1.5 ragge 3 1.1 ragge /* 4 1.1 ragge * Copyright (c) 1982, 1986, 1989 Regents of the University of California. 5 1.15 agc * All rights reserved. 6 1.15 agc * 7 1.15 agc * 8 1.15 agc * Redistribution and use in source and binary forms, with or without 9 1.15 agc * modification, are permitted provided that the following conditions 10 1.15 agc * are met: 11 1.15 agc * 1. Redistributions of source code must retain the above copyright 12 1.15 agc * notice, this list of conditions and the following disclaimer. 13 1.15 agc * 2. Redistributions in binary form must reproduce the above copyright 14 1.15 agc * notice, this list of conditions and the following disclaimer in the 15 1.15 agc * documentation and/or other materials provided with the distribution. 16 1.15 agc * 3. Neither the name of the University nor the names of its contributors 17 1.15 agc * may be used to endorse or promote products derived from this software 18 1.15 agc * without specific prior written permission. 19 1.15 agc * 20 1.15 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 1.15 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 1.15 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 1.15 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 1.15 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 1.15 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 1.15 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 1.15 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 1.15 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 1.15 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 1.15 agc * SUCH DAMAGE. 31 1.15 agc * 32 1.15 agc * @(#)if_de.c 7.12 (Berkeley) 12/16/90 33 1.15 agc */ 34 1.15 agc 35 1.15 agc /* 36 1.1 ragge * Copyright (c) 2000 Ludd, University of Lule}, Sweden. 37 1.1 ragge * All rights reserved. 38 1.1 ragge * 39 1.1 ragge * 40 1.1 ragge * Redistribution and use in source and binary forms, with or without 41 1.1 ragge * modification, are permitted provided that the following conditions 42 1.1 ragge * are met: 43 1.1 ragge * 1. Redistributions of source code must retain the above copyright 44 1.1 ragge * notice, this list of conditions and the following disclaimer. 45 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright 46 1.1 ragge * notice, this list of conditions and the following disclaimer in the 47 1.1 ragge * documentation and/or other materials provided with the distribution. 48 1.1 ragge * 49 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 50 1.1 ragge * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 51 1.1 ragge * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 52 1.1 ragge * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 53 1.1 ragge * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 54 1.1 ragge * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 55 1.1 ragge * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 56 1.1 ragge * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 57 1.1 ragge * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 58 1.1 ragge * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 59 1.1 ragge * SUCH DAMAGE. 60 1.1 ragge */ 61 1.1 ragge 62 1.1 ragge /* 63 1.1 ragge * DEC DEUNA interface 64 1.1 ragge * 65 1.1 ragge * Lou Salkind 66 1.1 ragge * New York University 67 1.1 ragge * 68 1.2 ragge * Rewritten by Ragge 30 April 2000 to match new world. 69 1.1 ragge * 70 1.1 ragge * TODO: 71 1.1 ragge * timeout routine (get statistics) 72 1.1 ragge */ 73 1.11 lukem 74 1.11 lukem #include <sys/cdefs.h> 75 1.36 andvar __KERNEL_RCSID(0, "$NetBSD: if_de.c,v 1.36 2021/08/01 15:29:30 andvar Exp $"); 76 1.1 ragge 77 1.1 ragge #include "opt_inet.h" 78 1.1 ragge 79 1.1 ragge #include <sys/param.h> 80 1.1 ragge #include <sys/systm.h> 81 1.1 ragge #include <sys/mbuf.h> 82 1.1 ragge #include <sys/buf.h> 83 1.1 ragge #include <sys/protosw.h> 84 1.1 ragge #include <sys/socket.h> 85 1.1 ragge #include <sys/ioctl.h> 86 1.1 ragge #include <sys/errno.h> 87 1.1 ragge #include <sys/syslog.h> 88 1.1 ragge #include <sys/device.h> 89 1.1 ragge 90 1.1 ragge #include <net/if.h> 91 1.1 ragge #include <net/if_ether.h> 92 1.1 ragge #include <net/if_dl.h> 93 1.33 msaitoh #include <net/bpf.h> 94 1.1 ragge 95 1.1 ragge #ifdef INET 96 1.1 ragge #include <netinet/in.h> 97 1.1 ragge #include <netinet/if_inarp.h> 98 1.1 ragge #endif 99 1.1 ragge 100 1.22 ad #include <sys/bus.h> 101 1.1 ragge 102 1.1 ragge #include <dev/qbus/ubavar.h> 103 1.1 ragge #include <dev/qbus/if_dereg.h> 104 1.10 ragge #include <dev/qbus/if_uba.h> 105 1.1 ragge 106 1.1 ragge #include "ioconf.h" 107 1.1 ragge 108 1.1 ragge /* 109 1.1 ragge * Be careful with transmit/receive buffers, each entry steals 4 map 110 1.1 ragge * registers, and there is only 496 on one unibus... 111 1.1 ragge */ 112 1.10 ragge #define NRCV 7 /* number of receive buffers (must be > 1) */ 113 1.10 ragge #define NXMT 3 /* number of transmit buffers */ 114 1.1 ragge 115 1.1 ragge /* 116 1.1 ragge * Structure containing the elements that must be in DMA-safe memory. 117 1.1 ragge */ 118 1.1 ragge struct de_cdata { 119 1.1 ragge /* the following structures are always mapped in */ 120 1.1 ragge struct de_pcbb dc_pcbb; /* port control block */ 121 1.1 ragge struct de_ring dc_xrent[NXMT]; /* transmit ring entrys */ 122 1.1 ragge struct de_ring dc_rrent[NRCV]; /* receive ring entrys */ 123 1.1 ragge struct de_udbbuf dc_udbbuf; /* UNIBUS data buffer */ 124 1.1 ragge /* end mapped area */ 125 1.1 ragge }; 126 1.1 ragge 127 1.1 ragge /* 128 1.1 ragge * Ethernet software status per interface. 129 1.1 ragge * 130 1.1 ragge * Each interface is referenced by a network interface structure, 131 1.1 ragge * ds_if, which the routing code uses to locate the interface. 132 1.1 ragge * This structure contains the output queue for the interface, its address, ... 133 1.1 ragge * We also have, for each interface, a UBA interface structure, which 134 1.1 ragge * contains information about the UNIBUS resources held by the interface: 135 1.1 ragge * map registers, buffered data paths, etc. Information is cached in this 136 1.1 ragge * structure for use by the if_uba.c routines in running the interface 137 1.1 ragge * efficiently. 138 1.1 ragge */ 139 1.1 ragge struct de_softc { 140 1.23 matt device_t sc_dev; /* Configuration common part */ 141 1.23 matt struct uba_softc *sc_uh; /* our parent */ 142 1.23 matt struct evcnt sc_intrcnt; /* Interrupt counting */ 143 1.23 matt struct ethercom sc_ec; /* Ethernet common part */ 144 1.1 ragge #define sc_if sc_ec.ec_if /* network-visible interface */ 145 1.1 ragge bus_space_tag_t sc_iot; 146 1.1 ragge bus_addr_t sc_ioh; 147 1.1 ragge bus_dma_tag_t sc_dmat; 148 1.23 matt int sc_flags; 149 1.10 ragge #define DSF_MAPPED 1 150 1.9 ragge struct ubinfo sc_ui; 151 1.1 ragge struct de_cdata *sc_dedata; /* Control structure */ 152 1.1 ragge struct de_cdata *sc_pdedata; /* Bus-mapped control structure */ 153 1.23 matt struct ifubinfo sc_ifuba; /* UNIBUS resources */ 154 1.23 matt struct ifrw sc_ifr[NRCV]; /* UNIBUS receive buffer maps */ 155 1.23 matt struct ifxmt sc_ifw[NXMT]; /* UNIBUS receive buffer maps */ 156 1.23 matt 157 1.23 matt int sc_xindex; /* UNA index into transmit chain */ 158 1.23 matt int sc_rindex; /* UNA index into receive chain */ 159 1.23 matt int sc_xfree; /* index for next transmit buffer */ 160 1.23 matt int sc_nxmit; /* # of transmits in progress */ 161 1.2 ragge void *sc_sh; /* shutdownhook cookie */ 162 1.1 ragge }; 163 1.1 ragge 164 1.23 matt static int dematch(device_t, cfdata_t, void *); 165 1.23 matt static void deattach(device_t, device_t, void *); 166 1.17 ragge static void dewait(struct de_softc *, const char *); 167 1.10 ragge static int deinit(struct ifnet *); 168 1.21 christos static int deioctl(struct ifnet *, u_long, void *); 169 1.27 cegger static void dereset(device_t); 170 1.10 ragge static void destop(struct ifnet *, int); 171 1.1 ragge static void destart(struct ifnet *); 172 1.1 ragge static void derecv(struct de_softc *); 173 1.1 ragge static void deintr(void *); 174 1.2 ragge static void deshutdown(void *); 175 1.1 ragge 176 1.23 matt CFATTACH_DECL_NEW(de, sizeof(struct de_softc), 177 1.14 thorpej dematch, deattach, NULL, NULL); 178 1.1 ragge 179 1.1 ragge #define DE_WCSR(csr, val) \ 180 1.1 ragge bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val) 181 1.1 ragge #define DE_WLOW(val) \ 182 1.1 ragge bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0, val) 183 1.1 ragge #define DE_WHIGH(val) \ 184 1.1 ragge bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0 + 1, val) 185 1.1 ragge #define DE_RCSR(csr) \ 186 1.1 ragge bus_space_read_2(sc->sc_iot, sc->sc_ioh, csr) 187 1.1 ragge 188 1.1 ragge #define LOWORD(x) ((int)(x) & 0xffff) 189 1.1 ragge #define HIWORD(x) (((int)(x) >> 16) & 0x3) 190 1.1 ragge /* 191 1.1 ragge * Interface exists: make available by filling in network interface 192 1.1 ragge * record. System will initialize the interface when it is ready 193 1.1 ragge * to accept packets. We get the ethernet address here. 194 1.1 ragge */ 195 1.1 ragge void 196 1.23 matt deattach(device_t parent, device_t self, void *aux) 197 1.1 ragge { 198 1.1 ragge struct uba_attach_args *ua = aux; 199 1.20 thorpej struct de_softc *sc = device_private(self); 200 1.1 ragge struct ifnet *ifp = &sc->sc_if; 201 1.1 ragge u_int8_t myaddr[ETHER_ADDR_LEN]; 202 1.10 ragge int csr1, error; 203 1.17 ragge const char *c; 204 1.1 ragge 205 1.23 matt sc->sc_dev = self; 206 1.23 matt sc->sc_uh = device_private(parent); 207 1.1 ragge sc->sc_iot = ua->ua_iot; 208 1.1 ragge sc->sc_ioh = ua->ua_ioh; 209 1.1 ragge sc->sc_dmat = ua->ua_dmat; 210 1.1 ragge 211 1.1 ragge /* 212 1.1 ragge * What kind of a board is this? 213 1.1 ragge * The error bits 4-6 in pcsr1 are a device id as long as 214 1.1 ragge * the high byte is zero. 215 1.1 ragge */ 216 1.1 ragge csr1 = DE_RCSR(DE_PCSR1); 217 1.1 ragge if (csr1 & 0xff60) 218 1.1 ragge c = "broken"; 219 1.1 ragge else if (csr1 & 0x10) 220 1.1 ragge c = "delua"; 221 1.1 ragge else 222 1.1 ragge c = "deuna"; 223 1.1 ragge 224 1.1 ragge /* 225 1.1 ragge * Reset the board and temporarily map 226 1.1 ragge * the pcbb buffer onto the Unibus. 227 1.1 ragge */ 228 1.1 ragge DE_WCSR(DE_PCSR0, 0); /* reset INTE */ 229 1.1 ragge DELAY(100); 230 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_RSET); 231 1.2 ragge dewait(sc, "reset"); 232 1.1 ragge 233 1.9 ragge sc->sc_ui.ui_size = sizeof(struct de_cdata); 234 1.23 matt if ((error = ubmemalloc(sc->sc_uh, &sc->sc_ui, 0))) 235 1.10 ragge return printf(": failed ubmemalloc(), error = %d\n", error); 236 1.9 ragge sc->sc_dedata = (struct de_cdata *)sc->sc_ui.ui_vaddr; 237 1.2 ragge 238 1.1 ragge /* 239 1.1 ragge * Tell the DEUNA about our PCB 240 1.1 ragge */ 241 1.10 ragge DE_WCSR(DE_PCSR2, LOWORD(sc->sc_ui.ui_baddr)); 242 1.10 ragge DE_WCSR(DE_PCSR3, HIWORD(sc->sc_ui.ui_baddr)); 243 1.1 ragge DE_WLOW(CMD_GETPCBB); 244 1.2 ragge dewait(sc, "pcbb"); 245 1.1 ragge 246 1.1 ragge sc->sc_dedata->dc_pcbb.pcbb0 = FC_RDPHYAD; 247 1.1 ragge DE_WLOW(CMD_GETCMD); 248 1.2 ragge dewait(sc, "read addr "); 249 1.1 ragge 250 1.26 tsutsui memcpy(myaddr, (void *)&sc->sc_dedata->dc_pcbb.pcbb2, sizeof (myaddr)); 251 1.23 matt printf(": %s, hardware address %s\n", c, ether_sprintf(myaddr)); 252 1.1 ragge 253 1.16 simonb uba_intr_establish(ua->ua_icookie, ua->ua_cvec, deintr, sc, 254 1.5 ragge &sc->sc_intrcnt); 255 1.23 matt uba_reset_establish(dereset, sc->sc_dev); 256 1.4 matt evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt, 257 1.23 matt device_xname(sc->sc_dev), "intr"); 258 1.1 ragge 259 1.23 matt strcpy(ifp->if_xname, device_xname(sc->sc_dev)); 260 1.1 ragge ifp->if_softc = sc; 261 1.5 ragge ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_MULTICAST|IFF_ALLMULTI; 262 1.1 ragge ifp->if_ioctl = deioctl; 263 1.1 ragge ifp->if_start = destart; 264 1.10 ragge ifp->if_init = deinit; 265 1.10 ragge ifp->if_stop = destop; 266 1.8 thorpej IFQ_SET_READY(&ifp->if_snd); 267 1.8 thorpej 268 1.1 ragge if_attach(ifp); 269 1.1 ragge ether_ifattach(ifp, myaddr); 270 1.23 matt ubmemfree(sc->sc_uh, &sc->sc_ui); 271 1.7 thorpej 272 1.2 ragge sc->sc_sh = shutdownhook_establish(deshutdown, sc); 273 1.10 ragge } 274 1.1 ragge 275 1.10 ragge void 276 1.10 ragge destop(struct ifnet *ifp, int a) 277 1.10 ragge { 278 1.10 ragge struct de_softc *sc = ifp->if_softc; 279 1.10 ragge 280 1.10 ragge DE_WLOW(0); 281 1.10 ragge DELAY(5000); 282 1.10 ragge DE_WLOW(PCSR0_RSET); 283 1.1 ragge } 284 1.1 ragge 285 1.10 ragge 286 1.1 ragge /* 287 1.1 ragge * Reset of interface after UNIBUS reset. 288 1.1 ragge */ 289 1.1 ragge void 290 1.23 matt dereset(device_t dev) 291 1.1 ragge { 292 1.1 ragge struct de_softc *sc = (void *)dev; 293 1.1 ragge 294 1.1 ragge sc->sc_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 295 1.10 ragge sc->sc_flags &= ~DSF_MAPPED; 296 1.5 ragge sc->sc_pdedata = NULL; /* All mappings lost */ 297 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_RSET); 298 1.2 ragge dewait(sc, "reset"); 299 1.10 ragge deinit(&sc->sc_if); 300 1.1 ragge } 301 1.1 ragge 302 1.1 ragge /* 303 1.1 ragge * Initialization of interface; clear recorded pending 304 1.1 ragge * operations, and reinitialize UNIBUS usage. 305 1.1 ragge */ 306 1.10 ragge int 307 1.10 ragge deinit(struct ifnet *ifp) 308 1.1 ragge { 309 1.10 ragge struct de_softc *sc = ifp->if_softc; 310 1.2 ragge struct de_cdata *dc, *pdc; 311 1.10 ragge struct ifrw *ifrw; 312 1.10 ragge struct ifxmt *ifxp; 313 1.10 ragge struct de_ring *rp; 314 1.10 ragge int s, error; 315 1.10 ragge 316 1.10 ragge if (ifp->if_flags & IFF_RUNNING) 317 1.10 ragge return 0; 318 1.10 ragge if ((sc->sc_flags & DSF_MAPPED) == 0) { 319 1.23 matt if (if_ubaminit(&sc->sc_ifuba, sc->sc_uh, MCLBYTES, 320 1.23 matt sc->sc_ifr, NRCV, sc->sc_ifw, NXMT)) { 321 1.23 matt aprint_error_dev(sc->sc_dev, " can't initialize\n"); 322 1.10 ragge ifp->if_flags &= ~IFF_UP; 323 1.10 ragge return 0; 324 1.10 ragge } 325 1.10 ragge sc->sc_ui.ui_size = sizeof(struct de_cdata); 326 1.23 matt if ((error = ubmemalloc(sc->sc_uh, &sc->sc_ui, 0))) { 327 1.23 matt aprint_error(": unable to ubmemalloc(), error = %d\n", 328 1.23 matt error); 329 1.10 ragge return 0; 330 1.10 ragge } 331 1.10 ragge sc->sc_pdedata = (struct de_cdata *)sc->sc_ui.ui_baddr; 332 1.10 ragge sc->sc_dedata = (struct de_cdata *)sc->sc_ui.ui_vaddr; 333 1.10 ragge sc->sc_flags |= DSF_MAPPED; 334 1.10 ragge } 335 1.1 ragge 336 1.1 ragge /* 337 1.1 ragge * Tell the DEUNA about our PCB 338 1.1 ragge */ 339 1.1 ragge DE_WCSR(DE_PCSR2, LOWORD(sc->sc_pdedata)); 340 1.1 ragge DE_WCSR(DE_PCSR3, HIWORD(sc->sc_pdedata)); 341 1.1 ragge DE_WLOW(0); /* reset INTE */ 342 1.1 ragge DELAY(500); 343 1.1 ragge DE_WLOW(CMD_GETPCBB); 344 1.2 ragge dewait(sc, "pcbb"); 345 1.1 ragge 346 1.1 ragge dc = sc->sc_dedata; 347 1.2 ragge pdc = sc->sc_pdedata; 348 1.1 ragge /* set the transmit and receive ring header addresses */ 349 1.1 ragge dc->dc_pcbb.pcbb0 = FC_WTRING; 350 1.2 ragge dc->dc_pcbb.pcbb2 = LOWORD(&pdc->dc_udbbuf); 351 1.2 ragge dc->dc_pcbb.pcbb4 = HIWORD(&pdc->dc_udbbuf); 352 1.1 ragge 353 1.2 ragge dc->dc_udbbuf.b_tdrbl = LOWORD(&pdc->dc_xrent[0]); 354 1.2 ragge dc->dc_udbbuf.b_tdrbh = HIWORD(&pdc->dc_xrent[0]); 355 1.1 ragge dc->dc_udbbuf.b_telen = sizeof (struct de_ring) / sizeof(u_int16_t); 356 1.1 ragge dc->dc_udbbuf.b_trlen = NXMT; 357 1.2 ragge dc->dc_udbbuf.b_rdrbl = LOWORD(&pdc->dc_rrent[0]); 358 1.2 ragge dc->dc_udbbuf.b_rdrbh = HIWORD(&pdc->dc_rrent[0]); 359 1.1 ragge dc->dc_udbbuf.b_relen = sizeof (struct de_ring) / sizeof(u_int16_t); 360 1.1 ragge dc->dc_udbbuf.b_rrlen = NRCV; 361 1.1 ragge 362 1.1 ragge DE_WLOW(CMD_GETCMD); 363 1.2 ragge dewait(sc, "wtring"); 364 1.1 ragge 365 1.5 ragge sc->sc_dedata->dc_pcbb.pcbb0 = FC_WTMODE; 366 1.5 ragge sc->sc_dedata->dc_pcbb.pcbb2 = MOD_TPAD|MOD_HDX|MOD_DRDC|MOD_ENAL; 367 1.5 ragge DE_WLOW(CMD_GETCMD); 368 1.5 ragge dewait(sc, "wtmode"); 369 1.1 ragge 370 1.5 ragge /* set up the receive and transmit ring entries */ 371 1.10 ragge ifxp = &sc->sc_ifw[0]; 372 1.10 ragge for (rp = &dc->dc_xrent[0]; rp < &dc->dc_xrent[NXMT]; rp++) { 373 1.10 ragge rp->r_segbl = LOWORD(ifxp->ifw_info); 374 1.10 ragge rp->r_segbh = HIWORD(ifxp->ifw_info); 375 1.10 ragge rp->r_flags = 0; 376 1.10 ragge ifxp++; 377 1.10 ragge } 378 1.10 ragge ifrw = &sc->sc_ifr[0]; 379 1.10 ragge for (rp = &dc->dc_rrent[0]; rp < &dc->dc_rrent[NRCV]; rp++) { 380 1.10 ragge rp->r_slen = MCLBYTES - 2; 381 1.10 ragge rp->r_segbl = LOWORD(ifrw->ifrw_info); 382 1.10 ragge rp->r_segbh = HIWORD(ifrw->ifrw_info); 383 1.10 ragge rp->r_flags = RFLG_OWN; 384 1.10 ragge ifrw++; 385 1.10 ragge } 386 1.1 ragge 387 1.1 ragge /* start up the board (rah rah) */ 388 1.1 ragge s = splnet(); 389 1.5 ragge sc->sc_rindex = sc->sc_xindex = sc->sc_xfree = sc->sc_nxmit = 0; 390 1.1 ragge sc->sc_if.if_flags |= IFF_RUNNING; 391 1.5 ragge DE_WLOW(PCSR0_INTE); /* avoid interlock */ 392 1.5 ragge destart(&sc->sc_if); /* queue output packets */ 393 1.1 ragge DE_WLOW(CMD_START|PCSR0_INTE); 394 1.1 ragge splx(s); 395 1.10 ragge return 0; 396 1.1 ragge } 397 1.1 ragge 398 1.1 ragge /* 399 1.1 ragge * Setup output on interface. 400 1.1 ragge * Get another datagram to send off of the interface queue, 401 1.1 ragge * and map it to the interface before starting the output. 402 1.1 ragge * Must be called from ipl >= our interrupt level. 403 1.1 ragge */ 404 1.1 ragge void 405 1.1 ragge destart(struct ifnet *ifp) 406 1.1 ragge { 407 1.1 ragge struct de_softc *sc = ifp->if_softc; 408 1.2 ragge struct de_cdata *dc; 409 1.10 ragge struct de_ring *rp; 410 1.2 ragge struct mbuf *m; 411 1.10 ragge int nxmit, len; 412 1.1 ragge 413 1.1 ragge /* 414 1.1 ragge * the following test is necessary, since 415 1.1 ragge * the code is not reentrant and we have 416 1.1 ragge * multiple transmission buffers. 417 1.1 ragge */ 418 1.5 ragge if (sc->sc_if.if_flags & IFF_OACTIVE) 419 1.1 ragge return; 420 1.2 ragge dc = sc->sc_dedata; 421 1.5 ragge for (nxmit = sc->sc_nxmit; nxmit < NXMT; nxmit++) { 422 1.8 thorpej IFQ_DEQUEUE(&ifp->if_snd, m); 423 1.1 ragge if (m == 0) 424 1.5 ragge break; 425 1.10 ragge 426 1.10 ragge rp = &dc->dc_xrent[sc->sc_xfree]; 427 1.5 ragge if (rp->r_flags & XFLG_OWN) 428 1.5 ragge panic("deuna xmit in progress"); 429 1.34 msaitoh bpf_mtap(ifp, m, BPF_D_OUT); 430 1.5 ragge 431 1.10 ragge len = if_ubaput(&sc->sc_ifuba, &sc->sc_ifw[sc->sc_xfree], m); 432 1.10 ragge rp->r_slen = len; 433 1.10 ragge rp->r_tdrerr = 0; 434 1.10 ragge rp->r_flags = XFLG_STP|XFLG_ENP|XFLG_OWN; 435 1.10 ragge 436 1.5 ragge sc->sc_xfree++; 437 1.5 ragge if (sc->sc_xfree == NXMT) 438 1.5 ragge sc->sc_xfree = 0; 439 1.5 ragge } 440 1.10 ragge if (sc->sc_nxmit != nxmit) { 441 1.5 ragge sc->sc_nxmit = nxmit; 442 1.5 ragge if (ifp->if_flags & IFF_RUNNING) 443 1.5 ragge DE_WLOW(PCSR0_INTE|CMD_PDMD); 444 1.1 ragge } 445 1.1 ragge } 446 1.1 ragge 447 1.1 ragge /* 448 1.1 ragge * Command done interrupt. 449 1.1 ragge */ 450 1.1 ragge void 451 1.1 ragge deintr(void *arg) 452 1.1 ragge { 453 1.10 ragge struct ifxmt *ifxp; 454 1.5 ragge struct de_cdata *dc; 455 1.1 ragge struct de_softc *sc = arg; 456 1.5 ragge struct de_ring *rp; 457 1.5 ragge short csr0; 458 1.1 ragge 459 1.1 ragge /* save flags right away - clear out interrupt bits */ 460 1.1 ragge csr0 = DE_RCSR(DE_PCSR0); 461 1.1 ragge DE_WHIGH(csr0 >> 8); 462 1.1 ragge 463 1.1 ragge 464 1.5 ragge sc->sc_if.if_flags |= IFF_OACTIVE; /* prevent entering destart */ 465 1.5 ragge /* 466 1.5 ragge * if receive, put receive buffer on mbuf 467 1.5 ragge * and hang the request again 468 1.5 ragge */ 469 1.5 ragge derecv(sc); 470 1.1 ragge 471 1.1 ragge /* 472 1.1 ragge * Poll transmit ring and check status. 473 1.5 ragge * Be careful about loopback requests. 474 1.1 ragge * Then free buffer space and check for 475 1.1 ragge * more transmit requests. 476 1.1 ragge */ 477 1.5 ragge dc = sc->sc_dedata; 478 1.5 ragge for ( ; sc->sc_nxmit > 0; sc->sc_nxmit--) { 479 1.5 ragge rp = &dc->dc_xrent[sc->sc_xindex]; 480 1.5 ragge if (rp->r_flags & XFLG_OWN) 481 1.2 ragge break; 482 1.10 ragge 483 1.35 thorpej if_statinc(&sc->sc_if, if_opackets); 484 1.10 ragge ifxp = &sc->sc_ifw[sc->sc_xindex]; 485 1.5 ragge /* check for unusual conditions */ 486 1.1 ragge if (rp->r_flags & (XFLG_ERRS|XFLG_MTCH|XFLG_ONE|XFLG_MORE)) { 487 1.1 ragge if (rp->r_flags & XFLG_ERRS) { 488 1.5 ragge /* output error */ 489 1.35 thorpej if_statinc(&sc->sc_if, if_oerrors); 490 1.1 ragge } else if (rp->r_flags & XFLG_ONE) { 491 1.5 ragge /* one collision */ 492 1.35 thorpej if_statinc(&sc->sc_if, if_collisions); 493 1.1 ragge } else if (rp->r_flags & XFLG_MORE) { 494 1.35 thorpej /* more than one collision (guess...) */ 495 1.35 thorpej if_statadd(&sc->sc_if, if_collisions, 2); 496 1.1 ragge } 497 1.1 ragge } 498 1.10 ragge if_ubaend(&sc->sc_ifuba, ifxp); 499 1.5 ragge /* check if next transmit buffer also finished */ 500 1.5 ragge sc->sc_xindex++; 501 1.5 ragge if (sc->sc_xindex == NXMT) 502 1.5 ragge sc->sc_xindex = 0; 503 1.5 ragge } 504 1.5 ragge sc->sc_if.if_flags &= ~IFF_OACTIVE; 505 1.5 ragge destart(&sc->sc_if); 506 1.5 ragge 507 1.5 ragge if (csr0 & PCSR0_RCBI) { 508 1.5 ragge DE_WLOW(PCSR0_INTE|CMD_PDMD); 509 1.5 ragge } 510 1.1 ragge } 511 1.1 ragge 512 1.1 ragge /* 513 1.1 ragge * Ethernet interface receiver interface. 514 1.1 ragge * If input error just drop packet. 515 1.16 simonb * Otherwise purge input buffered data path and examine 516 1.1 ragge * packet to determine type. If can't determine length 517 1.36 andvar * from type, then have to drop packet. Otherwise decapsulate 518 1.1 ragge * packet based on type and pass to type specific higher-level 519 1.1 ragge * input routine. 520 1.1 ragge */ 521 1.1 ragge void 522 1.1 ragge derecv(struct de_softc *sc) 523 1.1 ragge { 524 1.1 ragge struct ifnet *ifp = &sc->sc_if; 525 1.1 ragge struct de_ring *rp; 526 1.5 ragge struct de_cdata *dc; 527 1.1 ragge struct mbuf *m; 528 1.1 ragge int len; 529 1.1 ragge 530 1.5 ragge dc = sc->sc_dedata; 531 1.5 ragge rp = &dc->dc_rrent[sc->sc_rindex]; 532 1.1 ragge while ((rp->r_flags & RFLG_OWN) == 0) { 533 1.5 ragge len = (rp->r_lenerr&RERR_MLEN) - ETHER_CRC_LEN; 534 1.1 ragge /* check for errors */ 535 1.1 ragge if ((rp->r_flags & (RFLG_ERRS|RFLG_FRAM|RFLG_OFLO|RFLG_CRC)) || 536 1.2 ragge (rp->r_lenerr & (RERR_BUFL|RERR_UBTO))) { 537 1.35 thorpej if_statinc(&sc->sc_if, if_ierrors); 538 1.1 ragge goto next; 539 1.1 ragge } 540 1.10 ragge m = if_ubaget(&sc->sc_ifuba, &sc->sc_ifr[sc->sc_rindex], 541 1.10 ragge ifp, len); 542 1.10 ragge if (m == 0) { 543 1.35 thorpej if_statinc(&sc->sc_if, if_ierrors); 544 1.10 ragge goto next; 545 1.10 ragge } 546 1.5 ragge 547 1.30 ozaki if_percpuq_enqueue(ifp->if_percpuq, m); 548 1.1 ragge 549 1.1 ragge /* hang the receive buffer again */ 550 1.1 ragge next: rp->r_lenerr = 0; 551 1.1 ragge rp->r_flags = RFLG_OWN; 552 1.1 ragge 553 1.1 ragge /* check next receive buffer */ 554 1.5 ragge sc->sc_rindex++; 555 1.5 ragge if (sc->sc_rindex == NRCV) 556 1.5 ragge sc->sc_rindex = 0; 557 1.5 ragge rp = &dc->dc_rrent[sc->sc_rindex]; 558 1.1 ragge } 559 1.1 ragge } 560 1.1 ragge 561 1.1 ragge /* 562 1.1 ragge * Process an ioctl request. 563 1.1 ragge */ 564 1.1 ragge int 565 1.21 christos deioctl(struct ifnet *ifp, u_long cmd, void *data) 566 1.1 ragge { 567 1.10 ragge int s, error = 0; 568 1.1 ragge 569 1.10 ragge s = splnet(); 570 1.1 ragge 571 1.10 ragge error = ether_ioctl(ifp, cmd, data); 572 1.10 ragge if (error == ENETRESET) 573 1.10 ragge error = 0; 574 1.2 ragge 575 1.1 ragge splx(s); 576 1.1 ragge return (error); 577 1.1 ragge } 578 1.1 ragge 579 1.1 ragge /* 580 1.1 ragge * Await completion of the named function 581 1.1 ragge * and check for errors. 582 1.1 ragge */ 583 1.2 ragge void 584 1.17 ragge dewait(struct de_softc *sc, const char *fn) 585 1.1 ragge { 586 1.23 matt int csr0, csr1; 587 1.1 ragge 588 1.1 ragge while ((DE_RCSR(DE_PCSR0) & PCSR0_INTR) == 0) 589 1.1 ragge ; 590 1.1 ragge csr0 = DE_RCSR(DE_PCSR0); 591 1.1 ragge DE_WHIGH(csr0 >> 8); 592 1.1 ragge if (csr0 & PCSR0_PCEI) { 593 1.23 matt char bits0[64]; 594 1.23 matt char bits1[64]; 595 1.23 matt csr1 = DE_RCSR(DE_PCSR1); 596 1.24 christos snprintb(bits0, sizeof(bits0), PCSR0_BITS, csr0); 597 1.24 christos snprintb(bits1, sizeof(bits1), PCSR1_BITS, csr1); 598 1.23 matt aprint_error_dev(sc->sc_dev, "%s failed, csr0=%s csr1=%s\n", 599 1.24 christos fn, bits0, bits1); 600 1.1 ragge } 601 1.1 ragge } 602 1.1 ragge 603 1.1 ragge int 604 1.23 matt dematch(device_t parent, cfdata_t cf, void *aux) 605 1.1 ragge { 606 1.1 ragge struct uba_attach_args *ua = aux; 607 1.1 ragge struct de_softc ssc; 608 1.1 ragge struct de_softc *sc = &ssc; 609 1.1 ragge int i; 610 1.1 ragge 611 1.1 ragge sc->sc_iot = ua->ua_iot; 612 1.1 ragge sc->sc_ioh = ua->ua_ioh; 613 1.1 ragge /* 614 1.1 ragge * Make sure self-test is finished before we screw with the board. 615 1.1 ragge * Self-test on a DELUA can take 15 seconds (argh). 616 1.1 ragge */ 617 1.1 ragge for (i = 0; 618 1.1 ragge (i < 160) && 619 1.1 ragge (DE_RCSR(DE_PCSR0) & PCSR0_FATI) == 0 && 620 1.1 ragge (DE_RCSR(DE_PCSR1) & PCSR1_STMASK) == STAT_RESET; 621 1.1 ragge ++i) 622 1.1 ragge DELAY(50000); 623 1.1 ragge if (((DE_RCSR(DE_PCSR0) & PCSR0_FATI) != 0) || 624 1.1 ragge (((DE_RCSR(DE_PCSR1) & PCSR1_STMASK) != STAT_READY) && 625 1.1 ragge ((DE_RCSR(DE_PCSR1) & PCSR1_STMASK) != STAT_RUN))) 626 1.1 ragge return(0); 627 1.1 ragge 628 1.1 ragge DE_WCSR(DE_PCSR0, 0); 629 1.1 ragge DELAY(5000); 630 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_RSET); 631 1.1 ragge while ((DE_RCSR(DE_PCSR0) & PCSR0_INTR) == 0) 632 1.1 ragge ; 633 1.1 ragge /* make board interrupt by executing a GETPCBB command */ 634 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_INTE); 635 1.1 ragge DE_WCSR(DE_PCSR2, 0); 636 1.1 ragge DE_WCSR(DE_PCSR3, 0); 637 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_INTE|CMD_GETPCBB); 638 1.1 ragge DELAY(50000); 639 1.1 ragge 640 1.1 ragge return 1; 641 1.1 ragge } 642 1.2 ragge 643 1.2 ragge void 644 1.2 ragge deshutdown(void *arg) 645 1.2 ragge { 646 1.2 ragge struct de_softc *sc = arg; 647 1.2 ragge 648 1.5 ragge DE_WCSR(DE_PCSR0, 0); 649 1.5 ragge DELAY(1000); 650 1.2 ragge DE_WCSR(DE_PCSR0, PCSR0_RSET); 651 1.2 ragge dewait(sc, "shutdown"); 652 1.2 ragge } 653