if_de.c revision 1.9 1 1.9 ragge /* $NetBSD: if_de.c,v 1.9 2001/04/26 19:36:07 ragge Exp $ */
2 1.5 ragge
3 1.1 ragge /*
4 1.1 ragge * Copyright (c) 1982, 1986, 1989 Regents of the University of California.
5 1.1 ragge * Copyright (c) 2000 Ludd, University of Lule}, Sweden.
6 1.1 ragge * All rights reserved.
7 1.1 ragge *
8 1.1 ragge *
9 1.1 ragge * Redistribution and use in source and binary forms, with or without
10 1.1 ragge * modification, are permitted provided that the following conditions
11 1.1 ragge * are met:
12 1.1 ragge * 1. Redistributions of source code must retain the above copyright
13 1.1 ragge * notice, this list of conditions and the following disclaimer.
14 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 ragge * notice, this list of conditions and the following disclaimer in the
16 1.1 ragge * documentation and/or other materials provided with the distribution.
17 1.1 ragge * 3. All advertising materials mentioning features or use of this software
18 1.1 ragge * must display the following acknowledgement:
19 1.1 ragge * This product includes software developed by the University of
20 1.1 ragge * California, Berkeley and its contributors.
21 1.1 ragge * 4. Neither the name of the University nor the names of its contributors
22 1.1 ragge * may be used to endorse or promote products derived from this software
23 1.1 ragge * without specific prior written permission.
24 1.1 ragge *
25 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 1.1 ragge * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 1.1 ragge * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 1.1 ragge * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 1.1 ragge * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 1.1 ragge * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 1.1 ragge * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 1.1 ragge * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 1.1 ragge * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 1.1 ragge * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 1.1 ragge * SUCH DAMAGE.
36 1.1 ragge *
37 1.1 ragge * @(#)if_de.c 7.12 (Berkeley) 12/16/90
38 1.1 ragge */
39 1.1 ragge
40 1.1 ragge /*
41 1.1 ragge * DEC DEUNA interface
42 1.1 ragge *
43 1.1 ragge * Lou Salkind
44 1.1 ragge * New York University
45 1.1 ragge *
46 1.2 ragge * Rewritten by Ragge 30 April 2000 to match new world.
47 1.1 ragge *
48 1.1 ragge * TODO:
49 1.1 ragge * timeout routine (get statistics)
50 1.1 ragge */
51 1.1 ragge
52 1.1 ragge #include "opt_inet.h"
53 1.2 ragge #include "bpfilter.h"
54 1.1 ragge
55 1.1 ragge #include <sys/param.h>
56 1.1 ragge #include <sys/systm.h>
57 1.1 ragge #include <sys/mbuf.h>
58 1.1 ragge #include <sys/buf.h>
59 1.1 ragge #include <sys/protosw.h>
60 1.1 ragge #include <sys/socket.h>
61 1.1 ragge #include <sys/ioctl.h>
62 1.1 ragge #include <sys/errno.h>
63 1.1 ragge #include <sys/syslog.h>
64 1.1 ragge #include <sys/device.h>
65 1.1 ragge
66 1.1 ragge #include <net/if.h>
67 1.1 ragge #include <net/if_ether.h>
68 1.1 ragge #include <net/if_dl.h>
69 1.1 ragge
70 1.1 ragge #ifdef INET
71 1.1 ragge #include <netinet/in.h>
72 1.1 ragge #include <netinet/if_inarp.h>
73 1.1 ragge #endif
74 1.1 ragge
75 1.2 ragge #if NBPFILTER > 0
76 1.2 ragge #include <net/bpf.h>
77 1.2 ragge #include <net/bpfdesc.h>
78 1.1 ragge #endif
79 1.1 ragge
80 1.1 ragge #include <machine/bus.h>
81 1.1 ragge
82 1.1 ragge #include <dev/qbus/ubavar.h>
83 1.1 ragge #include <dev/qbus/if_dereg.h>
84 1.1 ragge
85 1.1 ragge #include "ioconf.h"
86 1.1 ragge
87 1.1 ragge /*
88 1.1 ragge * Be careful with transmit/receive buffers, each entry steals 4 map
89 1.1 ragge * registers, and there is only 496 on one unibus...
90 1.1 ragge */
91 1.1 ragge #define NRCV 10 /* number of receive buffers (must be > 1) */
92 1.2 ragge #define NXMT 10 /* number of transmit buffers */
93 1.1 ragge
94 1.1 ragge /*
95 1.1 ragge * Structure containing the elements that must be in DMA-safe memory.
96 1.1 ragge */
97 1.1 ragge struct de_cdata {
98 1.1 ragge /* the following structures are always mapped in */
99 1.1 ragge struct de_pcbb dc_pcbb; /* port control block */
100 1.1 ragge struct de_ring dc_xrent[NXMT]; /* transmit ring entrys */
101 1.1 ragge struct de_ring dc_rrent[NRCV]; /* receive ring entrys */
102 1.1 ragge struct de_udbbuf dc_udbbuf; /* UNIBUS data buffer */
103 1.1 ragge /* end mapped area */
104 1.1 ragge };
105 1.1 ragge
106 1.1 ragge /*
107 1.1 ragge * Ethernet software status per interface.
108 1.1 ragge *
109 1.1 ragge * Each interface is referenced by a network interface structure,
110 1.1 ragge * ds_if, which the routing code uses to locate the interface.
111 1.1 ragge * This structure contains the output queue for the interface, its address, ...
112 1.1 ragge * We also have, for each interface, a UBA interface structure, which
113 1.1 ragge * contains information about the UNIBUS resources held by the interface:
114 1.1 ragge * map registers, buffered data paths, etc. Information is cached in this
115 1.1 ragge * structure for use by the if_uba.c routines in running the interface
116 1.1 ragge * efficiently.
117 1.1 ragge */
118 1.1 ragge struct de_softc {
119 1.1 ragge struct device sc_dev; /* Configuration common part */
120 1.3 matt struct evcnt sc_intrcnt; /* Interrupt counting */
121 1.1 ragge struct ethercom sc_ec; /* Ethernet common part */
122 1.1 ragge #define sc_if sc_ec.ec_if /* network-visible interface */
123 1.1 ragge bus_space_tag_t sc_iot;
124 1.1 ragge bus_addr_t sc_ioh;
125 1.1 ragge bus_dma_tag_t sc_dmat;
126 1.9 ragge struct ubinfo sc_ui;
127 1.1 ragge struct de_cdata *sc_dedata; /* Control structure */
128 1.1 ragge struct de_cdata *sc_pdedata; /* Bus-mapped control structure */
129 1.2 ragge bus_dmamap_t sc_rcvmap[NRCV]; /* unibus receive maps */
130 1.1 ragge struct mbuf *sc_rxmbuf[NRCV];
131 1.9 ragge bus_dmamap_t sc_xmtmap[NXMT];
132 1.9 ragge struct mbuf *sc_txmbuf[NXMT];
133 1.9 ragge char sc_xbuf[NXMT][ETHER_MAX_LEN];
134 1.5 ragge int sc_xindex; /* UNA index into transmit chain */
135 1.5 ragge int sc_rindex; /* UNA index into receive chain */
136 1.5 ragge int sc_xfree; /* index for next transmit buffer */
137 1.5 ragge int sc_nxmit; /* # of transmits in progress */
138 1.2 ragge void *sc_sh; /* shutdownhook cookie */
139 1.1 ragge };
140 1.1 ragge
141 1.1 ragge static int dematch(struct device *, struct cfdata *, void *);
142 1.1 ragge static void deattach(struct device *, struct device *, void *);
143 1.2 ragge static void dewait(struct de_softc *, char *);
144 1.1 ragge static void deinit(struct de_softc *);
145 1.1 ragge static int deioctl(struct ifnet *, u_long, caddr_t);
146 1.1 ragge static void dereset(struct device *);
147 1.1 ragge static void destart(struct ifnet *);
148 1.1 ragge static void derecv(struct de_softc *);
149 1.1 ragge static void deintr(void *);
150 1.1 ragge static int de_add_rxbuf(struct de_softc *, int);
151 1.2 ragge static void deshutdown(void *);
152 1.1 ragge
153 1.1 ragge struct cfattach de_ca = {
154 1.1 ragge sizeof(struct de_softc), dematch, deattach
155 1.1 ragge };
156 1.1 ragge
157 1.1 ragge #define DE_WCSR(csr, val) \
158 1.1 ragge bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)
159 1.1 ragge #define DE_WLOW(val) \
160 1.1 ragge bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0, val)
161 1.1 ragge #define DE_WHIGH(val) \
162 1.1 ragge bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0 + 1, val)
163 1.1 ragge #define DE_RCSR(csr) \
164 1.1 ragge bus_space_read_2(sc->sc_iot, sc->sc_ioh, csr)
165 1.1 ragge
166 1.1 ragge #define LOWORD(x) ((int)(x) & 0xffff)
167 1.1 ragge #define HIWORD(x) (((int)(x) >> 16) & 0x3)
168 1.1 ragge /*
169 1.1 ragge * Interface exists: make available by filling in network interface
170 1.1 ragge * record. System will initialize the interface when it is ready
171 1.1 ragge * to accept packets. We get the ethernet address here.
172 1.1 ragge */
173 1.1 ragge void
174 1.1 ragge deattach(struct device *parent, struct device *self, void *aux)
175 1.1 ragge {
176 1.1 ragge struct uba_attach_args *ua = aux;
177 1.1 ragge struct de_softc *sc = (struct de_softc *)self;
178 1.1 ragge struct ifnet *ifp = &sc->sc_if;
179 1.1 ragge u_int8_t myaddr[ETHER_ADDR_LEN];
180 1.9 ragge int csr1, error, i;
181 1.1 ragge char *c;
182 1.1 ragge
183 1.1 ragge sc->sc_iot = ua->ua_iot;
184 1.1 ragge sc->sc_ioh = ua->ua_ioh;
185 1.1 ragge sc->sc_dmat = ua->ua_dmat;
186 1.1 ragge
187 1.1 ragge /*
188 1.1 ragge * What kind of a board is this?
189 1.1 ragge * The error bits 4-6 in pcsr1 are a device id as long as
190 1.1 ragge * the high byte is zero.
191 1.1 ragge */
192 1.1 ragge csr1 = DE_RCSR(DE_PCSR1);
193 1.1 ragge if (csr1 & 0xff60)
194 1.1 ragge c = "broken";
195 1.1 ragge else if (csr1 & 0x10)
196 1.1 ragge c = "delua";
197 1.1 ragge else
198 1.1 ragge c = "deuna";
199 1.1 ragge
200 1.1 ragge /*
201 1.1 ragge * Reset the board and temporarily map
202 1.1 ragge * the pcbb buffer onto the Unibus.
203 1.1 ragge */
204 1.1 ragge DE_WCSR(DE_PCSR0, 0); /* reset INTE */
205 1.1 ragge DELAY(100);
206 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_RSET);
207 1.2 ragge dewait(sc, "reset");
208 1.1 ragge
209 1.9 ragge sc->sc_ui.ui_size = sizeof(struct de_cdata);
210 1.9 ragge if ((error = ubmemalloc((struct uba_softc *)parent, &sc->sc_ui, 0))) {
211 1.9 ragge printf(": unable to ubmemalloc(), error = %d\n", error);
212 1.9 ragge return;
213 1.2 ragge }
214 1.9 ragge sc->sc_pdedata = (struct de_cdata *)sc->sc_ui.ui_baddr;
215 1.9 ragge sc->sc_dedata = (struct de_cdata *)sc->sc_ui.ui_vaddr;
216 1.2 ragge
217 1.1 ragge /*
218 1.1 ragge * Create receive buffer DMA maps.
219 1.1 ragge */
220 1.1 ragge for (i = 0; i < NRCV; i++) {
221 1.1 ragge if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
222 1.2 ragge MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
223 1.1 ragge &sc->sc_rcvmap[i]))) {
224 1.1 ragge printf(": unable to create rx DMA map %d, error = %d\n",
225 1.1 ragge i, error);
226 1.1 ragge goto fail_5;
227 1.1 ragge }
228 1.1 ragge }
229 1.1 ragge
230 1.1 ragge /*
231 1.1 ragge * Pre-allocate the receive buffers.
232 1.1 ragge */
233 1.1 ragge for (i = 0; i < NRCV; i++) {
234 1.1 ragge if ((error = de_add_rxbuf(sc, i)) != 0) {
235 1.1 ragge printf(": unable to allocate or map rx buffer %d\n,"
236 1.1 ragge " error = %d\n", i, error);
237 1.1 ragge goto fail_6;
238 1.1 ragge }
239 1.1 ragge }
240 1.1 ragge
241 1.1 ragge /*
242 1.9 ragge * Pre-allocate the transmit buffers.
243 1.9 ragge */
244 1.9 ragge for (i = 0; i < NXMT; i++) {
245 1.9 ragge if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
246 1.9 ragge MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
247 1.9 ragge &sc->sc_xmtmap[i]))) {
248 1.9 ragge printf(": unable to create tx DMA map %d, error = %d\n",
249 1.9 ragge i, error);
250 1.9 ragge goto fail_7;
251 1.9 ragge }
252 1.9 ragge }
253 1.9 ragge
254 1.9 ragge /*
255 1.1 ragge * Tell the DEUNA about our PCB
256 1.1 ragge */
257 1.1 ragge DE_WCSR(DE_PCSR2, LOWORD(sc->sc_pdedata));
258 1.1 ragge DE_WCSR(DE_PCSR3, HIWORD(sc->sc_pdedata));
259 1.1 ragge DE_WLOW(CMD_GETPCBB);
260 1.2 ragge dewait(sc, "pcbb");
261 1.1 ragge
262 1.1 ragge sc->sc_dedata->dc_pcbb.pcbb0 = FC_RDPHYAD;
263 1.1 ragge DE_WLOW(CMD_GETCMD);
264 1.2 ragge dewait(sc, "read addr ");
265 1.1 ragge
266 1.1 ragge bcopy((caddr_t)&sc->sc_dedata->dc_pcbb.pcbb2, myaddr, sizeof (myaddr));
267 1.2 ragge printf("\n%s: %s, hardware address %s\n", sc->sc_dev.dv_xname, c,
268 1.1 ragge ether_sprintf(myaddr));
269 1.1 ragge
270 1.5 ragge uba_intr_establish(ua->ua_icookie, ua->ua_cvec, deintr, sc,
271 1.5 ragge &sc->sc_intrcnt);
272 1.1 ragge uba_reset_establish(dereset, &sc->sc_dev);
273 1.4 matt evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
274 1.5 ragge sc->sc_dev.dv_xname, "intr");
275 1.1 ragge
276 1.1 ragge strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
277 1.1 ragge ifp->if_softc = sc;
278 1.5 ragge ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_MULTICAST|IFF_ALLMULTI;
279 1.1 ragge ifp->if_ioctl = deioctl;
280 1.1 ragge ifp->if_start = destart;
281 1.8 thorpej IFQ_SET_READY(&ifp->if_snd);
282 1.8 thorpej
283 1.1 ragge if_attach(ifp);
284 1.1 ragge ether_ifattach(ifp, myaddr);
285 1.7 thorpej
286 1.2 ragge sc->sc_sh = shutdownhook_establish(deshutdown, sc);
287 1.1 ragge return;
288 1.1 ragge
289 1.1 ragge /*
290 1.1 ragge * Free any resources we've allocated during the failed attach
291 1.1 ragge * attempt. Do this in reverse order and fall through.
292 1.1 ragge */
293 1.9 ragge fail_7:
294 1.9 ragge for (i = 0; i < NXMT; i++)
295 1.9 ragge if (sc->sc_xmtmap[i] != NULL)
296 1.9 ragge bus_dmamap_destroy(sc->sc_dmat, sc->sc_xmtmap[i]);
297 1.1 ragge fail_6:
298 1.1 ragge for (i = 0; i < NRCV; i++) {
299 1.1 ragge if (sc->sc_rxmbuf[i] != NULL) {
300 1.2 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]);
301 1.1 ragge m_freem(sc->sc_rxmbuf[i]);
302 1.1 ragge }
303 1.1 ragge }
304 1.1 ragge fail_5:
305 1.1 ragge for (i = 0; i < NRCV; i++) {
306 1.2 ragge if (sc->sc_rcvmap[i] != NULL)
307 1.2 ragge bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]);
308 1.1 ragge }
309 1.1 ragge }
310 1.1 ragge
311 1.1 ragge /*
312 1.1 ragge * Reset of interface after UNIBUS reset.
313 1.1 ragge */
314 1.1 ragge void
315 1.1 ragge dereset(struct device *dev)
316 1.1 ragge {
317 1.1 ragge struct de_softc *sc = (void *)dev;
318 1.1 ragge
319 1.1 ragge sc->sc_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
320 1.5 ragge sc->sc_pdedata = NULL; /* All mappings lost */
321 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_RSET);
322 1.2 ragge dewait(sc, "reset");
323 1.1 ragge deinit(sc);
324 1.1 ragge }
325 1.1 ragge
326 1.1 ragge /*
327 1.1 ragge * Initialization of interface; clear recorded pending
328 1.1 ragge * operations, and reinitialize UNIBUS usage.
329 1.1 ragge */
330 1.1 ragge void
331 1.1 ragge deinit(struct de_softc *sc)
332 1.1 ragge {
333 1.2 ragge struct de_cdata *dc, *pdc;
334 1.1 ragge int s, i;
335 1.1 ragge
336 1.2 ragge if (sc->sc_if.if_flags & IFF_RUNNING)
337 1.1 ragge return;
338 1.1 ragge /*
339 1.1 ragge * Tell the DEUNA about our PCB
340 1.1 ragge */
341 1.1 ragge DE_WCSR(DE_PCSR2, LOWORD(sc->sc_pdedata));
342 1.1 ragge DE_WCSR(DE_PCSR3, HIWORD(sc->sc_pdedata));
343 1.1 ragge DE_WLOW(0); /* reset INTE */
344 1.1 ragge DELAY(500);
345 1.1 ragge DE_WLOW(CMD_GETPCBB);
346 1.2 ragge dewait(sc, "pcbb");
347 1.1 ragge
348 1.1 ragge dc = sc->sc_dedata;
349 1.2 ragge pdc = sc->sc_pdedata;
350 1.1 ragge /* set the transmit and receive ring header addresses */
351 1.1 ragge dc->dc_pcbb.pcbb0 = FC_WTRING;
352 1.2 ragge dc->dc_pcbb.pcbb2 = LOWORD(&pdc->dc_udbbuf);
353 1.2 ragge dc->dc_pcbb.pcbb4 = HIWORD(&pdc->dc_udbbuf);
354 1.1 ragge
355 1.2 ragge dc->dc_udbbuf.b_tdrbl = LOWORD(&pdc->dc_xrent[0]);
356 1.2 ragge dc->dc_udbbuf.b_tdrbh = HIWORD(&pdc->dc_xrent[0]);
357 1.1 ragge dc->dc_udbbuf.b_telen = sizeof (struct de_ring) / sizeof(u_int16_t);
358 1.1 ragge dc->dc_udbbuf.b_trlen = NXMT;
359 1.2 ragge dc->dc_udbbuf.b_rdrbl = LOWORD(&pdc->dc_rrent[0]);
360 1.2 ragge dc->dc_udbbuf.b_rdrbh = HIWORD(&pdc->dc_rrent[0]);
361 1.1 ragge dc->dc_udbbuf.b_relen = sizeof (struct de_ring) / sizeof(u_int16_t);
362 1.1 ragge dc->dc_udbbuf.b_rrlen = NRCV;
363 1.1 ragge
364 1.1 ragge DE_WLOW(CMD_GETCMD);
365 1.2 ragge dewait(sc, "wtring");
366 1.1 ragge
367 1.5 ragge sc->sc_dedata->dc_pcbb.pcbb0 = FC_WTMODE;
368 1.5 ragge sc->sc_dedata->dc_pcbb.pcbb2 = MOD_TPAD|MOD_HDX|MOD_DRDC|MOD_ENAL;
369 1.5 ragge DE_WLOW(CMD_GETCMD);
370 1.5 ragge dewait(sc, "wtmode");
371 1.1 ragge
372 1.5 ragge /* set up the receive and transmit ring entries */
373 1.9 ragge for (i = 0; i < NXMT; i++)
374 1.1 ragge dc->dc_xrent[i].r_flags = 0;
375 1.2 ragge
376 1.1 ragge for (i = 0; i < NRCV; i++)
377 1.1 ragge dc->dc_rrent[i].r_flags = RFLG_OWN;
378 1.1 ragge
379 1.1 ragge /* start up the board (rah rah) */
380 1.1 ragge s = splnet();
381 1.5 ragge sc->sc_rindex = sc->sc_xindex = sc->sc_xfree = sc->sc_nxmit = 0;
382 1.1 ragge sc->sc_if.if_flags |= IFF_RUNNING;
383 1.5 ragge DE_WLOW(PCSR0_INTE); /* avoid interlock */
384 1.5 ragge destart(&sc->sc_if); /* queue output packets */
385 1.1 ragge DE_WLOW(CMD_START|PCSR0_INTE);
386 1.1 ragge splx(s);
387 1.1 ragge }
388 1.1 ragge
389 1.1 ragge /*
390 1.1 ragge * Setup output on interface.
391 1.1 ragge * Get another datagram to send off of the interface queue,
392 1.1 ragge * and map it to the interface before starting the output.
393 1.1 ragge * Must be called from ipl >= our interrupt level.
394 1.1 ragge */
395 1.1 ragge void
396 1.1 ragge destart(struct ifnet *ifp)
397 1.1 ragge {
398 1.1 ragge struct de_softc *sc = ifp->if_softc;
399 1.2 ragge struct de_cdata *dc;
400 1.9 ragge struct de_ring *rp, *rp2;
401 1.2 ragge struct mbuf *m;
402 1.9 ragge int nxmit, buffer, freeb, freeb2;
403 1.1 ragge
404 1.1 ragge /*
405 1.1 ragge * the following test is necessary, since
406 1.1 ragge * the code is not reentrant and we have
407 1.1 ragge * multiple transmission buffers.
408 1.1 ragge */
409 1.5 ragge if (sc->sc_if.if_flags & IFF_OACTIVE)
410 1.1 ragge return;
411 1.2 ragge dc = sc->sc_dedata;
412 1.5 ragge for (nxmit = sc->sc_nxmit; nxmit < NXMT; nxmit++) {
413 1.8 thorpej IFQ_DEQUEUE(&ifp->if_snd, m);
414 1.1 ragge if (m == 0)
415 1.5 ragge break;
416 1.9 ragge freeb = sc->sc_xfree;
417 1.9 ragge rp = &dc->dc_xrent[freeb];
418 1.5 ragge if (rp->r_flags & XFLG_OWN)
419 1.5 ragge panic("deuna xmit in progress");
420 1.9 ragge
421 1.9 ragge /*
422 1.9 ragge * One or two mbufs: DMA out of those mbufs.
423 1.9 ragge * Three or more: copy to the preallocated buffer space.
424 1.9 ragge * XXX - should use bus_dmamap_load_mbuf().
425 1.9 ragge */
426 1.5 ragge rp->r_tdrerr = 0;
427 1.9 ragge if (m->m_next == NULL) {
428 1.9 ragge bus_dmamap_load(sc->sc_dmat, sc->sc_xmtmap[freeb],
429 1.9 ragge mtod(m, void *), m->m_len, 0, 0);
430 1.9 ragge buffer = sc->sc_xmtmap[freeb]->dm_segs[0].ds_addr;
431 1.9 ragge rp->r_slen = m->m_pkthdr.len;
432 1.9 ragge rp->r_segbl = LOWORD(buffer);
433 1.9 ragge rp->r_segbh = HIWORD(buffer);
434 1.9 ragge rp->r_flags = XFLG_STP|XFLG_ENP|XFLG_OWN;
435 1.9 ragge } else if (m->m_next->m_next == NULL) {
436 1.9 ragge if (nxmit+1 == NXMT) {
437 1.9 ragge IF_PREPEND(&ifp->if_snd, m);
438 1.9 ragge goto out;
439 1.9 ragge }
440 1.9 ragge freeb2 = (freeb+1 == NXMT ? 0 : freeb+1);
441 1.9 ragge rp2 = &dc->dc_xrent[freeb2];
442 1.9 ragge bus_dmamap_load(sc->sc_dmat, sc->sc_xmtmap[freeb],
443 1.9 ragge mtod(m, void *), m->m_len, 0, 0);
444 1.9 ragge buffer = sc->sc_xmtmap[freeb]->dm_segs[0].ds_addr;
445 1.9 ragge rp->r_slen = m->m_len;
446 1.9 ragge rp->r_segbl = LOWORD(buffer);
447 1.9 ragge rp->r_segbh = HIWORD(buffer);
448 1.9 ragge bus_dmamap_load(sc->sc_dmat, sc->sc_xmtmap[freeb2],
449 1.9 ragge mtod(m->m_next, void *), m->m_next->m_len, 0, 0);
450 1.9 ragge buffer = sc->sc_xmtmap[freeb2]->dm_segs[0].ds_addr;
451 1.9 ragge rp2->r_slen = m->m_next->m_len;
452 1.9 ragge rp2->r_segbl = LOWORD(buffer);
453 1.9 ragge rp2->r_segbh = HIWORD(buffer);
454 1.9 ragge rp2->r_flags = XFLG_ENP|XFLG_OWN;
455 1.9 ragge rp->r_flags = XFLG_STP|XFLG_OWN;
456 1.9 ragge nxmit++;
457 1.9 ragge sc->sc_xfree = freeb2;
458 1.9 ragge
459 1.9 ragge } else {
460 1.9 ragge m_copydata(m, 0, m->m_pkthdr.len,
461 1.9 ragge &sc->sc_xbuf[freeb][0]);
462 1.9 ragge
463 1.9 ragge bus_dmamap_load(sc->sc_dmat, sc->sc_xmtmap[freeb],
464 1.9 ragge &sc->sc_xbuf[freeb][0], m->m_pkthdr.len, 0, 0);
465 1.9 ragge buffer = sc->sc_xmtmap[freeb]->dm_segs[0].ds_addr;
466 1.9 ragge rp->r_segbl = LOWORD(buffer);
467 1.9 ragge rp->r_segbh = HIWORD(buffer);
468 1.9 ragge rp->r_slen = m->m_pkthdr.len;
469 1.9 ragge rp->r_flags = XFLG_STP|XFLG_ENP|XFLG_OWN;
470 1.9 ragge }
471 1.9 ragge
472 1.9 ragge sc->sc_txmbuf[sc->sc_xfree] = m;
473 1.1 ragge
474 1.1 ragge #if NBPFILTER > 0
475 1.1 ragge if (ifp->if_bpf)
476 1.1 ragge bpf_mtap(ifp->if_bpf, m);
477 1.1 ragge #endif
478 1.5 ragge
479 1.5 ragge sc->sc_xfree++;
480 1.5 ragge if (sc->sc_xfree == NXMT)
481 1.5 ragge sc->sc_xfree = 0;
482 1.5 ragge }
483 1.9 ragge out: if (sc->sc_nxmit != nxmit) {
484 1.5 ragge sc->sc_nxmit = nxmit;
485 1.5 ragge if (ifp->if_flags & IFF_RUNNING)
486 1.5 ragge DE_WLOW(PCSR0_INTE|CMD_PDMD);
487 1.1 ragge }
488 1.1 ragge }
489 1.1 ragge
490 1.1 ragge /*
491 1.1 ragge * Command done interrupt.
492 1.1 ragge */
493 1.1 ragge void
494 1.1 ragge deintr(void *arg)
495 1.1 ragge {
496 1.5 ragge struct de_cdata *dc;
497 1.1 ragge struct de_softc *sc = arg;
498 1.5 ragge struct de_ring *rp;
499 1.5 ragge short csr0;
500 1.1 ragge
501 1.1 ragge /* save flags right away - clear out interrupt bits */
502 1.1 ragge csr0 = DE_RCSR(DE_PCSR0);
503 1.1 ragge DE_WHIGH(csr0 >> 8);
504 1.1 ragge
505 1.1 ragge
506 1.5 ragge sc->sc_if.if_flags |= IFF_OACTIVE; /* prevent entering destart */
507 1.5 ragge /*
508 1.5 ragge * if receive, put receive buffer on mbuf
509 1.5 ragge * and hang the request again
510 1.5 ragge */
511 1.5 ragge derecv(sc);
512 1.1 ragge
513 1.1 ragge /*
514 1.1 ragge * Poll transmit ring and check status.
515 1.5 ragge * Be careful about loopback requests.
516 1.1 ragge * Then free buffer space and check for
517 1.1 ragge * more transmit requests.
518 1.1 ragge */
519 1.5 ragge dc = sc->sc_dedata;
520 1.5 ragge for ( ; sc->sc_nxmit > 0; sc->sc_nxmit--) {
521 1.5 ragge rp = &dc->dc_xrent[sc->sc_xindex];
522 1.5 ragge if (rp->r_flags & XFLG_OWN)
523 1.2 ragge break;
524 1.9 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[sc->sc_xindex]);
525 1.9 ragge if (sc->sc_txmbuf[sc->sc_xindex]) {
526 1.9 ragge m_freem(sc->sc_txmbuf[sc->sc_xindex]);
527 1.9 ragge sc->sc_txmbuf[sc->sc_xindex] = NULL;
528 1.9 ragge }
529 1.5 ragge sc->sc_if.if_opackets++;
530 1.5 ragge /* check for unusual conditions */
531 1.1 ragge if (rp->r_flags & (XFLG_ERRS|XFLG_MTCH|XFLG_ONE|XFLG_MORE)) {
532 1.1 ragge if (rp->r_flags & XFLG_ERRS) {
533 1.5 ragge /* output error */
534 1.5 ragge sc->sc_if.if_oerrors++;
535 1.1 ragge } else if (rp->r_flags & XFLG_ONE) {
536 1.5 ragge /* one collision */
537 1.5 ragge sc->sc_if.if_collisions++;
538 1.1 ragge } else if (rp->r_flags & XFLG_MORE) {
539 1.5 ragge /* more than one collision */
540 1.5 ragge sc->sc_if.if_collisions += 2; /* guess */
541 1.1 ragge }
542 1.1 ragge }
543 1.5 ragge /* check if next transmit buffer also finished */
544 1.5 ragge sc->sc_xindex++;
545 1.5 ragge if (sc->sc_xindex == NXMT)
546 1.5 ragge sc->sc_xindex = 0;
547 1.5 ragge }
548 1.5 ragge sc->sc_if.if_flags &= ~IFF_OACTIVE;
549 1.5 ragge destart(&sc->sc_if);
550 1.5 ragge
551 1.5 ragge if (csr0 & PCSR0_RCBI) {
552 1.5 ragge DE_WLOW(PCSR0_INTE|CMD_PDMD);
553 1.5 ragge }
554 1.1 ragge }
555 1.1 ragge
556 1.1 ragge /*
557 1.1 ragge * Ethernet interface receiver interface.
558 1.1 ragge * If input error just drop packet.
559 1.1 ragge * Otherwise purge input buffered data path and examine
560 1.1 ragge * packet to determine type. If can't determine length
561 1.1 ragge * from type, then have to drop packet. Othewise decapsulate
562 1.1 ragge * packet based on type and pass to type specific higher-level
563 1.1 ragge * input routine.
564 1.1 ragge */
565 1.1 ragge void
566 1.1 ragge derecv(struct de_softc *sc)
567 1.1 ragge {
568 1.1 ragge struct ifnet *ifp = &sc->sc_if;
569 1.1 ragge struct de_ring *rp;
570 1.5 ragge struct de_cdata *dc;
571 1.1 ragge struct mbuf *m;
572 1.1 ragge int len;
573 1.1 ragge
574 1.5 ragge dc = sc->sc_dedata;
575 1.5 ragge rp = &dc->dc_rrent[sc->sc_rindex];
576 1.1 ragge while ((rp->r_flags & RFLG_OWN) == 0) {
577 1.5 ragge sc->sc_if.if_ipackets++;
578 1.5 ragge len = (rp->r_lenerr&RERR_MLEN) - ETHER_CRC_LEN;
579 1.1 ragge /* check for errors */
580 1.1 ragge if ((rp->r_flags & (RFLG_ERRS|RFLG_FRAM|RFLG_OFLO|RFLG_CRC)) ||
581 1.2 ragge (rp->r_lenerr & (RERR_BUFL|RERR_UBTO))) {
582 1.5 ragge sc->sc_if.if_ierrors++;
583 1.1 ragge goto next;
584 1.1 ragge }
585 1.5 ragge m = sc->sc_rxmbuf[sc->sc_rindex];
586 1.1 ragge #if NBPFILTER > 0
587 1.6 thorpej if (ifp->if_bpf)
588 1.1 ragge bpf_mtap(ifp->if_bpf, m);
589 1.1 ragge #endif
590 1.5 ragge
591 1.5 ragge if (de_add_rxbuf(sc, sc->sc_rindex) == 0) {
592 1.5 ragge m->m_pkthdr.rcvif = ifp;
593 1.5 ragge m->m_pkthdr.len = m->m_len = len;
594 1.5 ragge (*ifp->if_input)(ifp, m);
595 1.5 ragge } else
596 1.5 ragge sc->sc_if.if_ierrors++;
597 1.1 ragge
598 1.1 ragge /* hang the receive buffer again */
599 1.1 ragge next: rp->r_lenerr = 0;
600 1.1 ragge rp->r_flags = RFLG_OWN;
601 1.1 ragge
602 1.1 ragge /* check next receive buffer */
603 1.5 ragge sc->sc_rindex++;
604 1.5 ragge if (sc->sc_rindex == NRCV)
605 1.5 ragge sc->sc_rindex = 0;
606 1.5 ragge rp = &dc->dc_rrent[sc->sc_rindex];
607 1.1 ragge }
608 1.1 ragge }
609 1.1 ragge
610 1.1 ragge /*
611 1.1 ragge * Add a receive buffer to the indicated descriptor.
612 1.1 ragge */
613 1.1 ragge int
614 1.1 ragge de_add_rxbuf(sc, i)
615 1.1 ragge struct de_softc *sc;
616 1.1 ragge int i;
617 1.1 ragge {
618 1.1 ragge struct mbuf *m;
619 1.1 ragge struct de_ring *rp;
620 1.1 ragge vaddr_t addr;
621 1.1 ragge int error;
622 1.1 ragge
623 1.1 ragge MGETHDR(m, M_DONTWAIT, MT_DATA);
624 1.1 ragge if (m == NULL)
625 1.1 ragge return (ENOBUFS);
626 1.1 ragge
627 1.1 ragge MCLGET(m, M_DONTWAIT);
628 1.1 ragge if ((m->m_flags & M_EXT) == 0) {
629 1.1 ragge m_freem(m);
630 1.1 ragge return (ENOBUFS);
631 1.1 ragge }
632 1.1 ragge
633 1.1 ragge if (sc->sc_rxmbuf[i] != NULL)
634 1.1 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]);
635 1.1 ragge
636 1.1 ragge error = bus_dmamap_load(sc->sc_dmat, sc->sc_rcvmap[i],
637 1.1 ragge m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT);
638 1.1 ragge if (error)
639 1.1 ragge panic("%s: can't load rx DMA map %d, error = %d\n",
640 1.1 ragge sc->sc_dev.dv_xname, i, error);
641 1.1 ragge sc->sc_rxmbuf[i] = m;
642 1.1 ragge
643 1.1 ragge bus_dmamap_sync(sc->sc_dmat, sc->sc_rcvmap[i], 0,
644 1.1 ragge sc->sc_rcvmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD);
645 1.1 ragge
646 1.1 ragge /*
647 1.1 ragge * We know that the mbuf cluster is page aligned. Also, be sure
648 1.1 ragge * that the IP header will be longword aligned.
649 1.1 ragge */
650 1.1 ragge m->m_data += 2;
651 1.1 ragge addr = sc->sc_rcvmap[i]->dm_segs[0].ds_addr + 2;
652 1.1 ragge rp = &sc->sc_dedata->dc_rrent[i];
653 1.1 ragge rp->r_lenerr = 0;
654 1.1 ragge rp->r_segbl = LOWORD(addr);
655 1.1 ragge rp->r_segbh = HIWORD(addr);
656 1.1 ragge rp->r_slen = m->m_ext.ext_size - 2;
657 1.1 ragge rp->r_flags = RFLG_OWN;
658 1.1 ragge
659 1.1 ragge return (0);
660 1.1 ragge }
661 1.1 ragge
662 1.1 ragge
663 1.1 ragge /*
664 1.1 ragge * Process an ioctl request.
665 1.1 ragge */
666 1.1 ragge int
667 1.1 ragge deioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
668 1.1 ragge {
669 1.1 ragge struct ifaddr *ifa = (struct ifaddr *)data;
670 1.2 ragge struct ifreq *ifr = (struct ifreq *)data;
671 1.1 ragge struct de_softc *sc = ifp->if_softc;
672 1.1 ragge int s = splnet(), error = 0;
673 1.1 ragge
674 1.1 ragge switch (cmd) {
675 1.1 ragge
676 1.1 ragge case SIOCSIFADDR:
677 1.1 ragge ifp->if_flags |= IFF_UP;
678 1.1 ragge switch (ifa->ifa_addr->sa_family) {
679 1.1 ragge #ifdef INET
680 1.1 ragge case AF_INET:
681 1.2 ragge deinit(sc);
682 1.1 ragge arp_ifinit(ifp, ifa);
683 1.1 ragge break;
684 1.1 ragge #endif
685 1.1 ragge }
686 1.1 ragge break;
687 1.1 ragge
688 1.1 ragge case SIOCSIFFLAGS:
689 1.1 ragge if ((ifp->if_flags & IFF_UP) == 0 &&
690 1.2 ragge (ifp->if_flags & IFF_RUNNING) != 0) {
691 1.2 ragge /*
692 1.2 ragge * If interface is marked down and it is running,
693 1.2 ragge * stop it.
694 1.2 ragge */
695 1.5 ragge DE_WLOW(0);
696 1.5 ragge DELAY(5000);
697 1.5 ragge DE_WLOW(PCSR0_RSET);
698 1.2 ragge ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
699 1.2 ragge } else if ((ifp->if_flags & IFF_UP) != 0 &&
700 1.2 ragge (ifp->if_flags & IFF_RUNNING) == 0) {
701 1.2 ragge /*
702 1.2 ragge * If interface it marked up and it is stopped, then
703 1.2 ragge * start it.
704 1.2 ragge */
705 1.1 ragge deinit(sc);
706 1.2 ragge } else if ((ifp->if_flags & IFF_UP) != 0) {
707 1.2 ragge /*
708 1.2 ragge * Send a new setup packet to match any new changes.
709 1.2 ragge * (Like IFF_PROMISC etc)
710 1.2 ragge */
711 1.5 ragge sc->sc_dedata->dc_pcbb.pcbb0 = FC_WTMODE;
712 1.5 ragge sc->sc_dedata->dc_pcbb.pcbb2 =
713 1.5 ragge MOD_TPAD|MOD_HDX|MOD_DRDC|MOD_ENAL;
714 1.5 ragge if (ifp->if_flags & IFF_PROMISC)
715 1.5 ragge sc->sc_dedata->dc_pcbb.pcbb2 |= MOD_PROM;
716 1.5 ragge DE_WLOW(CMD_GETCMD|PCSR0_INTE);
717 1.5 ragge dewait(sc, "chgmode");
718 1.2 ragge }
719 1.2 ragge break;
720 1.2 ragge
721 1.2 ragge case SIOCADDMULTI:
722 1.2 ragge case SIOCDELMULTI:
723 1.2 ragge /*
724 1.2 ragge * Update our multicast list.
725 1.2 ragge */
726 1.2 ragge error = (cmd == SIOCADDMULTI) ?
727 1.2 ragge ether_addmulti(ifr, &sc->sc_ec):
728 1.2 ragge ether_delmulti(ifr, &sc->sc_ec);
729 1.2 ragge
730 1.2 ragge if (error == ENETRESET) {
731 1.2 ragge /*
732 1.2 ragge * Multicast list has changed; set the hardware filter
733 1.2 ragge * accordingly.
734 1.2 ragge */
735 1.2 ragge error = 0;
736 1.2 ragge }
737 1.1 ragge break;
738 1.1 ragge
739 1.1 ragge default:
740 1.1 ragge error = EINVAL;
741 1.1 ragge }
742 1.1 ragge splx(s);
743 1.1 ragge return (error);
744 1.1 ragge }
745 1.1 ragge
746 1.1 ragge /*
747 1.1 ragge * Await completion of the named function
748 1.1 ragge * and check for errors.
749 1.1 ragge */
750 1.2 ragge void
751 1.1 ragge dewait(struct de_softc *sc, char *fn)
752 1.1 ragge {
753 1.5 ragge int csr0;
754 1.1 ragge
755 1.1 ragge while ((DE_RCSR(DE_PCSR0) & PCSR0_INTR) == 0)
756 1.1 ragge ;
757 1.1 ragge csr0 = DE_RCSR(DE_PCSR0);
758 1.1 ragge DE_WHIGH(csr0 >> 8);
759 1.1 ragge if (csr0 & PCSR0_PCEI) {
760 1.1 ragge char bits[64];
761 1.1 ragge printf("%s: %s failed, csr0=%s ", sc->sc_dev.dv_xname, fn,
762 1.1 ragge bitmask_snprintf(csr0, PCSR0_BITS, bits, sizeof(bits)));
763 1.1 ragge printf("csr1=%s\n", bitmask_snprintf(DE_RCSR(DE_PCSR1),
764 1.1 ragge PCSR1_BITS, bits, sizeof(bits)));
765 1.1 ragge }
766 1.1 ragge }
767 1.1 ragge
768 1.1 ragge int
769 1.1 ragge dematch(struct device *parent, struct cfdata *cf, void *aux)
770 1.1 ragge {
771 1.1 ragge struct uba_attach_args *ua = aux;
772 1.1 ragge struct de_softc ssc;
773 1.1 ragge struct de_softc *sc = &ssc;
774 1.1 ragge int i;
775 1.1 ragge
776 1.1 ragge sc->sc_iot = ua->ua_iot;
777 1.1 ragge sc->sc_ioh = ua->ua_ioh;
778 1.1 ragge /*
779 1.1 ragge * Make sure self-test is finished before we screw with the board.
780 1.1 ragge * Self-test on a DELUA can take 15 seconds (argh).
781 1.1 ragge */
782 1.1 ragge for (i = 0;
783 1.1 ragge (i < 160) &&
784 1.1 ragge (DE_RCSR(DE_PCSR0) & PCSR0_FATI) == 0 &&
785 1.1 ragge (DE_RCSR(DE_PCSR1) & PCSR1_STMASK) == STAT_RESET;
786 1.1 ragge ++i)
787 1.1 ragge DELAY(50000);
788 1.1 ragge if (((DE_RCSR(DE_PCSR0) & PCSR0_FATI) != 0) ||
789 1.1 ragge (((DE_RCSR(DE_PCSR1) & PCSR1_STMASK) != STAT_READY) &&
790 1.1 ragge ((DE_RCSR(DE_PCSR1) & PCSR1_STMASK) != STAT_RUN)))
791 1.1 ragge return(0);
792 1.1 ragge
793 1.1 ragge DE_WCSR(DE_PCSR0, 0);
794 1.1 ragge DELAY(5000);
795 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_RSET);
796 1.1 ragge while ((DE_RCSR(DE_PCSR0) & PCSR0_INTR) == 0)
797 1.1 ragge ;
798 1.1 ragge /* make board interrupt by executing a GETPCBB command */
799 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_INTE);
800 1.1 ragge DE_WCSR(DE_PCSR2, 0);
801 1.1 ragge DE_WCSR(DE_PCSR3, 0);
802 1.1 ragge DE_WCSR(DE_PCSR0, PCSR0_INTE|CMD_GETPCBB);
803 1.1 ragge DELAY(50000);
804 1.1 ragge
805 1.1 ragge return 1;
806 1.1 ragge }
807 1.2 ragge
808 1.2 ragge void
809 1.2 ragge deshutdown(void *arg)
810 1.2 ragge {
811 1.2 ragge struct de_softc *sc = arg;
812 1.2 ragge
813 1.5 ragge DE_WCSR(DE_PCSR0, 0);
814 1.5 ragge DELAY(1000);
815 1.2 ragge DE_WCSR(DE_PCSR0, PCSR0_RSET);
816 1.2 ragge dewait(sc, "shutdown");
817 1.2 ragge }
818