if_de.c revision 1.5
1 /* $NetBSD: if_de.c,v 1.5 2000/06/08 19:58:49 ragge Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1986, 1989 Regents of the University of California. 5 * Copyright (c) 2000 Ludd, University of Lule}, Sweden. 6 * All rights reserved. 7 * 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)if_de.c 7.12 (Berkeley) 12/16/90 38 */ 39 40 /* 41 * DEC DEUNA interface 42 * 43 * Lou Salkind 44 * New York University 45 * 46 * Rewritten by Ragge 30 April 2000 to match new world. 47 * 48 * TODO: 49 * timeout routine (get statistics) 50 */ 51 52 #include "opt_inet.h" 53 #include "bpfilter.h" 54 55 #include <sys/param.h> 56 #include <sys/systm.h> 57 #include <sys/mbuf.h> 58 #include <sys/buf.h> 59 #include <sys/protosw.h> 60 #include <sys/socket.h> 61 #include <sys/ioctl.h> 62 #include <sys/errno.h> 63 #include <sys/syslog.h> 64 #include <sys/device.h> 65 66 #include <net/if.h> 67 #include <net/if_ether.h> 68 #include <net/if_dl.h> 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #if NBPFILTER > 0 76 #include <net/bpf.h> 77 #include <net/bpfdesc.h> 78 #endif 79 80 #include <machine/bus.h> 81 82 #include <dev/qbus/ubavar.h> 83 #include <dev/qbus/if_dereg.h> 84 85 #include "ioconf.h" 86 87 /* 88 * Be careful with transmit/receive buffers, each entry steals 4 map 89 * registers, and there is only 496 on one unibus... 90 */ 91 #define NRCV 10 /* number of receive buffers (must be > 1) */ 92 #define NXMT 10 /* number of transmit buffers */ 93 94 /* 95 * Structure containing the elements that must be in DMA-safe memory. 96 */ 97 struct de_cdata { 98 /* the following structures are always mapped in */ 99 struct de_pcbb dc_pcbb; /* port control block */ 100 struct de_ring dc_xrent[NXMT]; /* transmit ring entrys */ 101 struct de_ring dc_rrent[NRCV]; /* receive ring entrys */ 102 struct de_udbbuf dc_udbbuf; /* UNIBUS data buffer */ 103 char dc_xbuf[NXMT][ETHER_MAX_LEN]; 104 /* end mapped area */ 105 }; 106 107 /* 108 * Ethernet software status per interface. 109 * 110 * Each interface is referenced by a network interface structure, 111 * ds_if, which the routing code uses to locate the interface. 112 * This structure contains the output queue for the interface, its address, ... 113 * We also have, for each interface, a UBA interface structure, which 114 * contains information about the UNIBUS resources held by the interface: 115 * map registers, buffered data paths, etc. Information is cached in this 116 * structure for use by the if_uba.c routines in running the interface 117 * efficiently. 118 */ 119 struct de_softc { 120 struct device sc_dev; /* Configuration common part */ 121 struct evcnt sc_intrcnt; /* Interrupt counting */ 122 struct ethercom sc_ec; /* Ethernet common part */ 123 #define sc_if sc_ec.ec_if /* network-visible interface */ 124 bus_space_tag_t sc_iot; 125 bus_addr_t sc_ioh; 126 bus_dma_tag_t sc_dmat; 127 bus_dmamap_t sc_cmap; 128 struct de_cdata *sc_dedata; /* Control structure */ 129 struct de_cdata *sc_pdedata; /* Bus-mapped control structure */ 130 bus_dmamap_t sc_rcvmap[NRCV]; /* unibus receive maps */ 131 struct mbuf *sc_rxmbuf[NRCV]; 132 int sc_xindex; /* UNA index into transmit chain */ 133 int sc_rindex; /* UNA index into receive chain */ 134 int sc_xfree; /* index for next transmit buffer */ 135 int sc_nxmit; /* # of transmits in progress */ 136 void *sc_sh; /* shutdownhook cookie */ 137 }; 138 139 static int dematch(struct device *, struct cfdata *, void *); 140 static void deattach(struct device *, struct device *, void *); 141 static void dewait(struct de_softc *, char *); 142 static void deinit(struct de_softc *); 143 static int deioctl(struct ifnet *, u_long, caddr_t); 144 static void dereset(struct device *); 145 static void destart(struct ifnet *); 146 static void derecv(struct de_softc *); 147 static void deintr(void *); 148 static int de_add_rxbuf(struct de_softc *, int); 149 static void deshutdown(void *); 150 151 struct cfattach de_ca = { 152 sizeof(struct de_softc), dematch, deattach 153 }; 154 155 #define DE_WCSR(csr, val) \ 156 bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val) 157 #define DE_WLOW(val) \ 158 bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0, val) 159 #define DE_WHIGH(val) \ 160 bus_space_write_1(sc->sc_iot, sc->sc_ioh, DE_PCSR0 + 1, val) 161 #define DE_RCSR(csr) \ 162 bus_space_read_2(sc->sc_iot, sc->sc_ioh, csr) 163 164 #define LOWORD(x) ((int)(x) & 0xffff) 165 #define HIWORD(x) (((int)(x) >> 16) & 0x3) 166 /* 167 * Interface exists: make available by filling in network interface 168 * record. System will initialize the interface when it is ready 169 * to accept packets. We get the ethernet address here. 170 */ 171 void 172 deattach(struct device *parent, struct device *self, void *aux) 173 { 174 struct uba_attach_args *ua = aux; 175 struct de_softc *sc = (struct de_softc *)self; 176 struct ifnet *ifp = &sc->sc_if; 177 u_int8_t myaddr[ETHER_ADDR_LEN]; 178 int csr1, rseg, error, i; 179 bus_dma_segment_t seg; 180 char *c; 181 182 sc->sc_iot = ua->ua_iot; 183 sc->sc_ioh = ua->ua_ioh; 184 sc->sc_dmat = ua->ua_dmat; 185 186 /* 187 * What kind of a board is this? 188 * The error bits 4-6 in pcsr1 are a device id as long as 189 * the high byte is zero. 190 */ 191 csr1 = DE_RCSR(DE_PCSR1); 192 if (csr1 & 0xff60) 193 c = "broken"; 194 else if (csr1 & 0x10) 195 c = "delua"; 196 else 197 c = "deuna"; 198 199 /* 200 * Reset the board and temporarily map 201 * the pcbb buffer onto the Unibus. 202 */ 203 DE_WCSR(DE_PCSR0, 0); /* reset INTE */ 204 DELAY(100); 205 DE_WCSR(DE_PCSR0, PCSR0_RSET); 206 dewait(sc, "reset"); 207 208 if ((error = bus_dmamem_alloc(sc->sc_dmat, 209 sizeof(struct de_cdata), NBPG, 0, &seg, 1, &rseg, 210 BUS_DMA_NOWAIT)) != 0) { 211 printf(": unable to allocate control data, error = %d\n", 212 error); 213 goto fail_0; 214 } 215 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 216 sizeof(struct de_cdata), (caddr_t *)&sc->sc_dedata, 217 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 218 printf(": unable to map control data, error = %d\n", error); 219 goto fail_1; 220 } 221 222 if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct de_cdata), 223 1, sizeof(struct de_cdata), 0, BUS_DMA_NOWAIT, 224 &sc->sc_cmap)) != 0) { 225 printf(": unable to create control data DMA map, error = %d\n", 226 error); 227 goto fail_2; 228 } 229 230 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmap, 231 sc->sc_dedata, sizeof(struct de_cdata), NULL, 232 BUS_DMA_NOWAIT)) != 0) { 233 printf(": unable to load control data DMA map, error = %d\n", 234 error); 235 goto fail_3; 236 } 237 238 bzero(sc->sc_dedata, sizeof(struct de_cdata)); 239 sc->sc_pdedata = (struct de_cdata *)sc->sc_cmap->dm_segs[0].ds_addr; 240 241 /* 242 * Create receive buffer DMA maps. 243 */ 244 for (i = 0; i < NRCV; i++) { 245 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 246 MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, 247 &sc->sc_rcvmap[i]))) { 248 printf(": unable to create rx DMA map %d, error = %d\n", 249 i, error); 250 goto fail_5; 251 } 252 } 253 254 /* 255 * Pre-allocate the receive buffers. 256 */ 257 for (i = 0; i < NRCV; i++) { 258 if ((error = de_add_rxbuf(sc, i)) != 0) { 259 printf(": unable to allocate or map rx buffer %d\n," 260 " error = %d\n", i, error); 261 goto fail_6; 262 } 263 } 264 265 /* 266 * Tell the DEUNA about our PCB 267 */ 268 DE_WCSR(DE_PCSR2, LOWORD(sc->sc_pdedata)); 269 DE_WCSR(DE_PCSR3, HIWORD(sc->sc_pdedata)); 270 DE_WLOW(CMD_GETPCBB); 271 dewait(sc, "pcbb"); 272 273 sc->sc_dedata->dc_pcbb.pcbb0 = FC_RDPHYAD; 274 DE_WLOW(CMD_GETCMD); 275 dewait(sc, "read addr "); 276 277 bcopy((caddr_t)&sc->sc_dedata->dc_pcbb.pcbb2, myaddr, sizeof (myaddr)); 278 printf("\n%s: %s, hardware address %s\n", sc->sc_dev.dv_xname, c, 279 ether_sprintf(myaddr)); 280 281 uba_intr_establish(ua->ua_icookie, ua->ua_cvec, deintr, sc, 282 &sc->sc_intrcnt); 283 uba_reset_establish(dereset, &sc->sc_dev); 284 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt, 285 sc->sc_dev.dv_xname, "intr"); 286 287 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 288 ifp->if_softc = sc; 289 ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_MULTICAST|IFF_ALLMULTI; 290 ifp->if_ioctl = deioctl; 291 ifp->if_start = destart; 292 if_attach(ifp); 293 ether_ifattach(ifp, myaddr); 294 #if NBPFILTER > 0 295 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 296 #endif 297 sc->sc_sh = shutdownhook_establish(deshutdown, sc); 298 return; 299 300 /* 301 * Free any resources we've allocated during the failed attach 302 * attempt. Do this in reverse order and fall through. 303 */ 304 fail_6: 305 for (i = 0; i < NRCV; i++) { 306 if (sc->sc_rxmbuf[i] != NULL) { 307 bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]); 308 m_freem(sc->sc_rxmbuf[i]); 309 } 310 } 311 fail_5: 312 for (i = 0; i < NRCV; i++) { 313 if (sc->sc_rcvmap[i] != NULL) 314 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]); 315 } 316 317 fail_3: 318 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmap); 319 fail_2: 320 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dedata, 321 sizeof(struct de_cdata)); 322 fail_1: 323 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 324 fail_0: 325 return; 326 } 327 328 /* 329 * Reset of interface after UNIBUS reset. 330 */ 331 void 332 dereset(struct device *dev) 333 { 334 struct de_softc *sc = (void *)dev; 335 336 sc->sc_if.if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 337 sc->sc_pdedata = NULL; /* All mappings lost */ 338 DE_WCSR(DE_PCSR0, PCSR0_RSET); 339 dewait(sc, "reset"); 340 deinit(sc); 341 } 342 343 /* 344 * Initialization of interface; clear recorded pending 345 * operations, and reinitialize UNIBUS usage. 346 */ 347 void 348 deinit(struct de_softc *sc) 349 { 350 struct de_cdata *dc, *pdc; 351 int s, i; 352 353 if (sc->sc_if.if_flags & IFF_RUNNING) 354 return; 355 /* 356 * Tell the DEUNA about our PCB 357 */ 358 DE_WCSR(DE_PCSR2, LOWORD(sc->sc_pdedata)); 359 DE_WCSR(DE_PCSR3, HIWORD(sc->sc_pdedata)); 360 DE_WLOW(0); /* reset INTE */ 361 DELAY(500); 362 DE_WLOW(CMD_GETPCBB); 363 dewait(sc, "pcbb"); 364 365 dc = sc->sc_dedata; 366 pdc = sc->sc_pdedata; 367 /* set the transmit and receive ring header addresses */ 368 dc->dc_pcbb.pcbb0 = FC_WTRING; 369 dc->dc_pcbb.pcbb2 = LOWORD(&pdc->dc_udbbuf); 370 dc->dc_pcbb.pcbb4 = HIWORD(&pdc->dc_udbbuf); 371 372 dc->dc_udbbuf.b_tdrbl = LOWORD(&pdc->dc_xrent[0]); 373 dc->dc_udbbuf.b_tdrbh = HIWORD(&pdc->dc_xrent[0]); 374 dc->dc_udbbuf.b_telen = sizeof (struct de_ring) / sizeof(u_int16_t); 375 dc->dc_udbbuf.b_trlen = NXMT; 376 dc->dc_udbbuf.b_rdrbl = LOWORD(&pdc->dc_rrent[0]); 377 dc->dc_udbbuf.b_rdrbh = HIWORD(&pdc->dc_rrent[0]); 378 dc->dc_udbbuf.b_relen = sizeof (struct de_ring) / sizeof(u_int16_t); 379 dc->dc_udbbuf.b_rrlen = NRCV; 380 381 DE_WLOW(CMD_GETCMD); 382 dewait(sc, "wtring"); 383 384 sc->sc_dedata->dc_pcbb.pcbb0 = FC_WTMODE; 385 sc->sc_dedata->dc_pcbb.pcbb2 = MOD_TPAD|MOD_HDX|MOD_DRDC|MOD_ENAL; 386 DE_WLOW(CMD_GETCMD); 387 dewait(sc, "wtmode"); 388 389 /* set up the receive and transmit ring entries */ 390 for (i = 0; i < NXMT; i++) { 391 dc->dc_xrent[i].r_flags = 0; 392 dc->dc_xrent[i].r_segbl = LOWORD(&pdc->dc_xbuf[i][0]); 393 dc->dc_xrent[i].r_segbh = HIWORD(&pdc->dc_xbuf[i][0]); 394 } 395 396 for (i = 0; i < NRCV; i++) 397 dc->dc_rrent[i].r_flags = RFLG_OWN; 398 399 /* start up the board (rah rah) */ 400 s = splnet(); 401 sc->sc_rindex = sc->sc_xindex = sc->sc_xfree = sc->sc_nxmit = 0; 402 sc->sc_if.if_flags |= IFF_RUNNING; 403 DE_WLOW(PCSR0_INTE); /* avoid interlock */ 404 destart(&sc->sc_if); /* queue output packets */ 405 DE_WLOW(CMD_START|PCSR0_INTE); 406 splx(s); 407 } 408 409 /* 410 * Setup output on interface. 411 * Get another datagram to send off of the interface queue, 412 * and map it to the interface before starting the output. 413 * Must be called from ipl >= our interrupt level. 414 */ 415 void 416 destart(struct ifnet *ifp) 417 { 418 struct de_softc *sc = ifp->if_softc; 419 struct de_cdata *dc; 420 struct de_ring *rp; 421 struct mbuf *m; 422 int nxmit; 423 424 /* 425 * the following test is necessary, since 426 * the code is not reentrant and we have 427 * multiple transmission buffers. 428 */ 429 if (sc->sc_if.if_flags & IFF_OACTIVE) 430 return; 431 dc = sc->sc_dedata; 432 for (nxmit = sc->sc_nxmit; nxmit < NXMT; nxmit++) { 433 IF_DEQUEUE(&sc->sc_if.if_snd, m); 434 if (m == 0) 435 break; 436 rp = &dc->dc_xrent[sc->sc_xfree]; 437 if (rp->r_flags & XFLG_OWN) 438 panic("deuna xmit in progress"); 439 m_copydata(m, 0, m->m_pkthdr.len, &dc->dc_xbuf[sc->sc_xfree][0]); 440 rp->r_slen = m->m_pkthdr.len; 441 rp->r_tdrerr = 0; 442 rp->r_flags = XFLG_STP|XFLG_ENP|XFLG_OWN; 443 444 #if NBPFILTER > 0 445 if (ifp->if_bpf) 446 bpf_mtap(ifp->if_bpf, m); 447 #endif 448 449 m_freem(m); 450 sc->sc_xfree++; 451 if (sc->sc_xfree == NXMT) 452 sc->sc_xfree = 0; 453 } 454 if (sc->sc_nxmit != nxmit) { 455 sc->sc_nxmit = nxmit; 456 if (ifp->if_flags & IFF_RUNNING) 457 DE_WLOW(PCSR0_INTE|CMD_PDMD); 458 } 459 } 460 461 /* 462 * Command done interrupt. 463 */ 464 void 465 deintr(void *arg) 466 { 467 struct de_cdata *dc; 468 struct de_softc *sc = arg; 469 struct de_ring *rp; 470 short csr0; 471 472 /* save flags right away - clear out interrupt bits */ 473 csr0 = DE_RCSR(DE_PCSR0); 474 DE_WHIGH(csr0 >> 8); 475 476 477 sc->sc_if.if_flags |= IFF_OACTIVE; /* prevent entering destart */ 478 /* 479 * if receive, put receive buffer on mbuf 480 * and hang the request again 481 */ 482 derecv(sc); 483 484 /* 485 * Poll transmit ring and check status. 486 * Be careful about loopback requests. 487 * Then free buffer space and check for 488 * more transmit requests. 489 */ 490 dc = sc->sc_dedata; 491 for ( ; sc->sc_nxmit > 0; sc->sc_nxmit--) { 492 rp = &dc->dc_xrent[sc->sc_xindex]; 493 if (rp->r_flags & XFLG_OWN) 494 break; 495 sc->sc_if.if_opackets++; 496 /* check for unusual conditions */ 497 if (rp->r_flags & (XFLG_ERRS|XFLG_MTCH|XFLG_ONE|XFLG_MORE)) { 498 if (rp->r_flags & XFLG_ERRS) { 499 /* output error */ 500 sc->sc_if.if_oerrors++; 501 } else if (rp->r_flags & XFLG_ONE) { 502 /* one collision */ 503 sc->sc_if.if_collisions++; 504 } else if (rp->r_flags & XFLG_MORE) { 505 /* more than one collision */ 506 sc->sc_if.if_collisions += 2; /* guess */ 507 } 508 } 509 /* check if next transmit buffer also finished */ 510 sc->sc_xindex++; 511 if (sc->sc_xindex == NXMT) 512 sc->sc_xindex = 0; 513 } 514 sc->sc_if.if_flags &= ~IFF_OACTIVE; 515 destart(&sc->sc_if); 516 517 if (csr0 & PCSR0_RCBI) { 518 DE_WLOW(PCSR0_INTE|CMD_PDMD); 519 } 520 } 521 522 /* 523 * Ethernet interface receiver interface. 524 * If input error just drop packet. 525 * Otherwise purge input buffered data path and examine 526 * packet to determine type. If can't determine length 527 * from type, then have to drop packet. Othewise decapsulate 528 * packet based on type and pass to type specific higher-level 529 * input routine. 530 */ 531 void 532 derecv(struct de_softc *sc) 533 { 534 struct ifnet *ifp = &sc->sc_if; 535 struct de_ring *rp; 536 struct de_cdata *dc; 537 struct mbuf *m; 538 int len; 539 540 dc = sc->sc_dedata; 541 rp = &dc->dc_rrent[sc->sc_rindex]; 542 while ((rp->r_flags & RFLG_OWN) == 0) { 543 sc->sc_if.if_ipackets++; 544 len = (rp->r_lenerr&RERR_MLEN) - ETHER_CRC_LEN; 545 /* check for errors */ 546 if ((rp->r_flags & (RFLG_ERRS|RFLG_FRAM|RFLG_OFLO|RFLG_CRC)) || 547 (rp->r_lenerr & (RERR_BUFL|RERR_UBTO))) { 548 sc->sc_if.if_ierrors++; 549 goto next; 550 } 551 m = sc->sc_rxmbuf[sc->sc_rindex]; 552 #if NBPFILTER > 0 553 if (ifp->if_bpf) { 554 struct ether_header *eh; 555 556 eh = mtod(m, struct ether_header *); 557 bpf_mtap(ifp->if_bpf, m); 558 if ((ifp->if_flags & IFF_PROMISC) != 0 && 559 bcmp(LLADDR(ifp->if_sadl), eh->ether_dhost, 560 ETHER_ADDR_LEN) != 0 && 561 (ETHER_IS_MULTICAST(eh->ether_dhost)==0)) { 562 goto next; 563 } 564 } 565 #endif 566 567 if (de_add_rxbuf(sc, sc->sc_rindex) == 0) { 568 m->m_pkthdr.rcvif = ifp; 569 m->m_pkthdr.len = m->m_len = len; 570 (*ifp->if_input)(ifp, m); 571 } else 572 sc->sc_if.if_ierrors++; 573 574 /* hang the receive buffer again */ 575 next: rp->r_lenerr = 0; 576 rp->r_flags = RFLG_OWN; 577 578 /* check next receive buffer */ 579 sc->sc_rindex++; 580 if (sc->sc_rindex == NRCV) 581 sc->sc_rindex = 0; 582 rp = &dc->dc_rrent[sc->sc_rindex]; 583 } 584 } 585 586 /* 587 * Add a receive buffer to the indicated descriptor. 588 */ 589 int 590 de_add_rxbuf(sc, i) 591 struct de_softc *sc; 592 int i; 593 { 594 struct mbuf *m; 595 struct de_ring *rp; 596 vaddr_t addr; 597 int error; 598 599 MGETHDR(m, M_DONTWAIT, MT_DATA); 600 if (m == NULL) 601 return (ENOBUFS); 602 603 MCLGET(m, M_DONTWAIT); 604 if ((m->m_flags & M_EXT) == 0) { 605 m_freem(m); 606 return (ENOBUFS); 607 } 608 609 if (sc->sc_rxmbuf[i] != NULL) 610 bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]); 611 612 error = bus_dmamap_load(sc->sc_dmat, sc->sc_rcvmap[i], 613 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 614 if (error) 615 panic("%s: can't load rx DMA map %d, error = %d\n", 616 sc->sc_dev.dv_xname, i, error); 617 sc->sc_rxmbuf[i] = m; 618 619 bus_dmamap_sync(sc->sc_dmat, sc->sc_rcvmap[i], 0, 620 sc->sc_rcvmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD); 621 622 /* 623 * We know that the mbuf cluster is page aligned. Also, be sure 624 * that the IP header will be longword aligned. 625 */ 626 m->m_data += 2; 627 addr = sc->sc_rcvmap[i]->dm_segs[0].ds_addr + 2; 628 rp = &sc->sc_dedata->dc_rrent[i]; 629 rp->r_lenerr = 0; 630 rp->r_segbl = LOWORD(addr); 631 rp->r_segbh = HIWORD(addr); 632 rp->r_slen = m->m_ext.ext_size - 2; 633 rp->r_flags = RFLG_OWN; 634 635 return (0); 636 } 637 638 639 /* 640 * Process an ioctl request. 641 */ 642 int 643 deioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 644 { 645 struct ifaddr *ifa = (struct ifaddr *)data; 646 struct ifreq *ifr = (struct ifreq *)data; 647 struct de_softc *sc = ifp->if_softc; 648 int s = splnet(), error = 0; 649 650 switch (cmd) { 651 652 case SIOCSIFADDR: 653 ifp->if_flags |= IFF_UP; 654 switch (ifa->ifa_addr->sa_family) { 655 #ifdef INET 656 case AF_INET: 657 deinit(sc); 658 arp_ifinit(ifp, ifa); 659 break; 660 #endif 661 } 662 break; 663 664 case SIOCSIFFLAGS: 665 if ((ifp->if_flags & IFF_UP) == 0 && 666 (ifp->if_flags & IFF_RUNNING) != 0) { 667 /* 668 * If interface is marked down and it is running, 669 * stop it. 670 */ 671 DE_WLOW(0); 672 DELAY(5000); 673 DE_WLOW(PCSR0_RSET); 674 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE); 675 } else if ((ifp->if_flags & IFF_UP) != 0 && 676 (ifp->if_flags & IFF_RUNNING) == 0) { 677 /* 678 * If interface it marked up and it is stopped, then 679 * start it. 680 */ 681 deinit(sc); 682 } else if ((ifp->if_flags & IFF_UP) != 0) { 683 /* 684 * Send a new setup packet to match any new changes. 685 * (Like IFF_PROMISC etc) 686 */ 687 sc->sc_dedata->dc_pcbb.pcbb0 = FC_WTMODE; 688 sc->sc_dedata->dc_pcbb.pcbb2 = 689 MOD_TPAD|MOD_HDX|MOD_DRDC|MOD_ENAL; 690 if (ifp->if_flags & IFF_PROMISC) 691 sc->sc_dedata->dc_pcbb.pcbb2 |= MOD_PROM; 692 DE_WLOW(CMD_GETCMD|PCSR0_INTE); 693 dewait(sc, "chgmode"); 694 } 695 break; 696 697 case SIOCADDMULTI: 698 case SIOCDELMULTI: 699 /* 700 * Update our multicast list. 701 */ 702 error = (cmd == SIOCADDMULTI) ? 703 ether_addmulti(ifr, &sc->sc_ec): 704 ether_delmulti(ifr, &sc->sc_ec); 705 706 if (error == ENETRESET) { 707 /* 708 * Multicast list has changed; set the hardware filter 709 * accordingly. 710 */ 711 error = 0; 712 } 713 break; 714 715 default: 716 error = EINVAL; 717 } 718 splx(s); 719 return (error); 720 } 721 722 /* 723 * Await completion of the named function 724 * and check for errors. 725 */ 726 void 727 dewait(struct de_softc *sc, char *fn) 728 { 729 int csr0; 730 731 while ((DE_RCSR(DE_PCSR0) & PCSR0_INTR) == 0) 732 ; 733 csr0 = DE_RCSR(DE_PCSR0); 734 DE_WHIGH(csr0 >> 8); 735 if (csr0 & PCSR0_PCEI) { 736 char bits[64]; 737 printf("%s: %s failed, csr0=%s ", sc->sc_dev.dv_xname, fn, 738 bitmask_snprintf(csr0, PCSR0_BITS, bits, sizeof(bits))); 739 printf("csr1=%s\n", bitmask_snprintf(DE_RCSR(DE_PCSR1), 740 PCSR1_BITS, bits, sizeof(bits))); 741 } 742 } 743 744 int 745 dematch(struct device *parent, struct cfdata *cf, void *aux) 746 { 747 struct uba_attach_args *ua = aux; 748 struct de_softc ssc; 749 struct de_softc *sc = &ssc; 750 int i; 751 752 sc->sc_iot = ua->ua_iot; 753 sc->sc_ioh = ua->ua_ioh; 754 /* 755 * Make sure self-test is finished before we screw with the board. 756 * Self-test on a DELUA can take 15 seconds (argh). 757 */ 758 for (i = 0; 759 (i < 160) && 760 (DE_RCSR(DE_PCSR0) & PCSR0_FATI) == 0 && 761 (DE_RCSR(DE_PCSR1) & PCSR1_STMASK) == STAT_RESET; 762 ++i) 763 DELAY(50000); 764 if (((DE_RCSR(DE_PCSR0) & PCSR0_FATI) != 0) || 765 (((DE_RCSR(DE_PCSR1) & PCSR1_STMASK) != STAT_READY) && 766 ((DE_RCSR(DE_PCSR1) & PCSR1_STMASK) != STAT_RUN))) 767 return(0); 768 769 DE_WCSR(DE_PCSR0, 0); 770 DELAY(5000); 771 DE_WCSR(DE_PCSR0, PCSR0_RSET); 772 while ((DE_RCSR(DE_PCSR0) & PCSR0_INTR) == 0) 773 ; 774 /* make board interrupt by executing a GETPCBB command */ 775 DE_WCSR(DE_PCSR0, PCSR0_INTE); 776 DE_WCSR(DE_PCSR2, 0); 777 DE_WCSR(DE_PCSR3, 0); 778 DE_WCSR(DE_PCSR0, PCSR0_INTE|CMD_GETPCBB); 779 DELAY(50000); 780 781 return 1; 782 } 783 784 void 785 deshutdown(void *arg) 786 { 787 struct de_softc *sc = arg; 788 789 DE_WCSR(DE_PCSR0, 0); 790 DELAY(1000); 791 DE_WCSR(DE_PCSR0, PCSR0_RSET); 792 dewait(sc, "shutdown"); 793 } 794
Indexes created Wed Oct 01 07:09:59 GMT 2025