if_qt.c revision 1.6 1 1.6 simonb /* $NetBSD: if_qt.c,v 1.6 2005/02/26 12:45:06 simonb Exp $ */
2 1.1 ragge /*
3 1.1 ragge * Copyright (c) 1992 Steven M. Schultz
4 1.1 ragge * All rights reserved.
5 1.1 ragge *
6 1.1 ragge * Redistribution and use in source and binary forms, with or without
7 1.1 ragge * modification, are permitted provided that the following conditions
8 1.1 ragge * are met:
9 1.1 ragge * 1. Redistributions of source code must retain the above copyright
10 1.1 ragge * notice, this list of conditions and the following disclaimer.
11 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 ragge * notice, this list of conditions and the following disclaimer in the
13 1.1 ragge * documentation and/or other materials provided with the distribution.
14 1.1 ragge * 3. The name of the author may not be used to endorse or promote products
15 1.1 ragge * derived from this software without specific prior written permission
16 1.1 ragge *
17 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 ragge *
28 1.1 ragge * @(#)if_qt.c 1.2 (2.11BSD) 2/20/93
29 1.1 ragge */
30 1.1 ragge /*
31 1.1 ragge *
32 1.6 simonb * Modification History
33 1.1 ragge * 23-Feb-92 -- sms
34 1.1 ragge * Rewrite the buffer handling so that fewer than the maximum number of
35 1.1 ragge * buffers may be used (32 receive and 12 transmit buffers consume 66+kb
36 1.1 ragge * of main system memory in addition to the internal structures in the
37 1.1 ragge * networking code). A freelist of available buffers is maintained now.
38 1.6 simonb * When I/O operations complete the associated buffer is placed on the
39 1.6 simonb * freelist (a single linked list for simplicity) and when an I/O is
40 1.6 simonb * started a buffer is pulled off the list.
41 1.1 ragge *
42 1.1 ragge * 20-Feb-92 -- sms
43 1.1 ragge * It works! Darned board couldn't handle "short" rings - those rings
44 1.1 ragge * where only half the entries were made available to the board (the
45 1.1 ragge * ring descriptors were the full size, merely half the entries were
46 1.1 ragge * flagged as belonging always to the driver). Grrrr. Would have thought
47 1.6 simonb * the board could skip over those entries reserved by the driver.
48 1.6 simonb * Now to find a way not to have to allocated 32+12 times 1.5kb worth of
49 1.1 ragge * buffers...
50 1.1 ragge *
51 1.1 ragge * 03-Feb-92 -- sms
52 1.1 ragge * Released but still not working. The driver now responds to arp and
53 1.1 ragge * ping requests. The board is apparently not returning ring descriptors
54 1.1 ragge * to the driver so eventually we run out of buffers. Back to the
55 1.1 ragge * drawing board.
56 1.1 ragge *
57 1.1 ragge * 28-Dec-92 -- sms
58 1.1 ragge * Still not released. Hiatus in finding free time and thin-netting
59 1.1 ragge * the systems (many thanks Terry!).
60 1.1 ragge * Added logic to dynamically allocate a vector and initialize it.
61 1.1 ragge *
62 1.1 ragge * 23-Oct-92 -- sms
63 1.1 ragge * The INIT block must (apparently) be quadword aligned [no thanks to
64 1.1 ragge * the manual for not mentioning that fact]. The necessary alignment
65 1.1 ragge * is achieved by allocating the INIT block from main memory ('malloc'
66 1.1 ragge * guarantees click alignment) and mapping it as needed (which is _very_
67 1.1 ragge * infrequently). A check for quadword alignment of the ring descriptors
68 1.1 ragge * was added - at present the descriptors are properly aligned, if this
69 1.1 ragge * should change then something will have to be done (like do it "right").
70 1.1 ragge * Darned alignment restrictions!
71 1.1 ragge *
72 1.6 simonb * A couple of typos were corrected (missing parentheses, reversed
73 1.1 ragge * arguments to printf calls, etc).
74 1.1 ragge *
75 1.1 ragge * 13-Oct-92 -- sms (at) wlv.iipo.gtegsc.com
76 1.1 ragge * Created based on the DELQA-PLUS addendum to DELQA User's Guide.
77 1.6 simonb * This driver ('qt') is selected at system configuration time. If the
78 1.6 simonb * board * is not a DELQA-YM an error message will be printed and the
79 1.1 ragge * interface will not be attached.
80 1.2 ragge */
81 1.2 ragge
82 1.2 ragge #include <sys/cdefs.h>
83 1.6 simonb __KERNEL_RCSID(0, "$NetBSD: if_qt.c,v 1.6 2005/02/26 12:45:06 simonb Exp $");
84 1.2 ragge
85 1.2 ragge #include "opt_inet.h"
86 1.2 ragge #include "bpfilter.h"
87 1.1 ragge
88 1.2 ragge #include <sys/param.h>
89 1.2 ragge #include <sys/systm.h>
90 1.2 ragge #include <sys/mbuf.h>
91 1.2 ragge #include <sys/protosw.h>
92 1.2 ragge #include <sys/socket.h>
93 1.2 ragge #include <sys/ioctl.h>
94 1.2 ragge #include <sys/errno.h>
95 1.2 ragge #include <sys/syslog.h>
96 1.2 ragge #include <sys/time.h>
97 1.2 ragge #include <sys/kernel.h>
98 1.2 ragge
99 1.2 ragge #include <net/if.h>
100 1.2 ragge #include <net/if_ether.h>
101 1.2 ragge #include <net/netisr.h>
102 1.2 ragge #include <net/route.h>
103 1.1 ragge
104 1.1 ragge #ifdef INET
105 1.2 ragge #include <sys/domain.h>
106 1.2 ragge #include <netinet/in.h>
107 1.2 ragge #include <netinet/in_systm.h>
108 1.2 ragge #include <netinet/in_var.h>
109 1.2 ragge #include <netinet/ip.h>
110 1.1 ragge #endif
111 1.1 ragge
112 1.3 ragge #if NBPFILTER > 0
113 1.3 ragge #include <net/bpf.h>
114 1.3 ragge #include <net/bpfdesc.h>
115 1.3 ragge #endif
116 1.3 ragge
117 1.1 ragge #ifdef NS
118 1.2 ragge #include <netns/ns.h>
119 1.2 ragge #include <netns/ns_if.h>
120 1.1 ragge #endif
121 1.1 ragge
122 1.2 ragge #include <machine/bus.h>
123 1.2 ragge
124 1.2 ragge #include <dev/qbus/ubavar.h>
125 1.2 ragge #include <dev/qbus/if_uba.h>
126 1.2 ragge #include <dev/qbus/if_qtreg.h>
127 1.2 ragge
128 1.2 ragge #define NRCV QT_MAX_RCV /* Receive descriptors (must be == 32) */
129 1.2 ragge #define NXMT QT_MAX_XMT /* Transmit descriptors (must be == 12) */
130 1.2 ragge #if NRCV != 32 || NXMT != 12
131 1.2 ragge hardware requires these sizes.
132 1.1 ragge #endif
133 1.6 simonb
134 1.4 ragge /*
135 1.4 ragge * Control data structures, must be in DMA-friendly memory.
136 1.4 ragge */
137 1.2 ragge struct qt_cdata {
138 1.2 ragge struct qt_init qc_init; /* Init block */
139 1.2 ragge struct qt_rring qc_r[NRCV]; /* Receive descriptor ring */
140 1.2 ragge struct qt_tring qc_t[NXMT]; /* Transmit descriptor ring */
141 1.2 ragge };
142 1.1 ragge
143 1.1 ragge struct qt_softc {
144 1.2 ragge struct device sc_dev; /* Configuration common part */
145 1.2 ragge struct ethercom is_ec; /* common part - must be first */
146 1.2 ragge struct evcnt sc_intrcnt; /* Interrupt counting */
147 1.6 simonb #define is_if is_ec.ec_if /* network-visible interface */
148 1.2 ragge u_int8_t is_addr[ETHER_ADDR_LEN]; /* hardware Ethernet address */
149 1.2 ragge bus_space_tag_t sc_iot;
150 1.2 ragge bus_addr_t sc_ioh;
151 1.2 ragge
152 1.4 ragge struct ubinfo sc_ui; /* control block address desc */
153 1.4 ragge struct qt_cdata *sc_ib; /* virt address of ctrl block */
154 1.4 ragge struct qt_cdata *sc_pib; /* phys address of ctrl block */
155 1.2 ragge
156 1.2 ragge struct ifubinfo sc_ifuba; /* UNIBUS resources */
157 1.2 ragge struct ifrw sc_ifr[NRCV]; /* UNIBUS receive buffer maps */
158 1.2 ragge struct ifxmt sc_ifw[NXMT]; /* UNIBUS receive buffer maps */
159 1.2 ragge
160 1.4 ragge int rindex; /* Receive Completed Index */
161 1.4 ragge int nxtrcv; /* Next Receive Index */
162 1.4 ragge int nrcv; /* Number of Receives active */
163 1.1 ragge
164 1.2 ragge int xnext; /* Next descriptor to transmit */
165 1.2 ragge int xlast; /* Last descriptor transmitted */
166 1.2 ragge int nxmit; /* # packets in send queue */
167 1.4 ragge
168 1.2 ragge short vector; /* Interrupt vector assigned */
169 1.2 ragge };
170 1.2 ragge
171 1.2 ragge static int qtmatch(struct device *, struct cfdata *, void *);
172 1.2 ragge static void qtattach(struct device *, struct device *, void *);
173 1.2 ragge static void qtintr(void *);
174 1.2 ragge static int qtinit(struct ifnet *);
175 1.2 ragge static int qtioctl(struct ifnet *, u_long, caddr_t);
176 1.2 ragge static int qtturbo(struct qt_softc *);
177 1.2 ragge static void qtstart(struct ifnet *ifp);
178 1.4 ragge static void qtstop(struct ifnet *ifp, int disable);
179 1.2 ragge static void qtsrr(struct qt_softc *, int);
180 1.2 ragge static void qtrint(struct qt_softc *sc);
181 1.2 ragge static void qttint(struct qt_softc *sc);
182 1.2 ragge
183 1.2 ragge /* static void qtrestart(struct qt_softc *sc); */
184 1.6 simonb
185 1.2 ragge CFATTACH_DECL(qt, sizeof(struct qt_softc),
186 1.2 ragge qtmatch, qtattach, NULL, NULL);
187 1.1 ragge
188 1.1 ragge /*
189 1.6 simonb * Maximum packet size needs to include 4 bytes for the CRC
190 1.1 ragge * on received packets.
191 1.1 ragge */
192 1.1 ragge #define MAXPACKETSIZE (ETHERMTU + sizeof (struct ether_header) + 4)
193 1.1 ragge #define MINPACKETSIZE 64
194 1.1 ragge
195 1.3 ragge #define QT_WCSR(csr, val) \
196 1.3 ragge bus_space_write_2(sc->sc_iot, sc->sc_ioh, csr, val)
197 1.3 ragge #define QT_RCSR(csr) \
198 1.3 ragge bus_space_read_2(sc->sc_iot, sc->sc_ioh, csr)
199 1.3 ragge
200 1.3 ragge
201 1.2 ragge #define loint(x) ((int)(x) & 0xffff)
202 1.2 ragge #define hiint(x) (((int)(x) >> 16) & 0x3f)
203 1.2 ragge #define XNAME sc->sc_dev.dv_xname
204 1.2 ragge
205 1.1 ragge /*
206 1.2 ragge * Check if this card is a turbo delqa.
207 1.2 ragge */
208 1.2 ragge int
209 1.2 ragge qtmatch(struct device *parent, struct cfdata *cf, void *aux)
210 1.2 ragge {
211 1.2 ragge struct qt_softc ssc;
212 1.2 ragge struct qt_softc *sc = &ssc;
213 1.2 ragge struct uba_attach_args *ua = aux;
214 1.2 ragge struct uba_softc *ubasc = (struct uba_softc *)parent;
215 1.4 ragge struct qt_init *qi;
216 1.4 ragge struct ubinfo ui;
217 1.2 ragge
218 1.3 ragge sc->sc_iot = ua->ua_iot;
219 1.3 ragge sc->sc_ioh = ua->ua_ioh;
220 1.2 ragge if (qtturbo(sc) == 0)
221 1.4 ragge return 0; /* Not a turbo card */
222 1.4 ragge
223 1.4 ragge /* Force the card to interrupt */
224 1.4 ragge ui.ui_size = sizeof(struct qt_init);
225 1.4 ragge if (ubmemalloc((void *)parent, &ui, 0))
226 1.4 ragge return 0; /* Failed */
227 1.4 ragge qi = (struct qt_init *)ui.ui_vaddr;
228 1.4 ragge memset(qi, 0, sizeof(struct qt_init));
229 1.4 ragge qi->vector = ubasc->uh_lastiv - 4;
230 1.4 ragge qi->options = INIT_OPTIONS_INT;
231 1.6 simonb
232 1.4 ragge QT_WCSR(CSR_IBAL, loint(ui.ui_baddr));
233 1.4 ragge QT_WCSR(CSR_IBAH, hiint(ui.ui_baddr));
234 1.4 ragge QT_WCSR(CSR_SRQR, 2);
235 1.4 ragge delay(100000); /* Wait some time for interrupt */
236 1.4 ragge QT_WCSR(CSR_SRQR, 3); /* Stop card */
237 1.4 ragge
238 1.4 ragge ubmemfree((void *)parent, &ui);
239 1.2 ragge
240 1.2 ragge return 10;
241 1.2 ragge }
242 1.1 ragge
243 1.1 ragge
244 1.1 ragge /*
245 1.1 ragge * Interface exists. More accurately, something exists at the CSR (see
246 1.1 ragge * sys/sys_net.c) -- there's no guarantee it's a DELQA-YM.
247 1.1 ragge *
248 1.1 ragge * The ring descriptors are initialized, the buffers allocated using first the
249 1.1 ragge * DMA region allocated at network load time and then later main memory. The
250 1.1 ragge * INIT block is filled in and the device is poked/probed to see if it really
251 1.1 ragge * is a DELQA-YM. If the device is not a -YM then a message is printed and
252 1.1 ragge * the 'if_attach' call is skipped. For a -YM the START command is issued,
253 1.1 ragge * but the device is not marked as running|up - that happens at interrupt level
254 1.1 ragge * when the device interrupts to say it has started.
255 1.1 ragge */
256 1.1 ragge
257 1.2 ragge void
258 1.2 ragge qtattach(struct device *parent, struct device *self, void *aux)
259 1.1 ragge {
260 1.2 ragge struct uba_softc *ubasc = (struct uba_softc *)parent;
261 1.2 ragge register struct qt_softc *sc = (struct qt_softc *)self;
262 1.1 ragge register struct ifnet *ifp = &sc->is_if;
263 1.2 ragge struct uba_attach_args *ua = aux;
264 1.2 ragge
265 1.6 simonb uba_intr_establish(ua->ua_icookie, ua->ua_cvec, qtintr, sc,
266 1.2 ragge &sc->sc_intrcnt);
267 1.2 ragge evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
268 1.2 ragge sc->sc_dev.dv_xname, "intr");
269 1.2 ragge
270 1.3 ragge sc->sc_iot = ua->ua_iot;
271 1.3 ragge sc->sc_ioh = ua->ua_ioh;
272 1.2 ragge ubasc->uh_lastiv -= 4;
273 1.2 ragge sc->vector = ubasc->uh_lastiv;
274 1.1 ragge
275 1.1 ragge /*
276 1.1 ragge * Now allocate the buffers and initialize the buffers. This should _never_
277 1.1 ragge * fail because main memory is allocated after the DMA pool is used up.
278 1.1 ragge */
279 1.1 ragge
280 1.3 ragge sc->is_addr[0] = QT_RCSR(0);
281 1.3 ragge sc->is_addr[1] = QT_RCSR(2);
282 1.3 ragge sc->is_addr[2] = QT_RCSR(4);
283 1.3 ragge sc->is_addr[3] = QT_RCSR(6);
284 1.3 ragge sc->is_addr[4] = QT_RCSR(8);
285 1.3 ragge sc->is_addr[5] = QT_RCSR(10);
286 1.2 ragge
287 1.2 ragge strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
288 1.2 ragge ifp->if_softc = sc;
289 1.4 ragge ifp->if_flags = IFF_BROADCAST|IFF_MULTICAST;
290 1.2 ragge ifp->if_ioctl = qtioctl;
291 1.2 ragge ifp->if_start = qtstart;
292 1.2 ragge ifp->if_init = qtinit;
293 1.4 ragge ifp->if_stop = qtstop;
294 1.2 ragge IFQ_SET_READY(&ifp->if_snd);
295 1.6 simonb
296 1.2 ragge printf("\n%s: delqa-plus in Turbo mode, hardware address %s\n",
297 1.2 ragge XNAME, ether_sprintf(sc->is_addr));
298 1.2 ragge if_attach(ifp);
299 1.2 ragge ether_ifattach(ifp, sc->is_addr);
300 1.1 ragge }
301 1.6 simonb
302 1.2 ragge int
303 1.1 ragge qtturbo(sc)
304 1.1 ragge register struct qt_softc *sc;
305 1.1 ragge {
306 1.1 ragge register int i;
307 1.1 ragge
308 1.1 ragge /*
309 1.1 ragge * Issue the software reset. Delay 150us. The board should now be in
310 1.1 ragge * DELQA-Normal mode. Set ITB and DEQTA select. If both bits do not
311 1.1 ragge * stay turned on then the board is not a DELQA-YM.
312 1.1 ragge */
313 1.3 ragge QT_WCSR(CSR_ARQR, ARQR_SR);
314 1.3 ragge QT_WCSR(CSR_ARQR, 0);
315 1.1 ragge delay(150L);
316 1.1 ragge
317 1.3 ragge QT_WCSR(CSR_SRR, 0x8001); /* MS | ITB */
318 1.3 ragge i = QT_RCSR(CSR_SRR);
319 1.3 ragge QT_WCSR(CSR_SRR, 0x8000); /* Turn off ITB, set DELQA select */
320 1.1 ragge if (i != 0x8001)
321 1.1 ragge {
322 1.3 ragge printf("qt !-YM\n");
323 1.1 ragge return(0);
324 1.1 ragge }
325 1.1 ragge /*
326 1.1 ragge * Board is a DELQA-YM. Send the commands to enable Turbo mode. Delay
327 1.1 ragge * 1 second, testing the SRR register every millisecond to see if the
328 1.1 ragge * board has shifted to Turbo mode.
329 1.1 ragge */
330 1.3 ragge QT_WCSR(CSR_XCR0, 0x0baf);
331 1.3 ragge QT_WCSR(CSR_XCR1, 0xff00);
332 1.1 ragge for (i = 0; i < 1000; i++)
333 1.1 ragge {
334 1.3 ragge if ((QT_RCSR(CSR_SRR) & SRR_RESP) == 1)
335 1.1 ragge break;
336 1.1 ragge delay(1000L);
337 1.1 ragge }
338 1.1 ragge if (i >= 1000)
339 1.1 ragge {
340 1.3 ragge printf("qt !Turbo\n");
341 1.1 ragge return(0);
342 1.1 ragge }
343 1.1 ragge return(1);
344 1.1 ragge }
345 1.1 ragge
346 1.2 ragge int
347 1.2 ragge qtinit(struct ifnet *ifp)
348 1.1 ragge {
349 1.2 ragge register struct qt_softc *sc = ifp->if_softc;
350 1.2 ragge register struct qt_init *iniblk;
351 1.2 ragge struct ifrw *ifrw;
352 1.2 ragge struct ifxmt *ifxp;
353 1.1 ragge struct qt_rring *rp;
354 1.1 ragge struct qt_tring *tp;
355 1.2 ragge register int i, error;
356 1.6 simonb
357 1.5 thorpej if (ifp->if_flags & IFF_RUNNING) {
358 1.5 thorpej /* Cancel any pending I/O. */
359 1.5 thorpej qtstop(ifp, 0);
360 1.5 thorpej }
361 1.2 ragge
362 1.2 ragge if (sc->sc_ib == NULL) {
363 1.2 ragge if (if_ubaminit(&sc->sc_ifuba, (void *)sc->sc_dev.dv_parent,
364 1.2 ragge MCLBYTES, sc->sc_ifr, NRCV, sc->sc_ifw, NXMT)) {
365 1.2 ragge printf("%s: can't initialize\n", XNAME);
366 1.2 ragge ifp->if_flags &= ~IFF_UP;
367 1.2 ragge return 0;
368 1.2 ragge }
369 1.2 ragge sc->sc_ui.ui_size = sizeof(struct qt_cdata);
370 1.2 ragge if ((error = ubmemalloc((void *)sc->sc_dev.dv_parent,
371 1.2 ragge &sc->sc_ui, 0))) {
372 1.2 ragge printf(": failed ubmemalloc(), error = %d\n", error);
373 1.2 ragge return error;
374 1.2 ragge }
375 1.2 ragge sc->sc_ib = (struct qt_cdata *)sc->sc_ui.ui_vaddr;
376 1.2 ragge sc->sc_pib = (struct qt_cdata *)sc->sc_ui.ui_baddr;
377 1.2 ragge
378 1.2 ragge /*
379 1.2 ragge * Fill in most of the INIT block: vector, options (interrupt enable), ring
380 1.2 ragge * locations. The physical address is copied from the ROMs as part of the
381 1.2 ragge * -YM testing proceedure. The CSR is saved here rather than in qtinit()
382 1.2 ragge * because the qtturbo() routine needs it.
383 1.2 ragge *
384 1.2 ragge * The INIT block must be quadword aligned. Using malloc() guarantees click
385 1.2 ragge * (64 byte) alignment. Since the only time the INIT block is referenced is
386 1.2 ragge * at 'startup' or 'reset' time there is really no time penalty (and a modest
387 1.2 ragge * D space savings) involved.
388 1.2 ragge */
389 1.2 ragge memset(sc->sc_ib, 0, sizeof(struct qt_cdata));
390 1.2 ragge iniblk = &sc->sc_ib->qc_init;
391 1.2 ragge
392 1.2 ragge iniblk->vector = sc->vector;
393 1.2 ragge memcpy(iniblk->paddr, sc->is_addr, 6);
394 1.2 ragge
395 1.2 ragge iniblk->options = INIT_OPTIONS_INT;
396 1.2 ragge iniblk->rx_lo = loint(&sc->sc_pib->qc_r);
397 1.2 ragge iniblk->rx_hi = hiint(&sc->sc_pib->qc_r);
398 1.2 ragge iniblk->tx_lo = loint(&sc->sc_pib->qc_t);
399 1.2 ragge iniblk->tx_hi = hiint(&sc->sc_pib->qc_t);
400 1.2 ragge }
401 1.4 ragge iniblk = &sc->sc_ib->qc_init;
402 1.4 ragge iniblk->mode = ifp->if_flags & IFF_PROMISC ? INIT_MODE_PRO : 0;
403 1.2 ragge
404 1.2 ragge
405 1.1 ragge /*
406 1.1 ragge * Now initialize the receive ring descriptors. Because this routine can be
407 1.1 ragge * called with outstanding I/O operations we check the ring descriptors for
408 1.1 ragge * a non-zero 'rhost0' (or 'thost0') word and place those buffers back on
409 1.1 ragge * the free list.
410 1.1 ragge */
411 1.2 ragge for (i = 0; i < NRCV; i++) {
412 1.2 ragge rp = &sc->sc_ib->qc_r[i];
413 1.2 ragge ifrw = &sc->sc_ifr[i];
414 1.2 ragge rp->rmd1 = MCLBYTES;
415 1.2 ragge rp->rmd4 = loint(ifrw->ifrw_info);
416 1.2 ragge rp->rmd5 = hiint(ifrw->ifrw_info);
417 1.2 ragge rp->rmd3 = 0; /* clear RMD3_OWN */
418 1.1 ragge }
419 1.2 ragge for (i = 0; i < NXMT; i++) {
420 1.2 ragge tp = &sc->sc_ib->qc_t[i];
421 1.2 ragge ifxp = &sc->sc_ifw[i];
422 1.2 ragge tp->tmd4 = loint(ifxp->ifw_info);
423 1.2 ragge tp->tmd5 = hiint(ifxp->ifw_info);
424 1.2 ragge tp->tmd3 = TMD3_OWN;
425 1.1 ragge }
426 1.2 ragge
427 1.2 ragge sc->xnext = sc->xlast = sc->nxmit = 0;
428 1.1 ragge sc->rindex = 0;
429 1.1 ragge sc->nxtrcv = 0;
430 1.1 ragge sc->nrcv = 0;
431 1.6 simonb
432 1.1 ragge /*
433 1.1 ragge * Now we tell the device the address of the INIT block. The device
434 1.1 ragge * _must_ be in the Turbo mode at this time. The "START" command is
435 1.1 ragge * then issued to the device. A 1 second timeout is then started.
436 1.1 ragge * When the interrupt occurs the IFF_UP|IFF_RUNNING state is entered and
437 1.6 simonb * full operations will proceed. If the timeout expires without an interrupt
438 1.1 ragge * being received an error is printed, the flags cleared and the device left
439 1.1 ragge * marked down.
440 1.1 ragge */
441 1.3 ragge QT_WCSR(CSR_IBAL, loint(&sc->sc_pib->qc_init));
442 1.3 ragge QT_WCSR(CSR_IBAH, hiint(&sc->sc_pib->qc_init));
443 1.3 ragge QT_WCSR(CSR_SRQR, 2);
444 1.2 ragge
445 1.2 ragge sc->is_if.if_flags |= IFF_RUNNING;
446 1.2 ragge return 0;
447 1.1 ragge }
448 1.1 ragge
449 1.1 ragge /*
450 1.1 ragge * Start output on interface.
451 1.1 ragge */
452 1.1 ragge
453 1.2 ragge void
454 1.2 ragge qtstart(struct ifnet *ifp)
455 1.1 ragge {
456 1.6 simonb int len, nxmit;
457 1.2 ragge register struct qt_softc *sc = ifp->if_softc;
458 1.1 ragge register struct qt_tring *rp;
459 1.2 ragge struct mbuf *m = NULL;
460 1.6 simonb
461 1.2 ragge for (nxmit = sc->nxmit; nxmit < NXMT; nxmit++) {
462 1.1 ragge IF_DEQUEUE(&sc->is_if.if_snd, m);
463 1.1 ragge if (m == 0)
464 1.1 ragge break;
465 1.2 ragge
466 1.2 ragge rp = &sc->sc_ib->qc_t[sc->xnext];
467 1.2 ragge if ((rp->tmd3 & TMD3_OWN) == 0)
468 1.2 ragge panic("qtstart");
469 1.2 ragge
470 1.3 ragge #if NBPFILTER > 0
471 1.3 ragge if (ifp->if_bpf)
472 1.3 ragge bpf_mtap(ifp->if_bpf, m);
473 1.3 ragge #endif
474 1.3 ragge
475 1.2 ragge len = if_ubaput(&sc->sc_ifuba, &sc->sc_ifw[sc->xnext], m);
476 1.2 ragge if (len < MINPACKETSIZE)
477 1.1 ragge len = MINPACKETSIZE;
478 1.1 ragge rp->tmd3 = len & TMD3_BCT; /* set length,clear ownership */
479 1.3 ragge QT_WCSR(CSR_ARQR, ARQR_TRQ); /* tell device it has buffer */
480 1.3 ragge
481 1.2 ragge if (++sc->xnext >= NXMT)
482 1.2 ragge sc->xnext = 0;
483 1.1 ragge }
484 1.2 ragge if (sc->nxmit != nxmit)
485 1.2 ragge sc->nxmit = nxmit;
486 1.2 ragge /* XXX - set OACTIVE */
487 1.2 ragge }
488 1.6 simonb
489 1.1 ragge /*
490 1.6 simonb * General interrupt service routine. Receive, transmit, device start
491 1.1 ragge * interrupts and timeouts come here. Check for hard device errors and print a
492 1.6 simonb * message if any errors are found. If we are waiting for the device to
493 1.1 ragge * START then check if the device is now running.
494 1.1 ragge */
495 1.1 ragge
496 1.2 ragge void
497 1.2 ragge qtintr(void *arg)
498 1.1 ragge {
499 1.2 ragge struct qt_softc *sc = arg;
500 1.4 ragge struct ifnet *ifp = &sc->is_if;
501 1.2 ragge short status;
502 1.2 ragge
503 1.6 simonb
504 1.3 ragge status = QT_RCSR(CSR_SRR);
505 1.1 ragge if (status < 0)
506 1.1 ragge /* should we reset the device after a bunch of these errs? */
507 1.2 ragge qtsrr(sc, status);
508 1.4 ragge if ((ifp->if_flags & IFF_UP) == 0)
509 1.4 ragge return; /* Unwanted interrupt */
510 1.2 ragge qtrint(sc);
511 1.2 ragge qttint(sc);
512 1.2 ragge qtstart(&sc->is_ec.ec_if);
513 1.1 ragge }
514 1.6 simonb
515 1.1 ragge /*
516 1.1 ragge * Transmit interrupt service. Only called if there are outstanding transmit
517 1.1 ragge * requests which could have completed. The DELQA-YM doesn't provide the
518 1.1 ragge * status bits telling the kind (receive, transmit) of interrupt.
519 1.1 ragge */
520 1.6 simonb
521 1.1 ragge #define BBLMIS (TMD2_BBL|TMD2_MIS)
522 1.1 ragge
523 1.2 ragge void
524 1.2 ragge qttint(struct qt_softc *sc)
525 1.1 ragge {
526 1.1 ragge register struct qt_tring *rp;
527 1.6 simonb
528 1.2 ragge while (sc->nxmit > 0)
529 1.1 ragge {
530 1.2 ragge rp = &sc->sc_ib->qc_t[sc->xlast];
531 1.2 ragge if ((rp->tmd3 & TMD3_OWN) == 0)
532 1.1 ragge break;
533 1.1 ragge sc->is_if.if_opackets++;
534 1.1 ragge /*
535 1.1 ragge * Collisions don't count as output errors, but babbling and missing packets
536 1.1 ragge * do count as output errors.
537 1.1 ragge */
538 1.1 ragge if (rp->tmd2 & TMD2_CER)
539 1.1 ragge sc->is_if.if_collisions++;
540 1.6 simonb if ((rp->tmd0 & TMD0_ERR1) ||
541 1.1 ragge ((rp->tmd2 & TMD2_ERR2) && (rp->tmd2 & BBLMIS)))
542 1.1 ragge {
543 1.1 ragge #ifdef QTDEBUG
544 1.2 ragge char buf[100];
545 1.2 ragge bitmask_snprintf(rp->tmd2, TMD2_BITS, buf, 100);
546 1.2 ragge printf("%s: tmd2 %s\n", XNAME, buf);
547 1.1 ragge #endif
548 1.1 ragge sc->is_if.if_oerrors++;
549 1.1 ragge }
550 1.2 ragge if_ubaend(&sc->sc_ifuba, &sc->sc_ifw[sc->xlast]);
551 1.2 ragge if (++sc->xlast >= NXMT)
552 1.2 ragge sc->xlast = 0;
553 1.2 ragge sc->nxmit--;
554 1.1 ragge }
555 1.1 ragge }
556 1.6 simonb
557 1.1 ragge /*
558 1.1 ragge * Receive interrupt service. Pull packet off the interface and put into
559 1.1 ragge * a mbuf chain for processing later.
560 1.1 ragge */
561 1.1 ragge
562 1.2 ragge void
563 1.2 ragge qtrint(struct qt_softc *sc)
564 1.1 ragge {
565 1.1 ragge register struct qt_rring *rp;
566 1.2 ragge struct ifnet *ifp = &sc->is_ec.ec_if;
567 1.2 ragge struct mbuf *m;
568 1.1 ragge int len;
569 1.6 simonb
570 1.2 ragge while (sc->sc_ib->qc_r[(int)sc->rindex].rmd3 & RMD3_OWN)
571 1.1 ragge {
572 1.2 ragge rp = &sc->sc_ib->qc_r[(int)sc->rindex];
573 1.1 ragge if ((rp->rmd0 & (RMD0_STP|RMD0_ENP)) != (RMD0_STP|RMD0_ENP))
574 1.1 ragge {
575 1.2 ragge printf("%s: chained packet\n", XNAME);
576 1.1 ragge sc->is_if.if_ierrors++;
577 1.1 ragge goto rnext;
578 1.1 ragge }
579 1.1 ragge len = (rp->rmd1 & RMD1_MCNT) - 4; /* -4 for CRC */
580 1.1 ragge sc->is_if.if_ipackets++;
581 1.6 simonb
582 1.1 ragge if ((rp->rmd0 & RMD0_ERR3) || (rp->rmd2 & RMD2_ERR4))
583 1.1 ragge {
584 1.1 ragge #ifdef QTDEBUG
585 1.2 ragge char buf[100];
586 1.2 ragge bitmask_snprintf(rp->rmd0, RMD0_BITS, buf, 100);
587 1.2 ragge printf("%s: rmd0 %s\n", XNAME, buf);
588 1.2 ragge bitmask_snprintf(rp->rmd2, RMD2_BITS, buf, 100);
589 1.2 ragge printf("%s: rmd2 %s\n", XNAME, buf);
590 1.1 ragge #endif
591 1.2 ragge sc->is_if.if_ierrors++;
592 1.2 ragge goto rnext;
593 1.1 ragge }
594 1.2 ragge m = if_ubaget(&sc->sc_ifuba, &sc->sc_ifr[(int)sc->rindex],
595 1.2 ragge ifp, len);
596 1.2 ragge if (m == 0) {
597 1.2 ragge sc->is_if.if_ierrors++;
598 1.2 ragge goto rnext;
599 1.2 ragge }
600 1.3 ragge #if NBPFILTER > 0
601 1.3 ragge if (ifp->if_bpf)
602 1.3 ragge bpf_mtap(ifp->if_bpf, m);
603 1.3 ragge #endif
604 1.2 ragge (*ifp->if_input)(ifp, m);
605 1.1 ragge rnext:
606 1.1 ragge --sc->nrcv;
607 1.2 ragge rp->rmd3 = 0;
608 1.2 ragge rp->rmd1 = MCLBYTES;
609 1.2 ragge if (++sc->rindex >= NRCV)
610 1.1 ragge sc->rindex = 0;
611 1.1 ragge }
612 1.3 ragge QT_WCSR(CSR_ARQR, ARQR_RRQ); /* tell device it has buffer */
613 1.1 ragge }
614 1.1 ragge
615 1.2 ragge int
616 1.1 ragge qtioctl(ifp, cmd, data)
617 1.1 ragge register struct ifnet *ifp;
618 1.2 ragge u_long cmd;
619 1.1 ragge caddr_t data;
620 1.1 ragge {
621 1.5 thorpej int s, error;
622 1.5 thorpej
623 1.5 thorpej s = splnet();
624 1.2 ragge
625 1.2 ragge error = ether_ioctl(ifp, cmd, data);
626 1.5 thorpej if (error == ENETRESET) {
627 1.5 thorpej if (ifp->if_flags & IFF_RUNNING)
628 1.5 thorpej error = qtinit(ifp);
629 1.5 thorpej else
630 1.5 thorpej error = 0;
631 1.4 ragge }
632 1.1 ragge splx(s);
633 1.2 ragge return (error);
634 1.2 ragge }
635 1.1 ragge
636 1.2 ragge void
637 1.2 ragge qtsrr(sc, srrbits)
638 1.2 ragge struct qt_softc *sc;
639 1.2 ragge int srrbits;
640 1.1 ragge {
641 1.2 ragge char buf[100];
642 1.2 ragge bitmask_snprintf(srrbits, SRR_BITS, buf, sizeof buf);
643 1.2 ragge printf("%s: srr=%s\n", sc->sc_dev.dv_xname, buf);
644 1.1 ragge }
645 1.4 ragge
646 1.4 ragge /*
647 1.4 ragge * Stop activity on the interface.
648 1.4 ragge * Lose outstanding transmit requests. XXX - not good for multicast.
649 1.4 ragge */
650 1.4 ragge void
651 1.4 ragge qtstop(struct ifnet *ifp, int disable)
652 1.4 ragge {
653 1.4 ragge struct qt_softc *sc = ifp->if_softc;
654 1.4 ragge int i;
655 1.4 ragge
656 1.4 ragge QT_WCSR(CSR_SRQR, 3);
657 1.4 ragge for (i = 0; i < 100; i++)
658 1.4 ragge if ((QT_RCSR(CSR_SRR) & SRR_RESP) == 3)
659 1.4 ragge break;
660 1.4 ragge if (QT_RCSR(CSR_SRR) & SRR_FES)
661 1.4 ragge qtsrr(sc, QT_RCSR(CSR_SRR));
662 1.4 ragge /* Forget already queued transmit requests */
663 1.4 ragge while (sc->nxmit > 0) {
664 1.4 ragge if_ubaend(&sc->sc_ifuba, &sc->sc_ifw[sc->xlast]);
665 1.4 ragge if (++sc->xlast >= NXMT)
666 1.4 ragge sc->xlast = 0;
667 1.4 ragge sc->nxmit--;
668 1.4 ragge }
669 1.4 ragge /* Handle late received packets */
670 1.4 ragge qtrint(sc);
671 1.4 ragge ifp->if_flags &= ~IFF_RUNNING;
672 1.4 ragge }
673 1.1 ragge
674 1.2 ragge #ifdef notyet
675 1.1 ragge /*
676 1.1 ragge * Reset the device. This moves it from DELQA-T mode to DELQA-Normal mode.
677 1.1 ragge * After the reset put the device back in -T mode. Then call qtinit() to
678 1.1 ragge * reinitialize the ring structures and issue the 'timeout' for the "device
679 1.1 ragge * started interrupt".
680 1.1 ragge */
681 1.1 ragge
682 1.2 ragge void
683 1.2 ragge qtreset(sc)
684 1.1 ragge register struct qt_softc *sc;
685 1.1 ragge {
686 1.6 simonb
687 1.1 ragge qtturbo(sc);
688 1.2 ragge qtinit(&sc->is_ec.ec_if);
689 1.1 ragge }
690 1.1 ragge #endif
691