1 1.8 andvar /* $NetBSD: qduser.h,v 1.8 2024/06/02 12:11:35 andvar Exp $ */ 2 1.1 ragge /*- 3 1.1 ragge * Copyright (c) 1982, 1986 The Regents of the University of California. 4 1.1 ragge * All rights reserved. 5 1.1 ragge * 6 1.1 ragge * Redistribution and use in source and binary forms, with or without 7 1.1 ragge * modification, are permitted provided that the following conditions 8 1.1 ragge * are met: 9 1.1 ragge * 1. Redistributions of source code must retain the above copyright 10 1.1 ragge * notice, this list of conditions and the following disclaimer. 11 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 ragge * notice, this list of conditions and the following disclaimer in the 13 1.1 ragge * documentation and/or other materials provided with the distribution. 14 1.5 agc * 3. Neither the name of the University nor the names of its contributors 15 1.1 ragge * may be used to endorse or promote products derived from this software 16 1.1 ragge * without specific prior written permission. 17 1.1 ragge * 18 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 19 1.1 ragge * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 1.1 ragge * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 1.1 ragge * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 22 1.1 ragge * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 1.1 ragge * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 1.1 ragge * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 1.1 ragge * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 1.1 ragge * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 1.1 ragge * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 1.1 ragge * SUCH DAMAGE. 29 1.1 ragge * 30 1.1 ragge * @(#)qduser.h 7.1 (Berkeley) 5/9/91 31 1.1 ragge */ 32 1.1 ragge 33 1.1 ragge /* derived from: @(#)qduser.h 6.1 (ULTRIX) 11/24/87 */ 34 1.1 ragge /************************************************************************ 35 1.1 ragge * * 36 1.1 ragge * Copyright (c) 1986 by * 37 1.1 ragge * Digital Equipment Corporation, Maynard, MA * 38 1.1 ragge * All rights reserved. * 39 1.1 ragge * * 40 1.1 ragge * This software is furnished under a license and may be used and * 41 1.1 ragge * copied only in accordance with the terms of such license and * 42 1.1 ragge * with the inclusion of the above copyright notice. This * 43 1.1 ragge * software or any other copies thereof may not be provided or * 44 1.1 ragge * otherwise made available to any other person. No title to and * 45 1.1 ragge * ownership of the software is hereby transferred. * 46 1.1 ragge * * 47 1.1 ragge * The information in this software is subject to change without * 48 1.1 ragge * notice and should not be construed as a commitment by Digital * 49 1.1 ragge * Equipment Corporation. * 50 1.1 ragge * * 51 1.1 ragge * Digital assumes no responsibility for the use or reliability * 52 1.1 ragge * of its software on equipment which is not supplied by Digital. * 53 1.1 ragge * * 54 1.1 ragge ************************************************************************/ 55 1.1 ragge 56 1.1 ragge /*************************************************************************** 57 1.1 ragge * 58 1.1 ragge * QDUSER... 59 1.1 ragge * This file defines values shared between the driver and a client 60 1.1 ragge * 61 1.1 ragge ***************************************************************************/ 62 1.1 ragge 63 1.1 ragge /*************************************************************************** 64 1.1 ragge * revision history: 65 1.1 ragge **************************************************************************** 66 1.1 ragge * 67 1.1 ragge * 21 jul 86 ram fixed define of CURSOR_MIN_Y 68 1.1 ragge * 25 nov 85 longo added macro and bit defines for DMA error flags 69 1.1 ragge * 11 nov 85 longo renamed _vs_eventqueue to "qdinput" struct 70 1.1 ragge * 23 oct 85 longo added more defines to the DMA stuff 71 1.1 ragge * 17 oct 85 longo changed "struct rgb" chars to be unsigned 72 1.1 ragge * 16 oct 85 longo added new TABLET support definitions 73 1.1 ragge * 15 oct 85 longo re-wrote DMA queue access macros 74 1.1 ragge * 08 oct 85 longo added status flag manipulation macros to DMA stuff 75 1.1 ragge * 02 oct 85 longo added support for color map write buffer loading 76 1.1 ragge * 26 sep 85 longo removed adder sertup params from DMA request struct 77 1.1 ragge * 23 sep 85 longo added DMA queue access macros 78 1.1 ragge * 30 aug 85 longo fixed crock in "qdiobuf" struct compile-time sizing. Also 79 1.1 ragge * removed DMAcontrol struct from DMA buffer for field test 80 1.1 ragge * 26 aug 85 longo put in conditional include of "qevent.h" for user prg's 81 1.1 ragge * 18 jul 85 longo changed semantics so that head is tail and tail is head 82 1.1 ragge * 12 jul 85 longo moved "mouse_report" struct and defs over to qd_data.c 83 1.1 ragge * 11 jul 85 longo added device coordinate to gate array cursor coordinate 84 1.1 ragge * transformation macros 85 1.1 ragge * 03 jul 85 longo changed kernel typdef's for data types to long-hand 86 1.1 ragge * 10 may 85 longo created 87 1.1 ragge * 88 1.1 ragge ***************************************************************************/ 89 1.1 ragge 90 1.3 ragge #include <dev/qbus/qevent.h> 91 1.1 ragge 92 1.1 ragge /*--------------------- 93 1.1 ragge * QDSS device map */ 94 1.1 ragge 95 1.1 ragge struct qdmap { /* map of register blocks in QDSS */ 96 1.1 ragge 97 1.1 ragge char *template; 98 1.1 ragge char *adder; 99 1.1 ragge char *dga; 100 1.1 ragge char *duart; 101 1.1 ragge char *memcsr; 102 1.1 ragge char *red; 103 1.1 ragge char *blue; 104 1.1 ragge char *green; 105 1.1 ragge }; 106 1.1 ragge 107 1.1 ragge /*-------------------------------------------- 108 1.1 ragge * DGA CSR bit definitions and register map */ 109 1.1 ragge 110 1.1 ragge #define DMADONE 0x8000 /* DMA done status */ 111 1.1 ragge #define SET_DONE_FIFO 0x4000 /* set DMADONE when FIFO empty.. */ 112 1.1 ragge /* ..AND count = 0 */ 113 1.1 ragge 114 1.1 ragge #define PTOB_ENB 0x0600 /* host-to-bitmap DMA xfer */ 115 1.1 ragge #define BTOP_ENB 0x0400 /* bitmap-to-host DMA xfer */ 116 1.1 ragge #define DL_ENB 0x0200 /* display list DMA xfer */ 117 1.1 ragge #define HALT 0x0000 /* halt DGA */ 118 1.1 ragge 119 1.1 ragge #define BYTE_DMA 0x0100 /* byte/word DMA xfer */ 120 1.1 ragge 121 1.1 ragge #define DMA_ERR 0x0080 /* DMA error bits */ 122 1.1 ragge #define PARITY_ERR 0x0040 /* memory parity error in DMA */ 123 1.1 ragge #define BUS_ERR 0x0020 /* bus timeout error in DMA */ 124 1.1 ragge 125 1.1 ragge #define GLOBAL_IE 0x0004 /* global interrupt enable */ 126 1.1 ragge #define DMA_IE 0x0002 /* DMA interrupt enable */ 127 1.1 ragge #define CURS_ENB 0x0001 /* cursor enable */ 128 1.1 ragge 129 1.1 ragge /* QDSS memcsr bit definitions */ 130 1.1 ragge 131 1.1 ragge #define UNBLANK 0x0020 132 1.1 ragge #define SYNC_ON 0x0008 133 1.1 ragge 134 1.1 ragge struct dga { 135 1.1 ragge 136 1.1 ragge unsigned short csr; 137 1.1 ragge unsigned short adrs_lo; /* destination address of bitmap to */ 138 1.1 ragge unsigned short adrs_hi; /* host DMA */ 139 1.1 ragge unsigned short bytcnt_lo; /* byte length of requested DMA */ 140 1.1 ragge unsigned short bytcnt_hi; /* (WO = bytcnt) (RO = fifo count) */ 141 1.1 ragge unsigned short fifo; /* FIFO register */ 142 1.1 ragge unsigned short x_cursor; /* cursor position registers */ 143 1.1 ragge unsigned short y_cursor; 144 1.1 ragge unsigned short ivr; /* interrupt vector register */ 145 1.1 ragge unsigned short memadr; /* memory base address register */ 146 1.1 ragge }; 147 1.1 ragge 148 1.1 ragge /*------------------------------------------------------------------------- 149 1.1 ragge * macros to transform device coordinates to hardware cursor coordinates */ 150 1.1 ragge 151 1.6 simonb #define CURS_MIN_X 232 /* device coordinate x = 0 */ 152 1.6 simonb #define CURS_MIN_Y 16 /* device coordinate y = 0 */ 153 1.1 ragge 154 1.1 ragge #define TRANX(x) ( -(((int)(x)+CURS_MIN_X) & ~0x0003) | \ 155 1.1 ragge (((int)(x)+CURS_MIN_X) & 0x0003) ) 156 1.1 ragge 157 1.1 ragge #define TRANY(y) ( -((y)+CURS_MIN_Y) ) 158 1.1 ragge 159 1.1 ragge /********************************************************************* 160 1.1 ragge * 161 1.1 ragge * EVENT QUEUE DEFINITIONS 162 1.1 ragge * 163 1.1 ragge ********************************************************************** 164 1.1 ragge * most of the event queue definitions are found in "qevent.h". But a 165 1.6 simonb * few things not found there are here. */ 166 1.1 ragge 167 1.1 ragge /* The event queue header */ 168 1.6 simonb 169 1.1 ragge struct qdinput { 170 1.1 ragge 171 1.1 ragge struct _vs_eventqueue header; /* event queue ring handling */ 172 1.1 ragge 173 1.4 wiz /* for VS100 and QVSS compatibility reasons, additions to this 174 1.1 ragge * structure must be made below this point. */ 175 1.1 ragge 176 1.1 ragge struct _vs_cursor curs_pos; /* current mouse position */ 177 1.1 ragge struct _vs_box curs_box; /* cursor reporting box */ 178 1.1 ragge 179 1.1 ragge }; 180 1.6 simonb 181 1.1 ragge /* vse_key field. definitions for mouse buttons */ 182 1.1 ragge 183 1.1 ragge #define VSE_LEFT_BUTTON 0 184 1.1 ragge #define VSE_MIDDLE_BUTTON 1 185 1.1 ragge #define VSE_RIGHT_BUTTON 2 186 1.1 ragge 187 1.1 ragge /* vse_key field. definitions for mouse buttons */ 188 1.1 ragge 189 1.1 ragge #define VSE_T_LEFT_BUTTON 0 190 1.1 ragge #define VSE_T_FRONT_BUTTON 1 191 1.1 ragge #define VSE_T_RIGHT_BUTTON 2 192 1.1 ragge #define VSE_T_BACK_BUTTON 4 193 1.1 ragge 194 1.1 ragge #define VSE_T_BARREL_BUTTON VSE_T_LEFT_BUTTON 195 1.1 ragge #define VSE_T_TIP_BUTTON VSE_T_FRONT_BUTTON 196 1.1 ragge 197 1.1 ragge /*-------------------------------------------------------------------------- 198 1.1 ragge * These are the macros to be used for loading and extracting from the event 199 1.1 ragge * queue. It is presumed that the macro user will only use the access macros 200 1.1 ragge * if the event queue is non-empty ( ISEMPTY(eq) == FALSE ), and that the 201 1.1 ragge * driver will only load the event queue after checking that it is not full 202 1.1 ragge * ( ISFULL(eq) == FALSE ). ("eq" is a pointer to the event queue header.) 203 1.1 ragge * 204 1.1 ragge * Before an event access session for a particular event, the macro users 205 1.1 ragge * must use the xxxBEGIN macro, and the xxxEND macro after an event is through 206 1.1 ragge * with. As seen below, the xxxBEGIN and xxxEND macros maintain the event 207 1.1 ragge * queue access mechanism. 208 1.1 ragge * 209 1.6 simonb * First, the macros to be used by the event queue reader 210 1.1 ragge */ 211 1.1 ragge 212 1.1 ragge #define ISEMPTY(eq) ((eq)->header.head == (eq)->header.tail) 213 1.6 simonb #define GETBEGIN(eq) (&(eq)->header.events[(eq)->header.head]) 214 1.1 ragge 215 1.6 simonb #define GET_X(event) ((event)->vse_x) /* get x position */ 216 1.6 simonb #define GET_Y(event) ((event)->vse_y) /* get y position */ 217 1.6 simonb #define GET_TIME(event) ((event)->vse_time) /* get time */ 218 1.6 simonb #define GET_TYPE(event) ((event)->vse_type) /* get entry type */ 219 1.6 simonb #define GET_KEY(event) ((event)->vse_key) /* get keycode */ 220 1.6 simonb #define GET_DIR(event) ((event)->vse_direction) /* get direction */ 221 1.6 simonb #define GET_DEVICE(event) ((event)->vse_device) /* get device */ 222 1.1 ragge 223 1.6 simonb #define GETEND(eq) (++(eq)->header.head >= (eq)->header.size ? \ 224 1.1 ragge (eq)->header.head = 0 : 0 ) 225 1.1 ragge 226 1.1 ragge /*------------------------------------------------ 227 1.1 ragge * macros to be used by the event queue loader */ 228 1.1 ragge 229 1.1 ragge /* ISFULL yields TRUE if queue is full */ 230 1.1 ragge 231 1.1 ragge #define ISFULL(eq) ((eq)->header.tail+1 == (eq)->header.head || \ 232 1.1 ragge ((eq)->header.tail+1 == (eq)->header.size && \ 233 1.1 ragge (eq)->header.head == 0)) 234 1.1 ragge 235 1.1 ragge /* get address of the billet for NEXT event */ 236 1.1 ragge 237 1.1 ragge #define PUTBEGIN(eq) (&(eq)->header.events[(eq)->header.tail]) 238 1.1 ragge 239 1.6 simonb #define PUT_X(event, value) ((event)->vse_x = value) /* put X pos */ 240 1.6 simonb #define PUT_Y(event, value) ((event)->vse_y = value) /* put Y pos */ 241 1.1 ragge #define PUT_TIME(event, value) ((event)->vse_time = value) /* put time */ 242 1.1 ragge #define PUT_TYPE(event, value) ((event)->vse_type = value) /* put type */ 243 1.1 ragge #define PUT_KEY(event, value) ((event)->vse_key = value) /* put input key */ 244 1.1 ragge #define PUT_DIR(event, value) ((event)->vse_direction = value) /* put dir */ 245 1.1 ragge #define PUT_DEVICE(event, value) ((event)->vse_device = value) /* put dev */ 246 1.1 ragge 247 1.6 simonb #define PUTEND(eq) (++(eq)->header.tail >= (eq)->header.size ? \ 248 1.6 simonb (eq)->header.tail = 0 : 0) 249 1.1 ragge 250 1.1 ragge /****************************************************************** 251 1.1 ragge * 252 1.1 ragge * DMA I/O DEFINITIONS 253 1.1 ragge * 254 1.1 ragge ******************************************************************/ 255 1.1 ragge 256 1.1 ragge /*--------------------------------------------------------------------- 257 1.1 ragge * The DMA request queue is implemented as a ring buffer of "DMAreq" 258 1.1 ragge structures. The queue is accessed using ring indices located in the 259 1.1 ragge "DMAreq_header" structure. Access is implemented using access macros 260 1.1 ragge similar to the event queue access macros above. */ 261 1.1 ragge 262 1.1 ragge struct DMAreq { 263 1.1 ragge 264 1.1 ragge short DMAtype; /* DMA type code (for QDSS) */ 265 1.1 ragge short DMAdone; /* DMA done parameter */ 266 1.1 ragge char *bufp; /* virtual adrs of buffer */ 267 1.6 simonb int length; /* transfer buffer length */ 268 1.1 ragge }; 269 1.1 ragge 270 1.1 ragge /* DMA type command codes */ 271 1.1 ragge 272 1.1 ragge #define DISPLIST 1 /* display list DMA */ 273 1.1 ragge #define PTOB 2 /* 1 plane Qbus to bitmap DMA */ 274 1.1 ragge #define BTOP 3 /* 1 plane bitmap to Qbus DMA */ 275 1.1 ragge 276 1.1 ragge /* DMA done notification code */ 277 1.1 ragge 278 1.1 ragge #define FIFO_EMPTY 0x01 /* DONE when FIFO becomes empty */ 279 1.1 ragge #define COUNT_ZERO 0x02 /* DONE when count becomes zero */ 280 1.1 ragge #define WORD_PACK 0x04 /* program the gate array for word packing */ 281 1.1 ragge #define BYTE_PACK 0x08 /* program gate array for byte packing */ 282 1.1 ragge #define REQUEST_DONE 0x100 /* clear when driver has processed request */ 283 1.1 ragge #define HARD_ERROR 0x200 /* DMA hardware error occurred */ 284 1.1 ragge 285 1.1 ragge /* DMA request queue is a ring buffer of request structures */ 286 1.1 ragge 287 1.1 ragge struct DMAreq_header { 288 1.1 ragge 289 1.1 ragge int QBAreg; /* cookie Qbus map reg for this buffer */ 290 1.1 ragge short status; /* master DMA status word */ 291 1.1 ragge int shared_size; /* size of shared memory in bytes */ 292 1.1 ragge struct DMAreq *DMAreq; /* start address of request queue */ 293 1.1 ragge int used; /* # of queue entries currently used */ 294 1.1 ragge int size; /* # of "DMAreq"'s in the request queue */ 295 1.1 ragge int oldest; /* index to oldest queue'd request */ 296 1.1 ragge int newest; /* index to newest queue'd request */ 297 1.1 ragge }; 298 1.1 ragge 299 1.1 ragge /* bit definitions for DMAstatus word in DMAreq_header */ 300 1.1 ragge 301 1.1 ragge #define DMA_ACTIVE 0x0004 /* DMA in progress */ 302 1.1 ragge #define DMA_ERROR 0x0080 /* DMA hardware error */ 303 1.1 ragge #define DMA_IGNORE 0x0002 /* flag to ignore this interrupt */ 304 1.1 ragge 305 1.1 ragge /*------------------------------------------ 306 1.1 ragge * macros for DMA request queue fiddling */ 307 1.1 ragge 308 1.1 ragge /* DMA status set/check macros */ 309 1.1 ragge 310 1.6 simonb #define DMA_SETACTIVE(header) ((header)->status |= DMA_ACTIVE) 311 1.1 ragge #define DMA_CLRACTIVE(header) ((header)->status &= ~DMA_ACTIVE) 312 1.6 simonb #define DMA_ISACTIVE(header) ((header)->status & DMA_ACTIVE) 313 1.1 ragge 314 1.6 simonb #define DMA_SETERROR(header) ((header)->status |= DMA_ERROR) 315 1.6 simonb #define DMA_CLRERROR(header) ((header)->status &= ~DMA_ERROR) 316 1.6 simonb #define DMA_ISERROR(header) ((header)->status & DMA_ERROR) 317 1.1 ragge 318 1.1 ragge #define DMA_SETIGNORE(header) ((header)->status |= DMA_IGNORE) 319 1.6 simonb #define DMA_CLRIGNORE(header) ((header)->status &= ~DMA_IGNORE) 320 1.6 simonb #define DMA_ISIGNORE(header) ((header)->status & DMA_IGNORE) 321 1.1 ragge 322 1.1 ragge /* yields TRUE if queue is empty (ISEMPTY) or full (ISFULL) */ 323 1.1 ragge 324 1.1 ragge #define DMA_ISEMPTY(header) ((header)->used == 0) 325 1.1 ragge #define DMA_ISFULL(header) ((header)->used >= (header)->size) 326 1.1 ragge 327 1.1 ragge /* returns address of the billet for next (PUT) 328 1.1 ragge * or oldest (GET) request */ 329 1.1 ragge 330 1.1 ragge #define DMA_PUTBEGIN(header) (&(header)->DMAreq[(header)->newest]) 331 1.6 simonb #define DMA_GETBEGIN(header) (&(header)->DMAreq[(header)->oldest]) 332 1.1 ragge 333 1.1 ragge /* does queue access pointer maintenance */ 334 1.1 ragge 335 1.6 simonb #define DMA_GETEND(header) (++(header)->oldest >= (header)->size \ 336 1.6 simonb ? (header)->oldest = 0 : 0); \ 337 1.1 ragge --(header)->used; 338 1.1 ragge 339 1.6 simonb #define DMA_PUTEND(header) (++(header)->newest >= (header)->size \ 340 1.6 simonb ? (header)->newest = 0 : 0); \ 341 1.1 ragge ++(header)->used; 342 1.1 ragge 343 1.1 ragge /****************************************************************** 344 1.1 ragge * 345 1.1 ragge * COLOR MAP WRITE BUFFER DEFINITIONS 346 1.1 ragge * 347 1.1 ragge ******************************************************************/ 348 1.1 ragge 349 1.1 ragge struct rgb { 350 1.1 ragge 351 1.1 ragge unsigned char offset; /* color map address for load */ 352 1.1 ragge unsigned char red; /* data for red map */ 353 1.1 ragge unsigned char green; /* data for green map */ 354 1.1 ragge unsigned char blue; /* data for blue map */ 355 1.1 ragge }; 356 1.1 ragge 357 1.1 ragge struct color_buf { 358 1.1 ragge 359 1.1 ragge char status; /* load request/service status */ 360 1.1 ragge short count; /* number of entries to br loaded */ 361 1.1 ragge struct rgb rgb[256]; 362 1.1 ragge }; 363 1.1 ragge 364 1.1 ragge #define LOAD_COLOR_MAP 0x0001 365 1.1 ragge 366 1.1 ragge /****************************************************************** 367 1.1 ragge * 368 1.1 ragge * SCROLL ASSIST DEFINITIONS 369 1.1 ragge * 370 1.1 ragge ******************************************************************/ 371 1.1 ragge 372 1.1 ragge struct scroll { 373 1.1 ragge 374 1.1 ragge short status; 375 1.1 ragge short viper_constant; 376 1.1 ragge short y_scroll_constant; 377 1.1 ragge short y_offset; 378 1.1 ragge short x_index_pending; 379 1.1 ragge short y_index_pending; 380 1.1 ragge }; 381 1.1 ragge 382 1.1 ragge #define LOAD_REGS 0x0001 383 1.1 ragge #define LOAD_INDEX 0x0002 384 1.1 ragge 385 1.1 ragge /****************************************************************** 386 1.1 ragge * 387 1.1 ragge * MOUSE/TABLET/KBD PROGRAMMING DEFINITIONS 388 1.1 ragge * 389 1.1 ragge ******************************************************************/ 390 1.1 ragge 391 1.1 ragge /*----------------------------------- 392 1.8 andvar * LK201 programming definitions */ 393 1.1 ragge 394 1.6 simonb #define LK_UPDOWN 0x86 /* bits for setting lk201 modes */ 395 1.6 simonb #define LK_AUTODOWN 0x82 396 1.6 simonb #define LK_DOWN 0x80 397 1.6 simonb #define LK_DEFAULTS 0xD3 /* reset (some) default settings */ 398 1.6 simonb #define LK_AR_ENABLE 0xE3 /* global auto repeat enable */ 399 1.6 simonb #define LK_CL_ENABLE 0x1B /* keyclick enable */ 400 1.6 simonb #define LK_KBD_ENABLE 0x8B /* keyboard enable */ 401 1.6 simonb #define LK_BELL_ENABLE 0x23 /* the bell */ 402 1.6 simonb #define LK_RING_BELL 0xA7 /* ring keyboard bell */ 403 1.6 simonb 404 1.6 simonb #define LK_LED_ENABLE 0x13 /* light led */ 405 1.6 simonb #define LK_LED_DISABLE 0x11 /* turn off led */ 406 1.6 simonb #define LED_1 0x81 /* led bits */ 407 1.6 simonb #define LED_2 0x82 408 1.6 simonb #define LED_3 0x84 409 1.6 simonb #define LED_4 0x88 410 1.6 simonb #define LED_ALL 0x8F 411 1.1 ragge #define LK_LED_HOLD LED_4 412 1.1 ragge #define LK_LED_LOCK LED_3 413 1.1 ragge #define LK_LED_COMPOSE LED_2 414 1.6 simonb #define LK_LED_WAIT LED_1 415 1.1 ragge 416 1.1 ragge #define LK_KDOWN_ERROR 0x3D /* key down on powerup error */ 417 1.6 simonb #define LK_POWER_ERROR 0x3E /* keyboard failure on powerup test */ 418 1.1 ragge #define LK_OUTPUT_ERROR 0xB5 /* keystrokes lost during inhibit */ 419 1.6 simonb #define LK_INPUT_ERROR 0xB6 /* garbage command to keyboard */ 420 1.1 ragge #define LK_LOWEST 0x56 /* lowest significant keycode */ 421 1.1 ragge #define LK_DIV6_START 0xAD /* start of div 6 */ 422 1.1 ragge #define LK_DIV5_END 0xB2 /* end of div 5 */ 423 1.1 ragge 424 1.1 ragge #define LAST_PARAM 0x80 /* "no more params" bit */ 425 1.1 ragge 426 1.1 ragge struct prgkbd { 427 1.1 ragge 428 1.1 ragge short cmd; /* LK201 command opcode */ 429 1.1 ragge short param1; /* 1st cmd parameter (can be null) */ 430 1.1 ragge short param2; /* 2nd cmd parameter (can be null) */ 431 1.1 ragge }; 432 1.1 ragge 433 1.1 ragge /*------------------------- 434 1.1 ragge * "special" LK-201 keys */ 435 1.1 ragge 436 1.1 ragge #define SHIFT 174 437 1.1 ragge #define LOCK 176 438 1.1 ragge #define REPEAT 180 439 1.1 ragge #define CNTRL 175 440 1.1 ragge #define ALLUP 179 441 1.1 ragge 442 1.1 ragge /*-------------------------------- 443 1.1 ragge * cursor programming structure */ 444 1.1 ragge 445 1.1 ragge struct prg_cursor { 446 1.1 ragge 447 1.1 ragge unsigned short acc_factor; /* cursor aceleration factor */ 448 1.1 ragge unsigned short threshold; /* threshold to trigger acc at */ 449 1.1 ragge }; 450 1.1 ragge 451 1.1 ragge /*--------------------- 452 1.1 ragge * mouse definitions */ 453 1.1 ragge 454 1.1 ragge #define INC_STREAM_MODE 'R' /* stream mode reports (55 hz) */ 455 1.1 ragge #define PROMPT_MODE 'D' /* report when prompted */ 456 1.1 ragge #define REQUEST_POS 'P' /* request position report */ 457 1.1 ragge #define SELF_TEST 'T' /* request self test */ 458 1.1 ragge 459 1.1 ragge #define MOUSE_ID 0x2 /* mouse ID in lo 4 bits */ 460 1.1 ragge 461 1.1 ragge #define START_FRAME 0x80 /* start of report frame bit */ 462 1.1 ragge #define X_SIGN 0x10 /* position sign bits */ 463 1.1 ragge #define Y_SIGN 0x08 464 1.1 ragge 465 1.1 ragge #define RIGHT_BUTTON 0x01 /* mouse buttons */ 466 1.1 ragge #define MIDDLE_BUTTON 0x02 467 1.1 ragge #define LEFT_BUTTON 0x04 468 1.1 ragge 469 1.1 ragge /* mouse report structure definition */ 470 1.1 ragge 471 1.1 ragge struct mouse_report { 472 1.1 ragge 473 1.1 ragge char state; /* buttons and sign bits */ 474 1.1 ragge short dx; /* delta X since last change */ 475 1.1 ragge short dy; /* delta Y since last change */ 476 1.1 ragge char bytcnt; /* mouse report byte count */ 477 1.1 ragge }; 478 1.1 ragge 479 1.1 ragge /*----------------------------------------- 480 1.1 ragge * tablet command/interface definitions */ 481 1.1 ragge 482 1.1 ragge #define T_STREAM 'R' /* continuous stream report mode */ 483 1.6 simonb #define T_POINT 'D' /* enter report-on-request mode */ 484 1.1 ragge #define T_REQUEST 'P' /* request position report */ 485 1.1 ragge 486 1.1 ragge #define T_BAUD 'B' /* increase baud to 9600 from 4800 */ 487 1.1 ragge #define T_RATE_55 'K' /* report rate: 55/sec */ 488 1.1 ragge #define T_RATE_72 'L' /* report rate: 72/sec */ 489 1.1 ragge #define T_RATE_120 'M' /* report rate: 120/sec (9600 only) */ 490 1.1 ragge 491 1.1 ragge #define T_TEST SELF_TEST /* do self test */ 492 1.1 ragge 493 1.1 ragge #define TABLET_ID 0x4 /* tablet ID in lo 4 bits */ 494 1.1 ragge 495 1.1 ragge #define T_START_FRAME 0x80 /* start of report frame bit */ 496 1.1 ragge #define T_PROXIMITY 0x01 /* state pointer in proximity */ 497 1.1 ragge 498 1.1 ragge #define T_LEFT_BUTTON 0x02 /* puck buttons */ 499 1.1 ragge #define T_FRONT_BUTTON 0x04 500 1.1 ragge #define T_RIGHT_BUTTON 0x08 501 1.1 ragge #define T_BACK_BUTTON 0x10 502 1.1 ragge 503 1.1 ragge #define T_BARREL_BUTTON T_LEFT_BUTTON /* stylus buttons */ 504 1.1 ragge #define T_TIP_BUTTON T_FRONT_BUTTON 505 1.1 ragge 506