uda.c revision 1.34 1 1.34 ragge /* $NetBSD: uda.c,v 1.34 2000/04/30 11:46:49 ragge Exp $ */
2 1.1 ragge /*
3 1.17 ragge * Copyright (c) 1996 Ludd, University of Lule}, Sweden.
4 1.1 ragge * Copyright (c) 1988 Regents of the University of California.
5 1.1 ragge * All rights reserved.
6 1.1 ragge *
7 1.1 ragge * This code is derived from software contributed to Berkeley by
8 1.1 ragge * Chris Torek.
9 1.1 ragge *
10 1.1 ragge * Redistribution and use in source and binary forms, with or without
11 1.1 ragge * modification, are permitted provided that the following conditions
12 1.1 ragge * are met:
13 1.1 ragge * 1. Redistributions of source code must retain the above copyright
14 1.1 ragge * notice, this list of conditions and the following disclaimer.
15 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ragge * notice, this list of conditions and the following disclaimer in the
17 1.1 ragge * documentation and/or other materials provided with the distribution.
18 1.1 ragge * 3. All advertising materials mentioning features or use of this software
19 1.1 ragge * must display the following acknowledgement:
20 1.1 ragge * This product includes software developed by the University of
21 1.1 ragge * California, Berkeley and its contributors.
22 1.1 ragge * 4. Neither the name of the University nor the names of its contributors
23 1.1 ragge * may be used to endorse or promote products derived from this software
24 1.1 ragge * without specific prior written permission.
25 1.1 ragge *
26 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 1.1 ragge * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 1.1 ragge * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 1.1 ragge * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 1.1 ragge * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 1.1 ragge * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 1.1 ragge * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 1.1 ragge * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 1.1 ragge * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 1.1 ragge * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 1.1 ragge * SUCH DAMAGE.
37 1.1 ragge *
38 1.3 cgd * @(#)uda.c 7.32 (Berkeley) 2/13/91
39 1.1 ragge */
40 1.1 ragge
41 1.1 ragge /*
42 1.18 ragge * UDA50 disk device driver
43 1.1 ragge */
44 1.1 ragge
45 1.11 mycroft #include <sys/param.h>
46 1.17 ragge #include <sys/kernel.h>
47 1.20 ragge #include <sys/systm.h>
48 1.30 ragge #include <sys/device.h>
49 1.30 ragge #include <sys/buf.h>
50 1.30 ragge #include <sys/malloc.h>
51 1.11 mycroft
52 1.30 ragge #include <machine/bus.h>
53 1.18 ragge #include <machine/sid.h>
54 1.1 ragge
55 1.30 ragge #include <dev/qbus/ubavar.h>
56 1.30 ragge
57 1.30 ragge #include <dev/mscp/mscp.h>
58 1.30 ragge #include <dev/mscp/mscpreg.h>
59 1.30 ragge #include <dev/mscp/mscpvar.h>
60 1.30 ragge
61 1.30 ragge #include "ioconf.h"
62 1.1 ragge
63 1.1 ragge /*
64 1.1 ragge * Software status, per controller.
65 1.1 ragge */
66 1.1 ragge struct uda_softc {
67 1.17 ragge struct device sc_dev; /* Autoconfig info */
68 1.17 ragge struct uba_unit sc_unit; /* Struct common for UBA to communicate */
69 1.31 thorpej struct buf_queue sc_bufq; /* bufs awaiting for resources */
70 1.17 ragge struct mscp_pack *sc_uuda; /* Unibus address of uda struct */
71 1.17 ragge struct mscp_pack sc_uda; /* Struct for uda communication */
72 1.30 ragge bus_dma_tag_t sc_dmat;
73 1.30 ragge bus_space_tag_t sc_iot;
74 1.30 ragge bus_space_handle_t sc_iph;
75 1.30 ragge bus_space_handle_t sc_sah;
76 1.30 ragge bus_dmamap_t sc_cmap;/* Control structures */
77 1.17 ragge struct mscp *sc_mscp; /* Keep pointer to active mscp */
78 1.17 ragge struct mscp_softc *sc_softc; /* MSCP info (per mscpvar.h) */
79 1.1 ragge int sc_wticks; /* watchdog timer ticks */
80 1.30 ragge int sc_inq;
81 1.17 ragge };
82 1.1 ragge
83 1.28 ragge static int udamatch __P((struct device *, struct cfdata *, void *));
84 1.20 ragge static void udaattach __P((struct device *, struct device *, void *));
85 1.34 ragge static void reset(struct device *);
86 1.32 matt static void intr __P((void *));
87 1.20 ragge int udaready __P((struct uba_unit *));
88 1.30 ragge void udactlrdone __P((struct device *));
89 1.21 cgd int udaprint __P((void *, const char *));
90 1.17 ragge void udasaerror __P((struct device *, int));
91 1.30 ragge void udago __P((struct device *, struct mscp_xi *));
92 1.20 ragge
93 1.20 ragge struct cfattach mtc_ca = {
94 1.20 ragge sizeof(struct uda_softc), udamatch, udaattach
95 1.20 ragge };
96 1.10 ragge
97 1.15 ragge struct cfattach uda_ca = {
98 1.17 ragge sizeof(struct uda_softc), udamatch, udaattach
99 1.10 ragge };
100 1.10 ragge
101 1.1 ragge /*
102 1.1 ragge * More driver definitions, for generic MSCP code.
103 1.1 ragge */
104 1.17 ragge struct mscp_ctlr uda_mscp_ctlr = {
105 1.17 ragge udactlrdone,
106 1.17 ragge udago,
107 1.17 ragge udasaerror,
108 1.17 ragge };
109 1.1 ragge
110 1.1 ragge /*
111 1.1 ragge * Miscellaneous private variables.
112 1.1 ragge */
113 1.17 ragge static int ivec_no;
114 1.1 ragge
115 1.17 ragge int
116 1.17 ragge udaprint(aux, name)
117 1.17 ragge void *aux;
118 1.21 cgd const char *name;
119 1.17 ragge {
120 1.17 ragge if (name)
121 1.23 christos printf("%s: mscpbus", name);
122 1.17 ragge return UNCONF;
123 1.17 ragge }
124 1.1 ragge
125 1.1 ragge /*
126 1.1 ragge * Poke at a supposed UDA50 to see if it is there.
127 1.1 ragge */
128 1.10 ragge int
129 1.28 ragge udamatch(parent, cf, aux)
130 1.28 ragge struct device *parent;
131 1.28 ragge struct cfdata *cf;
132 1.28 ragge void *aux;
133 1.1 ragge {
134 1.17 ragge struct uba_attach_args *ua = aux;
135 1.18 ragge struct mscp_softc mi; /* Nice hack */
136 1.17 ragge struct uba_softc *ubasc;
137 1.20 ragge int tries;
138 1.1 ragge
139 1.17 ragge /* Get an interrupt vector. */
140 1.17 ragge ubasc = (void *)parent;
141 1.17 ragge ivec_no = ubasc->uh_lastiv - 4;
142 1.1 ragge
143 1.30 ragge mi.mi_iot = ua->ua_iot;
144 1.30 ragge mi.mi_iph = ua->ua_ioh;
145 1.30 ragge mi.mi_sah = ua->ua_ioh + 2;
146 1.30 ragge mi.mi_swh = ua->ua_ioh + 2;
147 1.1 ragge
148 1.1 ragge /*
149 1.1 ragge * Initialise the controller (partially). The UDA50 programmer's
150 1.1 ragge * manual states that if initialisation fails, it should be retried
151 1.1 ragge * at least once, but after a second failure the port should be
152 1.1 ragge * considered `down'; it also mentions that the controller should
153 1.1 ragge * initialise within ten seconds. Or so I hear; I have not seen
154 1.1 ragge * this manual myself.
155 1.1 ragge */
156 1.1 ragge tries = 0;
157 1.1 ragge again:
158 1.8 ragge
159 1.30 ragge bus_space_write_2(mi.mi_iot, mi.mi_iph, 0, 0); /* Start init */
160 1.18 ragge if (mscp_waitstep(&mi, MP_STEP1, MP_STEP1) == 0)
161 1.18 ragge return 0; /* Nothing here... */
162 1.8 ragge
163 1.30 ragge bus_space_write_2(mi.mi_iot, mi.mi_sah, 0,
164 1.30 ragge MP_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | MP_IE | (ivec_no >> 2));
165 1.8 ragge
166 1.18 ragge if (mscp_waitstep(&mi, MP_STEP2, MP_STEP2) == 0) {
167 1.30 ragge printf("udaprobe: init step2 no change. sa=%x\n",
168 1.30 ragge bus_space_read_2(mi.mi_iot, mi.mi_sah, 0));
169 1.8 ragge goto bad;
170 1.8 ragge }
171 1.8 ragge
172 1.1 ragge /* should have interrupted by now */
173 1.17 ragge return 1;
174 1.1 ragge bad:
175 1.1 ragge if (++tries < 2)
176 1.1 ragge goto again;
177 1.17 ragge return 0;
178 1.1 ragge }
179 1.1 ragge
180 1.17 ragge void
181 1.17 ragge udaattach(parent, self, aux)
182 1.17 ragge struct device *parent, *self;
183 1.17 ragge void *aux;
184 1.1 ragge {
185 1.17 ragge struct uda_softc *sc = (void *)self;
186 1.19 ragge struct uba_attach_args *ua = aux;
187 1.17 ragge struct uba_softc *uh = (void *)parent;
188 1.17 ragge struct mscp_attach_args ma;
189 1.30 ragge int ctlr, error, rseg;
190 1.30 ragge bus_dma_segment_t seg;
191 1.6 ragge
192 1.23 christos printf("\n");
193 1.1 ragge
194 1.17 ragge uh->uh_lastiv -= 4; /* remove dynamic interrupt vector */
195 1.1 ragge
196 1.32 matt uba_intr_establish(ua->ua_icookie, ua->ua_cvec, intr, sc);
197 1.34 ragge uba_reset_establish(reset, &sc->sc_dev);
198 1.32 matt
199 1.30 ragge sc->sc_iot = ua->ua_iot;
200 1.30 ragge sc->sc_iph = ua->ua_ioh;
201 1.30 ragge sc->sc_sah = ua->ua_ioh + 2;
202 1.30 ragge sc->sc_dmat = ua->ua_dmat;
203 1.17 ragge ctlr = sc->sc_dev.dv_unit;
204 1.31 thorpej BUFQ_INIT(&sc->sc_bufq);
205 1.1 ragge
206 1.1 ragge /*
207 1.17 ragge * Fill in the uba_unit struct, so we can communicate with the uba.
208 1.1 ragge */
209 1.17 ragge sc->sc_unit.uu_softc = sc; /* Backpointer to softc */
210 1.20 ragge sc->sc_unit.uu_ready = udaready;/* go routine called from adapter */
211 1.19 ragge sc->sc_unit.uu_keepbdp = vax_cputype == VAX_750 ? 1 : 0;
212 1.1 ragge
213 1.18 ragge /*
214 1.18 ragge * Map the communication area and command and
215 1.18 ragge * response packets into Unibus space.
216 1.18 ragge */
217 1.30 ragge if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct mscp_pack),
218 1.30 ragge NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
219 1.30 ragge printf("Alloc ctrl area %d\n", error);
220 1.30 ragge return;
221 1.30 ragge }
222 1.30 ragge if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
223 1.30 ragge sizeof(struct mscp_pack), (caddr_t *) &sc->sc_uda,
224 1.30 ragge BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
225 1.30 ragge printf("Map ctrl area %d\n", error);
226 1.30 ragge err: bus_dmamem_free(sc->sc_dmat, &seg, rseg);
227 1.18 ragge return;
228 1.1 ragge }
229 1.30 ragge if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct mscp_pack),
230 1.30 ragge 1, sizeof(struct mscp_pack), 0, BUS_DMA_NOWAIT, &sc->sc_cmap))) {
231 1.30 ragge printf("Create DMA map %d\n", error);
232 1.30 ragge err2: bus_dmamem_unmap(sc->sc_dmat, (caddr_t)&sc->sc_uda,
233 1.30 ragge sizeof(struct mscp_pack));
234 1.30 ragge goto err;
235 1.30 ragge }
236 1.30 ragge if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmap,
237 1.30 ragge &sc->sc_uda, sizeof(struct mscp_pack), 0, BUS_DMA_NOWAIT))) {
238 1.30 ragge printf("Load ctrl map %d\n", error);
239 1.30 ragge bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmap);
240 1.30 ragge goto err2;
241 1.30 ragge }
242 1.18 ragge
243 1.17 ragge bzero(&sc->sc_uda, sizeof (struct mscp_pack));
244 1.1 ragge
245 1.20 ragge /*
246 1.20 ragge * The only thing that differ UDA's and Tape ctlr's is
247 1.20 ragge * their vcid. Beacuse there are no way to determine which
248 1.20 ragge * ctlr type it is, we check what is generated and later
249 1.20 ragge * set the correct vcid.
250 1.20 ragge */
251 1.20 ragge ma.ma_type = (strcmp(self->dv_cfdata->cf_driver->cd_name,
252 1.20 ragge mtc_cd.cd_name) ? MSCPBUS_DISK : MSCPBUS_TAPE);
253 1.20 ragge
254 1.17 ragge ma.ma_mc = &uda_mscp_ctlr;
255 1.20 ragge ma.ma_type |= MSCPBUS_UDA;
256 1.17 ragge ma.ma_uda = &sc->sc_uda;
257 1.20 ragge ma.ma_softc = &sc->sc_softc;
258 1.30 ragge ma.ma_iot = sc->sc_iot;
259 1.30 ragge ma.ma_iph = sc->sc_iph;
260 1.30 ragge ma.ma_sah = sc->sc_sah;
261 1.30 ragge ma.ma_swh = sc->sc_sah;
262 1.30 ragge ma.ma_dmat = sc->sc_dmat;
263 1.30 ragge ma.ma_dmam = sc->sc_cmap;
264 1.17 ragge ma.ma_ivec = ivec_no;
265 1.25 ragge ma.ma_ctlrnr = (ua->ua_iaddr == 0172150 ? 0 : 1); /* XXX */
266 1.18 ragge ma.ma_adapnr = uh->uh_nr;
267 1.17 ragge config_found(&sc->sc_dev, &ma, udaprint);
268 1.17 ragge }
269 1.1 ragge
270 1.20 ragge /*
271 1.20 ragge * Start a transfer if there are free resources available, otherwise
272 1.20 ragge * let it go in udaready, forget it for now.
273 1.30 ragge * Called from mscp routines.
274 1.20 ragge */
275 1.30 ragge void
276 1.30 ragge udago(usc, mxi)
277 1.17 ragge struct device *usc;
278 1.30 ragge struct mscp_xi *mxi;
279 1.17 ragge {
280 1.17 ragge struct uda_softc *sc = (void *)usc;
281 1.30 ragge struct uba_unit *uu;
282 1.30 ragge struct buf *bp = mxi->mxi_bp;
283 1.30 ragge int err;
284 1.1 ragge
285 1.20 ragge /*
286 1.30 ragge * If we already have transfers queued, don't try to load
287 1.30 ragge * the map again.
288 1.20 ragge */
289 1.30 ragge if (sc->sc_inq == 0) {
290 1.30 ragge err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam,
291 1.30 ragge bp->b_un.b_addr,
292 1.30 ragge bp->b_bcount, bp->b_proc, BUS_DMA_NOWAIT);
293 1.30 ragge if (err == 0) {
294 1.30 ragge mscp_dgo(sc->sc_softc, mxi);
295 1.30 ragge return;
296 1.30 ragge }
297 1.20 ragge }
298 1.30 ragge uu = malloc(sizeof(struct uba_unit), M_DEVBUF, M_NOWAIT);
299 1.30 ragge if (uu == 0)
300 1.30 ragge panic("udago: no mem");
301 1.30 ragge uu->uu_ready = udaready;
302 1.30 ragge uu->uu_softc = sc;
303 1.30 ragge uu->uu_ref = mxi;
304 1.30 ragge uba_enqueue(uu);
305 1.30 ragge sc->sc_inq++;
306 1.1 ragge }
307 1.1 ragge
308 1.1 ragge /*
309 1.20 ragge * Called if we have been blocked for resources, and resources
310 1.20 ragge * have been freed again. Return 1 if we could start all
311 1.20 ragge * transfers again, 0 if we still are waiting.
312 1.30 ragge * Called from uba resource free routines.
313 1.1 ragge */
314 1.20 ragge int
315 1.20 ragge udaready(uu)
316 1.20 ragge struct uba_unit *uu;
317 1.1 ragge {
318 1.17 ragge struct uda_softc *sc = uu->uu_softc;
319 1.30 ragge struct mscp_xi *mxi = uu->uu_ref;
320 1.30 ragge struct buf *bp = mxi->mxi_bp;
321 1.30 ragge int err;
322 1.30 ragge
323 1.30 ragge err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, bp->b_un.b_addr,
324 1.30 ragge bp->b_bcount, bp->b_proc, BUS_DMA_NOWAIT);
325 1.30 ragge if (err)
326 1.30 ragge return 0;
327 1.30 ragge mscp_dgo(sc->sc_softc, mxi);
328 1.30 ragge sc->sc_inq--;
329 1.30 ragge free(uu, M_DEVBUF);
330 1.20 ragge return 1;
331 1.17 ragge }
332 1.17 ragge
333 1.17 ragge static struct saerr {
334 1.17 ragge int code; /* error code (including UDA_ERR) */
335 1.17 ragge char *desc; /* what it means: Efoo => foo error */
336 1.17 ragge } saerr[] = {
337 1.17 ragge { 0100001, "Eunibus packet read" },
338 1.17 ragge { 0100002, "Eunibus packet write" },
339 1.17 ragge { 0100003, "EUDA ROM and RAM parity" },
340 1.17 ragge { 0100004, "EUDA RAM parity" },
341 1.17 ragge { 0100005, "EUDA ROM parity" },
342 1.17 ragge { 0100006, "Eunibus ring read" },
343 1.17 ragge { 0100007, "Eunibus ring write" },
344 1.17 ragge { 0100010, " unibus interrupt master failure" },
345 1.17 ragge { 0100011, "Ehost access timeout" },
346 1.17 ragge { 0100012, " host exceeded command limit" },
347 1.17 ragge { 0100013, " unibus bus master failure" },
348 1.17 ragge { 0100014, " DM XFC fatal error" },
349 1.17 ragge { 0100015, " hardware timeout of instruction loop" },
350 1.17 ragge { 0100016, " invalid virtual circuit id" },
351 1.17 ragge { 0100017, "Eunibus interrupt write" },
352 1.17 ragge { 0104000, "Efatal sequence" },
353 1.17 ragge { 0104040, " D proc ALU" },
354 1.17 ragge { 0104041, "ED proc control ROM parity" },
355 1.17 ragge { 0105102, "ED proc w/no BD#2 or RAM parity" },
356 1.17 ragge { 0105105, "ED proc RAM buffer" },
357 1.17 ragge { 0105152, "ED proc SDI" },
358 1.17 ragge { 0105153, "ED proc write mode wrap serdes" },
359 1.17 ragge { 0105154, "ED proc read mode serdes, RSGEN & ECC" },
360 1.17 ragge { 0106040, "EU proc ALU" },
361 1.17 ragge { 0106041, "EU proc control reg" },
362 1.17 ragge { 0106042, " U proc DFAIL/cntl ROM parity/BD #1 test CNT" },
363 1.17 ragge { 0106047, " U proc const PROM err w/D proc running SDI test" },
364 1.17 ragge { 0106055, " unexpected trap" },
365 1.17 ragge { 0106071, "EU proc const PROM" },
366 1.17 ragge { 0106072, "EU proc control ROM parity" },
367 1.17 ragge { 0106200, "Estep 1 data" },
368 1.17 ragge { 0107103, "EU proc RAM parity" },
369 1.17 ragge { 0107107, "EU proc RAM buffer" },
370 1.17 ragge { 0107115, " test count wrong (BD 12)" },
371 1.17 ragge { 0112300, "Estep 2" },
372 1.17 ragge { 0122240, "ENPR" },
373 1.17 ragge { 0122300, "Estep 3" },
374 1.17 ragge { 0142300, "Estep 4" },
375 1.17 ragge { 0, " unknown error code" }
376 1.17 ragge };
377 1.6 ragge
378 1.17 ragge /*
379 1.17 ragge * If the error bit was set in the controller status register, gripe,
380 1.17 ragge * then (optionally) reset the controller and requeue pending transfers.
381 1.17 ragge */
382 1.17 ragge void
383 1.17 ragge udasaerror(usc, doreset)
384 1.17 ragge struct device *usc;
385 1.17 ragge int doreset;
386 1.17 ragge {
387 1.17 ragge struct uda_softc *sc = (void *)usc;
388 1.33 augustss int code = bus_space_read_2(sc->sc_iot, sc->sc_sah, 0);
389 1.33 augustss struct saerr *e;
390 1.1 ragge
391 1.17 ragge if ((code & MP_ERR) == 0)
392 1.1 ragge return;
393 1.17 ragge for (e = saerr; e->code; e++)
394 1.17 ragge if (e->code == code)
395 1.17 ragge break;
396 1.23 christos printf("%s: controller error, sa=0%o (%s%s)\n",
397 1.17 ragge sc->sc_dev.dv_xname, code, e->desc + 1,
398 1.17 ragge *e->desc == 'E' ? " error" : "");
399 1.24 ragge #if 0 /* XXX we just avoid panic when autoconfig non-existent KFQSA devices */
400 1.17 ragge if (doreset) {
401 1.17 ragge mscp_requeue(sc->sc_softc);
402 1.17 ragge /* (void) udainit(sc); XXX */
403 1.1 ragge }
404 1.24 ragge #endif
405 1.1 ragge }
406 1.1 ragge
407 1.1 ragge /*
408 1.17 ragge * Interrupt routine. Depending on the state of the controller,
409 1.17 ragge * continue initialisation, or acknowledge command and response
410 1.17 ragge * interrupts, and process responses.
411 1.1 ragge */
412 1.20 ragge static void
413 1.32 matt intr(arg)
414 1.32 matt void *arg;
415 1.1 ragge {
416 1.32 matt struct uda_softc *sc = arg;
417 1.32 matt struct uba_softc *uh;
418 1.17 ragge struct mscp_pack *ud;
419 1.1 ragge
420 1.17 ragge sc->sc_wticks = 0; /* reset interrupt watchdog */
421 1.1 ragge
422 1.30 ragge /* ctlr fatal error */
423 1.30 ragge if (bus_space_read_2(sc->sc_iot, sc->sc_sah, 0) & MP_ERR) {
424 1.17 ragge udasaerror(&sc->sc_dev, 1);
425 1.17 ragge return;
426 1.17 ragge }
427 1.17 ragge ud = &sc->sc_uda;
428 1.1 ragge /*
429 1.17 ragge * Handle buffer purge requests.
430 1.30 ragge * XXX - should be done in bus_dma_sync().
431 1.1 ragge */
432 1.17 ragge uh = (void *)sc->sc_dev.dv_parent;
433 1.17 ragge if (ud->mp_ca.ca_bdp) {
434 1.20 ragge if (uh->uh_ubapurge)
435 1.20 ragge (*uh->uh_ubapurge)(uh, ud->mp_ca.ca_bdp);
436 1.17 ragge ud->mp_ca.ca_bdp = 0;
437 1.30 ragge /* signal purge complete */
438 1.30 ragge bus_space_write_2(sc->sc_iot, sc->sc_sah, 0, 0);
439 1.1 ragge }
440 1.1 ragge
441 1.17 ragge mscp_intr(sc->sc_softc);
442 1.1 ragge }
443 1.1 ragge
444 1.1 ragge /*
445 1.17 ragge * A Unibus reset has occurred on UBA uban. Reinitialise the controller(s)
446 1.17 ragge * on that Unibus, and requeue outstanding I/O.
447 1.1 ragge */
448 1.20 ragge static void
449 1.34 ragge reset(struct device *dev)
450 1.20 ragge {
451 1.34 ragge struct uda_softc *sc = (void *)dev;
452 1.1 ragge /*
453 1.17 ragge * Our BDP (if any) is gone; our command (if any) is
454 1.17 ragge * flushed; the device is no longer mapped; and the
455 1.17 ragge * UDA50 is not yet initialised.
456 1.1 ragge */
457 1.17 ragge if (sc->sc_unit.uu_bdp) {
458 1.30 ragge /* printf("<%d>", UBAI_BDP(sc->sc_unit.uu_bdp)); */
459 1.17 ragge sc->sc_unit.uu_bdp = 0;
460 1.1 ragge }
461 1.1 ragge
462 1.17 ragge /* reset queues and requeue pending transfers */
463 1.17 ragge mscp_requeue(sc->sc_softc);
464 1.1 ragge
465 1.1 ragge /*
466 1.17 ragge * If it fails to initialise we will notice later and
467 1.17 ragge * try again (and again...). Do not call udastart()
468 1.17 ragge * here; it will be done after the controller finishes
469 1.17 ragge * initialisation.
470 1.1 ragge */
471 1.17 ragge /* XXX if (udainit(sc)) */
472 1.23 christos printf(" (hung)");
473 1.1 ragge }
474 1.1 ragge
475 1.17 ragge void
476 1.30 ragge udactlrdone(usc)
477 1.17 ragge struct device *usc;
478 1.1 ragge {
479 1.17 ragge struct uda_softc *sc = (void *)usc;
480 1.1 ragge
481 1.30 ragge uba_done((struct uba_softc *)sc->sc_dev.dv_parent);
482 1.1 ragge }
483