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uda.c revision 1.40
      1  1.40     ragge /*	$NetBSD: uda.c,v 1.40 2001/04/29 12:32:18 ragge Exp $	*/
      2   1.1     ragge /*
      3  1.17     ragge  * Copyright (c) 1996 Ludd, University of Lule}, Sweden.
      4   1.1     ragge  * Copyright (c) 1988 Regents of the University of California.
      5   1.1     ragge  * All rights reserved.
      6   1.1     ragge  *
      7   1.1     ragge  * This code is derived from software contributed to Berkeley by
      8   1.1     ragge  * Chris Torek.
      9   1.1     ragge  *
     10   1.1     ragge  * Redistribution and use in source and binary forms, with or without
     11   1.1     ragge  * modification, are permitted provided that the following conditions
     12   1.1     ragge  * are met:
     13   1.1     ragge  * 1. Redistributions of source code must retain the above copyright
     14   1.1     ragge  *    notice, this list of conditions and the following disclaimer.
     15   1.1     ragge  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1     ragge  *    notice, this list of conditions and the following disclaimer in the
     17   1.1     ragge  *    documentation and/or other materials provided with the distribution.
     18   1.1     ragge  * 3. All advertising materials mentioning features or use of this software
     19   1.1     ragge  *    must display the following acknowledgement:
     20   1.1     ragge  *	This product includes software developed by the University of
     21   1.1     ragge  *	California, Berkeley and its contributors.
     22   1.1     ragge  * 4. Neither the name of the University nor the names of its contributors
     23   1.1     ragge  *    may be used to endorse or promote products derived from this software
     24   1.1     ragge  *    without specific prior written permission.
     25   1.1     ragge  *
     26   1.1     ragge  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     27   1.1     ragge  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     28   1.1     ragge  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     29   1.1     ragge  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     30   1.1     ragge  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     31   1.1     ragge  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     32   1.1     ragge  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     33   1.1     ragge  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     34   1.1     ragge  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     35   1.1     ragge  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     36   1.1     ragge  * SUCH DAMAGE.
     37   1.1     ragge  *
     38   1.3       cgd  *	@(#)uda.c	7.32 (Berkeley) 2/13/91
     39   1.1     ragge  */
     40   1.1     ragge 
     41   1.1     ragge /*
     42  1.18     ragge  * UDA50 disk device driver
     43   1.1     ragge  */
     44   1.1     ragge 
     45  1.11   mycroft #include <sys/param.h>
     46  1.17     ragge #include <sys/kernel.h>
     47  1.20     ragge #include <sys/systm.h>
     48  1.30     ragge #include <sys/device.h>
     49  1.30     ragge #include <sys/buf.h>
     50  1.30     ragge #include <sys/malloc.h>
     51  1.11   mycroft 
     52  1.30     ragge #include <machine/bus.h>
     53  1.18     ragge #include <machine/sid.h>
     54   1.1     ragge 
     55  1.30     ragge #include <dev/qbus/ubavar.h>
     56  1.30     ragge 
     57  1.30     ragge #include <dev/mscp/mscp.h>
     58  1.30     ragge #include <dev/mscp/mscpreg.h>
     59  1.30     ragge #include <dev/mscp/mscpvar.h>
     60  1.30     ragge 
     61  1.30     ragge #include "ioconf.h"
     62   1.1     ragge 
     63   1.1     ragge /*
     64   1.1     ragge  * Software status, per controller.
     65   1.1     ragge  */
     66   1.1     ragge struct	uda_softc {
     67  1.17     ragge 	struct	device sc_dev;	/* Autoconfig info */
     68  1.36      matt 	struct	evcnt sc_intrcnt; /* Interrupt counting */
     69  1.17     ragge 	struct	uba_unit sc_unit; /* Struct common for UBA to communicate */
     70  1.40     ragge 	struct	ubinfo sc_ui;
     71  1.30     ragge 	bus_dma_tag_t		sc_dmat;
     72  1.30     ragge 	bus_space_tag_t		sc_iot;
     73  1.30     ragge 	bus_space_handle_t	sc_iph;
     74  1.30     ragge 	bus_space_handle_t	sc_sah;
     75  1.17     ragge 	struct	mscp_softc *sc_softc;	/* MSCP info (per mscpvar.h) */
     76  1.30     ragge 	int	sc_inq;
     77  1.17     ragge };
     78   1.1     ragge 
     79  1.40     ragge static	int udamatch(struct device *, struct cfdata *, void *);
     80  1.40     ragge static	void udaattach(struct device *, struct device *, void *);
     81  1.40     ragge static	void udareset(struct device *);
     82  1.40     ragge static	void udaintr(void *);
     83  1.40     ragge static	int udaready(struct uba_unit *);
     84  1.40     ragge static	void udactlrdone(struct device *);
     85  1.40     ragge static	int udaprint(void *, const char *);
     86  1.40     ragge static	void udasaerror(struct device *, int);
     87  1.40     ragge static	void udago(struct device *, struct mscp_xi *);
     88  1.20     ragge 
     89  1.20     ragge struct	cfattach mtc_ca = {
     90  1.20     ragge 	sizeof(struct uda_softc), udamatch, udaattach
     91  1.20     ragge };
     92  1.10     ragge 
     93  1.15     ragge struct	cfattach uda_ca = {
     94  1.17     ragge 	sizeof(struct uda_softc), udamatch, udaattach
     95  1.10     ragge };
     96  1.10     ragge 
     97   1.1     ragge /*
     98   1.1     ragge  * More driver definitions, for generic MSCP code.
     99   1.1     ragge  */
    100  1.17     ragge struct	mscp_ctlr uda_mscp_ctlr = {
    101  1.17     ragge 	udactlrdone,
    102  1.17     ragge 	udago,
    103  1.17     ragge 	udasaerror,
    104  1.17     ragge };
    105   1.1     ragge 
    106  1.17     ragge int
    107  1.40     ragge udaprint(void *aux, const char *name)
    108  1.17     ragge {
    109  1.17     ragge 	if (name)
    110  1.23  christos 		printf("%s: mscpbus", name);
    111  1.17     ragge 	return UNCONF;
    112  1.17     ragge }
    113   1.1     ragge 
    114   1.1     ragge /*
    115   1.1     ragge  * Poke at a supposed UDA50 to see if it is there.
    116   1.1     ragge  */
    117  1.10     ragge int
    118  1.40     ragge udamatch(struct device *parent, struct cfdata *cf, void *aux)
    119   1.1     ragge {
    120  1.17     ragge 	struct	uba_attach_args *ua = aux;
    121  1.18     ragge 	struct	mscp_softc mi;	/* Nice hack */
    122  1.17     ragge 	struct	uba_softc *ubasc;
    123  1.20     ragge 	int	tries;
    124   1.1     ragge 
    125  1.17     ragge 	/* Get an interrupt vector. */
    126  1.17     ragge 	ubasc = (void *)parent;
    127   1.1     ragge 
    128  1.30     ragge 	mi.mi_iot = ua->ua_iot;
    129  1.30     ragge 	mi.mi_iph = ua->ua_ioh;
    130  1.30     ragge 	mi.mi_sah = ua->ua_ioh + 2;
    131  1.30     ragge 	mi.mi_swh = ua->ua_ioh + 2;
    132   1.1     ragge 
    133   1.1     ragge 	/*
    134   1.1     ragge 	 * Initialise the controller (partially).  The UDA50 programmer's
    135   1.1     ragge 	 * manual states that if initialisation fails, it should be retried
    136   1.1     ragge 	 * at least once, but after a second failure the port should be
    137   1.1     ragge 	 * considered `down'; it also mentions that the controller should
    138   1.1     ragge 	 * initialise within ten seconds.  Or so I hear; I have not seen
    139   1.1     ragge 	 * this manual myself.
    140   1.1     ragge 	 */
    141   1.1     ragge 	tries = 0;
    142   1.1     ragge again:
    143   1.8     ragge 
    144  1.30     ragge 	bus_space_write_2(mi.mi_iot, mi.mi_iph, 0, 0); /* Start init */
    145  1.18     ragge 	if (mscp_waitstep(&mi, MP_STEP1, MP_STEP1) == 0)
    146  1.18     ragge 		return 0; /* Nothing here... */
    147   1.8     ragge 
    148  1.30     ragge 	bus_space_write_2(mi.mi_iot, mi.mi_sah, 0,
    149  1.40     ragge 	    MP_ERR | (NCMDL2 << 11) | (NRSPL2 << 8) | MP_IE |
    150  1.40     ragge 	    ((ubasc->uh_lastiv - 4) >> 2));
    151   1.8     ragge 
    152  1.18     ragge 	if (mscp_waitstep(&mi, MP_STEP2, MP_STEP2) == 0) {
    153  1.30     ragge 		printf("udaprobe: init step2 no change. sa=%x\n",
    154  1.30     ragge 		    bus_space_read_2(mi.mi_iot, mi.mi_sah, 0));
    155   1.8     ragge 		goto bad;
    156   1.8     ragge 	}
    157   1.8     ragge 
    158   1.1     ragge 	/* should have interrupted by now */
    159  1.17     ragge 	return 1;
    160   1.1     ragge bad:
    161   1.1     ragge 	if (++tries < 2)
    162   1.1     ragge 		goto again;
    163  1.17     ragge 	return 0;
    164   1.1     ragge }
    165   1.1     ragge 
    166  1.17     ragge void
    167  1.40     ragge udaattach(struct device *parent, struct device *self, void *aux)
    168   1.1     ragge {
    169  1.17     ragge 	struct	uda_softc *sc = (void *)self;
    170  1.19     ragge 	struct	uba_attach_args *ua = aux;
    171  1.17     ragge 	struct	uba_softc *uh = (void *)parent;
    172  1.17     ragge 	struct	mscp_attach_args ma;
    173  1.40     ragge 	int	error;
    174   1.6     ragge 
    175  1.23  christos 	printf("\n");
    176   1.1     ragge 
    177  1.17     ragge 	uh->uh_lastiv -= 4;	/* remove dynamic interrupt vector */
    178   1.1     ragge 
    179  1.36      matt 	uba_intr_establish(ua->ua_icookie, ua->ua_cvec,
    180  1.36      matt 		udaintr, sc, &sc->sc_intrcnt);
    181  1.36      matt 	uba_reset_establish(udareset, &sc->sc_dev);
    182  1.37      matt 	evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
    183  1.37      matt 		sc->sc_dev.dv_xname, "intr");
    184  1.32      matt 
    185  1.30     ragge 	sc->sc_iot = ua->ua_iot;
    186  1.30     ragge 	sc->sc_iph = ua->ua_ioh;
    187  1.30     ragge 	sc->sc_sah = ua->ua_ioh + 2;
    188  1.30     ragge 	sc->sc_dmat = ua->ua_dmat;
    189   1.1     ragge 
    190   1.1     ragge 	/*
    191  1.17     ragge 	 * Fill in the uba_unit struct, so we can communicate with the uba.
    192   1.1     ragge 	 */
    193  1.17     ragge 	sc->sc_unit.uu_softc = sc;	/* Backpointer to softc */
    194  1.20     ragge 	sc->sc_unit.uu_ready = udaready;/* go routine called from adapter */
    195  1.19     ragge 	sc->sc_unit.uu_keepbdp = vax_cputype == VAX_750 ? 1 : 0;
    196   1.1     ragge 
    197  1.18     ragge 	/*
    198  1.18     ragge 	 * Map the communication area and command and
    199  1.18     ragge 	 * response packets into Unibus space.
    200  1.18     ragge 	 */
    201  1.40     ragge 	sc->sc_ui.ui_size = sizeof(struct mscp_pack);
    202  1.40     ragge 	if ((error = ubmemalloc((void *)parent, &sc->sc_ui, UBA_CANTWAIT)))
    203  1.40     ragge 		return printf("ubmemalloc failed: %d\n", error);
    204  1.18     ragge 
    205  1.40     ragge 	bzero(sc->sc_ui.ui_vaddr, sizeof (struct mscp_pack));
    206   1.1     ragge 
    207  1.20     ragge 	/*
    208  1.20     ragge 	 * The only thing that differ UDA's and Tape ctlr's is
    209  1.20     ragge 	 * their vcid. Beacuse there are no way to determine which
    210  1.20     ragge 	 * ctlr type it is, we check what is generated and later
    211  1.20     ragge 	 * set the correct vcid.
    212  1.20     ragge 	 */
    213  1.38     ragge 	ma.ma_type = (strcmp(self->dv_cfdata->cf_driver->cd_name, "mtc") ?
    214  1.38     ragge 	    MSCPBUS_DISK : MSCPBUS_TAPE);
    215  1.20     ragge 
    216  1.17     ragge 	ma.ma_mc = &uda_mscp_ctlr;
    217  1.20     ragge 	ma.ma_type |= MSCPBUS_UDA;
    218  1.40     ragge 	ma.ma_uda = (struct mscp_pack *)sc->sc_ui.ui_vaddr;
    219  1.20     ragge 	ma.ma_softc = &sc->sc_softc;
    220  1.30     ragge 	ma.ma_iot = sc->sc_iot;
    221  1.30     ragge 	ma.ma_iph = sc->sc_iph;
    222  1.30     ragge 	ma.ma_sah = sc->sc_sah;
    223  1.30     ragge 	ma.ma_swh = sc->sc_sah;
    224  1.30     ragge 	ma.ma_dmat = sc->sc_dmat;
    225  1.40     ragge 	ma.ma_dmam = sc->sc_ui.ui_dmam;
    226  1.40     ragge 	ma.ma_ivec = uh->uh_lastiv;
    227  1.25     ragge 	ma.ma_ctlrnr = (ua->ua_iaddr == 0172150 ? 0 : 1);	/* XXX */
    228  1.18     ragge 	ma.ma_adapnr = uh->uh_nr;
    229  1.17     ragge 	config_found(&sc->sc_dev, &ma, udaprint);
    230  1.17     ragge }
    231   1.1     ragge 
    232  1.20     ragge /*
    233  1.20     ragge  * Start a transfer if there are free resources available, otherwise
    234  1.20     ragge  * let it go in udaready, forget it for now.
    235  1.30     ragge  * Called from mscp routines.
    236  1.20     ragge  */
    237  1.30     ragge void
    238  1.40     ragge udago(struct device *usc, struct mscp_xi *mxi)
    239  1.17     ragge {
    240  1.17     ragge 	struct uda_softc *sc = (void *)usc;
    241  1.30     ragge 	struct uba_unit *uu;
    242  1.30     ragge 	struct buf *bp = mxi->mxi_bp;
    243  1.30     ragge 	int err;
    244   1.1     ragge 
    245  1.20     ragge 	/*
    246  1.30     ragge 	 * If we already have transfers queued, don't try to load
    247  1.30     ragge 	 * the map again.
    248  1.20     ragge 	 */
    249  1.30     ragge 	if (sc->sc_inq == 0) {
    250  1.30     ragge 		err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam,
    251  1.35   thorpej 		    bp->b_data,
    252  1.30     ragge 		    bp->b_bcount, bp->b_proc, BUS_DMA_NOWAIT);
    253  1.30     ragge 		if (err == 0) {
    254  1.30     ragge 			mscp_dgo(sc->sc_softc, mxi);
    255  1.30     ragge 			return;
    256  1.30     ragge 		}
    257  1.20     ragge 	}
    258  1.30     ragge 	uu = malloc(sizeof(struct uba_unit), M_DEVBUF, M_NOWAIT);
    259  1.30     ragge 	if (uu == 0)
    260  1.30     ragge 		panic("udago: no mem");
    261  1.30     ragge 	uu->uu_ready = udaready;
    262  1.30     ragge 	uu->uu_softc = sc;
    263  1.30     ragge 	uu->uu_ref = mxi;
    264  1.30     ragge 	uba_enqueue(uu);
    265  1.30     ragge 	sc->sc_inq++;
    266   1.1     ragge }
    267   1.1     ragge 
    268   1.1     ragge /*
    269  1.20     ragge  * Called if we have been blocked for resources, and resources
    270  1.20     ragge  * have been freed again. Return 1 if we could start all
    271  1.20     ragge  * transfers again, 0 if we still are waiting.
    272  1.30     ragge  * Called from uba resource free routines.
    273   1.1     ragge  */
    274  1.20     ragge int
    275  1.40     ragge udaready(struct uba_unit *uu)
    276   1.1     ragge {
    277  1.17     ragge 	struct uda_softc *sc = uu->uu_softc;
    278  1.30     ragge 	struct mscp_xi *mxi = uu->uu_ref;
    279  1.30     ragge 	struct buf *bp = mxi->mxi_bp;
    280  1.30     ragge 	int err;
    281  1.30     ragge 
    282  1.35   thorpej 	err = bus_dmamap_load(sc->sc_dmat, mxi->mxi_dmam, bp->b_data,
    283  1.30     ragge 	    bp->b_bcount, bp->b_proc, BUS_DMA_NOWAIT);
    284  1.30     ragge 	if (err)
    285  1.30     ragge 		return 0;
    286  1.30     ragge 	mscp_dgo(sc->sc_softc, mxi);
    287  1.30     ragge 	sc->sc_inq--;
    288  1.30     ragge 	free(uu, M_DEVBUF);
    289  1.20     ragge 	return 1;
    290  1.17     ragge }
    291  1.17     ragge 
    292  1.17     ragge static struct saerr {
    293  1.17     ragge 	int	code;		/* error code (including UDA_ERR) */
    294  1.17     ragge 	char	*desc;		/* what it means: Efoo => foo error */
    295  1.17     ragge } saerr[] = {
    296  1.17     ragge 	{ 0100001, "Eunibus packet read" },
    297  1.17     ragge 	{ 0100002, "Eunibus packet write" },
    298  1.17     ragge 	{ 0100003, "EUDA ROM and RAM parity" },
    299  1.17     ragge 	{ 0100004, "EUDA RAM parity" },
    300  1.17     ragge 	{ 0100005, "EUDA ROM parity" },
    301  1.17     ragge 	{ 0100006, "Eunibus ring read" },
    302  1.17     ragge 	{ 0100007, "Eunibus ring write" },
    303  1.17     ragge 	{ 0100010, " unibus interrupt master failure" },
    304  1.17     ragge 	{ 0100011, "Ehost access timeout" },
    305  1.17     ragge 	{ 0100012, " host exceeded command limit" },
    306  1.17     ragge 	{ 0100013, " unibus bus master failure" },
    307  1.17     ragge 	{ 0100014, " DM XFC fatal error" },
    308  1.17     ragge 	{ 0100015, " hardware timeout of instruction loop" },
    309  1.17     ragge 	{ 0100016, " invalid virtual circuit id" },
    310  1.17     ragge 	{ 0100017, "Eunibus interrupt write" },
    311  1.17     ragge 	{ 0104000, "Efatal sequence" },
    312  1.17     ragge 	{ 0104040, " D proc ALU" },
    313  1.17     ragge 	{ 0104041, "ED proc control ROM parity" },
    314  1.17     ragge 	{ 0105102, "ED proc w/no BD#2 or RAM parity" },
    315  1.17     ragge 	{ 0105105, "ED proc RAM buffer" },
    316  1.17     ragge 	{ 0105152, "ED proc SDI" },
    317  1.17     ragge 	{ 0105153, "ED proc write mode wrap serdes" },
    318  1.17     ragge 	{ 0105154, "ED proc read mode serdes, RSGEN & ECC" },
    319  1.17     ragge 	{ 0106040, "EU proc ALU" },
    320  1.17     ragge 	{ 0106041, "EU proc control reg" },
    321  1.17     ragge 	{ 0106042, " U proc DFAIL/cntl ROM parity/BD #1 test CNT" },
    322  1.17     ragge 	{ 0106047, " U proc const PROM err w/D proc running SDI test" },
    323  1.17     ragge 	{ 0106055, " unexpected trap" },
    324  1.17     ragge 	{ 0106071, "EU proc const PROM" },
    325  1.17     ragge 	{ 0106072, "EU proc control ROM parity" },
    326  1.17     ragge 	{ 0106200, "Estep 1 data" },
    327  1.17     ragge 	{ 0107103, "EU proc RAM parity" },
    328  1.17     ragge 	{ 0107107, "EU proc RAM buffer" },
    329  1.17     ragge 	{ 0107115, " test count wrong (BD 12)" },
    330  1.17     ragge 	{ 0112300, "Estep 2" },
    331  1.17     ragge 	{ 0122240, "ENPR" },
    332  1.17     ragge 	{ 0122300, "Estep 3" },
    333  1.17     ragge 	{ 0142300, "Estep 4" },
    334  1.17     ragge 	{ 0, " unknown error code" }
    335  1.17     ragge };
    336   1.6     ragge 
    337  1.17     ragge /*
    338  1.17     ragge  * If the error bit was set in the controller status register, gripe,
    339  1.17     ragge  * then (optionally) reset the controller and requeue pending transfers.
    340  1.17     ragge  */
    341  1.17     ragge void
    342  1.40     ragge udasaerror(struct device *usc, int doreset)
    343  1.17     ragge {
    344  1.17     ragge 	struct	uda_softc *sc = (void *)usc;
    345  1.33  augustss 	int code = bus_space_read_2(sc->sc_iot, sc->sc_sah, 0);
    346  1.33  augustss 	struct saerr *e;
    347   1.1     ragge 
    348  1.17     ragge 	if ((code & MP_ERR) == 0)
    349   1.1     ragge 		return;
    350  1.17     ragge 	for (e = saerr; e->code; e++)
    351  1.17     ragge 		if (e->code == code)
    352  1.17     ragge 			break;
    353  1.23  christos 	printf("%s: controller error, sa=0%o (%s%s)\n",
    354  1.17     ragge 		sc->sc_dev.dv_xname, code, e->desc + 1,
    355  1.17     ragge 		*e->desc == 'E' ? " error" : "");
    356  1.24     ragge #if 0 /* XXX we just avoid panic when autoconfig non-existent KFQSA devices */
    357  1.17     ragge 	if (doreset) {
    358  1.17     ragge 		mscp_requeue(sc->sc_softc);
    359  1.17     ragge /*		(void) udainit(sc);	XXX */
    360   1.1     ragge 	}
    361  1.24     ragge #endif
    362   1.1     ragge }
    363   1.1     ragge 
    364   1.1     ragge /*
    365  1.17     ragge  * Interrupt routine.  Depending on the state of the controller,
    366  1.17     ragge  * continue initialisation, or acknowledge command and response
    367  1.17     ragge  * interrupts, and process responses.
    368   1.1     ragge  */
    369  1.20     ragge static void
    370  1.40     ragge udaintr(void *arg)
    371   1.1     ragge {
    372  1.32      matt 	struct uda_softc *sc = arg;
    373  1.32      matt 	struct uba_softc *uh;
    374   1.1     ragge 
    375  1.30     ragge 	/* ctlr fatal error */
    376  1.30     ragge 	if (bus_space_read_2(sc->sc_iot, sc->sc_sah, 0) & MP_ERR) {
    377  1.17     ragge 		udasaerror(&sc->sc_dev, 1);
    378  1.17     ragge 		return;
    379  1.17     ragge 	}
    380   1.1     ragge 	/*
    381  1.17     ragge 	 * Handle buffer purge requests.
    382  1.30     ragge 	 * XXX - should be done in bus_dma_sync().
    383   1.1     ragge 	 */
    384  1.17     ragge 	uh = (void *)sc->sc_dev.dv_parent;
    385  1.40     ragge #ifdef notyet
    386  1.17     ragge 	if (ud->mp_ca.ca_bdp) {
    387  1.20     ragge 		if (uh->uh_ubapurge)
    388  1.20     ragge 			(*uh->uh_ubapurge)(uh, ud->mp_ca.ca_bdp);
    389  1.30     ragge 		/* signal purge complete */
    390  1.30     ragge 		bus_space_write_2(sc->sc_iot, sc->sc_sah, 0, 0);
    391   1.1     ragge 	}
    392  1.40     ragge #endif
    393   1.1     ragge 
    394  1.17     ragge 	mscp_intr(sc->sc_softc);
    395   1.1     ragge }
    396   1.1     ragge 
    397   1.1     ragge /*
    398  1.17     ragge  * A Unibus reset has occurred on UBA uban.  Reinitialise the controller(s)
    399  1.17     ragge  * on that Unibus, and requeue outstanding I/O.
    400   1.1     ragge  */
    401  1.20     ragge static void
    402  1.36      matt udareset(struct device *dev)
    403  1.20     ragge {
    404  1.34     ragge 	struct uda_softc *sc = (void *)dev;
    405   1.1     ragge 	/*
    406  1.17     ragge 	 * Our BDP (if any) is gone; our command (if any) is
    407  1.17     ragge 	 * flushed; the device is no longer mapped; and the
    408  1.17     ragge 	 * UDA50 is not yet initialised.
    409   1.1     ragge 	 */
    410  1.17     ragge 	if (sc->sc_unit.uu_bdp) {
    411  1.30     ragge 		/* printf("<%d>", UBAI_BDP(sc->sc_unit.uu_bdp)); */
    412  1.17     ragge 		sc->sc_unit.uu_bdp = 0;
    413   1.1     ragge 	}
    414   1.1     ragge 
    415  1.17     ragge 	/* reset queues and requeue pending transfers */
    416  1.17     ragge 	mscp_requeue(sc->sc_softc);
    417   1.1     ragge 
    418   1.1     ragge 	/*
    419  1.17     ragge 	 * If it fails to initialise we will notice later and
    420  1.17     ragge 	 * try again (and again...).  Do not call udastart()
    421  1.17     ragge 	 * here; it will be done after the controller finishes
    422  1.17     ragge 	 * initialisation.
    423   1.1     ragge 	 */
    424  1.17     ragge /* XXX	if (udainit(sc)) */
    425  1.23  christos 		printf(" (hung)");
    426   1.1     ragge }
    427   1.1     ragge 
    428  1.17     ragge void
    429  1.40     ragge udactlrdone(struct device *usc)
    430   1.1     ragge {
    431  1.17     ragge 	struct uda_softc *sc = (void *)usc;
    432  1.39   thorpej 	int s;
    433   1.1     ragge 
    434  1.39   thorpej 	s = spluba();
    435  1.30     ragge 	uba_done((struct uba_softc *)sc->sc_dev.dv_parent);
    436  1.39   thorpej 	splx(s);
    437   1.1     ragge }
    438