cgsix_sbus.c revision 1.31 1 1.31 macallan /* $NetBSD: cgsix_sbus.c,v 1.31 2022/03/09 17:53:39 macallan Exp $ */
2 1.1 pk
3 1.1 pk /*-
4 1.1 pk * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 pk * All rights reserved.
6 1.1 pk *
7 1.1 pk * This code is derived from software contributed to The NetBSD Foundation
8 1.1 pk * by Paul Kranenburg.
9 1.1 pk *
10 1.1 pk * Redistribution and use in source and binary forms, with or without
11 1.1 pk * modification, are permitted provided that the following conditions
12 1.1 pk * are met:
13 1.1 pk * 1. Redistributions of source code must retain the above copyright
14 1.1 pk * notice, this list of conditions and the following disclaimer.
15 1.1 pk * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 pk * notice, this list of conditions and the following disclaimer in the
17 1.1 pk * documentation and/or other materials provided with the distribution.
18 1.1 pk *
19 1.1 pk * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 pk * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 pk * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 pk * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 pk * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 pk * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 pk * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 pk * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 pk * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 pk * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 pk * POSSIBILITY OF SUCH DAMAGE.
30 1.1 pk */
31 1.1 pk
32 1.1 pk /*
33 1.1 pk * color display (cgsix) driver; Sbus bus front-end.
34 1.1 pk */
35 1.6 lukem
36 1.6 lukem #include <sys/cdefs.h>
37 1.31 macallan __KERNEL_RCSID(0, "$NetBSD: cgsix_sbus.c,v 1.31 2022/03/09 17:53:39 macallan Exp $");
38 1.1 pk
39 1.1 pk #include <sys/param.h>
40 1.1 pk #include <sys/systm.h>
41 1.1 pk #include <sys/buf.h>
42 1.1 pk #include <sys/device.h>
43 1.1 pk #include <sys/ioctl.h>
44 1.1 pk #include <sys/malloc.h>
45 1.1 pk #include <sys/mman.h>
46 1.1 pk #include <sys/tty.h>
47 1.1 pk #include <sys/conf.h>
48 1.1 pk
49 1.1 pk #ifdef DEBUG
50 1.1 pk #include <sys/proc.h>
51 1.1 pk #include <sys/syslog.h>
52 1.1 pk #endif
53 1.1 pk
54 1.22 ad #include <sys/bus.h>
55 1.1 pk #include <machine/autoconf.h>
56 1.1 pk
57 1.1 pk #include <dev/sbus/sbusvar.h>
58 1.1 pk
59 1.1 pk #include <dev/sun/fbio.h>
60 1.1 pk #include <dev/sun/fbvar.h>
61 1.1 pk #include <dev/sun/btreg.h>
62 1.1 pk #include <dev/sun/btvar.h>
63 1.1 pk #include <dev/sun/cgsixreg.h>
64 1.1 pk #include <dev/sun/cgsixvar.h>
65 1.1 pk
66 1.1 pk /* autoconfiguration driver */
67 1.28 cegger static int cgsixmatch(device_t, cfdata_t, void *);
68 1.25 macallan static void cgsixattach(device_t, device_t, void *);
69 1.1 pk
70 1.30 tsutsui CFATTACH_DECL_NEW(cgsix_sbus, sizeof(struct cgsix_softc),
71 1.12 thorpej cgsixmatch, cgsixattach, NULL, NULL);
72 1.1 pk
73 1.1 pk /*
74 1.1 pk * Match a cgsix.
75 1.1 pk */
76 1.1 pk int
77 1.28 cegger cgsixmatch(device_t parent, cfdata_t cf, void *aux)
78 1.1 pk {
79 1.1 pk struct sbus_attach_args *sa = aux;
80 1.1 pk
81 1.21 macallan return (strcmp(cf->cf_name, sa->sa_name) == 0) ? 100 : 0;
82 1.1 pk }
83 1.1 pk
84 1.1 pk
85 1.1 pk /*
86 1.1 pk * Attach a cgsix.
87 1.1 pk */
88 1.1 pk void
89 1.27 dsl cgsixattach(device_t parent, device_t self, void *aux)
90 1.1 pk {
91 1.30 tsutsui struct cgsix_softc *sc = device_private(self);
92 1.1 pk struct sbus_attach_args *sa = aux;
93 1.1 pk struct fbdevice *fb = &sc->sc_fb;
94 1.16 macallan int node, isconsole;
95 1.17 tsutsui const char *name;
96 1.1 pk bus_space_handle_t bh;
97 1.1 pk
98 1.1 pk /* Remember cookies for cgsix_mmap() */
99 1.1 pk sc->sc_bustag = sa->sa_bustag;
100 1.4 eeh sc->sc_paddr = sbus_bus_addr(sa->sa_bustag, sa->sa_slot, sa->sa_offset);
101 1.25 macallan sc->sc_dev = self;
102 1.1 pk
103 1.1 pk node = sa->sa_node;
104 1.16 macallan
105 1.25 macallan fb->fb_device = sc->sc_dev;
106 1.1 pk fb->fb_type.fb_type = FBTYPE_SUNFAST_COLOR;
107 1.25 macallan fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK;
108 1.1 pk fb->fb_type.fb_depth = 8;
109 1.1 pk
110 1.1 pk fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node);
111 1.1 pk
112 1.1 pk /*
113 1.1 pk * Dunno what the PROM has mapped, though obviously it must have
114 1.1 pk * the video RAM mapped. Just map what we care about for ourselves
115 1.1 pk * (the FHC, THC, and Brooktree registers).
116 1.1 pk */
117 1.7 pk if (sbus_bus_map(sa->sa_bustag,
118 1.7 pk sa->sa_slot,
119 1.1 pk sa->sa_offset + CGSIX_BT_OFFSET,
120 1.1 pk sizeof(*sc->sc_bt),
121 1.7 pk BUS_SPACE_MAP_LINEAR, &bh) != 0) {
122 1.23 cegger aprint_error_dev(self, "cannot map brooktree registers\n");
123 1.1 pk return;
124 1.1 pk }
125 1.8 eeh sc->sc_bt = (struct bt_regs *)bus_space_vaddr(sa->sa_bustag, bh);
126 1.1 pk
127 1.7 pk if (sbus_bus_map(sa->sa_bustag,
128 1.7 pk sa->sa_slot,
129 1.1 pk sa->sa_offset + CGSIX_FHC_OFFSET,
130 1.1 pk sizeof(*sc->sc_fhc),
131 1.7 pk BUS_SPACE_MAP_LINEAR, &bh) != 0) {
132 1.23 cegger aprint_error_dev(self, "cannot map FHC registers\n");
133 1.1 pk return;
134 1.1 pk }
135 1.8 eeh sc->sc_fhc = (int *)bus_space_vaddr(sa->sa_bustag, bh);
136 1.1 pk
137 1.7 pk if (sbus_bus_map(sa->sa_bustag,
138 1.7 pk sa->sa_slot,
139 1.1 pk sa->sa_offset + CGSIX_THC_OFFSET,
140 1.1 pk sizeof(*sc->sc_thc),
141 1.7 pk BUS_SPACE_MAP_LINEAR, &bh) != 0) {
142 1.23 cegger aprint_error_dev(self, "cannot map THC registers\n");
143 1.1 pk return;
144 1.1 pk }
145 1.8 eeh sc->sc_thc = (struct cg6_thc *)bus_space_vaddr(sa->sa_bustag, bh);
146 1.1 pk
147 1.7 pk if (sbus_bus_map(sa->sa_bustag,
148 1.7 pk sa->sa_slot,
149 1.1 pk sa->sa_offset + CGSIX_TEC_OFFSET,
150 1.1 pk sizeof(*sc->sc_tec),
151 1.7 pk BUS_SPACE_MAP_LINEAR, &bh) != 0) {
152 1.23 cegger aprint_error_dev(self, "cannot map TEC registers\n");
153 1.1 pk return;
154 1.1 pk }
155 1.8 eeh sc->sc_tec = (struct cg6_tec_xxx *)bus_space_vaddr(sa->sa_bustag, bh);
156 1.1 pk
157 1.7 pk if (sbus_bus_map(sa->sa_bustag,
158 1.7 pk sa->sa_slot,
159 1.1 pk sa->sa_offset + CGSIX_FBC_OFFSET,
160 1.1 pk sizeof(*sc->sc_fbc),
161 1.7 pk BUS_SPACE_MAP_LINEAR, &bh) != 0) {
162 1.23 cegger aprint_error_dev(self, "cannot map FBC registers\n");
163 1.1 pk return;
164 1.1 pk }
165 1.8 eeh sc->sc_fbc = (struct cg6_fbc *)bus_space_vaddr(sa->sa_bustag, bh);
166 1.1 pk
167 1.13 pk name = prom_getpropstring(node, "model");
168 1.1 pk
169 1.1 pk isconsole = fb_is_console(node);
170 1.16 macallan
171 1.21 macallan /*
172 1.21 macallan * we need the address of the framebuffer, no matter if we're console or
173 1.21 macallan * not.
174 1.21 macallan */
175 1.31 macallan sc->sc_ramsize = prom_getpropint(node, "vmsize", 1) * 1024 * 1024;
176 1.16 macallan if (sbus_bus_map(sa->sa_bustag,
177 1.16 macallan sa->sa_slot,
178 1.16 macallan sa->sa_offset + CGSIX_RAM_OFFSET,
179 1.16 macallan sc->sc_ramsize,
180 1.29 macallan BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE,
181 1.29 macallan &bh) != 0) {
182 1.23 cegger aprint_error_dev(self, "cannot map pixels\n");
183 1.16 macallan return;
184 1.16 macallan }
185 1.20 christos sc->sc_fb.fb_pixels = (void *)bus_space_vaddr(sa->sa_bustag, bh);
186 1.1 pk
187 1.1 pk cg6attach(sc, name, isconsole);
188 1.1 pk }
189