dbri.c revision 1.1 1 1.1 macallan /* $NetBSD: dbri.c,v 1.1 2005/07/16 18:58:50 macallan Exp $ */
2 1.1 macallan
3 1.1 macallan /*
4 1.1 macallan * Copyright (c) 2001, 2002 Jared D. McNeill <jmcneill (at) invisible.yi.org>
5 1.1 macallan * Copyright (c) 2005 Michael Lorenz <macallan (at) netbsd.org>
6 1.1 macallan * All rights reserved.
7 1.1 macallan *
8 1.1 macallan * Redistribution and use in source and binary forms, with or without
9 1.1 macallan * modification, are permitted provided that the following conditions
10 1.1 macallan * are met:
11 1.1 macallan * 1. Redistributions of source code must retain the above copyright
12 1.1 macallan * notice, this list of conditions and the following disclaimer.
13 1.1 macallan * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 macallan * notice, this list of conditions and the following disclaimer in the
15 1.1 macallan * documentation and/or other materials provided with the distribution.
16 1.1 macallan * 3. All advertising materials mentioning features or use of this software
17 1.1 macallan * must display the following acknowledgement:
18 1.1 macallan * This product includes software developed by Jared D. McNeill.
19 1.1 macallan * 4. Neither the name of the author nor the names of any contributors may
20 1.1 macallan * be used to endorse or promote products derived from this software
21 1.1 macallan * without specific prior written permission.
22 1.1 macallan *
23 1.1 macallan * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 1.1 macallan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 1.1 macallan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 1.1 macallan * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 1.1 macallan * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.1 macallan * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.1 macallan * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.1 macallan * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.1 macallan * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.1 macallan * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.1 macallan * SUCH DAMAGE.
34 1.1 macallan *
35 1.1 macallan */
36 1.1 macallan
37 1.1 macallan #include <sys/cdefs.h>
38 1.1 macallan __KERNEL_RCSID(0, "$NetBSD: dbri.c,v 1.1 2005/07/16 18:58:50 macallan Exp $");
39 1.1 macallan
40 1.1 macallan #include "audio.h"
41 1.1 macallan #if NAUDIO > 0
42 1.1 macallan
43 1.1 macallan #include <sys/param.h>
44 1.1 macallan #include <sys/systm.h>
45 1.1 macallan #include <sys/errno.h>
46 1.1 macallan #include <sys/device.h>
47 1.1 macallan #include <sys/malloc.h>
48 1.1 macallan #include <sys/proc.h>
49 1.1 macallan
50 1.1 macallan #include <machine/bus.h>
51 1.1 macallan #include <machine/intr.h>
52 1.1 macallan
53 1.1 macallan #include <dev/sbus/sbusvar.h>
54 1.1 macallan #include <sparc/sparc/auxreg.h>
55 1.1 macallan #include <machine/autoconf.h>
56 1.1 macallan
57 1.1 macallan #include <sys/audioio.h>
58 1.1 macallan #include <dev/audio_if.h>
59 1.1 macallan #include <dev/auconv.h>
60 1.1 macallan
61 1.1 macallan #include <dev/ic/cs4215reg.h>
62 1.1 macallan #include <dev/ic/cs4215var.h>
63 1.1 macallan #include <dev/sbus/dbrireg.h>
64 1.1 macallan #include <dev/sbus/dbrivar.h>
65 1.1 macallan
66 1.1 macallan #define DBRI_ROM_NAME_PREFIX "SUNW,DBRI"
67 1.1 macallan
68 1.1 macallan #define DBRI_BIG_BUFFER
69 1.1 macallan
70 1.1 macallan static const char *dbri_supported[] = {
71 1.1 macallan "e",
72 1.1 macallan "s3",
73 1.1 macallan ""
74 1.1 macallan };
75 1.1 macallan
76 1.1 macallan enum ms {
77 1.1 macallan CHImaster,
78 1.1 macallan CHIslave
79 1.1 macallan };
80 1.1 macallan
81 1.1 macallan enum io {
82 1.1 macallan PIPEinput,
83 1.1 macallan PIPEoutput
84 1.1 macallan };
85 1.1 macallan
86 1.1 macallan /*
87 1.1 macallan * Function prototypes
88 1.1 macallan */
89 1.1 macallan
90 1.1 macallan /* softc stuff */
91 1.1 macallan static void dbri_attach_sbus(struct device *, struct device *, void *);
92 1.1 macallan static int dbri_match_sbus(struct device *, struct cfdata *, void *);
93 1.1 macallan
94 1.1 macallan static void dbri_config_interrupts(struct device *);
95 1.1 macallan
96 1.1 macallan /* interrupt handler */
97 1.1 macallan static int dbri_intr(void *);
98 1.1 macallan
99 1.1 macallan /* supporting subroutines */
100 1.1 macallan static int dbri_init(struct dbri_softc *);
101 1.1 macallan static int dbri_reset(struct dbri_softc *);
102 1.1 macallan static volatile u_int32_t *dbri_command_lock(struct dbri_softc *);
103 1.1 macallan static void dbri_command_send(struct dbri_softc *, volatile u_int32_t *);
104 1.1 macallan static void dbri_process_interrupt_buffer(struct dbri_softc *);
105 1.1 macallan static void dbri_process_interrupt(struct dbri_softc *, int32_t);
106 1.1 macallan
107 1.1 macallan /* mmcodec subroutines */
108 1.1 macallan static int mmcodec_init(struct dbri_softc *);
109 1.1 macallan static void mmcodec_init_data(struct dbri_softc *);
110 1.1 macallan static void mmcodec_pipe_init(struct dbri_softc *);
111 1.1 macallan static void mmcodec_default(struct dbri_softc *);
112 1.1 macallan static void mmcodec_setgain(struct dbri_softc *, int);
113 1.1 macallan static int mmcodec_setcontrol(struct dbri_softc *);
114 1.1 macallan
115 1.1 macallan /* chi subroutines */
116 1.1 macallan static void chi_reset(struct dbri_softc *, enum ms, int);
117 1.1 macallan
118 1.1 macallan /* pipe subroutines */
119 1.1 macallan static void pipe_setup(struct dbri_softc *, int, int);
120 1.1 macallan static void pipe_reset(struct dbri_softc *, int);
121 1.1 macallan static void pipe_receive_fixed(struct dbri_softc *, int,
122 1.1 macallan volatile u_int32_t *);
123 1.1 macallan static void pipe_transmit_fixed(struct dbri_softc *, int, u_int32_t);
124 1.1 macallan
125 1.1 macallan static void pipe_ts_link(struct dbri_softc *, int, enum io, int, int, int);
126 1.1 macallan static int pipe_active(struct dbri_softc *, int);
127 1.1 macallan
128 1.1 macallan /* audio(9) stuff */
129 1.1 macallan static int dbri_query_encoding(void *, struct audio_encoding *);
130 1.1 macallan static int dbri_set_params(void *, int, int, struct audio_params *,
131 1.1 macallan struct audio_params *,stream_filter_list_t *, stream_filter_list_t *);
132 1.1 macallan static int dbri_round_blocksize(void *, int, int, const audio_params_t *);
133 1.1 macallan static int dbri_halt_output(void *);
134 1.1 macallan static int dbri_getdev(void *, struct audio_device *);
135 1.1 macallan static int dbri_set_port(void *, mixer_ctrl_t *);
136 1.1 macallan static int dbri_get_port(void *, mixer_ctrl_t *);
137 1.1 macallan static int dbri_query_devinfo(void *, mixer_devinfo_t *);
138 1.1 macallan static size_t dbri_round_buffersize(void *, int, size_t);
139 1.1 macallan static int dbri_get_props(void *);
140 1.1 macallan
141 1.1 macallan static void
142 1.1 macallan setup_ring(struct dbri_softc *, int, int, int, int, void (*)(void *), void *);
143 1.1 macallan
144 1.1 macallan static int dbri_trigger_output(void *, void *, void *, int,
145 1.1 macallan void (*)(void *), void *, const struct audio_params *);
146 1.1 macallan
147 1.1 macallan static void *dbri_malloc(void *, int, size_t, struct malloc_type *, int);
148 1.1 macallan static void dbri_free(void *, void *, struct malloc_type *);
149 1.1 macallan static paddr_t dbri_mappage(void *, void *, off_t, int);
150 1.1 macallan
151 1.1 macallan /* stupid support routines */
152 1.1 macallan static u_int32_t reverse_bytes(u_int32_t, int);
153 1.1 macallan
154 1.1 macallan struct audio_device dbri_device = {
155 1.1 macallan "CS4215",
156 1.1 macallan "",
157 1.1 macallan "dbri"
158 1.1 macallan };
159 1.1 macallan
160 1.1 macallan struct audio_hw_if dbri_hw_if = {
161 1.1 macallan NULL, /*dbri_open,*/
162 1.1 macallan NULL, /*dbri_close,*/
163 1.1 macallan NULL, /* drain */
164 1.1 macallan dbri_query_encoding,
165 1.1 macallan dbri_set_params,
166 1.1 macallan dbri_round_blocksize,
167 1.1 macallan NULL, /* commit_settings */
168 1.1 macallan NULL, /* init_output */
169 1.1 macallan NULL, /* init_input */
170 1.1 macallan NULL, /* start_output */
171 1.1 macallan NULL, /* start_input */
172 1.1 macallan dbri_halt_output,
173 1.1 macallan NULL, /* halt_input */
174 1.1 macallan NULL, /* speaker_ctl */
175 1.1 macallan dbri_getdev,
176 1.1 macallan NULL, /* setfd */
177 1.1 macallan dbri_set_port,
178 1.1 macallan dbri_get_port,
179 1.1 macallan dbri_query_devinfo,
180 1.1 macallan dbri_malloc,
181 1.1 macallan dbri_free,
182 1.1 macallan dbri_round_buffersize,
183 1.1 macallan dbri_mappage,
184 1.1 macallan dbri_get_props,
185 1.1 macallan dbri_trigger_output,
186 1.1 macallan NULL /* trigger_input */
187 1.1 macallan };
188 1.1 macallan
189 1.1 macallan CFATTACH_DECL(dbri, sizeof(struct dbri_softc),
190 1.1 macallan dbri_match_sbus, dbri_attach_sbus, NULL, NULL);
191 1.1 macallan
192 1.1 macallan enum {
193 1.1 macallan DBRI_MONITOR_CLASS,
194 1.1 macallan DBRI_VOL_OUTPUT,
195 1.1 macallan DBRI_ENABLE_MONO,
196 1.1 macallan DBRI_ENABLE_HEADPHONE,
197 1.1 macallan DBRI_ENABLE_LINE
198 1.1 macallan /*
199 1.1 macallan DBRI_INPUT_CLASS,
200 1.1 macallan DBRI_RECORD_CLASS,
201 1.1 macallan DBRI_INPUT_GAIN,
202 1.1 macallan DBRI_INPUT_SELECT,
203 1.1 macallan DBRI_ENUM_LAST
204 1.1 macallan */
205 1.1 macallan };
206 1.1 macallan
207 1.1 macallan /*
208 1.1 macallan * Autoconfig routines
209 1.1 macallan */
210 1.1 macallan int
211 1.1 macallan dbri_match_sbus(struct device *parent, struct cfdata *match, void *aux)
212 1.1 macallan {
213 1.1 macallan struct sbus_attach_args *sa = aux;
214 1.1 macallan char *ver;
215 1.1 macallan int i;
216 1.1 macallan
217 1.1 macallan if (strncmp(DBRI_ROM_NAME_PREFIX, sa->sa_name, 9))
218 1.1 macallan return (0);
219 1.1 macallan
220 1.1 macallan ver = &sa->sa_name[9];
221 1.1 macallan
222 1.1 macallan for (i = 0; dbri_supported[i][0] != '\0'; i++)
223 1.1 macallan if (strcmp(dbri_supported[i], ver) == 0)
224 1.1 macallan return (1);
225 1.1 macallan
226 1.1 macallan return (0);
227 1.1 macallan }
228 1.1 macallan
229 1.1 macallan void
230 1.1 macallan dbri_attach_sbus(struct device *parent, struct device *self, void *aux)
231 1.1 macallan {
232 1.1 macallan struct dbri_softc *sc = (struct dbri_softc *)self;
233 1.1 macallan struct sbus_attach_args *sa = aux;
234 1.1 macallan bus_space_handle_t ioh;
235 1.1 macallan bus_size_t size;
236 1.1 macallan int error, rseg, pwr;
237 1.1 macallan char *ver = &sa->sa_name[9];
238 1.1 macallan
239 1.1 macallan sc->sc_iot = sa->sa_bustag;
240 1.1 macallan sc->sc_dmat = sa->sa_dmatag;
241 1.1 macallan
242 1.1 macallan pwr=prom_getpropint(sa->sa_node,"pwr-on-auxio",0);
243 1.1 macallan if(pwr) {
244 1.1 macallan /* we need to power up the device first */
245 1.1 macallan uint8_t auxregval = 0;
246 1.1 macallan printf("\n%s: waiting to power up... ",self->dv_xname);
247 1.1 macallan auxregval = *AUXIO4M_REG;
248 1.1 macallan *AUXIO4M_REG = auxregval | (AUXIO4M_LED|4);
249 1.1 macallan DELAY(1000);
250 1.1 macallan printf("done\n"); /* more delay... */
251 1.1 macallan } else
252 1.1 macallan printf(": rev %s\n", ver);
253 1.1 macallan
254 1.1 macallan if (sa->sa_npromvaddrs)
255 1.1 macallan ioh = (bus_space_handle_t)sa->sa_promvaddrs[0];
256 1.1 macallan else {
257 1.1 macallan if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
258 1.1 macallan sa->sa_offset, sa->sa_size,
259 1.1 macallan BUS_SPACE_MAP_LINEAR, /*0,*/ &ioh) != 0) {
260 1.1 macallan printf("%s @ sbus: cannot map registers\n",
261 1.1 macallan self->dv_xname);
262 1.1 macallan return;
263 1.1 macallan }
264 1.1 macallan }
265 1.1 macallan
266 1.1 macallan sc->sc_ioh = ioh;
267 1.1 macallan
268 1.1 macallan size = sizeof(struct dbri_dma);
269 1.1 macallan
270 1.1 macallan /* get a DMA handle */
271 1.1 macallan if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
272 1.1 macallan BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
273 1.1 macallan printf("%s: DMA map create error %d\n", self->dv_xname, error);
274 1.1 macallan return;
275 1.1 macallan }
276 1.1 macallan
277 1.1 macallan /* allocate DMA buffer */
278 1.1 macallan if ((error = bus_dmamem_alloc(sc->sc_dmat, size, 0, 0, &sc->sc_dmaseg,
279 1.1 macallan 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
280 1.1 macallan printf("%s: DMA buffer alloc error %d\n",
281 1.1 macallan self->dv_xname, error);
282 1.1 macallan return;
283 1.1 macallan }
284 1.1 macallan
285 1.1 macallan /* map DMA buffer into CPU addressable space */
286 1.1 macallan if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dmaseg, rseg, size,
287 1.1 macallan &sc->sc_membase,
288 1.1 macallan BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
289 1.1 macallan printf("%s: DMA buffer map error %d\n",
290 1.1 macallan self->dv_xname, error);
291 1.1 macallan return;
292 1.1 macallan }
293 1.1 macallan
294 1.1 macallan /* load the buffer */
295 1.1 macallan if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap,
296 1.1 macallan sc->sc_membase, size, NULL,
297 1.1 macallan BUS_DMA_NOWAIT)) != 0) {
298 1.1 macallan printf("%s: DMA buffer map load error %d\n",
299 1.1 macallan self->dv_xname, error);
300 1.1 macallan bus_dmamem_unmap(sc->sc_dmat, sc->sc_membase, size);
301 1.1 macallan bus_dmamem_free(sc->sc_dmat, &sc->sc_dmaseg, rseg);
302 1.1 macallan return;
303 1.1 macallan }
304 1.1 macallan
305 1.1 macallan /* map the registers into memory */
306 1.1 macallan
307 1.1 macallan sc->sc_dma = (struct dbri_dma *)sc->sc_membase; /* kernel virtual address of DMA buffer */
308 1.1 macallan sc->sc_dmabase = sc->sc_dmamap->dm_segs[0].ds_addr; /* physical address of DMA buffer */
309 1.1 macallan sc->sc_bufsiz = size;
310 1.1 macallan
311 1.1 macallan sbus_establish(&sc->sc_sd, &sc->sc_dev);
312 1.1 macallan
313 1.1 macallan bus_intr_establish(sa->sa_bustag, sa->sa_pri, IPL_AUDIO, /*0,*/
314 1.1 macallan dbri_intr, sc);
315 1.1 macallan
316 1.1 macallan sc->sc_locked = 0;
317 1.1 macallan sc->sc_desc_used = 0;
318 1.1 macallan
319 1.1 macallan config_interrupts(self, &dbri_config_interrupts);
320 1.1 macallan
321 1.1 macallan return;
322 1.1 macallan }
323 1.1 macallan
324 1.1 macallan void
325 1.1 macallan dbri_config_interrupts(struct device *dev)
326 1.1 macallan {
327 1.1 macallan struct dbri_softc *sc = (struct dbri_softc *)dev;
328 1.1 macallan dbri_init(sc);
329 1.1 macallan mmcodec_init(sc);
330 1.1 macallan /* Attach ourselves to the high level audio interface */
331 1.1 macallan audio_attach_mi(&dbri_hw_if, sc, &sc->sc_dev);
332 1.1 macallan
333 1.1 macallan return;
334 1.1 macallan }
335 1.1 macallan
336 1.1 macallan int
337 1.1 macallan dbri_intr(void *hdl)
338 1.1 macallan {
339 1.1 macallan struct dbri_softc *sc = hdl;
340 1.1 macallan bus_space_tag_t iot = sc->sc_iot;
341 1.1 macallan bus_space_handle_t ioh = sc->sc_ioh;
342 1.1 macallan int x;
343 1.1 macallan
344 1.1 macallan /* clear interrupt */
345 1.1 macallan x = bus_space_read_4(iot, ioh, DBRI_REG1);
346 1.1 macallan if (x & (DBRI_MRR | DBRI_MLE | DBRI_LBG | DBRI_MBE)) {
347 1.1 macallan u_int32_t tmp;
348 1.1 macallan
349 1.1 macallan if (x & DBRI_MRR)
350 1.1 macallan printf("%s: multiple ack error on sbus\n",
351 1.1 macallan sc->sc_dev.dv_xname);
352 1.1 macallan if (x & DBRI_MLE)
353 1.1 macallan printf("%s: multiple late error on sbus\n",
354 1.1 macallan sc->sc_dev.dv_xname);
355 1.1 macallan if (x & DBRI_LBG)
356 1.1 macallan printf("%s: lost bus grant on sbus\n",
357 1.1 macallan sc->sc_dev.dv_xname);
358 1.1 macallan if (x & DBRI_MBE)
359 1.1 macallan printf("%s: burst error on sbus\n",
360 1.1 macallan sc->sc_dev.dv_xname);
361 1.1 macallan
362 1.1 macallan /*
363 1.1 macallan * Some of these errors disable the chip's circuitry.
364 1.1 macallan * Re-enable the circuitry and keep on going.
365 1.1 macallan */
366 1.1 macallan
367 1.1 macallan tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
368 1.1 macallan tmp &= ~(DBRI_DISABLE_MASTER);
369 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
370 1.1 macallan }
371 1.1 macallan
372 1.1 macallan #if 0
373 1.1 macallan if (!x & 1) /* XXX: DBRI_INTR_REQ */
374 1.1 macallan return (1);
375 1.1 macallan #endif
376 1.1 macallan
377 1.1 macallan dbri_process_interrupt_buffer(sc);
378 1.1 macallan
379 1.1 macallan return (1);
380 1.1 macallan }
381 1.1 macallan
382 1.1 macallan int
383 1.1 macallan dbri_init(struct dbri_softc *sc)
384 1.1 macallan {
385 1.1 macallan bus_space_tag_t iot = sc->sc_iot;
386 1.1 macallan bus_space_handle_t ioh = sc->sc_ioh;
387 1.1 macallan u_int32_t reg;
388 1.1 macallan volatile u_int32_t *cmd;
389 1.1 macallan bus_addr_t dmaaddr;
390 1.1 macallan int n;
391 1.1 macallan
392 1.1 macallan dbri_reset(sc);
393 1.1 macallan
394 1.1 macallan cmd = dbri_command_lock(sc);
395 1.1 macallan
396 1.1 macallan /* XXX: Initialize interrupt ring buffer */
397 1.1 macallan sc->sc_dma->intr[0] = (u_int32_t)sc->sc_dmabase + dbri_dma_off(intr, 0);
398 1.1 macallan sc->sc_irqp = 1;
399 1.1 macallan
400 1.1 macallan /* Initialize pipes */
401 1.1 macallan for (n = 0; n < DBRI_PIPE_MAX; n++)
402 1.1 macallan sc->sc_pipe[n].desc = sc->sc_pipe[n].next = -1;
403 1.1 macallan
404 1.1 macallan for(n=1;n<DBRI_INT_BLOCKS;n++) {
405 1.1 macallan sc->sc_dma->intr[n]=0;
406 1.1 macallan }
407 1.1 macallan
408 1.1 macallan /* Disable all SBus bursts */
409 1.1 macallan /* XXX 16 byte bursts cause errors, the rest works */
410 1.1 macallan reg = bus_space_read_4(iot, ioh, DBRI_REG0);
411 1.1 macallan /*reg &= ~(DBRI_BURST_4 | DBRI_BURST_8 | DBRI_BURST_16);*/
412 1.1 macallan reg |= (DBRI_BURST_4 | DBRI_BURST_8);
413 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG0, reg);
414 1.1 macallan
415 1.1 macallan /* setup interrupt queue */
416 1.1 macallan dmaaddr = (u_int32_t)sc->sc_dmabase + dbri_dma_off(intr, 0);
417 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_IIQ, 0, 0);
418 1.1 macallan *(cmd++) = dmaaddr;
419 1.1 macallan
420 1.1 macallan dbri_command_send(sc, cmd);
421 1.1 macallan return (0);
422 1.1 macallan }
423 1.1 macallan
424 1.1 macallan int
425 1.1 macallan dbri_reset(struct dbri_softc *sc)
426 1.1 macallan {
427 1.1 macallan int bail=0;
428 1.1 macallan bus_space_tag_t iot = sc->sc_iot;
429 1.1 macallan bus_space_handle_t ioh = sc->sc_ioh;
430 1.1 macallan
431 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG0, DBRI_SOFT_RESET);
432 1.1 macallan while ((bus_space_read_4(iot, ioh, DBRI_REG0) & DBRI_SOFT_RESET) &&
433 1.1 macallan (bail < 100000)) {
434 1.1 macallan bail++;
435 1.1 macallan delay(10);
436 1.1 macallan }
437 1.1 macallan if (bail == 100000) printf("%s: reset timed out\n",sc->sc_dev.dv_xname);
438 1.1 macallan return (0);
439 1.1 macallan }
440 1.1 macallan
441 1.1 macallan volatile u_int32_t *
442 1.1 macallan dbri_command_lock(struct dbri_softc *sc)
443 1.1 macallan {
444 1.1 macallan
445 1.1 macallan if (sc->sc_locked)
446 1.1 macallan printf("%s: command buffer locked\n", sc->sc_dev.dv_xname);
447 1.1 macallan
448 1.1 macallan sc->sc_locked++;
449 1.1 macallan
450 1.1 macallan return (&sc->sc_dma->command[0]);
451 1.1 macallan }
452 1.1 macallan
453 1.1 macallan void
454 1.1 macallan dbri_command_send(struct dbri_softc *sc, volatile u_int32_t *cmd)
455 1.1 macallan {
456 1.1 macallan bus_space_handle_t ioh = sc->sc_ioh;
457 1.1 macallan bus_space_tag_t iot = sc->sc_iot;
458 1.1 macallan int maxloops = 1000000;
459 1.1 macallan int x;
460 1.1 macallan
461 1.1 macallan x = splaudio();
462 1.1 macallan //x = splhigh();
463 1.1 macallan
464 1.1 macallan sc->sc_locked--;
465 1.1 macallan
466 1.1 macallan if (sc->sc_locked != 0) {
467 1.1 macallan printf("%s: command buffer improperly locked\n",
468 1.1 macallan sc->sc_dev.dv_xname);
469 1.1 macallan } else if ((cmd - &sc->sc_dma->command[0]) >= DBRI_NUM_COMMANDS - 1) {
470 1.1 macallan printf("%s: command buffer overflow\n", sc->sc_dev.dv_xname);
471 1.1 macallan } else {
472 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_PAUSE, 0, 0);
473 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_WAIT, 1, 0);
474 1.1 macallan sc->sc_waitseen = 0;
475 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG8, sc->sc_dmabase);
476 1.1 macallan while ((--maxloops) > 0 &&
477 1.1 macallan (bus_space_read_4(iot, ioh, DBRI_REG0)
478 1.1 macallan & DBRI_COMMAND_VALID)) {
479 1.1 macallan bus_space_barrier(iot, ioh, DBRI_REG0, 4,
480 1.1 macallan BUS_SPACE_BARRIER_READ);
481 1.1 macallan delay(1000);
482 1.1 macallan }
483 1.1 macallan
484 1.1 macallan if (maxloops == 0) {
485 1.1 macallan printf("%s: chip never completed command buffer\n",
486 1.1 macallan sc->sc_dev.dv_xname);
487 1.1 macallan } else {
488 1.1 macallan #ifdef DBRI_DEBUG
489 1.1 macallan printf("%s: command completed\n",sc->sc_dev.dv_xname);
490 1.1 macallan #endif
491 1.1 macallan while ((--maxloops) > 0 && (!sc->sc_waitseen))
492 1.1 macallan dbri_process_interrupt_buffer(sc);
493 1.1 macallan if (maxloops == 0) {
494 1.1 macallan printf("%s: chip never acked WAIT\n",
495 1.1 macallan sc->sc_dev.dv_xname);
496 1.1 macallan }
497 1.1 macallan }
498 1.1 macallan }
499 1.1 macallan
500 1.1 macallan splx(x);
501 1.1 macallan
502 1.1 macallan return;
503 1.1 macallan }
504 1.1 macallan
505 1.1 macallan void
506 1.1 macallan dbri_process_interrupt_buffer(struct dbri_softc *sc)
507 1.1 macallan {
508 1.1 macallan int32_t i;
509 1.1 macallan
510 1.1 macallan while ((i = sc->sc_dma->intr[sc->sc_irqp]) != 0) {
511 1.1 macallan sc->sc_dma->intr[sc->sc_irqp] = 0;
512 1.1 macallan sc->sc_irqp++;
513 1.1 macallan
514 1.1 macallan if (sc->sc_irqp == DBRI_INT_BLOCKS)
515 1.1 macallan sc->sc_irqp = 1;
516 1.1 macallan else if ((sc->sc_irqp & (DBRI_INT_BLOCKS - 1)) == 0)
517 1.1 macallan sc->sc_irqp++;
518 1.1 macallan
519 1.1 macallan dbri_process_interrupt(sc, i);
520 1.1 macallan }
521 1.1 macallan
522 1.1 macallan return;
523 1.1 macallan }
524 1.1 macallan
525 1.1 macallan void
526 1.1 macallan dbri_process_interrupt(struct dbri_softc *sc, int32_t i)
527 1.1 macallan {
528 1.1 macallan #if 0
529 1.1 macallan const int liu_states[] = { 1, 0, 8, 3, 4, 5, 6, 7 };
530 1.1 macallan #endif
531 1.1 macallan int val = DBRI_INTR_GETVAL(i);
532 1.1 macallan int channel = DBRI_INTR_GETCHAN(i);
533 1.1 macallan int command = DBRI_INTR_GETCMD(i);
534 1.1 macallan int code = DBRI_INTR_GETCODE(i);
535 1.1 macallan #if 0
536 1.1 macallan int rval = DBRI_INTR_GETRVAL(i);
537 1.1 macallan #endif
538 1.1 macallan if (channel == DBRI_INTR_CMD && command == DBRI_COMMAND_WAIT)
539 1.1 macallan sc->sc_waitseen++;
540 1.1 macallan
541 1.1 macallan switch (code) {
542 1.1 macallan case DBRI_INTR_XCMP: /* transmission complete */
543 1.1 macallan {
544 1.1 macallan int td;
545 1.1 macallan struct dbri_desc *dd;
546 1.1 macallan
547 1.1 macallan td = sc->sc_pipe[channel].desc;
548 1.1 macallan dd = &sc->sc_desc[td];
549 1.1 macallan
550 1.1 macallan if (dd->callback != NULL)
551 1.1 macallan dd->callback(dd->callback_args);
552 1.1 macallan break;
553 1.1 macallan }
554 1.1 macallan case DBRI_INTR_FXDT: /* fixed data change */
555 1.1 macallan #ifdef DBRI_DEBUG
556 1.1 macallan printf("dbri_intr: Fixed data change (%d: %x)\n",channel,val);
557 1.1 macallan #endif
558 1.1 macallan if (sc->sc_pipe[channel].sdp & DBRI_SDP_MSB)
559 1.1 macallan val = reverse_bytes(val, sc->sc_pipe[channel].length);
560 1.1 macallan if (sc->sc_pipe[channel].prec)
561 1.1 macallan *(sc->sc_pipe[channel].prec) = val;
562 1.1 macallan #ifdef DBRI_DEBUG
563 1.1 macallan printf("%s: wakeup %p\n", sc->sc_dev.dv_xname, sc);
564 1.1 macallan #endif
565 1.1 macallan #if 0
566 1.1 macallan wakeup(sc);
567 1.1 macallan #endif
568 1.1 macallan break;
569 1.1 macallan case DBRI_INTR_SBRI:
570 1.1 macallan #ifdef DBRI_DEBUG
571 1.1 macallan printf("dbri_intr: SBRI\n");
572 1.1 macallan #endif
573 1.1 macallan break;
574 1.1 macallan case DBRI_INTR_BRDY:
575 1.1 macallan {
576 1.1 macallan /* XXX no input (yet) */
577 1.1 macallan #if 0
578 1.1 macallan int rd = sc->sc_pipe[channel].desc;
579 1.1 macallan u_int32_t status;
580 1.1 macallan
581 1.1 macallan printf("dbri_intr: BRDY\n");
582 1.1 macallan if (rd < 0 || rd >= DBRI_NUM_DESCRIPTORS) {
583 1.1 macallan printf("%s: invalid rd on pipe\n", sc->sc_dev.dv_xname);
584 1.1 macallan break;
585 1.1 macallan }
586 1.1 macallan
587 1.1 macallan sc->sc_desc[rd].busy = 0;
588 1.1 macallan sc->sc_pipe[channel].desc = sc->sc_desc[rd].next;
589 1.1 macallan status = sc->sc_dma->desc[rd].word1;
590 1.1 macallan #endif
591 1.1 macallan /* XXX: callback ??? */
592 1.1 macallan
593 1.1 macallan break;
594 1.1 macallan }
595 1.1 macallan case DBRI_INTR_UNDR:
596 1.1 macallan {
597 1.1 macallan volatile u_int32_t *cmd;
598 1.1 macallan int td = sc->sc_pipe[channel].desc;
599 1.1 macallan
600 1.1 macallan printf("%s: DBRI_INTR_UNDR\n", sc->sc_dev.dv_xname);
601 1.1 macallan
602 1.1 macallan sc->sc_dma->desc[td].status = 0;
603 1.1 macallan
604 1.1 macallan cmd = dbri_command_lock(sc);
605 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_SDP, 0,
606 1.1 macallan sc->sc_pipe[channel].sdp |
607 1.1 macallan DBRI_SDP_VALID_POINTER |
608 1.1 macallan DBRI_SDP_CLEAR |
609 1.1 macallan DBRI_SDP_2SAME);
610 1.1 macallan *(cmd++) = sc->sc_dmabase + dbri_dma_off(desc, td);
611 1.1 macallan dbri_command_send(sc, cmd);
612 1.1 macallan break;
613 1.1 macallan }
614 1.1 macallan default:
615 1.1 macallan #if 0
616 1.1 macallan printf("%s: unknown interrupt code %d\n",
617 1.1 macallan sc->sc_dev.dv_xname, code);
618 1.1 macallan #endif
619 1.1 macallan break;
620 1.1 macallan }
621 1.1 macallan
622 1.1 macallan return;
623 1.1 macallan }
624 1.1 macallan
625 1.1 macallan /*
626 1.1 macallan * mmcodec stuff
627 1.1 macallan */
628 1.1 macallan
629 1.1 macallan int
630 1.1 macallan mmcodec_init(struct dbri_softc *sc)
631 1.1 macallan {
632 1.1 macallan bus_space_handle_t ioh = sc->sc_ioh;
633 1.1 macallan bus_space_tag_t iot = sc->sc_iot;
634 1.1 macallan u_int32_t reg2;
635 1.1 macallan
636 1.1 macallan reg2 = bus_space_read_4(iot, ioh, DBRI_REG2);
637 1.1 macallan #ifdef DBRI_DEBUG
638 1.1 macallan printf("mmcodec_init: PIO reads %x\n",reg2);
639 1.1 macallan #endif
640 1.1 macallan if (reg2 & DBRI_PIO2) {
641 1.1 macallan printf("%s: onboard CS4215 detected\n",
642 1.1 macallan sc->sc_dev.dv_xname);
643 1.1 macallan sc->sc_mm.onboard = 1;
644 1.1 macallan }
645 1.1 macallan
646 1.1 macallan if (reg2 & DBRI_PIO0) {
647 1.1 macallan printf("%s: speakerbox detected\n",
648 1.1 macallan sc->sc_dev.dv_xname);
649 1.1 macallan sc->sc_mm.onboard = 0;
650 1.1 macallan }
651 1.1 macallan
652 1.1 macallan if ((reg2 & DBRI_PIO2) && (reg2 & DBRI_PIO0)) {
653 1.1 macallan printf("%s: using speakerbox\n",
654 1.1 macallan sc->sc_dev.dv_xname);
655 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG2, DBRI_PIO2_ENABLE);
656 1.1 macallan sc->sc_mm.onboard = 0;
657 1.1 macallan }
658 1.1 macallan
659 1.1 macallan if (!(reg2 & (DBRI_PIO0|DBRI_PIO2))) {
660 1.1 macallan printf("%s: no mmcodec found\n", sc->sc_dev.dv_xname);
661 1.1 macallan return -1;
662 1.1 macallan }
663 1.1 macallan
664 1.1 macallan sc->sc_version = 0xff;
665 1.1 macallan
666 1.1 macallan mmcodec_pipe_init(sc);
667 1.1 macallan mmcodec_default(sc);
668 1.1 macallan
669 1.1 macallan sc->sc_mm.offset = sc->sc_mm.onboard ? 0 : 8;
670 1.1 macallan
671 1.1 macallan if (mmcodec_setcontrol(sc) == -1 || sc->sc_version == 0xff) {
672 1.1 macallan printf("%s: cs4215 probe failed at offset %d\n",
673 1.1 macallan sc->sc_dev.dv_xname, sc->sc_mm.offset);
674 1.1 macallan return (-1);
675 1.1 macallan }
676 1.1 macallan
677 1.1 macallan printf("%s: cs4215 ver %d found at offset %d\n",
678 1.1 macallan sc->sc_dev.dv_xname, sc->sc_version & 0xf, sc->sc_mm.offset);
679 1.1 macallan
680 1.1 macallan /* set some sane defaults for mmcodec_init_data */
681 1.1 macallan sc->sc_params.channels = 2;
682 1.1 macallan sc->sc_params.precision = 16;
683 1.1 macallan
684 1.1 macallan mmcodec_init_data(sc);
685 1.1 macallan
686 1.1 macallan sc->sc_open = 0;
687 1.1 macallan
688 1.1 macallan return (0);
689 1.1 macallan }
690 1.1 macallan
691 1.1 macallan void
692 1.1 macallan mmcodec_init_data(struct dbri_softc *sc)
693 1.1 macallan {
694 1.1 macallan bus_space_tag_t iot = sc->sc_iot;
695 1.1 macallan bus_space_handle_t ioh = sc->sc_ioh;
696 1.1 macallan u_int32_t tmp;
697 1.1 macallan int data_width;
698 1.1 macallan
699 1.1 macallan tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
700 1.1 macallan tmp &= ~(DBRI_CHI_ACTIVATE); /* disable CHI */
701 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
702 1.1 macallan
703 1.1 macallan /* switch CS4215 to data mode - set PIO3 to 1 */
704 1.1 macallan tmp = DBRI_PIO_ENABLE_ALL | DBRI_PIO1 | DBRI_PIO3;
705 1.1 macallan /* XXX */
706 1.1 macallan tmp |= (sc->sc_mm.onboard ? DBRI_PIO0 : DBRI_PIO2);
707 1.1 macallan
708 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG2, tmp);
709 1.1 macallan chi_reset(sc, CHIslave, 128);
710 1.1 macallan
711 1.1 macallan data_width = sc->sc_params.channels
712 1.1 macallan * sc->sc_params.precision;
713 1.1 macallan pipe_ts_link(sc, 20, PIPEoutput, 16, 32, sc->sc_mm.offset + 32);
714 1.1 macallan pipe_ts_link(sc, 4, PIPEoutput, 16, data_width, sc->sc_mm.offset);
715 1.1 macallan pipe_ts_link(sc, 6, PIPEinput, 16, data_width, sc->sc_mm.offset);
716 1.1 macallan pipe_ts_link(sc, 21, PIPEinput, 16, 16, sc->sc_mm.offset + 40);
717 1.1 macallan
718 1.1 macallan mmcodec_setgain(sc, 0);
719 1.1 macallan
720 1.1 macallan tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
721 1.1 macallan tmp |= DBRI_CHI_ACTIVATE;
722 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
723 1.1 macallan
724 1.1 macallan return;
725 1.1 macallan }
726 1.1 macallan
727 1.1 macallan void
728 1.1 macallan mmcodec_pipe_init(struct dbri_softc *sc)
729 1.1 macallan {
730 1.1 macallan
731 1.1 macallan pipe_setup(sc, 4, DBRI_SDP_MEM | DBRI_SDP_TO_SER | DBRI_SDP_MSB);
732 1.1 macallan pipe_setup(sc, 20, DBRI_SDP_FIXED | DBRI_SDP_TO_SER | DBRI_SDP_MSB);
733 1.1 macallan pipe_setup(sc, 6, DBRI_SDP_MEM | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
734 1.1 macallan pipe_setup(sc, 21, DBRI_SDP_FIXED | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
735 1.1 macallan
736 1.1 macallan pipe_setup(sc, 17, DBRI_SDP_FIXED | DBRI_SDP_TO_SER | DBRI_SDP_MSB);
737 1.1 macallan pipe_setup(sc, 18, DBRI_SDP_FIXED | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
738 1.1 macallan pipe_setup(sc, 19, DBRI_SDP_FIXED | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
739 1.1 macallan
740 1.1 macallan sc->sc_mm.status = 0;
741 1.1 macallan
742 1.1 macallan pipe_receive_fixed(sc, 18, &sc->sc_mm.status);
743 1.1 macallan pipe_receive_fixed(sc, 19, &sc->sc_mm.version);
744 1.1 macallan
745 1.1 macallan return;
746 1.1 macallan }
747 1.1 macallan
748 1.1 macallan void
749 1.1 macallan mmcodec_default(struct dbri_softc *sc)
750 1.1 macallan {
751 1.1 macallan struct cs4215_state *mm = &sc->sc_mm;
752 1.1 macallan
753 1.1 macallan /*
754 1.1 macallan * no action, memory resetting only
755 1.1 macallan *
756 1.1 macallan * data time slots 5-8
757 1.1 macallan * speaker, line and headphone enable. set gain to half.
758 1.1 macallan * input is mic
759 1.1 macallan */
760 1.1 macallan mm->data[0] = sc->sc_latt = 0x20 | CS4215_HE | CS4215_LE;
761 1.1 macallan mm->data[1] = sc->sc_ratt = 0x20 | CS4215_SE;
762 1.1 macallan mm->data[2] = CS4215_LG(0x08) | CS4215_IS | CS4215_PIO0 | CS4215_PIO1;
763 1.1 macallan mm->data[3] = CS4215_RG(0x08) | CS4215_MA(0x0f);
764 1.1 macallan
765 1.1 macallan /*
766 1.1 macallan * control time slots 1-4
767 1.1 macallan *
768 1.1 macallan * 0: default I/O voltage scale
769 1.1 macallan * 1: 8 bit ulaw, 8kHz, mono, high pass filter disabled
770 1.1 macallan * 2: serial enable, CHI master, 128 bits per frame, clock 1
771 1.1 macallan * 3: tests disabled
772 1.1 macallan */
773 1.1 macallan mm->control[0] = CS4215_RSRVD_1 | CS4215_MLB;
774 1.1 macallan mm->control[1] = CS4215_DFR_ULAW | CS4215_FREQ[0].csval;
775 1.1 macallan mm->control[2] = CS4215_XCLK | CS4215_BSEL_128 | CS4215_FREQ[0].xtal;
776 1.1 macallan mm->control[3] = 0;
777 1.1 macallan
778 1.1 macallan return;
779 1.1 macallan }
780 1.1 macallan
781 1.1 macallan void
782 1.1 macallan mmcodec_setgain(struct dbri_softc *sc, int mute)
783 1.1 macallan {
784 1.1 macallan if (mute) {
785 1.1 macallan /* disable all outputs, max. attenuation */
786 1.1 macallan sc->sc_mm.data[0] = 63;
787 1.1 macallan sc->sc_mm.data[1] = 63;
788 1.1 macallan } else {
789 1.1 macallan /*
790 1.1 macallan * We should be setting the proper output here.. for now,
791 1.1 macallan * use the speaker. Possible outputs:
792 1.1 macallan * Headphones:
793 1.1 macallan * data[0] |= CS4215_HE;
794 1.1 macallan * Line out:
795 1.1 macallan * data[0] |= CS4215_LE;
796 1.1 macallan * Speaker:
797 1.1 macallan * data[1] |= CS4215_SE;
798 1.1 macallan */
799 1.1 macallan sc->sc_mm.data[0] = sc->sc_latt;
800 1.1 macallan sc->sc_mm.data[1] = sc->sc_ratt;
801 1.1 macallan }
802 1.1 macallan
803 1.1 macallan pipe_transmit_fixed(sc, 20, *(u_int32_t *)__UNVOLATILE(sc->sc_mm.data));
804 1.1 macallan
805 1.1 macallan /* give the chip some time to execure the command */
806 1.1 macallan delay(250);
807 1.1 macallan
808 1.1 macallan return;
809 1.1 macallan }
810 1.1 macallan
811 1.1 macallan int
812 1.1 macallan mmcodec_setcontrol(struct dbri_softc *sc)
813 1.1 macallan {
814 1.1 macallan bus_space_tag_t iot = sc->sc_iot;
815 1.1 macallan bus_space_handle_t ioh = sc->sc_ioh;
816 1.1 macallan u_int32_t val;
817 1.1 macallan u_int32_t tmp;
818 1.1 macallan #if 1
819 1.1 macallan int i;
820 1.1 macallan #endif
821 1.1 macallan
822 1.1 macallan /*
823 1.1 macallan * Temporarily mute outputs and wait 125 us to make sure that it
824 1.1 macallan * happens. This avoids clicking noises.
825 1.1 macallan */
826 1.1 macallan mmcodec_setgain(sc, 1);
827 1.1 macallan //DELAY(125);
828 1.1 macallan
829 1.1 macallan /* enable control mode */
830 1.1 macallan val = DBRI_PIO_ENABLE_ALL | DBRI_PIO1; /* was PIO1 */
831 1.1 macallan
832 1.1 macallan /* XXX */
833 1.1 macallan val |= (sc->sc_mm.onboard ? DBRI_PIO0 : DBRI_PIO2);
834 1.1 macallan
835 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG2, val);
836 1.1 macallan
837 1.1 macallan DELAY(34);
838 1.1 macallan
839 1.1 macallan /*
840 1.1 macallan * in control mode, the cs4215 is the slave device, so the
841 1.1 macallan * DBRI must act as the CHI master.
842 1.1 macallan *
843 1.1 macallan * in data mode, the cs4215 must be the CHI master to insure
844 1.1 macallan * that the data stream is in sync with its codec
845 1.1 macallan */
846 1.1 macallan tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
847 1.1 macallan tmp &= ~DBRI_COMMAND_CHI;
848 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
849 1.1 macallan
850 1.1 macallan chi_reset(sc, CHImaster, 128);
851 1.1 macallan
852 1.1 macallan /* control mode */
853 1.1 macallan pipe_ts_link(sc, 17, PIPEoutput, 16, 32, sc->sc_mm.offset);
854 1.1 macallan pipe_ts_link(sc, 18, PIPEinput, 16, 8, sc->sc_mm.offset);
855 1.1 macallan pipe_ts_link(sc, 19, PIPEinput, 16, 8, sc->sc_mm.offset + 48);
856 1.1 macallan
857 1.1 macallan /* wait for the chip to echo back CLB as zero */
858 1.1 macallan sc->sc_mm.control[0] &= ~CS4215_CLB;
859 1.1 macallan pipe_transmit_fixed(sc, 17, *(int *)__UNVOLATILE(sc->sc_mm.control));
860 1.1 macallan
861 1.1 macallan tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
862 1.1 macallan tmp |= DBRI_CHI_ACTIVATE;
863 1.1 macallan bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
864 1.1 macallan
865 1.1 macallan #if 1
866 1.1 macallan i = 1024;
867 1.1 macallan while (((sc->sc_mm.status & 0xe4) != 0x20) && --i) {
868 1.1 macallan delay(125);
869 1.1 macallan }
870 1.1 macallan
871 1.1 macallan if (i == 0) {
872 1.1 macallan printf("%s: cs4215 didn't respond to CLB (0x%02x)\n",
873 1.1 macallan sc->sc_dev.dv_xname, sc->sc_mm.status);
874 1.1 macallan return (-1);
875 1.1 macallan }
876 1.1 macallan #else
877 1.1 macallan while ((sc->sc_mm.status & 0xe4) != 0x20) {
878 1.1 macallan printf("%s: tsleep %p\n", sc->sc_dev.dv_xname, sc);
879 1.1 macallan tsleep(sc, PCATCH | PZERO, "dbrifxdt", 0);
880 1.1 macallan }
881 1.1 macallan #endif
882 1.1 macallan
883 1.1 macallan /* copy the version information before it becomes unreadable again */
884 1.1 macallan sc->sc_version=sc->sc_mm.version;
885 1.1 macallan
886 1.1 macallan /* terminate cs4215 control mode */
887 1.1 macallan sc->sc_mm.control[0] |= CS4215_CLB;
888 1.1 macallan pipe_transmit_fixed(sc, 17, *(int *)__UNVOLATILE(sc->sc_mm.control));
889 1.1 macallan
890 1.1 macallan /* two frames of control info @ 8kHz frame rate = 250us delay */
891 1.1 macallan DELAY(250);
892 1.1 macallan
893 1.1 macallan mmcodec_setgain(sc, 0);
894 1.1 macallan
895 1.1 macallan return (0);
896 1.1 macallan
897 1.1 macallan }
898 1.1 macallan
899 1.1 macallan /*
900 1.1 macallan * CHI combo
901 1.1 macallan */
902 1.1 macallan void
903 1.1 macallan chi_reset(struct dbri_softc *sc, enum ms ms, int bpf)
904 1.1 macallan {
905 1.1 macallan volatile u_int32_t *cmd;
906 1.1 macallan int val;
907 1.1 macallan int clockrate, divisor;
908 1.1 macallan
909 1.1 macallan cmd = dbri_command_lock(sc);
910 1.1 macallan
911 1.1 macallan /* set CHI anchor: pipe 16 */
912 1.1 macallan val = DBRI_DTS_VI | DBRI_DTS_INS | DBRI_DTS_PRVIN(16) | DBRI_PIPE(16);
913 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);
914 1.1 macallan *(cmd++) = DBRI_TS_ANCHOR | DBRI_TS_NEXT(16);
915 1.1 macallan *(cmd++) = 0;
916 1.1 macallan
917 1.1 macallan val = DBRI_DTS_VO | DBRI_DTS_INS | DBRI_DTS_PRVOUT(16) | DBRI_PIPE(16);
918 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);
919 1.1 macallan *(cmd++) = 0;
920 1.1 macallan *(cmd++) = DBRI_TS_ANCHOR | DBRI_TS_NEXT(16);
921 1.1 macallan
922 1.1 macallan sc->sc_pipe[16].sdp = 1;
923 1.1 macallan sc->sc_pipe[16].next = 16;
924 1.1 macallan sc->sc_chi_pipe_in = 16;
925 1.1 macallan sc->sc_chi_pipe_out = 16;
926 1.1 macallan
927 1.1 macallan switch (ms) {
928 1.1 macallan case CHIslave:
929 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_CHI, 0, DBRI_CHI_CHICM(0));
930 1.1 macallan break;
931 1.1 macallan case CHImaster:
932 1.1 macallan clockrate = bpf * 8;
933 1.1 macallan divisor = 12288 / clockrate;
934 1.1 macallan
935 1.1 macallan if (divisor > 255 || divisor * clockrate != 12288)
936 1.1 macallan printf("%s: illegal bits-per-frame %d\n",
937 1.1 macallan sc->sc_dev.dv_xname, bpf);
938 1.1 macallan
939 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_CHI, 0,
940 1.1 macallan DBRI_CHI_CHICM(divisor) | DBRI_CHI_FD | DBRI_CHI_BPF(bpf));
941 1.1 macallan break;
942 1.1 macallan default:
943 1.1 macallan printf("%s: unknown value for ms!\n", sc->sc_dev.dv_xname);
944 1.1 macallan break;
945 1.1 macallan }
946 1.1 macallan
947 1.1 macallan sc->sc_chi_bpf = bpf;
948 1.1 macallan
949 1.1 macallan /* CHI data mode */
950 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_PAUSE, 0, 0);
951 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_CDM, 0,
952 1.1 macallan DBRI_CDM_XCE | DBRI_CDM_XEN | DBRI_CDM_REN);
953 1.1 macallan
954 1.1 macallan dbri_command_send(sc, cmd);
955 1.1 macallan
956 1.1 macallan return;
957 1.1 macallan }
958 1.1 macallan
959 1.1 macallan /*
960 1.1 macallan * pipe stuff
961 1.1 macallan */
962 1.1 macallan void
963 1.1 macallan pipe_setup(struct dbri_softc *sc, int pipe, int sdp)
964 1.1 macallan {
965 1.1 macallan #ifdef DBRI_DEBUG
966 1.1 macallan printf("pipe setup: %d\n",pipe);
967 1.1 macallan #endif
968 1.1 macallan if (pipe < 0 || pipe >= DBRI_PIPE_MAX) {
969 1.1 macallan printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
970 1.1 macallan pipe);
971 1.1 macallan return;
972 1.1 macallan }
973 1.1 macallan
974 1.1 macallan if ((sdp & 0xf800) != sdp)
975 1.1 macallan printf("%s: strange SDP value %d\n", sc->sc_dev.dv_xname, sdp);
976 1.1 macallan
977 1.1 macallan if (DBRI_SDP_MODE(sdp) == DBRI_SDP_FIXED &&
978 1.1 macallan !(sdp & DBRI_SDP_TO_SER))
979 1.1 macallan sdp |= DBRI_SDP_CHANGE;
980 1.1 macallan
981 1.1 macallan sdp |= DBRI_PIPE(pipe);
982 1.1 macallan
983 1.1 macallan sc->sc_pipe[pipe].sdp = sdp;
984 1.1 macallan sc->sc_pipe[pipe].desc = -1;
985 1.1 macallan
986 1.1 macallan pipe_reset(sc, pipe);
987 1.1 macallan
988 1.1 macallan return;
989 1.1 macallan }
990 1.1 macallan
991 1.1 macallan void
992 1.1 macallan pipe_reset(struct dbri_softc *sc, int pipe)
993 1.1 macallan {
994 1.1 macallan struct dbri_desc *dd;
995 1.1 macallan int sdp;
996 1.1 macallan int desc;
997 1.1 macallan volatile u_int32_t *cmd;
998 1.1 macallan
999 1.1 macallan if (pipe < 0 || pipe >= DBRI_PIPE_MAX) {
1000 1.1 macallan printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
1001 1.1 macallan pipe);
1002 1.1 macallan return;
1003 1.1 macallan }
1004 1.1 macallan
1005 1.1 macallan sdp = sc->sc_pipe[pipe].sdp;
1006 1.1 macallan if (sdp == 0) {
1007 1.1 macallan printf("%s: can not reset uninitialized pipe %d\n",
1008 1.1 macallan sc->sc_dev.dv_xname, pipe);
1009 1.1 macallan return;
1010 1.1 macallan }
1011 1.1 macallan
1012 1.1 macallan cmd = dbri_command_lock(sc);
1013 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_SDP, 0,
1014 1.1 macallan sdp | DBRI_SDP_CLEAR | DBRI_SDP_VALID_POINTER);
1015 1.1 macallan *(cmd++) = 0;
1016 1.1 macallan dbri_command_send(sc, cmd);
1017 1.1 macallan
1018 1.1 macallan desc = sc->sc_pipe[pipe].desc;
1019 1.1 macallan
1020 1.1 macallan dd = &sc->sc_desc[desc];
1021 1.1 macallan
1022 1.1 macallan dd->busy = 0;
1023 1.1 macallan
1024 1.1 macallan #if 0
1025 1.1 macallan if (dd->callback)
1026 1.1 macallan (*dd->callback)(dd->callback_args);
1027 1.1 macallan #endif
1028 1.1 macallan
1029 1.1 macallan sc->sc_pipe[pipe].desc = -1;
1030 1.1 macallan
1031 1.1 macallan return;
1032 1.1 macallan }
1033 1.1 macallan
1034 1.1 macallan void
1035 1.1 macallan pipe_receive_fixed(struct dbri_softc *sc, int pipe, volatile u_int32_t *prec)
1036 1.1 macallan {
1037 1.1 macallan
1038 1.1 macallan if (pipe < DBRI_PIPE_MAX / 2 || pipe >= DBRI_PIPE_MAX) {
1039 1.1 macallan printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
1040 1.1 macallan pipe);
1041 1.1 macallan return;
1042 1.1 macallan }
1043 1.1 macallan
1044 1.1 macallan if (DBRI_SDP_MODE(sc->sc_pipe[pipe].sdp) != DBRI_SDP_FIXED) {
1045 1.1 macallan printf("%s: non-fixed pipe %d\n", sc->sc_dev.dv_xname,
1046 1.1 macallan pipe);
1047 1.1 macallan return;
1048 1.1 macallan }
1049 1.1 macallan
1050 1.1 macallan if (sc->sc_pipe[pipe].sdp & DBRI_SDP_TO_SER) {
1051 1.1 macallan printf("%s: can not receive on transmit pipe %d\b",
1052 1.1 macallan sc->sc_dev.dv_xname, pipe);
1053 1.1 macallan return;
1054 1.1 macallan }
1055 1.1 macallan
1056 1.1 macallan sc->sc_pipe[pipe].prec = prec;
1057 1.1 macallan
1058 1.1 macallan return;
1059 1.1 macallan }
1060 1.1 macallan
1061 1.1 macallan void
1062 1.1 macallan pipe_transmit_fixed(struct dbri_softc *sc, int pipe, u_int32_t data)
1063 1.1 macallan {
1064 1.1 macallan volatile u_int32_t *cmd;
1065 1.1 macallan
1066 1.1 macallan if (pipe < DBRI_PIPE_MAX / 2 || pipe >= DBRI_PIPE_MAX) {
1067 1.1 macallan printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
1068 1.1 macallan pipe);
1069 1.1 macallan return;
1070 1.1 macallan }
1071 1.1 macallan
1072 1.1 macallan if (DBRI_SDP_MODE(sc->sc_pipe[pipe].sdp) == 0) {
1073 1.1 macallan printf("%s: uninitialized pipe %d\n", sc->sc_dev.dv_xname,
1074 1.1 macallan pipe);
1075 1.1 macallan return;
1076 1.1 macallan }
1077 1.1 macallan
1078 1.1 macallan if (DBRI_SDP_MODE(sc->sc_pipe[pipe].sdp) != DBRI_SDP_FIXED) {
1079 1.1 macallan printf("%s: non-fixed pipe %d\n", sc->sc_dev.dv_xname, pipe);
1080 1.1 macallan return;
1081 1.1 macallan }
1082 1.1 macallan
1083 1.1 macallan if (!(sc->sc_pipe[pipe].sdp & DBRI_SDP_TO_SER)) {
1084 1.1 macallan printf("%s: called on receive pipe %d\n", sc->sc_dev.dv_xname,
1085 1.1 macallan pipe);
1086 1.1 macallan return;
1087 1.1 macallan }
1088 1.1 macallan
1089 1.1 macallan if (sc->sc_pipe[pipe].sdp & DBRI_SDP_MSB)
1090 1.1 macallan data = reverse_bytes(data, sc->sc_pipe[pipe].length);
1091 1.1 macallan
1092 1.1 macallan cmd = dbri_command_lock(sc);
1093 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_SSP, 0, pipe);
1094 1.1 macallan *(cmd++) = data;
1095 1.1 macallan
1096 1.1 macallan dbri_command_send(sc, cmd);
1097 1.1 macallan
1098 1.1 macallan return;
1099 1.1 macallan }
1100 1.1 macallan
1101 1.1 macallan void
1102 1.1 macallan setup_ring(struct dbri_softc *sc, int pipe, int which, int num, int blksz,
1103 1.1 macallan void (*callback)(void *), void *callback_args)
1104 1.1 macallan {
1105 1.1 macallan volatile u_int32_t *cmd;
1106 1.1 macallan int x, i;
1107 1.1 macallan int td;
1108 1.1 macallan int td_first, td_last;
1109 1.1 macallan bus_addr_t dmabuf, dmabase;
1110 1.1 macallan struct dbri_desc *dd = &sc->sc_desc[which];
1111 1.1 macallan
1112 1.1 macallan td = 0;
1113 1.1 macallan td_first = td_last = -1;
1114 1.1 macallan
1115 1.1 macallan if (pipe < 0 || pipe >= DBRI_PIPE_MAX / 2) {
1116 1.1 macallan printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
1117 1.1 macallan pipe);
1118 1.1 macallan return;
1119 1.1 macallan }
1120 1.1 macallan
1121 1.1 macallan if (sc->sc_pipe[pipe].sdp == 0) {
1122 1.1 macallan printf("%s: uninitialized pipe %d\n", sc->sc_dev.dv_xname,
1123 1.1 macallan pipe);
1124 1.1 macallan return;
1125 1.1 macallan }
1126 1.1 macallan
1127 1.1 macallan if (!(sc->sc_pipe[pipe].sdp & DBRI_SDP_TO_SER)) {
1128 1.1 macallan printf("%s: called on receive pipe %d\n",
1129 1.1 macallan sc->sc_dev.dv_xname, pipe);
1130 1.1 macallan return;
1131 1.1 macallan }
1132 1.1 macallan
1133 1.1 macallan
1134 1.1 macallan dmabuf = dd->dmabase;
1135 1.1 macallan dmabase = sc->sc_dmabase;
1136 1.1 macallan td = 0;
1137 1.1 macallan
1138 1.1 macallan for (i = 0; i < (num-1); i++) {
1139 1.1 macallan
1140 1.1 macallan sc->sc_dma->desc[i].flags = TX_BCNT(blksz)
1141 1.1 macallan | TX_EOF | TX_BINT;
1142 1.1 macallan sc->sc_dma->desc[i].ba = dmabuf;
1143 1.1 macallan sc->sc_dma->desc[i].nda = dmabase + dbri_dma_off(desc, i + 1);
1144 1.1 macallan sc->sc_dma->desc[i].status = 0;
1145 1.1 macallan
1146 1.1 macallan td_last = td;
1147 1.1 macallan dmabuf += blksz;
1148 1.1 macallan }
1149 1.1 macallan
1150 1.1 macallan sc->sc_dma->desc[i].flags = TX_BCNT(blksz) | TX_EOF | TX_BINT;
1151 1.1 macallan sc->sc_dma->desc[i].ba = dmabuf;
1152 1.1 macallan sc->sc_dma->desc[i].nda = dmabase + dbri_dma_off(desc, 0);
1153 1.1 macallan sc->sc_dma->desc[i].status = 0;
1154 1.1 macallan
1155 1.1 macallan dd->callback = callback; //sc->intr;
1156 1.1 macallan dd->callback_args = callback_args; //sc->intrarg;
1157 1.1 macallan
1158 1.1 macallan x = splaudio();
1159 1.1 macallan
1160 1.1 macallan /* the pipe shouldn't be active */
1161 1.1 macallan if (pipe_active(sc, pipe)) {
1162 1.1 macallan printf("pipe active (CDP)\n");
1163 1.1 macallan /* pipe is already active */
1164 1.1 macallan #if 0
1165 1.1 macallan td_last = sc->sc_pipe[pipe].desc;
1166 1.1 macallan while (sc->sc_desc[td_last].next != -1)
1167 1.1 macallan td_last = sc->sc_desc[td_last].next;
1168 1.1 macallan
1169 1.1 macallan sc->sc_desc[td_last].next = td_first;
1170 1.1 macallan sc->sc_dma->desc[td_last].nda =
1171 1.1 macallan sc->sc_dmabase + dbri_dma_off(desc, td_first);
1172 1.1 macallan
1173 1.1 macallan cmd = dbri_command_lock(sc);
1174 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_CDP, 0, pipe);
1175 1.1 macallan dbri_command_send(sc, cmd);
1176 1.1 macallan #endif
1177 1.1 macallan } else {
1178 1.1 macallan /*
1179 1.1 macallan * pipe isn't active - issue an SDP command to start our
1180 1.1 macallan * chain of TDs running
1181 1.1 macallan */
1182 1.1 macallan sc->sc_pipe[pipe].desc = which;
1183 1.1 macallan cmd = dbri_command_lock(sc);
1184 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_SDP, 0,
1185 1.1 macallan sc->sc_pipe[pipe].sdp |
1186 1.1 macallan DBRI_SDP_VALID_POINTER |
1187 1.1 macallan DBRI_SDP_EVERY |
1188 1.1 macallan DBRI_SDP_CLEAR);
1189 1.1 macallan *(cmd++) = sc->sc_dmabase + dbri_dma_off(desc, 0);
1190 1.1 macallan dbri_command_send(sc, cmd);
1191 1.1 macallan }
1192 1.1 macallan
1193 1.1 macallan splx(x);
1194 1.1 macallan
1195 1.1 macallan return;
1196 1.1 macallan }
1197 1.1 macallan
1198 1.1 macallan void
1199 1.1 macallan pipe_ts_link(struct dbri_softc *sc, int pipe, enum io dir, int basepipe,
1200 1.1 macallan int len, int cycle)
1201 1.1 macallan {
1202 1.1 macallan volatile u_int32_t *cmd;
1203 1.1 macallan int prevpipe, nextpipe;
1204 1.1 macallan int val;
1205 1.1 macallan
1206 1.1 macallan if (pipe < 0 || pipe >= DBRI_PIPE_MAX ||
1207 1.1 macallan basepipe < 0 || basepipe >= DBRI_PIPE_MAX) {
1208 1.1 macallan printf("%s: illegal pipe numbers (%d, %d)\n",
1209 1.1 macallan sc->sc_dev.dv_xname, pipe, basepipe);
1210 1.1 macallan return;
1211 1.1 macallan }
1212 1.1 macallan
1213 1.1 macallan if (sc->sc_pipe[pipe].sdp == 0 || sc->sc_pipe[basepipe].sdp == 0) {
1214 1.1 macallan printf("%s: uninitialized pipe (%d, %d)\n",
1215 1.1 macallan sc->sc_dev.dv_xname, pipe, basepipe);
1216 1.1 macallan return;
1217 1.1 macallan }
1218 1.1 macallan
1219 1.1 macallan if (basepipe == 16 && dir == PIPEoutput && cycle == 0)
1220 1.1 macallan cycle = sc->sc_chi_bpf;
1221 1.1 macallan
1222 1.1 macallan if (basepipe == pipe)
1223 1.1 macallan prevpipe = nextpipe = pipe;
1224 1.1 macallan else {
1225 1.1 macallan if (basepipe == 16) {
1226 1.1 macallan if (dir == PIPEinput) {
1227 1.1 macallan prevpipe = sc->sc_chi_pipe_in;
1228 1.1 macallan } else {
1229 1.1 macallan prevpipe = sc->sc_chi_pipe_out;
1230 1.1 macallan }
1231 1.1 macallan } else
1232 1.1 macallan prevpipe = basepipe;
1233 1.1 macallan
1234 1.1 macallan nextpipe = sc->sc_pipe[prevpipe].next;
1235 1.1 macallan
1236 1.1 macallan while (sc->sc_pipe[nextpipe].cycle < cycle &&
1237 1.1 macallan sc->sc_pipe[nextpipe].next != basepipe) {
1238 1.1 macallan prevpipe = nextpipe;
1239 1.1 macallan nextpipe = sc->sc_pipe[nextpipe].next;
1240 1.1 macallan }
1241 1.1 macallan }
1242 1.1 macallan
1243 1.1 macallan if (prevpipe == 16) {
1244 1.1 macallan if (dir == PIPEinput) {
1245 1.1 macallan sc->sc_chi_pipe_in = pipe;
1246 1.1 macallan } else {
1247 1.1 macallan sc->sc_chi_pipe_out = pipe;
1248 1.1 macallan }
1249 1.1 macallan } else
1250 1.1 macallan sc->sc_pipe[prevpipe].next = pipe;
1251 1.1 macallan
1252 1.1 macallan sc->sc_pipe[pipe].next = nextpipe;
1253 1.1 macallan sc->sc_pipe[pipe].cycle = cycle;
1254 1.1 macallan sc->sc_pipe[pipe].length = len;
1255 1.1 macallan
1256 1.1 macallan cmd = dbri_command_lock(sc);
1257 1.1 macallan
1258 1.1 macallan switch (dir) {
1259 1.1 macallan case PIPEinput:
1260 1.1 macallan val = DBRI_DTS_VI | DBRI_DTS_INS | DBRI_DTS_PRVIN(prevpipe);
1261 1.1 macallan val |= pipe;
1262 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);
1263 1.1 macallan *(cmd++) = DBRI_TS_LEN(len) | DBRI_TS_CYCLE(cycle) |
1264 1.1 macallan DBRI_TS_NEXT(nextpipe);
1265 1.1 macallan *(cmd++) = 0;
1266 1.1 macallan break;
1267 1.1 macallan case PIPEoutput:
1268 1.1 macallan val = DBRI_DTS_VO | DBRI_DTS_INS | DBRI_DTS_PRVOUT(prevpipe);
1269 1.1 macallan val |= pipe;
1270 1.1 macallan *(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);
1271 1.1 macallan *(cmd++) = 0;
1272 1.1 macallan *(cmd++) = DBRI_TS_LEN(len) | DBRI_TS_CYCLE(cycle) |
1273 1.1 macallan DBRI_TS_NEXT(nextpipe);
1274 1.1 macallan break;
1275 1.1 macallan default:
1276 1.1 macallan printf("%s: should not have happened!\n",
1277 1.1 macallan sc->sc_dev.dv_xname);
1278 1.1 macallan break;
1279 1.1 macallan }
1280 1.1 macallan
1281 1.1 macallan dbri_command_send(sc, cmd);
1282 1.1 macallan
1283 1.1 macallan return;
1284 1.1 macallan }
1285 1.1 macallan
1286 1.1 macallan int
1287 1.1 macallan pipe_active(struct dbri_softc *sc, int pipe)
1288 1.1 macallan {
1289 1.1 macallan
1290 1.1 macallan return (sc->sc_pipe[pipe].desc != -1);
1291 1.1 macallan }
1292 1.1 macallan
1293 1.1 macallan /*
1294 1.1 macallan * subroutines required to interface with audio(9)
1295 1.1 macallan */
1296 1.1 macallan
1297 1.1 macallan int
1298 1.1 macallan dbri_query_encoding(void *hdl, struct audio_encoding *ae)
1299 1.1 macallan {
1300 1.1 macallan
1301 1.1 macallan /* XXX we shouldn't claim we support LE samples */
1302 1.1 macallan switch (ae->index) {
1303 1.1 macallan case 0:
1304 1.1 macallan strcpy(ae->name, AudioEulinear);
1305 1.1 macallan ae->encoding = AUDIO_ENCODING_ULINEAR;
1306 1.1 macallan ae->precision = 8;
1307 1.1 macallan ae->flags = AUDIO_ENCODINGFLAG_EMULATED;
1308 1.1 macallan break;
1309 1.1 macallan case 1:
1310 1.1 macallan strcpy(ae->name, AudioEmulaw);
1311 1.1 macallan ae->encoding = AUDIO_ENCODING_ULAW;
1312 1.1 macallan ae->precision = 8;
1313 1.1 macallan ae->flags = 0;
1314 1.1 macallan break;
1315 1.1 macallan case 2:
1316 1.1 macallan strcpy(ae->name, AudioEalaw);
1317 1.1 macallan ae->encoding = AUDIO_ENCODING_ALAW;
1318 1.1 macallan ae->precision = 8;
1319 1.1 macallan ae->flags = 0;
1320 1.1 macallan break;
1321 1.1 macallan case 3:
1322 1.1 macallan strcpy(ae->name, AudioEslinear);
1323 1.1 macallan ae->encoding = AUDIO_ENCODING_SLINEAR;
1324 1.1 macallan ae->precision = 8;
1325 1.1 macallan ae->flags = AUDIO_ENCODINGFLAG_EMULATED;
1326 1.1 macallan break;
1327 1.1 macallan case 4:
1328 1.1 macallan strcpy(ae->name, AudioEslinear_le);
1329 1.1 macallan ae->encoding = AUDIO_ENCODING_SLINEAR_LE;
1330 1.1 macallan ae->precision = 16;
1331 1.1 macallan ae->flags = AUDIO_ENCODINGFLAG_EMULATED;
1332 1.1 macallan break;
1333 1.1 macallan case 5:
1334 1.1 macallan strcpy(ae->name, AudioEulinear_le);
1335 1.1 macallan ae->encoding = AUDIO_ENCODING_ULINEAR_LE;
1336 1.1 macallan ae->precision = 16;
1337 1.1 macallan ae->flags = AUDIO_ENCODINGFLAG_EMULATED;
1338 1.1 macallan break;
1339 1.1 macallan case 6:
1340 1.1 macallan strcpy(ae->name, AudioEslinear_be);
1341 1.1 macallan ae->encoding = AUDIO_ENCODING_SLINEAR_BE;
1342 1.1 macallan ae->precision = 16;
1343 1.1 macallan ae->flags = 0;
1344 1.1 macallan break;
1345 1.1 macallan case 7:
1346 1.1 macallan strcpy(ae->name, AudioEulinear_be);
1347 1.1 macallan ae->encoding = AUDIO_ENCODING_ULINEAR_BE;
1348 1.1 macallan ae->precision = 16;
1349 1.1 macallan ae->flags = 0;
1350 1.1 macallan break;
1351 1.1 macallan default:
1352 1.1 macallan return (EINVAL);
1353 1.1 macallan }
1354 1.1 macallan
1355 1.1 macallan return (0);
1356 1.1 macallan }
1357 1.1 macallan
1358 1.1 macallan /*
1359 1.1 macallan * XXX: recording isn't supported - jmcneill
1360 1.1 macallan */
1361 1.1 macallan int
1362 1.1 macallan dbri_set_params(void *hdl, int setmode, int usemode,
1363 1.1 macallan struct audio_params *play, struct audio_params *rec,
1364 1.1 macallan stream_filter_list_t *pfil, stream_filter_list_t *rfil)
1365 1.1 macallan {
1366 1.1 macallan struct dbri_softc *sc = hdl;
1367 1.1 macallan int i;
1368 1.1 macallan
1369 1.1 macallan if ((play->precision != 8 && play->precision != 16) ||
1370 1.1 macallan (play->channels != 1 && play->channels != 2))
1371 1.1 macallan return (EINVAL);
1372 1.1 macallan
1373 1.1 macallan for (i = 0; CS4215_FREQ[i].freq; i++)
1374 1.1 macallan if (CS4215_FREQ[i].freq == play->sample_rate)
1375 1.1 macallan break;
1376 1.1 macallan
1377 1.1 macallan if (CS4215_FREQ[i].freq == 0)
1378 1.1 macallan return (EINVAL);
1379 1.1 macallan
1380 1.1 macallan /* set frequency */
1381 1.1 macallan sc->sc_mm.control[1] &= ~0x38;
1382 1.1 macallan sc->sc_mm.control[1] |= CS4215_FREQ[i].csval;
1383 1.1 macallan sc->sc_mm.control[2] &= ~0x70;
1384 1.1 macallan sc->sc_mm.control[2] |= CS4215_FREQ[i].xtal;
1385 1.1 macallan
1386 1.1 macallan /*play->factor = 1;
1387 1.1 macallan play->sw_code = NULL;*/
1388 1.1 macallan
1389 1.1 macallan switch (play->encoding) {
1390 1.1 macallan case AUDIO_ENCODING_ULAW:
1391 1.1 macallan sc->sc_mm.control[1] &= ~3;
1392 1.1 macallan sc->sc_mm.control[1] |= CS4215_DFR_ULAW;
1393 1.1 macallan break;
1394 1.1 macallan case AUDIO_ENCODING_ALAW:
1395 1.1 macallan sc->sc_mm.control[1] &= ~3;
1396 1.1 macallan sc->sc_mm.control[1] |= CS4215_DFR_ALAW;
1397 1.1 macallan break;
1398 1.1 macallan case AUDIO_ENCODING_SLINEAR_LE:
1399 1.1 macallan case AUDIO_ENCODING_ULINEAR_LE:
1400 1.1 macallan if (play->precision == 16) {
1401 1.1 macallan /* XXX this surely needs some changes elsewhere */
1402 1.1 macallan /*play->sw_code = swap_bytes;*/
1403 1.1 macallan sc->sc_mm.control[1] &= ~3;
1404 1.1 macallan sc->sc_mm.control[1] |= CS4215_DFR_LINEAR16;
1405 1.1 macallan }
1406 1.1 macallan break;
1407 1.1 macallan case AUDIO_ENCODING_ULINEAR:
1408 1.1 macallan case AUDIO_ENCODING_SLINEAR:
1409 1.1 macallan sc->sc_mm.control[1] &= ~3;
1410 1.1 macallan if (play->precision == 8) {
1411 1.1 macallan sc->sc_mm.control[1] |= CS4215_DFR_LINEAR8;
1412 1.1 macallan } else {
1413 1.1 macallan sc->sc_mm.control[1] |= CS4215_DFR_LINEAR16;
1414 1.1 macallan }
1415 1.1 macallan break;
1416 1.1 macallan case AUDIO_ENCODING_ULINEAR_BE:
1417 1.1 macallan case AUDIO_ENCODING_SLINEAR_BE:
1418 1.1 macallan sc->sc_mm.control[1] &= ~3;
1419 1.1 macallan sc->sc_mm.control[1] |= CS4215_DFR_LINEAR16;
1420 1.1 macallan break;
1421 1.1 macallan }
1422 1.1 macallan
1423 1.1 macallan switch (play->channels) {
1424 1.1 macallan case 1:
1425 1.1 macallan sc->sc_mm.control[1] &= ~CS4215_DFR_STEREO;
1426 1.1 macallan break;
1427 1.1 macallan case 2:
1428 1.1 macallan sc->sc_mm.control[1] |= CS4215_DFR_STEREO;
1429 1.1 macallan break;
1430 1.1 macallan }
1431 1.1 macallan
1432 1.1 macallan return (0);
1433 1.1 macallan }
1434 1.1 macallan
1435 1.1 macallan int
1436 1.1 macallan dbri_round_blocksize(void *hdl, int bs, int mode,
1437 1.1 macallan const audio_params_t *param)
1438 1.1 macallan {
1439 1.1 macallan
1440 1.1 macallan /* DBRI DMA segment size, rounded town to 32bit alignment */
1441 1.1 macallan return 0x1ffc;
1442 1.1 macallan }
1443 1.1 macallan
1444 1.1 macallan int
1445 1.1 macallan dbri_halt_output(void *hdl)
1446 1.1 macallan {
1447 1.1 macallan struct dbri_softc *sc = hdl;
1448 1.1 macallan
1449 1.1 macallan pipe_reset(sc, 4);
1450 1.1 macallan
1451 1.1 macallan return (0);
1452 1.1 macallan }
1453 1.1 macallan
1454 1.1 macallan int
1455 1.1 macallan dbri_getdev(void *hdl, struct audio_device *ret)
1456 1.1 macallan {
1457 1.1 macallan
1458 1.1 macallan *ret = dbri_device;
1459 1.1 macallan return (0);
1460 1.1 macallan }
1461 1.1 macallan
1462 1.1 macallan int
1463 1.1 macallan dbri_set_port(void *hdl, mixer_ctrl_t *mc)
1464 1.1 macallan {
1465 1.1 macallan struct dbri_softc *sc = hdl;
1466 1.1 macallan int latt = sc->sc_latt, ratt = sc->sc_ratt;
1467 1.1 macallan
1468 1.1 macallan switch (mc->dev) {
1469 1.1 macallan case DBRI_VOL_OUTPUT: /* master volume */
1470 1.1 macallan latt = (latt & 0xc0) | (63 -
1471 1.1 macallan min(mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] >> 2, 63));
1472 1.1 macallan ratt = (ratt & 0xc0) | (63 -
1473 1.1 macallan min(mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] >> 2, 63));
1474 1.1 macallan break;
1475 1.1 macallan case DBRI_ENABLE_MONO: /* built-in speaker */
1476 1.1 macallan if (mc->un.ord == 1) {
1477 1.1 macallan ratt |= CS4215_SE;
1478 1.1 macallan } else
1479 1.1 macallan ratt &= ~CS4215_SE;
1480 1.1 macallan break;
1481 1.1 macallan case DBRI_ENABLE_HEADPHONE: /* headphones output */
1482 1.1 macallan if (mc->un.ord == 1) {
1483 1.1 macallan latt |= CS4215_HE;
1484 1.1 macallan } else
1485 1.1 macallan latt &= ~CS4215_HE;
1486 1.1 macallan break;
1487 1.1 macallan case DBRI_ENABLE_LINE: /* line out */
1488 1.1 macallan if (mc->un.ord == 1) {
1489 1.1 macallan latt |= CS4215_LE;
1490 1.1 macallan } else
1491 1.1 macallan latt &= ~CS4215_LE;
1492 1.1 macallan break;
1493 1.1 macallan }
1494 1.1 macallan
1495 1.1 macallan sc->sc_latt = latt;
1496 1.1 macallan sc->sc_ratt = ratt;
1497 1.1 macallan
1498 1.1 macallan /* no need to do that here - mmcodec_setgain does it anyway */
1499 1.1 macallan /*pipe_transmit_fixed(sc, 20, *(int *)__UNVOLATILE(sc->sc_mm.data));*/
1500 1.1 macallan
1501 1.1 macallan mmcodec_setgain(sc, 0);
1502 1.1 macallan
1503 1.1 macallan return (0);
1504 1.1 macallan }
1505 1.1 macallan
1506 1.1 macallan int
1507 1.1 macallan dbri_get_port(void *hdl, mixer_ctrl_t *mc)
1508 1.1 macallan {
1509 1.1 macallan struct dbri_softc *sc = hdl;
1510 1.1 macallan
1511 1.1 macallan switch (mc->dev) {
1512 1.1 macallan case DBRI_VOL_OUTPUT: /* master volume */
1513 1.1 macallan mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1514 1.1 macallan (63 - (sc->sc_latt & 0x3f)) << 2;
1515 1.1 macallan mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1516 1.1 macallan (63 - (sc->sc_ratt & 0x3f)) << 2;
1517 1.1 macallan return (0);
1518 1.1 macallan case DBRI_ENABLE_MONO: /* built-in speaker */
1519 1.1 macallan mc->un.ord = (sc->sc_ratt & CS4215_SE) ? 1 : 0;
1520 1.1 macallan return 0;
1521 1.1 macallan case DBRI_ENABLE_HEADPHONE: /* headphones output */
1522 1.1 macallan mc->un.ord = (sc->sc_latt & CS4215_HE) ? 1 : 0;
1523 1.1 macallan return 0;
1524 1.1 macallan case DBRI_ENABLE_LINE: /* line out */
1525 1.1 macallan mc->un.ord = (sc->sc_latt & CS4215_LE) ? 1 : 0;
1526 1.1 macallan return 0;
1527 1.1 macallan }
1528 1.1 macallan return (EINVAL);
1529 1.1 macallan }
1530 1.1 macallan
1531 1.1 macallan int
1532 1.1 macallan dbri_query_devinfo(void *hdl, mixer_devinfo_t *di)
1533 1.1 macallan {
1534 1.1 macallan
1535 1.1 macallan switch (di->index) {
1536 1.1 macallan case DBRI_MONITOR_CLASS:
1537 1.1 macallan di->mixer_class = DBRI_MONITOR_CLASS;
1538 1.1 macallan strcpy(di->label.name, AudioCmonitor);
1539 1.1 macallan di->type = AUDIO_MIXER_CLASS;
1540 1.1 macallan di->next = di->prev = AUDIO_MIXER_LAST;
1541 1.1 macallan return 0;
1542 1.1 macallan case DBRI_VOL_OUTPUT: /* master volume */
1543 1.1 macallan di->mixer_class = DBRI_MONITOR_CLASS;
1544 1.1 macallan di->next = di->prev = AUDIO_MIXER_LAST;
1545 1.1 macallan strcpy(di->label.name, AudioNmaster);
1546 1.1 macallan di->type = AUDIO_MIXER_VALUE;
1547 1.1 macallan di->un.v.num_channels = 2;
1548 1.1 macallan strcpy(di->un.v.units.name, AudioNvolume);
1549 1.1 macallan return (0);
1550 1.1 macallan case DBRI_ENABLE_MONO: /* built-in speaker */
1551 1.1 macallan di->mixer_class = DBRI_MONITOR_CLASS;
1552 1.1 macallan di->next = di->prev = AUDIO_MIXER_LAST;
1553 1.1 macallan strcpy(di->label.name, AudioNmono);
1554 1.1 macallan di->type = AUDIO_MIXER_ENUM;
1555 1.1 macallan di->un.e.num_mem = 2;
1556 1.1 macallan strcpy(di->un.e.member[0].label.name, AudioNoff);
1557 1.1 macallan di->un.e.member[0].ord = 0;
1558 1.1 macallan strcpy(di->un.e.member[1].label.name, AudioNon);
1559 1.1 macallan di->un.e.member[1].ord = 1;
1560 1.1 macallan return (0);
1561 1.1 macallan case DBRI_ENABLE_HEADPHONE: /* headphones output */
1562 1.1 macallan di->mixer_class = DBRI_MONITOR_CLASS;
1563 1.1 macallan di->next = di->prev = AUDIO_MIXER_LAST;
1564 1.1 macallan strcpy(di->label.name, AudioNheadphone);
1565 1.1 macallan di->type = AUDIO_MIXER_ENUM;
1566 1.1 macallan di->un.e.num_mem = 2;
1567 1.1 macallan strcpy(di->un.e.member[0].label.name, AudioNoff);
1568 1.1 macallan di->un.e.member[0].ord = 0;
1569 1.1 macallan strcpy(di->un.e.member[1].label.name, AudioNon);
1570 1.1 macallan di->un.e.member[1].ord = 1;
1571 1.1 macallan return (0);
1572 1.1 macallan case DBRI_ENABLE_LINE: /* line out */
1573 1.1 macallan di->mixer_class = DBRI_MONITOR_CLASS;
1574 1.1 macallan di->next = di->prev = AUDIO_MIXER_LAST;
1575 1.1 macallan strcpy(di->label.name, AudioNline);
1576 1.1 macallan di->type = AUDIO_MIXER_ENUM;
1577 1.1 macallan di->un.e.num_mem = 2;
1578 1.1 macallan strcpy(di->un.e.member[0].label.name, AudioNoff);
1579 1.1 macallan di->un.e.member[0].ord = 0;
1580 1.1 macallan strcpy(di->un.e.member[1].label.name, AudioNon);
1581 1.1 macallan di->un.e.member[1].ord = 1;
1582 1.1 macallan return (0);
1583 1.1 macallan }
1584 1.1 macallan
1585 1.1 macallan return (ENXIO);
1586 1.1 macallan }
1587 1.1 macallan
1588 1.1 macallan size_t
1589 1.1 macallan dbri_round_buffersize(void *hdl, int dir, size_t bufsize)
1590 1.1 macallan {
1591 1.1 macallan #ifdef DBRI_BIG_BUFFER
1592 1.1 macallan return 16*0x1ffc; /* use ~128KB buffer */
1593 1.1 macallan #else
1594 1.1 macallan return bufsize;
1595 1.1 macallan #endif
1596 1.1 macallan }
1597 1.1 macallan
1598 1.1 macallan int
1599 1.1 macallan dbri_get_props(void *hdl)
1600 1.1 macallan {
1601 1.1 macallan
1602 1.1 macallan return (AUDIO_PROP_MMAP/* | AUDIO_PROP_INDEPENDENT*/);
1603 1.1 macallan //return (0);
1604 1.1 macallan }
1605 1.1 macallan
1606 1.1 macallan int
1607 1.1 macallan dbri_trigger_output(void *hdl, void *start, void *end, int blksize,
1608 1.1 macallan void (*intr)(void *), void *intrarg,
1609 1.1 macallan const struct audio_params *param)
1610 1.1 macallan {
1611 1.1 macallan struct dbri_softc *sc = hdl;
1612 1.1 macallan unsigned long count, current, num;
1613 1.1 macallan
1614 1.1 macallan count = (unsigned long)(((caddr_t)end - (caddr_t)start));
1615 1.1 macallan num = count / blksize;
1616 1.1 macallan #ifdef DBRI_DEBUG
1617 1.1 macallan printf("trigger_output(%lx %lx) : %d %ld %ld\n",
1618 1.1 macallan (unsigned long)intr,
1619 1.1 macallan (unsigned long)intrarg, blksize, count, num);
1620 1.1 macallan #endif
1621 1.1 macallan sc->sc_params = *param;
1622 1.1 macallan
1623 1.1 macallan mmcodec_setcontrol(sc);
1624 1.1 macallan mmcodec_init_data(sc);
1625 1.1 macallan current = 0;
1626 1.1 macallan while ((current < sc->sc_desc_used) &&
1627 1.1 macallan (sc->sc_desc[current].buf != start))
1628 1.1 macallan current++;
1629 1.1 macallan
1630 1.1 macallan if (current < sc->sc_desc_used) {
1631 1.1 macallan setup_ring(sc, 4, current, num, blksize, intr, intrarg);
1632 1.1 macallan return 0;
1633 1.1 macallan }
1634 1.1 macallan return EINVAL;
1635 1.1 macallan }
1636 1.1 macallan
1637 1.1 macallan u_int32_t
1638 1.1 macallan reverse_bytes(u_int32_t b, int len)
1639 1.1 macallan {
1640 1.1 macallan switch (len) {
1641 1.1 macallan case 32:
1642 1.1 macallan b = ((b & 0xffff0000) >> 16) | ((b & 0x0000ffff) << 16);
1643 1.1 macallan case 16:
1644 1.1 macallan b = ((b & 0xff00ff00) >> 8) | ((b & 0x00ff00ff) << 8);
1645 1.1 macallan case 8:
1646 1.1 macallan b = ((b & 0xf0f0f0f0) >> 4) | ((b & 0x0f0f0f0f) << 4);
1647 1.1 macallan case 4:
1648 1.1 macallan b = ((b & 0xcccccccc) >> 2) | ((b & 0x33333333) << 2);
1649 1.1 macallan case 2:
1650 1.1 macallan b = ((b & 0xaaaaaaaa) >> 1) | ((b & 0x55555555) << 1);
1651 1.1 macallan case 1:
1652 1.1 macallan case 0:
1653 1.1 macallan break;
1654 1.1 macallan default:
1655 1.1 macallan printf("reverse_bytes: unsupported length\n");
1656 1.1 macallan };
1657 1.1 macallan
1658 1.1 macallan return (b);
1659 1.1 macallan }
1660 1.1 macallan
1661 1.1 macallan static void
1662 1.1 macallan *dbri_malloc(void *v, int dir, size_t s, struct malloc_type *mt, int flags)
1663 1.1 macallan {
1664 1.1 macallan struct dbri_softc *sc = v;
1665 1.1 macallan struct dbri_desc *dd = &sc->sc_desc[sc->sc_desc_used];
1666 1.1 macallan int rseg;
1667 1.1 macallan
1668 1.1 macallan if (bus_dmamap_create(sc->sc_dmat, s, 1, s, 0, BUS_DMA_NOWAIT,
1669 1.1 macallan &dd->dmamap) == 0) {
1670 1.1 macallan if (bus_dmamem_alloc(sc->sc_dmat, s, 0, 0, &dd->dmaseg,
1671 1.1 macallan 1, &rseg, BUS_DMA_NOWAIT) == 0) {
1672 1.1 macallan if (bus_dmamem_map(sc->sc_dmat, &dd->dmaseg, rseg, s,
1673 1.1 macallan &dd->buf, BUS_DMA_NOWAIT|BUS_DMA_COHERENT) == 0) {
1674 1.1 macallan if (dd->buf!=NULL) {
1675 1.1 macallan if (bus_dmamap_load(sc->sc_dmat,
1676 1.1 macallan dd->dmamap, dd->buf, s, NULL,
1677 1.1 macallan BUS_DMA_NOWAIT) == 0) {
1678 1.1 macallan dd->len = s;
1679 1.1 macallan dd->busy = 0;
1680 1.1 macallan dd->callback = NULL;
1681 1.1 macallan dd->dmabase =
1682 1.1 macallan dd->dmamap->dm_segs[0].ds_addr;
1683 1.1 macallan #ifdef DBRI_DEBUG
1684 1.1 macallan printf("dbri_malloc: using buffer %d\n",
1685 1.1 macallan sc->sc_desc_used);
1686 1.1 macallan #endif
1687 1.1 macallan sc->sc_desc_used++;
1688 1.1 macallan return dd->buf;
1689 1.1 macallan } else
1690 1.1 macallan printf("dbri_malloc: load failed\n");
1691 1.1 macallan } else
1692 1.1 macallan printf("dbri_malloc: map returned NULL\n");
1693 1.1 macallan } else
1694 1.1 macallan printf("dbri_malloc: map failed\n");
1695 1.1 macallan bus_dmamem_free(sc->sc_dmat, &dd->dmaseg, rseg);
1696 1.1 macallan } else
1697 1.1 macallan printf("dbri_malloc: malloc() failed\n");
1698 1.1 macallan bus_dmamap_destroy(sc->sc_dmat, dd->dmamap);
1699 1.1 macallan } else
1700 1.1 macallan printf("dbri_malloc: bus_dmamap_create() failed\n");
1701 1.1 macallan return NULL;
1702 1.1 macallan }
1703 1.1 macallan
1704 1.1 macallan static void
1705 1.1 macallan dbri_free(void *v, void *p, struct malloc_type *mt)
1706 1.1 macallan {
1707 1.1 macallan free(p, mt);
1708 1.1 macallan }
1709 1.1 macallan
1710 1.1 macallan static paddr_t
1711 1.1 macallan dbri_mappage(void *v, void *mem, off_t off, int prot)
1712 1.1 macallan {
1713 1.1 macallan struct dbri_softc *sc = v;;
1714 1.1 macallan int current;
1715 1.1 macallan
1716 1.1 macallan if (off < 0)
1717 1.1 macallan return -1;
1718 1.1 macallan
1719 1.1 macallan current = 0;
1720 1.1 macallan while ((current < sc->sc_desc_used) &&
1721 1.1 macallan (sc->sc_desc[current].buf != mem))
1722 1.1 macallan current++;
1723 1.1 macallan
1724 1.1 macallan if (current < sc->sc_desc_used) {
1725 1.1 macallan return bus_dmamem_mmap(sc->sc_dmat,
1726 1.1 macallan &sc->sc_desc[current].dmaseg, 1, off, prot, BUS_DMA_WAITOK);
1727 1.1 macallan }
1728 1.1 macallan
1729 1.1 macallan return -1;
1730 1.1 macallan }
1731 1.1 macallan
1732 1.1 macallan #endif
1733