dbri.c revision 1.5.4.3 1 1.5.4.3 yamt /* $NetBSD: dbri.c,v 1.5.4.3 2006/12/30 20:49:33 yamt Exp $ */
2 1.5.4.2 yamt
3 1.5.4.2 yamt /*
4 1.5.4.2 yamt * Copyright (C) 1997 Rudolf Koenig (rfkoenig (at) immd4.informatik.uni-erlangen.de)
5 1.5.4.2 yamt * Copyright (c) 1998, 1999 Brent Baccala (baccala (at) freesoft.org)
6 1.5.4.2 yamt * Copyright (c) 2001, 2002 Jared D. McNeill <jmcneill (at) netbsd.org>
7 1.5.4.2 yamt * Copyright (c) 2005 Michael Lorenz <macallan (at) netbsd.org>
8 1.5.4.2 yamt * All rights reserved.
9 1.5.4.2 yamt *
10 1.5.4.2 yamt * This driver is losely based on a Linux driver written by Rudolf Koenig and
11 1.5.4.2 yamt * Brent Baccala who kindly gave their permission to use their code in a
12 1.5.4.2 yamt * BSD-licensed driver.
13 1.5.4.2 yamt *
14 1.5.4.2 yamt * Redistribution and use in source and binary forms, with or without
15 1.5.4.2 yamt * modification, are permitted provided that the following conditions
16 1.5.4.2 yamt * are met:
17 1.5.4.2 yamt * 1. Redistributions of source code must retain the above copyright
18 1.5.4.2 yamt * notice, this list of conditions and the following disclaimer.
19 1.5.4.2 yamt * 2. Redistributions in binary form must reproduce the above copyright
20 1.5.4.2 yamt * notice, this list of conditions and the following disclaimer in the
21 1.5.4.2 yamt * documentation and/or other materials provided with the distribution.
22 1.5.4.2 yamt * 3. All advertising materials mentioning features or use of this software
23 1.5.4.2 yamt * must display the following acknowledgement:
24 1.5.4.2 yamt * This product includes software developed by Rudolf Koenig, Brent
25 1.5.4.2 yamt * Baccala, Jared D. McNeill.
26 1.5.4.2 yamt * 4. Neither the name of the author nor the names of any contributors may
27 1.5.4.2 yamt * be used to endorse or promote products derived from this software
28 1.5.4.2 yamt * without specific prior written permission.
29 1.5.4.2 yamt *
30 1.5.4.2 yamt * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31 1.5.4.2 yamt * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 1.5.4.2 yamt * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 1.5.4.2 yamt * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34 1.5.4.2 yamt * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 1.5.4.2 yamt * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 1.5.4.2 yamt * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 1.5.4.2 yamt * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 1.5.4.2 yamt * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39 1.5.4.2 yamt * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 1.5.4.2 yamt * SUCH DAMAGE.
41 1.5.4.2 yamt *
42 1.5.4.2 yamt */
43 1.5.4.2 yamt
44 1.5.4.2 yamt #include <sys/cdefs.h>
45 1.5.4.3 yamt __KERNEL_RCSID(0, "$NetBSD: dbri.c,v 1.5.4.3 2006/12/30 20:49:33 yamt Exp $");
46 1.5.4.2 yamt
47 1.5.4.2 yamt #include "audio.h"
48 1.5.4.2 yamt #if NAUDIO > 0
49 1.5.4.2 yamt
50 1.5.4.2 yamt #include <sys/param.h>
51 1.5.4.2 yamt #include <sys/systm.h>
52 1.5.4.2 yamt #include <sys/errno.h>
53 1.5.4.2 yamt #include <sys/device.h>
54 1.5.4.2 yamt #include <sys/malloc.h>
55 1.5.4.2 yamt #include <sys/proc.h>
56 1.5.4.2 yamt
57 1.5.4.2 yamt #include <machine/bus.h>
58 1.5.4.2 yamt #include <machine/intr.h>
59 1.5.4.2 yamt
60 1.5.4.2 yamt #include <dev/sbus/sbusvar.h>
61 1.5.4.2 yamt #include <sparc/sparc/auxreg.h>
62 1.5.4.2 yamt #include <machine/autoconf.h>
63 1.5.4.2 yamt
64 1.5.4.2 yamt #include <sys/audioio.h>
65 1.5.4.2 yamt #include <dev/audio_if.h>
66 1.5.4.2 yamt #include <dev/auconv.h>
67 1.5.4.2 yamt
68 1.5.4.2 yamt #include <dev/ic/cs4215reg.h>
69 1.5.4.2 yamt #include <dev/ic/cs4215var.h>
70 1.5.4.2 yamt #include <dev/sbus/dbrireg.h>
71 1.5.4.2 yamt #include <dev/sbus/dbrivar.h>
72 1.5.4.2 yamt
73 1.5.4.2 yamt #include "opt_sbus_dbri.h"
74 1.5.4.2 yamt
75 1.5.4.2 yamt #define DBRI_ROM_NAME_PREFIX "SUNW,DBRI"
76 1.5.4.2 yamt
77 1.5.4.2 yamt #ifdef DBRI_DEBUG
78 1.5.4.2 yamt #define DPRINTF(x) printf x
79 1.5.4.2 yamt #else
80 1.5.4.2 yamt #define DPRINTF(x)
81 1.5.4.2 yamt #endif
82 1.5.4.2 yamt
83 1.5.4.2 yamt static const char *dbri_supported[] = {
84 1.5.4.2 yamt "e",
85 1.5.4.2 yamt "s3",
86 1.5.4.2 yamt ""
87 1.5.4.2 yamt };
88 1.5.4.2 yamt
89 1.5.4.2 yamt enum ms {
90 1.5.4.2 yamt CHImaster,
91 1.5.4.2 yamt CHIslave
92 1.5.4.2 yamt };
93 1.5.4.2 yamt
94 1.5.4.2 yamt enum io {
95 1.5.4.2 yamt PIPEinput,
96 1.5.4.2 yamt PIPEoutput
97 1.5.4.2 yamt };
98 1.5.4.2 yamt
99 1.5.4.2 yamt /*
100 1.5.4.2 yamt * Function prototypes
101 1.5.4.2 yamt */
102 1.5.4.2 yamt
103 1.5.4.2 yamt /* softc stuff */
104 1.5.4.2 yamt static void dbri_attach_sbus(struct device *, struct device *, void *);
105 1.5.4.2 yamt static int dbri_match_sbus(struct device *, struct cfdata *, void *);
106 1.5.4.2 yamt
107 1.5.4.2 yamt static void dbri_config_interrupts(struct device *);
108 1.5.4.2 yamt
109 1.5.4.2 yamt /* interrupt handler */
110 1.5.4.2 yamt static int dbri_intr(void *);
111 1.5.4.2 yamt
112 1.5.4.2 yamt /* supporting subroutines */
113 1.5.4.2 yamt static int dbri_init(struct dbri_softc *);
114 1.5.4.2 yamt static int dbri_reset(struct dbri_softc *);
115 1.5.4.2 yamt static volatile u_int32_t *dbri_command_lock(struct dbri_softc *);
116 1.5.4.2 yamt static void dbri_command_send(struct dbri_softc *, volatile u_int32_t *);
117 1.5.4.2 yamt static void dbri_process_interrupt_buffer(struct dbri_softc *);
118 1.5.4.2 yamt static void dbri_process_interrupt(struct dbri_softc *, int32_t);
119 1.5.4.2 yamt
120 1.5.4.2 yamt /* mmcodec subroutines */
121 1.5.4.2 yamt static int mmcodec_init(struct dbri_softc *);
122 1.5.4.2 yamt static void mmcodec_init_data(struct dbri_softc *);
123 1.5.4.2 yamt static void mmcodec_pipe_init(struct dbri_softc *);
124 1.5.4.2 yamt static void mmcodec_default(struct dbri_softc *);
125 1.5.4.2 yamt static void mmcodec_setgain(struct dbri_softc *, int);
126 1.5.4.2 yamt static int mmcodec_setcontrol(struct dbri_softc *);
127 1.5.4.2 yamt
128 1.5.4.2 yamt /* chi subroutines */
129 1.5.4.2 yamt static void chi_reset(struct dbri_softc *, enum ms, int);
130 1.5.4.2 yamt
131 1.5.4.2 yamt /* pipe subroutines */
132 1.5.4.2 yamt static void pipe_setup(struct dbri_softc *, int, int);
133 1.5.4.2 yamt static void pipe_reset(struct dbri_softc *, int);
134 1.5.4.2 yamt static void pipe_receive_fixed(struct dbri_softc *, int,
135 1.5.4.2 yamt volatile u_int32_t *);
136 1.5.4.2 yamt static void pipe_transmit_fixed(struct dbri_softc *, int, u_int32_t);
137 1.5.4.2 yamt
138 1.5.4.2 yamt static void pipe_ts_link(struct dbri_softc *, int, enum io, int, int, int);
139 1.5.4.2 yamt static int pipe_active(struct dbri_softc *, int);
140 1.5.4.2 yamt
141 1.5.4.2 yamt /* audio(9) stuff */
142 1.5.4.2 yamt static int dbri_query_encoding(void *, struct audio_encoding *);
143 1.5.4.2 yamt static int dbri_set_params(void *, int, int, struct audio_params *,
144 1.5.4.2 yamt struct audio_params *,stream_filter_list_t *, stream_filter_list_t *);
145 1.5.4.2 yamt static int dbri_round_blocksize(void *, int, int, const audio_params_t *);
146 1.5.4.2 yamt static int dbri_halt_output(void *);
147 1.5.4.2 yamt static int dbri_getdev(void *, struct audio_device *);
148 1.5.4.2 yamt static int dbri_set_port(void *, mixer_ctrl_t *);
149 1.5.4.2 yamt static int dbri_get_port(void *, mixer_ctrl_t *);
150 1.5.4.2 yamt static int dbri_query_devinfo(void *, mixer_devinfo_t *);
151 1.5.4.2 yamt static size_t dbri_round_buffersize(void *, int, size_t);
152 1.5.4.2 yamt static int dbri_get_props(void *);
153 1.5.4.2 yamt static int dbri_open(void *, int);
154 1.5.4.2 yamt static void dbri_close(void *);
155 1.5.4.2 yamt
156 1.5.4.2 yamt static void
157 1.5.4.2 yamt setup_ring(struct dbri_softc *, int, int, int, int, void (*)(void *), void *);
158 1.5.4.2 yamt
159 1.5.4.2 yamt static int dbri_trigger_output(void *, void *, void *, int,
160 1.5.4.2 yamt void (*)(void *), void *, const struct audio_params *);
161 1.5.4.2 yamt
162 1.5.4.2 yamt static void *dbri_malloc(void *, int, size_t, struct malloc_type *, int);
163 1.5.4.2 yamt static void dbri_free(void *, void *, struct malloc_type *);
164 1.5.4.2 yamt static paddr_t dbri_mappage(void *, void *, off_t, int);
165 1.5.4.2 yamt static void dbri_set_power(struct dbri_softc *, int);
166 1.5.4.2 yamt static void dbri_bring_up(struct dbri_softc *);
167 1.5.4.2 yamt static void dbri_powerhook(int, void *);
168 1.5.4.2 yamt
169 1.5.4.2 yamt /* stupid support routines */
170 1.5.4.2 yamt static u_int32_t reverse_bytes(u_int32_t, int);
171 1.5.4.2 yamt
172 1.5.4.2 yamt struct audio_device dbri_device = {
173 1.5.4.2 yamt "CS4215",
174 1.5.4.2 yamt "",
175 1.5.4.2 yamt "dbri"
176 1.5.4.2 yamt };
177 1.5.4.2 yamt
178 1.5.4.2 yamt struct audio_hw_if dbri_hw_if = {
179 1.5.4.2 yamt dbri_open,
180 1.5.4.2 yamt dbri_close,
181 1.5.4.2 yamt NULL, /* drain */
182 1.5.4.2 yamt dbri_query_encoding,
183 1.5.4.2 yamt dbri_set_params,
184 1.5.4.2 yamt dbri_round_blocksize,
185 1.5.4.2 yamt NULL, /* commit_settings */
186 1.5.4.2 yamt NULL, /* init_output */
187 1.5.4.2 yamt NULL, /* init_input */
188 1.5.4.2 yamt NULL, /* start_output */
189 1.5.4.2 yamt NULL, /* start_input */
190 1.5.4.2 yamt dbri_halt_output,
191 1.5.4.2 yamt NULL, /* halt_input */
192 1.5.4.2 yamt NULL, /* speaker_ctl */
193 1.5.4.2 yamt dbri_getdev,
194 1.5.4.2 yamt NULL, /* setfd */
195 1.5.4.2 yamt dbri_set_port,
196 1.5.4.2 yamt dbri_get_port,
197 1.5.4.2 yamt dbri_query_devinfo,
198 1.5.4.2 yamt dbri_malloc,
199 1.5.4.2 yamt dbri_free,
200 1.5.4.2 yamt dbri_round_buffersize,
201 1.5.4.2 yamt dbri_mappage,
202 1.5.4.2 yamt dbri_get_props,
203 1.5.4.2 yamt dbri_trigger_output,
204 1.5.4.2 yamt NULL /* trigger_input */
205 1.5.4.2 yamt };
206 1.5.4.2 yamt
207 1.5.4.2 yamt CFATTACH_DECL(dbri, sizeof(struct dbri_softc),
208 1.5.4.2 yamt dbri_match_sbus, dbri_attach_sbus, NULL, NULL);
209 1.5.4.2 yamt
210 1.5.4.2 yamt enum {
211 1.5.4.2 yamt DBRI_MONITOR_CLASS,
212 1.5.4.2 yamt DBRI_VOL_OUTPUT,
213 1.5.4.2 yamt DBRI_ENABLE_MONO,
214 1.5.4.2 yamt DBRI_ENABLE_HEADPHONE,
215 1.5.4.2 yamt DBRI_ENABLE_LINE
216 1.5.4.2 yamt /*
217 1.5.4.2 yamt DBRI_INPUT_CLASS,
218 1.5.4.2 yamt DBRI_RECORD_CLASS,
219 1.5.4.2 yamt DBRI_INPUT_GAIN,
220 1.5.4.2 yamt DBRI_INPUT_SELECT,
221 1.5.4.2 yamt DBRI_ENUM_LAST
222 1.5.4.2 yamt */
223 1.5.4.2 yamt };
224 1.5.4.2 yamt
225 1.5.4.2 yamt /*
226 1.5.4.2 yamt * Autoconfig routines
227 1.5.4.2 yamt */
228 1.5.4.2 yamt int
229 1.5.4.2 yamt dbri_match_sbus(struct device *parent, struct cfdata *match, void *aux)
230 1.5.4.2 yamt {
231 1.5.4.2 yamt struct sbus_attach_args *sa = aux;
232 1.5.4.2 yamt char *ver;
233 1.5.4.2 yamt int i;
234 1.5.4.2 yamt
235 1.5.4.2 yamt if (strncmp(DBRI_ROM_NAME_PREFIX, sa->sa_name, 9))
236 1.5.4.2 yamt return (0);
237 1.5.4.2 yamt
238 1.5.4.2 yamt ver = &sa->sa_name[9];
239 1.5.4.2 yamt
240 1.5.4.2 yamt for (i = 0; dbri_supported[i][0] != '\0'; i++)
241 1.5.4.2 yamt if (strcmp(dbri_supported[i], ver) == 0)
242 1.5.4.2 yamt return (1);
243 1.5.4.2 yamt
244 1.5.4.2 yamt return (0);
245 1.5.4.2 yamt }
246 1.5.4.2 yamt
247 1.5.4.2 yamt void
248 1.5.4.2 yamt dbri_attach_sbus(struct device *parent, struct device *self, void *aux)
249 1.5.4.2 yamt {
250 1.5.4.2 yamt struct dbri_softc *sc = (struct dbri_softc *)self;
251 1.5.4.2 yamt struct sbus_attach_args *sa = aux;
252 1.5.4.2 yamt bus_space_handle_t ioh;
253 1.5.4.2 yamt bus_size_t size;
254 1.5.4.2 yamt int error, rseg, pwr;
255 1.5.4.2 yamt char *ver = &sa->sa_name[9];
256 1.5.4.2 yamt
257 1.5.4.2 yamt sc->sc_iot = sa->sa_bustag;
258 1.5.4.2 yamt sc->sc_dmat = sa->sa_dmatag;
259 1.5.4.2 yamt sc->sc_powerstate = PWR_RESUME;
260 1.5.4.2 yamt
261 1.5.4.2 yamt pwr = prom_getpropint(sa->sa_node,"pwr-on-auxio",0);
262 1.5.4.2 yamt if(pwr) {
263 1.5.4.2 yamt /*
264 1.5.4.2 yamt * we can control DBRI power via auxio and we're initially
265 1.5.4.2 yamt * powered down
266 1.5.4.2 yamt */
267 1.5.4.2 yamt
268 1.5.4.2 yamt sc->sc_have_powerctl = 1;
269 1.5.4.2 yamt sc->sc_powerstate = 0;
270 1.5.4.2 yamt printf("\n");
271 1.5.4.2 yamt dbri_set_power(sc, 1);
272 1.5.4.3 yamt powerhook_establish(self->dv_xname, dbri_powerhook, sc);
273 1.5.4.2 yamt } else {
274 1.5.4.2 yamt /* we can't control power so we're always up */
275 1.5.4.2 yamt sc->sc_have_powerctl = 0;
276 1.5.4.2 yamt sc->sc_powerstate = 1;
277 1.5.4.2 yamt printf(": rev %s\n", ver);
278 1.5.4.2 yamt }
279 1.5.4.2 yamt
280 1.5.4.2 yamt if (sa->sa_npromvaddrs)
281 1.5.4.2 yamt ioh = (bus_space_handle_t)sa->sa_promvaddrs[0];
282 1.5.4.2 yamt else {
283 1.5.4.2 yamt if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
284 1.5.4.2 yamt sa->sa_offset, sa->sa_size,
285 1.5.4.2 yamt BUS_SPACE_MAP_LINEAR, /*0,*/ &ioh) != 0) {
286 1.5.4.2 yamt printf("%s @ sbus: cannot map registers\n",
287 1.5.4.2 yamt self->dv_xname);
288 1.5.4.2 yamt return;
289 1.5.4.2 yamt }
290 1.5.4.2 yamt }
291 1.5.4.2 yamt
292 1.5.4.2 yamt sc->sc_ioh = ioh;
293 1.5.4.2 yamt
294 1.5.4.2 yamt size = sizeof(struct dbri_dma);
295 1.5.4.2 yamt
296 1.5.4.2 yamt /* get a DMA handle */
297 1.5.4.2 yamt if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
298 1.5.4.2 yamt BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
299 1.5.4.2 yamt printf("%s: DMA map create error %d\n", self->dv_xname, error);
300 1.5.4.2 yamt return;
301 1.5.4.2 yamt }
302 1.5.4.2 yamt
303 1.5.4.2 yamt /* allocate DMA buffer */
304 1.5.4.2 yamt if ((error = bus_dmamem_alloc(sc->sc_dmat, size, 0, 0, &sc->sc_dmaseg,
305 1.5.4.2 yamt 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
306 1.5.4.2 yamt printf("%s: DMA buffer alloc error %d\n",
307 1.5.4.2 yamt self->dv_xname, error);
308 1.5.4.2 yamt return;
309 1.5.4.2 yamt }
310 1.5.4.2 yamt
311 1.5.4.2 yamt /* map DMA buffer into CPU addressable space */
312 1.5.4.2 yamt if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dmaseg, rseg, size,
313 1.5.4.2 yamt &sc->sc_membase,
314 1.5.4.2 yamt BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
315 1.5.4.2 yamt printf("%s: DMA buffer map error %d\n",
316 1.5.4.2 yamt self->dv_xname, error);
317 1.5.4.2 yamt return;
318 1.5.4.2 yamt }
319 1.5.4.2 yamt
320 1.5.4.2 yamt /* load the buffer */
321 1.5.4.2 yamt if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap,
322 1.5.4.2 yamt sc->sc_membase, size, NULL,
323 1.5.4.2 yamt BUS_DMA_NOWAIT)) != 0) {
324 1.5.4.2 yamt printf("%s: DMA buffer map load error %d\n",
325 1.5.4.2 yamt self->dv_xname, error);
326 1.5.4.2 yamt bus_dmamem_unmap(sc->sc_dmat, sc->sc_membase, size);
327 1.5.4.2 yamt bus_dmamem_free(sc->sc_dmat, &sc->sc_dmaseg, rseg);
328 1.5.4.2 yamt return;
329 1.5.4.2 yamt }
330 1.5.4.2 yamt
331 1.5.4.2 yamt /* map the registers into memory */
332 1.5.4.2 yamt
333 1.5.4.2 yamt sc->sc_dma = (struct dbri_dma *)sc->sc_membase; /* kernel virtual address of DMA buffer */
334 1.5.4.2 yamt sc->sc_dmabase = sc->sc_dmamap->dm_segs[0].ds_addr; /* physical address of DMA buffer */
335 1.5.4.2 yamt sc->sc_bufsiz = size;
336 1.5.4.2 yamt
337 1.5.4.2 yamt sbus_establish(&sc->sc_sd, &sc->sc_dev);
338 1.5.4.2 yamt
339 1.5.4.2 yamt bus_intr_establish(sa->sa_bustag, sa->sa_pri, IPL_AUDIO, /*0,*/
340 1.5.4.2 yamt dbri_intr, sc);
341 1.5.4.2 yamt
342 1.5.4.2 yamt sc->sc_locked = 0;
343 1.5.4.2 yamt sc->sc_desc_used = 0;
344 1.5.4.2 yamt
345 1.5.4.2 yamt config_interrupts(self, &dbri_config_interrupts);
346 1.5.4.2 yamt
347 1.5.4.2 yamt return;
348 1.5.4.2 yamt }
349 1.5.4.2 yamt
350 1.5.4.2 yamt /*
351 1.5.4.2 yamt * lowlevel routine to switch power for the DBRI chip
352 1.5.4.2 yamt */
353 1.5.4.2 yamt static void
354 1.5.4.2 yamt dbri_set_power(struct dbri_softc *sc, int state)
355 1.5.4.2 yamt {
356 1.5.4.2 yamt int s;
357 1.5.4.2 yamt
358 1.5.4.2 yamt if (sc->sc_have_powerctl == 0)
359 1.5.4.2 yamt return;
360 1.5.4.2 yamt if (sc->sc_powerstate == state)
361 1.5.4.2 yamt return;
362 1.5.4.2 yamt
363 1.5.4.2 yamt if (state) {
364 1.5.4.2 yamt DPRINTF(("%s: waiting to power up... ", sc->sc_dev.dv_xname));
365 1.5.4.2 yamt s = splhigh();
366 1.5.4.2 yamt *AUXIO4M_REG |= (AUXIO4M_MMX);
367 1.5.4.2 yamt splx(s);
368 1.5.4.2 yamt DELAY(1000);
369 1.5.4.2 yamt DPRINTF(("done\n")); /* more delay... */
370 1.5.4.2 yamt } else {
371 1.5.4.2 yamt DPRINTF(("%s: powering down\n", sc->sc_dev.dv_xname));
372 1.5.4.2 yamt s = splhigh();
373 1.5.4.2 yamt *AUXIO4M_REG &= ~AUXIO4M_MMX;
374 1.5.4.2 yamt splx(s);
375 1.5.4.2 yamt }
376 1.5.4.2 yamt sc->sc_powerstate = state;
377 1.5.4.2 yamt }
378 1.5.4.2 yamt
379 1.5.4.2 yamt /*
380 1.5.4.2 yamt * power up and re-initialize the chip
381 1.5.4.2 yamt */
382 1.5.4.2 yamt static void
383 1.5.4.2 yamt dbri_bring_up(struct dbri_softc *sc)
384 1.5.4.2 yamt {
385 1.5.4.2 yamt
386 1.5.4.2 yamt if (sc->sc_have_powerctl == 0)
387 1.5.4.2 yamt return;
388 1.5.4.2 yamt if (sc->sc_powerstate == 1)
389 1.5.4.2 yamt return;
390 1.5.4.2 yamt
391 1.5.4.2 yamt /* ok, we really need to do something */
392 1.5.4.2 yamt dbri_set_power(sc, 1);
393 1.5.4.2 yamt
394 1.5.4.2 yamt /*
395 1.5.4.2 yamt * re-initialize the chip but skip all the probing, don't overwrite
396 1.5.4.2 yamt * any other settings either
397 1.5.4.2 yamt */
398 1.5.4.2 yamt dbri_init(sc);
399 1.5.4.2 yamt mmcodec_setgain(sc, 1);
400 1.5.4.2 yamt mmcodec_pipe_init(sc);
401 1.5.4.2 yamt mmcodec_init_data(sc);
402 1.5.4.2 yamt mmcodec_setgain(sc, 0);
403 1.5.4.2 yamt }
404 1.5.4.2 yamt
405 1.5.4.2 yamt void
406 1.5.4.2 yamt dbri_config_interrupts(struct device *dev)
407 1.5.4.2 yamt {
408 1.5.4.2 yamt struct dbri_softc *sc = (struct dbri_softc *)dev;
409 1.5.4.2 yamt dbri_init(sc);
410 1.5.4.2 yamt mmcodec_init(sc);
411 1.5.4.2 yamt /* Attach ourselves to the high level audio interface */
412 1.5.4.2 yamt audio_attach_mi(&dbri_hw_if, sc, &sc->sc_dev);
413 1.5.4.2 yamt
414 1.5.4.2 yamt /* power down until open() */
415 1.5.4.2 yamt dbri_set_power(sc, 0);
416 1.5.4.2 yamt return;
417 1.5.4.2 yamt }
418 1.5.4.2 yamt
419 1.5.4.2 yamt int
420 1.5.4.2 yamt dbri_intr(void *hdl)
421 1.5.4.2 yamt {
422 1.5.4.2 yamt struct dbri_softc *sc = hdl;
423 1.5.4.2 yamt bus_space_tag_t iot = sc->sc_iot;
424 1.5.4.2 yamt bus_space_handle_t ioh = sc->sc_ioh;
425 1.5.4.2 yamt int x;
426 1.5.4.2 yamt
427 1.5.4.2 yamt /* clear interrupt */
428 1.5.4.2 yamt x = bus_space_read_4(iot, ioh, DBRI_REG1);
429 1.5.4.2 yamt if (x & (DBRI_MRR | DBRI_MLE | DBRI_LBG | DBRI_MBE)) {
430 1.5.4.2 yamt u_int32_t tmp;
431 1.5.4.2 yamt
432 1.5.4.2 yamt if (x & DBRI_MRR)
433 1.5.4.2 yamt printf("%s: multiple ack error on sbus\n",
434 1.5.4.2 yamt sc->sc_dev.dv_xname);
435 1.5.4.2 yamt if (x & DBRI_MLE)
436 1.5.4.2 yamt printf("%s: multiple late error on sbus\n",
437 1.5.4.2 yamt sc->sc_dev.dv_xname);
438 1.5.4.2 yamt if (x & DBRI_LBG)
439 1.5.4.2 yamt printf("%s: lost bus grant on sbus\n",
440 1.5.4.2 yamt sc->sc_dev.dv_xname);
441 1.5.4.2 yamt if (x & DBRI_MBE)
442 1.5.4.2 yamt printf("%s: burst error on sbus\n",
443 1.5.4.2 yamt sc->sc_dev.dv_xname);
444 1.5.4.2 yamt
445 1.5.4.2 yamt /*
446 1.5.4.2 yamt * Some of these errors disable the chip's circuitry.
447 1.5.4.2 yamt * Re-enable the circuitry and keep on going.
448 1.5.4.2 yamt */
449 1.5.4.2 yamt
450 1.5.4.2 yamt tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
451 1.5.4.2 yamt tmp &= ~(DBRI_DISABLE_MASTER);
452 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
453 1.5.4.2 yamt }
454 1.5.4.2 yamt
455 1.5.4.2 yamt #if 0
456 1.5.4.2 yamt if (!x & 1) /* XXX: DBRI_INTR_REQ */
457 1.5.4.2 yamt return (1);
458 1.5.4.2 yamt #endif
459 1.5.4.2 yamt
460 1.5.4.2 yamt dbri_process_interrupt_buffer(sc);
461 1.5.4.2 yamt
462 1.5.4.2 yamt return (1);
463 1.5.4.2 yamt }
464 1.5.4.2 yamt
465 1.5.4.2 yamt int
466 1.5.4.2 yamt dbri_init(struct dbri_softc *sc)
467 1.5.4.2 yamt {
468 1.5.4.2 yamt bus_space_tag_t iot = sc->sc_iot;
469 1.5.4.2 yamt bus_space_handle_t ioh = sc->sc_ioh;
470 1.5.4.2 yamt u_int32_t reg;
471 1.5.4.2 yamt volatile u_int32_t *cmd;
472 1.5.4.2 yamt bus_addr_t dmaaddr;
473 1.5.4.2 yamt int n;
474 1.5.4.2 yamt
475 1.5.4.2 yamt dbri_reset(sc);
476 1.5.4.2 yamt
477 1.5.4.2 yamt cmd = dbri_command_lock(sc);
478 1.5.4.2 yamt
479 1.5.4.2 yamt /* XXX: Initialize interrupt ring buffer */
480 1.5.4.2 yamt sc->sc_dma->intr[0] = (u_int32_t)sc->sc_dmabase + dbri_dma_off(intr, 0);
481 1.5.4.2 yamt sc->sc_irqp = 1;
482 1.5.4.2 yamt
483 1.5.4.2 yamt /* Initialize pipes */
484 1.5.4.2 yamt for (n = 0; n < DBRI_PIPE_MAX; n++)
485 1.5.4.2 yamt sc->sc_pipe[n].desc = sc->sc_pipe[n].next = -1;
486 1.5.4.2 yamt
487 1.5.4.2 yamt for(n=1;n<DBRI_INT_BLOCKS;n++) {
488 1.5.4.2 yamt sc->sc_dma->intr[n]=0;
489 1.5.4.2 yamt }
490 1.5.4.2 yamt
491 1.5.4.2 yamt /* Disable all SBus bursts */
492 1.5.4.2 yamt /* XXX 16 byte bursts cause errors, the rest works */
493 1.5.4.2 yamt reg = bus_space_read_4(iot, ioh, DBRI_REG0);
494 1.5.4.2 yamt /*reg &= ~(DBRI_BURST_4 | DBRI_BURST_8 | DBRI_BURST_16);*/
495 1.5.4.2 yamt reg |= (DBRI_BURST_4 | DBRI_BURST_8);
496 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG0, reg);
497 1.5.4.2 yamt
498 1.5.4.2 yamt /* setup interrupt queue */
499 1.5.4.2 yamt dmaaddr = (u_int32_t)sc->sc_dmabase + dbri_dma_off(intr, 0);
500 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_IIQ, 0, 0);
501 1.5.4.2 yamt *(cmd++) = dmaaddr;
502 1.5.4.2 yamt
503 1.5.4.2 yamt dbri_command_send(sc, cmd);
504 1.5.4.2 yamt return (0);
505 1.5.4.2 yamt }
506 1.5.4.2 yamt
507 1.5.4.2 yamt int
508 1.5.4.2 yamt dbri_reset(struct dbri_softc *sc)
509 1.5.4.2 yamt {
510 1.5.4.2 yamt int bail=0;
511 1.5.4.2 yamt bus_space_tag_t iot = sc->sc_iot;
512 1.5.4.2 yamt bus_space_handle_t ioh = sc->sc_ioh;
513 1.5.4.2 yamt
514 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG0, DBRI_SOFT_RESET);
515 1.5.4.2 yamt while ((bus_space_read_4(iot, ioh, DBRI_REG0) & DBRI_SOFT_RESET) &&
516 1.5.4.2 yamt (bail < 100000)) {
517 1.5.4.2 yamt bail++;
518 1.5.4.2 yamt delay(10);
519 1.5.4.2 yamt }
520 1.5.4.2 yamt if (bail == 100000) printf("%s: reset timed out\n",sc->sc_dev.dv_xname);
521 1.5.4.2 yamt return (0);
522 1.5.4.2 yamt }
523 1.5.4.2 yamt
524 1.5.4.2 yamt volatile u_int32_t *
525 1.5.4.2 yamt dbri_command_lock(struct dbri_softc *sc)
526 1.5.4.2 yamt {
527 1.5.4.2 yamt
528 1.5.4.2 yamt if (sc->sc_locked)
529 1.5.4.2 yamt printf("%s: command buffer locked\n", sc->sc_dev.dv_xname);
530 1.5.4.2 yamt
531 1.5.4.2 yamt sc->sc_locked++;
532 1.5.4.2 yamt
533 1.5.4.2 yamt return (&sc->sc_dma->command[0]);
534 1.5.4.2 yamt }
535 1.5.4.2 yamt
536 1.5.4.2 yamt void
537 1.5.4.2 yamt dbri_command_send(struct dbri_softc *sc, volatile u_int32_t *cmd)
538 1.5.4.2 yamt {
539 1.5.4.2 yamt bus_space_handle_t ioh = sc->sc_ioh;
540 1.5.4.2 yamt bus_space_tag_t iot = sc->sc_iot;
541 1.5.4.2 yamt int maxloops = 1000000;
542 1.5.4.2 yamt int x;
543 1.5.4.2 yamt
544 1.5.4.2 yamt x = splaudio();
545 1.5.4.2 yamt //x = splhigh();
546 1.5.4.2 yamt
547 1.5.4.2 yamt sc->sc_locked--;
548 1.5.4.2 yamt
549 1.5.4.2 yamt if (sc->sc_locked != 0) {
550 1.5.4.2 yamt printf("%s: command buffer improperly locked\n",
551 1.5.4.2 yamt sc->sc_dev.dv_xname);
552 1.5.4.2 yamt } else if ((cmd - &sc->sc_dma->command[0]) >= DBRI_NUM_COMMANDS - 1) {
553 1.5.4.2 yamt printf("%s: command buffer overflow\n", sc->sc_dev.dv_xname);
554 1.5.4.2 yamt } else {
555 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_PAUSE, 0, 0);
556 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_WAIT, 1, 0);
557 1.5.4.2 yamt sc->sc_waitseen = 0;
558 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG8, sc->sc_dmabase);
559 1.5.4.2 yamt while ((--maxloops) > 0 &&
560 1.5.4.2 yamt (bus_space_read_4(iot, ioh, DBRI_REG0)
561 1.5.4.2 yamt & DBRI_COMMAND_VALID)) {
562 1.5.4.2 yamt bus_space_barrier(iot, ioh, DBRI_REG0, 4,
563 1.5.4.2 yamt BUS_SPACE_BARRIER_READ);
564 1.5.4.2 yamt delay(1000);
565 1.5.4.2 yamt }
566 1.5.4.2 yamt
567 1.5.4.2 yamt if (maxloops == 0) {
568 1.5.4.2 yamt printf("%s: chip never completed command buffer\n",
569 1.5.4.2 yamt sc->sc_dev.dv_xname);
570 1.5.4.2 yamt } else {
571 1.5.4.2 yamt #ifdef DBRI_DEBUG
572 1.5.4.2 yamt printf("%s: command completed\n",sc->sc_dev.dv_xname);
573 1.5.4.2 yamt #endif
574 1.5.4.2 yamt while ((--maxloops) > 0 && (!sc->sc_waitseen))
575 1.5.4.2 yamt dbri_process_interrupt_buffer(sc);
576 1.5.4.2 yamt if (maxloops == 0) {
577 1.5.4.2 yamt printf("%s: chip never acked WAIT\n",
578 1.5.4.2 yamt sc->sc_dev.dv_xname);
579 1.5.4.2 yamt }
580 1.5.4.2 yamt }
581 1.5.4.2 yamt }
582 1.5.4.2 yamt
583 1.5.4.2 yamt splx(x);
584 1.5.4.2 yamt
585 1.5.4.2 yamt return;
586 1.5.4.2 yamt }
587 1.5.4.2 yamt
588 1.5.4.2 yamt void
589 1.5.4.2 yamt dbri_process_interrupt_buffer(struct dbri_softc *sc)
590 1.5.4.2 yamt {
591 1.5.4.2 yamt int32_t i;
592 1.5.4.2 yamt
593 1.5.4.2 yamt while ((i = sc->sc_dma->intr[sc->sc_irqp]) != 0) {
594 1.5.4.2 yamt sc->sc_dma->intr[sc->sc_irqp] = 0;
595 1.5.4.2 yamt sc->sc_irqp++;
596 1.5.4.2 yamt
597 1.5.4.2 yamt if (sc->sc_irqp == DBRI_INT_BLOCKS)
598 1.5.4.2 yamt sc->sc_irqp = 1;
599 1.5.4.2 yamt else if ((sc->sc_irqp & (DBRI_INT_BLOCKS - 1)) == 0)
600 1.5.4.2 yamt sc->sc_irqp++;
601 1.5.4.2 yamt
602 1.5.4.2 yamt dbri_process_interrupt(sc, i);
603 1.5.4.2 yamt }
604 1.5.4.2 yamt
605 1.5.4.2 yamt return;
606 1.5.4.2 yamt }
607 1.5.4.2 yamt
608 1.5.4.2 yamt void
609 1.5.4.2 yamt dbri_process_interrupt(struct dbri_softc *sc, int32_t i)
610 1.5.4.2 yamt {
611 1.5.4.2 yamt #if 0
612 1.5.4.2 yamt const int liu_states[] = { 1, 0, 8, 3, 4, 5, 6, 7 };
613 1.5.4.2 yamt #endif
614 1.5.4.2 yamt int val = DBRI_INTR_GETVAL(i);
615 1.5.4.2 yamt int channel = DBRI_INTR_GETCHAN(i);
616 1.5.4.2 yamt int command = DBRI_INTR_GETCMD(i);
617 1.5.4.2 yamt int code = DBRI_INTR_GETCODE(i);
618 1.5.4.2 yamt #if 0
619 1.5.4.2 yamt int rval = DBRI_INTR_GETRVAL(i);
620 1.5.4.2 yamt #endif
621 1.5.4.2 yamt if (channel == DBRI_INTR_CMD && command == DBRI_COMMAND_WAIT)
622 1.5.4.2 yamt sc->sc_waitseen++;
623 1.5.4.2 yamt
624 1.5.4.2 yamt switch (code) {
625 1.5.4.2 yamt case DBRI_INTR_XCMP: /* transmission complete */
626 1.5.4.2 yamt {
627 1.5.4.2 yamt int td;
628 1.5.4.2 yamt struct dbri_desc *dd;
629 1.5.4.2 yamt
630 1.5.4.2 yamt td = sc->sc_pipe[channel].desc;
631 1.5.4.2 yamt dd = &sc->sc_desc[td];
632 1.5.4.2 yamt
633 1.5.4.2 yamt if (dd->callback != NULL)
634 1.5.4.2 yamt dd->callback(dd->callback_args);
635 1.5.4.2 yamt break;
636 1.5.4.2 yamt }
637 1.5.4.2 yamt case DBRI_INTR_FXDT: /* fixed data change */
638 1.5.4.2 yamt DPRINTF(("dbri_intr: Fixed data change (%d: %x)\n", channel,
639 1.5.4.2 yamt val));
640 1.5.4.2 yamt
641 1.5.4.2 yamt if (sc->sc_pipe[channel].sdp & DBRI_SDP_MSB)
642 1.5.4.2 yamt val = reverse_bytes(val, sc->sc_pipe[channel].length);
643 1.5.4.2 yamt if (sc->sc_pipe[channel].prec)
644 1.5.4.2 yamt *(sc->sc_pipe[channel].prec) = val;
645 1.5.4.2 yamt DPRINTF(("%s: wakeup %p\n", sc->sc_dev.dv_xname, sc));
646 1.5.4.2 yamt #if 0
647 1.5.4.2 yamt wakeup(sc);
648 1.5.4.2 yamt #endif
649 1.5.4.2 yamt break;
650 1.5.4.2 yamt case DBRI_INTR_SBRI:
651 1.5.4.2 yamt DPRINTF(("dbri_intr: SBRI\n"));
652 1.5.4.2 yamt break;
653 1.5.4.2 yamt case DBRI_INTR_BRDY:
654 1.5.4.2 yamt {
655 1.5.4.2 yamt /* XXX no input (yet) */
656 1.5.4.2 yamt #if 0
657 1.5.4.2 yamt int rd = sc->sc_pipe[channel].desc;
658 1.5.4.2 yamt u_int32_t status;
659 1.5.4.2 yamt
660 1.5.4.2 yamt printf("dbri_intr: BRDY\n");
661 1.5.4.2 yamt if (rd < 0 || rd >= DBRI_NUM_DESCRIPTORS) {
662 1.5.4.2 yamt printf("%s: invalid rd on pipe\n", sc->sc_dev.dv_xname);
663 1.5.4.2 yamt break;
664 1.5.4.2 yamt }
665 1.5.4.2 yamt
666 1.5.4.2 yamt sc->sc_desc[rd].busy = 0;
667 1.5.4.2 yamt sc->sc_pipe[channel].desc = sc->sc_desc[rd].next;
668 1.5.4.2 yamt status = sc->sc_dma->desc[rd].word1;
669 1.5.4.2 yamt #endif
670 1.5.4.2 yamt /* XXX: callback ??? */
671 1.5.4.2 yamt
672 1.5.4.2 yamt break;
673 1.5.4.2 yamt }
674 1.5.4.2 yamt case DBRI_INTR_UNDR:
675 1.5.4.2 yamt {
676 1.5.4.2 yamt volatile u_int32_t *cmd;
677 1.5.4.2 yamt int td = sc->sc_pipe[channel].desc;
678 1.5.4.2 yamt
679 1.5.4.2 yamt printf("%s: DBRI_INTR_UNDR\n", sc->sc_dev.dv_xname);
680 1.5.4.2 yamt
681 1.5.4.2 yamt sc->sc_dma->desc[td].status = 0;
682 1.5.4.2 yamt
683 1.5.4.2 yamt cmd = dbri_command_lock(sc);
684 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_SDP, 0,
685 1.5.4.2 yamt sc->sc_pipe[channel].sdp |
686 1.5.4.2 yamt DBRI_SDP_VALID_POINTER |
687 1.5.4.2 yamt DBRI_SDP_CLEAR |
688 1.5.4.2 yamt DBRI_SDP_2SAME);
689 1.5.4.2 yamt *(cmd++) = sc->sc_dmabase + dbri_dma_off(desc, td);
690 1.5.4.2 yamt dbri_command_send(sc, cmd);
691 1.5.4.2 yamt break;
692 1.5.4.2 yamt }
693 1.5.4.2 yamt default:
694 1.5.4.2 yamt #if 0
695 1.5.4.2 yamt printf("%s: unknown interrupt code %d\n",
696 1.5.4.2 yamt sc->sc_dev.dv_xname, code);
697 1.5.4.2 yamt #endif
698 1.5.4.2 yamt break;
699 1.5.4.2 yamt }
700 1.5.4.2 yamt
701 1.5.4.2 yamt return;
702 1.5.4.2 yamt }
703 1.5.4.2 yamt
704 1.5.4.2 yamt /*
705 1.5.4.2 yamt * mmcodec stuff
706 1.5.4.2 yamt */
707 1.5.4.2 yamt
708 1.5.4.2 yamt int
709 1.5.4.2 yamt mmcodec_init(struct dbri_softc *sc)
710 1.5.4.2 yamt {
711 1.5.4.2 yamt bus_space_handle_t ioh = sc->sc_ioh;
712 1.5.4.2 yamt bus_space_tag_t iot = sc->sc_iot;
713 1.5.4.2 yamt u_int32_t reg2;
714 1.5.4.2 yamt
715 1.5.4.2 yamt reg2 = bus_space_read_4(iot, ioh, DBRI_REG2);
716 1.5.4.2 yamt DPRINTF(("mmcodec_init: PIO reads %x\n", reg2));
717 1.5.4.2 yamt
718 1.5.4.2 yamt if (reg2 & DBRI_PIO2) {
719 1.5.4.2 yamt printf("%s: onboard CS4215 detected\n",
720 1.5.4.2 yamt sc->sc_dev.dv_xname);
721 1.5.4.2 yamt sc->sc_mm.onboard = 1;
722 1.5.4.2 yamt }
723 1.5.4.2 yamt
724 1.5.4.2 yamt if (reg2 & DBRI_PIO0) {
725 1.5.4.2 yamt printf("%s: speakerbox detected\n",
726 1.5.4.2 yamt sc->sc_dev.dv_xname);
727 1.5.4.2 yamt sc->sc_mm.onboard = 0;
728 1.5.4.2 yamt }
729 1.5.4.2 yamt
730 1.5.4.2 yamt if ((reg2 & DBRI_PIO2) && (reg2 & DBRI_PIO0)) {
731 1.5.4.2 yamt printf("%s: using speakerbox\n",
732 1.5.4.2 yamt sc->sc_dev.dv_xname);
733 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG2, DBRI_PIO2_ENABLE);
734 1.5.4.2 yamt sc->sc_mm.onboard = 0;
735 1.5.4.2 yamt }
736 1.5.4.2 yamt
737 1.5.4.2 yamt if (!(reg2 & (DBRI_PIO0|DBRI_PIO2))) {
738 1.5.4.2 yamt printf("%s: no mmcodec found\n", sc->sc_dev.dv_xname);
739 1.5.4.2 yamt return -1;
740 1.5.4.2 yamt }
741 1.5.4.2 yamt
742 1.5.4.2 yamt sc->sc_version = 0xff;
743 1.5.4.2 yamt
744 1.5.4.2 yamt mmcodec_pipe_init(sc);
745 1.5.4.2 yamt mmcodec_default(sc);
746 1.5.4.2 yamt
747 1.5.4.2 yamt sc->sc_mm.offset = sc->sc_mm.onboard ? 0 : 8;
748 1.5.4.2 yamt
749 1.5.4.2 yamt if (mmcodec_setcontrol(sc) == -1 || sc->sc_version == 0xff) {
750 1.5.4.2 yamt printf("%s: cs4215 probe failed at offset %d\n",
751 1.5.4.2 yamt sc->sc_dev.dv_xname, sc->sc_mm.offset);
752 1.5.4.2 yamt return (-1);
753 1.5.4.2 yamt }
754 1.5.4.2 yamt
755 1.5.4.2 yamt printf("%s: cs4215 ver %d found at offset %d\n",
756 1.5.4.2 yamt sc->sc_dev.dv_xname, sc->sc_version & 0xf, sc->sc_mm.offset);
757 1.5.4.2 yamt
758 1.5.4.2 yamt /* set some sane defaults for mmcodec_init_data */
759 1.5.4.2 yamt sc->sc_params.channels = 2;
760 1.5.4.2 yamt sc->sc_params.precision = 16;
761 1.5.4.2 yamt
762 1.5.4.2 yamt mmcodec_init_data(sc);
763 1.5.4.2 yamt
764 1.5.4.2 yamt sc->sc_open = 0;
765 1.5.4.2 yamt
766 1.5.4.2 yamt return (0);
767 1.5.4.2 yamt }
768 1.5.4.2 yamt
769 1.5.4.2 yamt void
770 1.5.4.2 yamt mmcodec_init_data(struct dbri_softc *sc)
771 1.5.4.2 yamt {
772 1.5.4.2 yamt bus_space_tag_t iot = sc->sc_iot;
773 1.5.4.2 yamt bus_space_handle_t ioh = sc->sc_ioh;
774 1.5.4.2 yamt u_int32_t tmp;
775 1.5.4.2 yamt int data_width;
776 1.5.4.2 yamt
777 1.5.4.2 yamt tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
778 1.5.4.2 yamt tmp &= ~(DBRI_CHI_ACTIVATE); /* disable CHI */
779 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
780 1.5.4.2 yamt
781 1.5.4.2 yamt /* switch CS4215 to data mode - set PIO3 to 1 */
782 1.5.4.2 yamt tmp = DBRI_PIO_ENABLE_ALL | DBRI_PIO1 | DBRI_PIO3;
783 1.5.4.2 yamt /* XXX */
784 1.5.4.2 yamt tmp |= (sc->sc_mm.onboard ? DBRI_PIO0 : DBRI_PIO2);
785 1.5.4.2 yamt
786 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG2, tmp);
787 1.5.4.2 yamt chi_reset(sc, CHIslave, 128);
788 1.5.4.2 yamt
789 1.5.4.2 yamt data_width = sc->sc_params.channels
790 1.5.4.2 yamt * sc->sc_params.precision;
791 1.5.4.2 yamt pipe_ts_link(sc, 20, PIPEoutput, 16, 32, sc->sc_mm.offset + 32);
792 1.5.4.2 yamt pipe_ts_link(sc, 4, PIPEoutput, 16, data_width, sc->sc_mm.offset);
793 1.5.4.2 yamt pipe_ts_link(sc, 6, PIPEinput, 16, data_width, sc->sc_mm.offset);
794 1.5.4.2 yamt pipe_ts_link(sc, 21, PIPEinput, 16, 16, sc->sc_mm.offset + 40);
795 1.5.4.2 yamt
796 1.5.4.2 yamt mmcodec_setgain(sc, 0);
797 1.5.4.2 yamt
798 1.5.4.2 yamt tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
799 1.5.4.2 yamt tmp |= DBRI_CHI_ACTIVATE;
800 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
801 1.5.4.2 yamt
802 1.5.4.2 yamt return;
803 1.5.4.2 yamt }
804 1.5.4.2 yamt
805 1.5.4.2 yamt void
806 1.5.4.2 yamt mmcodec_pipe_init(struct dbri_softc *sc)
807 1.5.4.2 yamt {
808 1.5.4.2 yamt
809 1.5.4.2 yamt pipe_setup(sc, 4, DBRI_SDP_MEM | DBRI_SDP_TO_SER | DBRI_SDP_MSB);
810 1.5.4.2 yamt pipe_setup(sc, 20, DBRI_SDP_FIXED | DBRI_SDP_TO_SER | DBRI_SDP_MSB);
811 1.5.4.2 yamt pipe_setup(sc, 6, DBRI_SDP_MEM | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
812 1.5.4.2 yamt pipe_setup(sc, 21, DBRI_SDP_FIXED | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
813 1.5.4.2 yamt
814 1.5.4.2 yamt pipe_setup(sc, 17, DBRI_SDP_FIXED | DBRI_SDP_TO_SER | DBRI_SDP_MSB);
815 1.5.4.2 yamt pipe_setup(sc, 18, DBRI_SDP_FIXED | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
816 1.5.4.2 yamt pipe_setup(sc, 19, DBRI_SDP_FIXED | DBRI_SDP_FROM_SER | DBRI_SDP_MSB);
817 1.5.4.2 yamt
818 1.5.4.2 yamt sc->sc_mm.status = 0;
819 1.5.4.2 yamt
820 1.5.4.2 yamt pipe_receive_fixed(sc, 18, &sc->sc_mm.status);
821 1.5.4.2 yamt pipe_receive_fixed(sc, 19, &sc->sc_mm.version);
822 1.5.4.2 yamt
823 1.5.4.2 yamt return;
824 1.5.4.2 yamt }
825 1.5.4.2 yamt
826 1.5.4.2 yamt void
827 1.5.4.2 yamt mmcodec_default(struct dbri_softc *sc)
828 1.5.4.2 yamt {
829 1.5.4.2 yamt struct cs4215_state *mm = &sc->sc_mm;
830 1.5.4.2 yamt
831 1.5.4.2 yamt /*
832 1.5.4.2 yamt * no action, memory resetting only
833 1.5.4.2 yamt *
834 1.5.4.2 yamt * data time slots 5-8
835 1.5.4.2 yamt * speaker, line and headphone enable. set gain to half.
836 1.5.4.2 yamt * input is mic
837 1.5.4.2 yamt */
838 1.5.4.2 yamt mm->data[0] = sc->sc_latt = 0x20 | CS4215_HE | CS4215_LE;
839 1.5.4.2 yamt mm->data[1] = sc->sc_ratt = 0x20 | CS4215_SE;
840 1.5.4.2 yamt mm->data[2] = CS4215_LG(0x08) | CS4215_IS | CS4215_PIO0 | CS4215_PIO1;
841 1.5.4.2 yamt mm->data[3] = CS4215_RG(0x08) | CS4215_MA(0x0f);
842 1.5.4.2 yamt
843 1.5.4.2 yamt /*
844 1.5.4.2 yamt * control time slots 1-4
845 1.5.4.2 yamt *
846 1.5.4.2 yamt * 0: default I/O voltage scale
847 1.5.4.2 yamt * 1: 8 bit ulaw, 8kHz, mono, high pass filter disabled
848 1.5.4.2 yamt * 2: serial enable, CHI master, 128 bits per frame, clock 1
849 1.5.4.2 yamt * 3: tests disabled
850 1.5.4.2 yamt */
851 1.5.4.2 yamt mm->control[0] = CS4215_RSRVD_1 | CS4215_MLB;
852 1.5.4.2 yamt mm->control[1] = CS4215_DFR_ULAW | CS4215_FREQ[0].csval;
853 1.5.4.2 yamt mm->control[2] = CS4215_XCLK | CS4215_BSEL_128 | CS4215_FREQ[0].xtal;
854 1.5.4.2 yamt mm->control[3] = 0;
855 1.5.4.2 yamt
856 1.5.4.2 yamt return;
857 1.5.4.2 yamt }
858 1.5.4.2 yamt
859 1.5.4.2 yamt void
860 1.5.4.2 yamt mmcodec_setgain(struct dbri_softc *sc, int mute)
861 1.5.4.2 yamt {
862 1.5.4.2 yamt if (mute) {
863 1.5.4.2 yamt /* disable all outputs, max. attenuation */
864 1.5.4.2 yamt sc->sc_mm.data[0] = sc->sc_latt | 63;
865 1.5.4.2 yamt sc->sc_mm.data[1] = sc->sc_ratt | 63;
866 1.5.4.2 yamt } else {
867 1.5.4.2 yamt /*
868 1.5.4.2 yamt * We should be setting the proper output here.. for now,
869 1.5.4.2 yamt * use the speaker. Possible outputs:
870 1.5.4.2 yamt * Headphones:
871 1.5.4.2 yamt * data[0] |= CS4215_HE;
872 1.5.4.2 yamt * Line out:
873 1.5.4.2 yamt * data[0] |= CS4215_LE;
874 1.5.4.2 yamt * Speaker:
875 1.5.4.2 yamt * data[1] |= CS4215_SE;
876 1.5.4.2 yamt */
877 1.5.4.2 yamt sc->sc_mm.data[0] = sc->sc_latt;
878 1.5.4.2 yamt sc->sc_mm.data[1] = sc->sc_ratt;
879 1.5.4.2 yamt }
880 1.5.4.2 yamt
881 1.5.4.2 yamt if (sc->sc_powerstate == 0)
882 1.5.4.2 yamt return;
883 1.5.4.2 yamt pipe_transmit_fixed(sc, 20, *(u_int32_t *)__UNVOLATILE(sc->sc_mm.data));
884 1.5.4.2 yamt
885 1.5.4.2 yamt /* give the chip some time to execure the command */
886 1.5.4.2 yamt delay(250);
887 1.5.4.2 yamt
888 1.5.4.2 yamt return;
889 1.5.4.2 yamt }
890 1.5.4.2 yamt
891 1.5.4.2 yamt int
892 1.5.4.2 yamt mmcodec_setcontrol(struct dbri_softc *sc)
893 1.5.4.2 yamt {
894 1.5.4.2 yamt bus_space_tag_t iot = sc->sc_iot;
895 1.5.4.2 yamt bus_space_handle_t ioh = sc->sc_ioh;
896 1.5.4.2 yamt u_int32_t val;
897 1.5.4.2 yamt u_int32_t tmp;
898 1.5.4.2 yamt #if 1
899 1.5.4.2 yamt int i;
900 1.5.4.2 yamt #endif
901 1.5.4.2 yamt
902 1.5.4.2 yamt /*
903 1.5.4.2 yamt * Temporarily mute outputs and wait 125 us to make sure that it
904 1.5.4.2 yamt * happens. This avoids clicking noises.
905 1.5.4.2 yamt */
906 1.5.4.2 yamt mmcodec_setgain(sc, 1);
907 1.5.4.2 yamt //DELAY(125);
908 1.5.4.2 yamt
909 1.5.4.2 yamt /* enable control mode */
910 1.5.4.2 yamt val = DBRI_PIO_ENABLE_ALL | DBRI_PIO1; /* was PIO1 */
911 1.5.4.2 yamt
912 1.5.4.2 yamt /* XXX */
913 1.5.4.2 yamt val |= (sc->sc_mm.onboard ? DBRI_PIO0 : DBRI_PIO2);
914 1.5.4.2 yamt
915 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG2, val);
916 1.5.4.2 yamt
917 1.5.4.2 yamt DELAY(34);
918 1.5.4.2 yamt
919 1.5.4.2 yamt /*
920 1.5.4.2 yamt * in control mode, the cs4215 is the slave device, so the
921 1.5.4.2 yamt * DBRI must act as the CHI master.
922 1.5.4.2 yamt *
923 1.5.4.2 yamt * in data mode, the cs4215 must be the CHI master to insure
924 1.5.4.2 yamt * that the data stream is in sync with its codec
925 1.5.4.2 yamt */
926 1.5.4.2 yamt tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
927 1.5.4.2 yamt tmp &= ~DBRI_COMMAND_CHI;
928 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
929 1.5.4.2 yamt
930 1.5.4.2 yamt chi_reset(sc, CHImaster, 128);
931 1.5.4.2 yamt
932 1.5.4.2 yamt /* control mode */
933 1.5.4.2 yamt pipe_ts_link(sc, 17, PIPEoutput, 16, 32, sc->sc_mm.offset);
934 1.5.4.2 yamt pipe_ts_link(sc, 18, PIPEinput, 16, 8, sc->sc_mm.offset);
935 1.5.4.2 yamt pipe_ts_link(sc, 19, PIPEinput, 16, 8, sc->sc_mm.offset + 48);
936 1.5.4.2 yamt
937 1.5.4.2 yamt /* wait for the chip to echo back CLB as zero */
938 1.5.4.2 yamt sc->sc_mm.control[0] &= ~CS4215_CLB;
939 1.5.4.2 yamt pipe_transmit_fixed(sc, 17, *(int *)__UNVOLATILE(sc->sc_mm.control));
940 1.5.4.2 yamt
941 1.5.4.2 yamt tmp = bus_space_read_4(iot, ioh, DBRI_REG0);
942 1.5.4.2 yamt tmp |= DBRI_CHI_ACTIVATE;
943 1.5.4.2 yamt bus_space_write_4(iot, ioh, DBRI_REG0, tmp);
944 1.5.4.2 yamt
945 1.5.4.2 yamt #if 1
946 1.5.4.2 yamt i = 1024;
947 1.5.4.2 yamt while (((sc->sc_mm.status & 0xe4) != 0x20) && --i) {
948 1.5.4.2 yamt delay(125);
949 1.5.4.2 yamt }
950 1.5.4.2 yamt
951 1.5.4.2 yamt if (i == 0) {
952 1.5.4.2 yamt printf("%s: cs4215 didn't respond to CLB (0x%02x)\n",
953 1.5.4.2 yamt sc->sc_dev.dv_xname, sc->sc_mm.status);
954 1.5.4.2 yamt return (-1);
955 1.5.4.2 yamt }
956 1.5.4.2 yamt #else
957 1.5.4.2 yamt while ((sc->sc_mm.status & 0xe4) != 0x20) {
958 1.5.4.2 yamt printf("%s: tsleep %p\n", sc->sc_dev.dv_xname, sc);
959 1.5.4.2 yamt tsleep(sc, PCATCH | PZERO, "dbrifxdt", 0);
960 1.5.4.2 yamt }
961 1.5.4.2 yamt #endif
962 1.5.4.2 yamt
963 1.5.4.2 yamt /* copy the version information before it becomes unreadable again */
964 1.5.4.2 yamt sc->sc_version=sc->sc_mm.version;
965 1.5.4.2 yamt
966 1.5.4.2 yamt /* terminate cs4215 control mode */
967 1.5.4.2 yamt sc->sc_mm.control[0] |= CS4215_CLB;
968 1.5.4.2 yamt pipe_transmit_fixed(sc, 17, *(int *)__UNVOLATILE(sc->sc_mm.control));
969 1.5.4.2 yamt
970 1.5.4.2 yamt /* two frames of control info @ 8kHz frame rate = 250us delay */
971 1.5.4.2 yamt DELAY(250);
972 1.5.4.2 yamt
973 1.5.4.2 yamt mmcodec_setgain(sc, 0);
974 1.5.4.2 yamt
975 1.5.4.2 yamt return (0);
976 1.5.4.2 yamt
977 1.5.4.2 yamt }
978 1.5.4.2 yamt
979 1.5.4.2 yamt /*
980 1.5.4.2 yamt * CHI combo
981 1.5.4.2 yamt */
982 1.5.4.2 yamt void
983 1.5.4.2 yamt chi_reset(struct dbri_softc *sc, enum ms ms, int bpf)
984 1.5.4.2 yamt {
985 1.5.4.2 yamt volatile u_int32_t *cmd;
986 1.5.4.2 yamt int val;
987 1.5.4.2 yamt int clockrate, divisor;
988 1.5.4.2 yamt
989 1.5.4.2 yamt cmd = dbri_command_lock(sc);
990 1.5.4.2 yamt
991 1.5.4.2 yamt /* set CHI anchor: pipe 16 */
992 1.5.4.2 yamt val = DBRI_DTS_VI | DBRI_DTS_INS | DBRI_DTS_PRVIN(16) | DBRI_PIPE(16);
993 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);
994 1.5.4.2 yamt *(cmd++) = DBRI_TS_ANCHOR | DBRI_TS_NEXT(16);
995 1.5.4.2 yamt *(cmd++) = 0;
996 1.5.4.2 yamt
997 1.5.4.2 yamt val = DBRI_DTS_VO | DBRI_DTS_INS | DBRI_DTS_PRVOUT(16) | DBRI_PIPE(16);
998 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);
999 1.5.4.2 yamt *(cmd++) = 0;
1000 1.5.4.2 yamt *(cmd++) = DBRI_TS_ANCHOR | DBRI_TS_NEXT(16);
1001 1.5.4.2 yamt
1002 1.5.4.2 yamt sc->sc_pipe[16].sdp = 1;
1003 1.5.4.2 yamt sc->sc_pipe[16].next = 16;
1004 1.5.4.2 yamt sc->sc_chi_pipe_in = 16;
1005 1.5.4.2 yamt sc->sc_chi_pipe_out = 16;
1006 1.5.4.2 yamt
1007 1.5.4.2 yamt switch (ms) {
1008 1.5.4.2 yamt case CHIslave:
1009 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_CHI, 0, DBRI_CHI_CHICM(0));
1010 1.5.4.2 yamt break;
1011 1.5.4.2 yamt case CHImaster:
1012 1.5.4.2 yamt clockrate = bpf * 8;
1013 1.5.4.2 yamt divisor = 12288 / clockrate;
1014 1.5.4.2 yamt
1015 1.5.4.2 yamt if (divisor > 255 || divisor * clockrate != 12288)
1016 1.5.4.2 yamt printf("%s: illegal bits-per-frame %d\n",
1017 1.5.4.2 yamt sc->sc_dev.dv_xname, bpf);
1018 1.5.4.2 yamt
1019 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_CHI, 0,
1020 1.5.4.2 yamt DBRI_CHI_CHICM(divisor) | DBRI_CHI_FD | DBRI_CHI_BPF(bpf));
1021 1.5.4.2 yamt break;
1022 1.5.4.2 yamt default:
1023 1.5.4.2 yamt printf("%s: unknown value for ms!\n", sc->sc_dev.dv_xname);
1024 1.5.4.2 yamt break;
1025 1.5.4.2 yamt }
1026 1.5.4.2 yamt
1027 1.5.4.2 yamt sc->sc_chi_bpf = bpf;
1028 1.5.4.2 yamt
1029 1.5.4.2 yamt /* CHI data mode */
1030 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_PAUSE, 0, 0);
1031 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_CDM, 0,
1032 1.5.4.2 yamt DBRI_CDM_XCE | DBRI_CDM_XEN | DBRI_CDM_REN);
1033 1.5.4.2 yamt
1034 1.5.4.2 yamt dbri_command_send(sc, cmd);
1035 1.5.4.2 yamt
1036 1.5.4.2 yamt return;
1037 1.5.4.2 yamt }
1038 1.5.4.2 yamt
1039 1.5.4.2 yamt /*
1040 1.5.4.2 yamt * pipe stuff
1041 1.5.4.2 yamt */
1042 1.5.4.2 yamt void
1043 1.5.4.2 yamt pipe_setup(struct dbri_softc *sc, int pipe, int sdp)
1044 1.5.4.2 yamt {
1045 1.5.4.2 yamt DPRINTF(("pipe setup: %d\n", pipe));
1046 1.5.4.2 yamt if (pipe < 0 || pipe >= DBRI_PIPE_MAX) {
1047 1.5.4.2 yamt printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
1048 1.5.4.2 yamt pipe);
1049 1.5.4.2 yamt return;
1050 1.5.4.2 yamt }
1051 1.5.4.2 yamt
1052 1.5.4.2 yamt if ((sdp & 0xf800) != sdp)
1053 1.5.4.2 yamt printf("%s: strange SDP value %d\n", sc->sc_dev.dv_xname, sdp);
1054 1.5.4.2 yamt
1055 1.5.4.2 yamt if (DBRI_SDP_MODE(sdp) == DBRI_SDP_FIXED &&
1056 1.5.4.2 yamt !(sdp & DBRI_SDP_TO_SER))
1057 1.5.4.2 yamt sdp |= DBRI_SDP_CHANGE;
1058 1.5.4.2 yamt
1059 1.5.4.2 yamt sdp |= DBRI_PIPE(pipe);
1060 1.5.4.2 yamt
1061 1.5.4.2 yamt sc->sc_pipe[pipe].sdp = sdp;
1062 1.5.4.2 yamt sc->sc_pipe[pipe].desc = -1;
1063 1.5.4.2 yamt
1064 1.5.4.2 yamt pipe_reset(sc, pipe);
1065 1.5.4.2 yamt
1066 1.5.4.2 yamt return;
1067 1.5.4.2 yamt }
1068 1.5.4.2 yamt
1069 1.5.4.2 yamt void
1070 1.5.4.2 yamt pipe_reset(struct dbri_softc *sc, int pipe)
1071 1.5.4.2 yamt {
1072 1.5.4.2 yamt struct dbri_desc *dd;
1073 1.5.4.2 yamt int sdp;
1074 1.5.4.2 yamt int desc;
1075 1.5.4.2 yamt volatile u_int32_t *cmd;
1076 1.5.4.2 yamt
1077 1.5.4.2 yamt if (pipe < 0 || pipe >= DBRI_PIPE_MAX) {
1078 1.5.4.2 yamt printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
1079 1.5.4.2 yamt pipe);
1080 1.5.4.2 yamt return;
1081 1.5.4.2 yamt }
1082 1.5.4.2 yamt
1083 1.5.4.2 yamt sdp = sc->sc_pipe[pipe].sdp;
1084 1.5.4.2 yamt if (sdp == 0) {
1085 1.5.4.2 yamt printf("%s: can not reset uninitialized pipe %d\n",
1086 1.5.4.2 yamt sc->sc_dev.dv_xname, pipe);
1087 1.5.4.2 yamt return;
1088 1.5.4.2 yamt }
1089 1.5.4.2 yamt
1090 1.5.4.2 yamt cmd = dbri_command_lock(sc);
1091 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_SDP, 0,
1092 1.5.4.2 yamt sdp | DBRI_SDP_CLEAR | DBRI_SDP_VALID_POINTER);
1093 1.5.4.2 yamt *(cmd++) = 0;
1094 1.5.4.2 yamt dbri_command_send(sc, cmd);
1095 1.5.4.2 yamt
1096 1.5.4.2 yamt desc = sc->sc_pipe[pipe].desc;
1097 1.5.4.2 yamt
1098 1.5.4.2 yamt dd = &sc->sc_desc[desc];
1099 1.5.4.2 yamt
1100 1.5.4.2 yamt dd->busy = 0;
1101 1.5.4.2 yamt
1102 1.5.4.2 yamt #if 0
1103 1.5.4.2 yamt if (dd->callback)
1104 1.5.4.2 yamt (*dd->callback)(dd->callback_args);
1105 1.5.4.2 yamt #endif
1106 1.5.4.2 yamt
1107 1.5.4.2 yamt sc->sc_pipe[pipe].desc = -1;
1108 1.5.4.2 yamt
1109 1.5.4.2 yamt return;
1110 1.5.4.2 yamt }
1111 1.5.4.2 yamt
1112 1.5.4.2 yamt void
1113 1.5.4.2 yamt pipe_receive_fixed(struct dbri_softc *sc, int pipe, volatile u_int32_t *prec)
1114 1.5.4.2 yamt {
1115 1.5.4.2 yamt
1116 1.5.4.2 yamt if (pipe < DBRI_PIPE_MAX / 2 || pipe >= DBRI_PIPE_MAX) {
1117 1.5.4.2 yamt printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
1118 1.5.4.2 yamt pipe);
1119 1.5.4.2 yamt return;
1120 1.5.4.2 yamt }
1121 1.5.4.2 yamt
1122 1.5.4.2 yamt if (DBRI_SDP_MODE(sc->sc_pipe[pipe].sdp) != DBRI_SDP_FIXED) {
1123 1.5.4.2 yamt printf("%s: non-fixed pipe %d\n", sc->sc_dev.dv_xname,
1124 1.5.4.2 yamt pipe);
1125 1.5.4.2 yamt return;
1126 1.5.4.2 yamt }
1127 1.5.4.2 yamt
1128 1.5.4.2 yamt if (sc->sc_pipe[pipe].sdp & DBRI_SDP_TO_SER) {
1129 1.5.4.2 yamt printf("%s: can not receive on transmit pipe %d\b",
1130 1.5.4.2 yamt sc->sc_dev.dv_xname, pipe);
1131 1.5.4.2 yamt return;
1132 1.5.4.2 yamt }
1133 1.5.4.2 yamt
1134 1.5.4.2 yamt sc->sc_pipe[pipe].prec = prec;
1135 1.5.4.2 yamt
1136 1.5.4.2 yamt return;
1137 1.5.4.2 yamt }
1138 1.5.4.2 yamt
1139 1.5.4.2 yamt void
1140 1.5.4.2 yamt pipe_transmit_fixed(struct dbri_softc *sc, int pipe, u_int32_t data)
1141 1.5.4.2 yamt {
1142 1.5.4.2 yamt volatile u_int32_t *cmd;
1143 1.5.4.2 yamt
1144 1.5.4.2 yamt if (pipe < DBRI_PIPE_MAX / 2 || pipe >= DBRI_PIPE_MAX) {
1145 1.5.4.2 yamt printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
1146 1.5.4.2 yamt pipe);
1147 1.5.4.2 yamt return;
1148 1.5.4.2 yamt }
1149 1.5.4.2 yamt
1150 1.5.4.2 yamt if (DBRI_SDP_MODE(sc->sc_pipe[pipe].sdp) == 0) {
1151 1.5.4.2 yamt printf("%s: uninitialized pipe %d\n", sc->sc_dev.dv_xname,
1152 1.5.4.2 yamt pipe);
1153 1.5.4.2 yamt return;
1154 1.5.4.2 yamt }
1155 1.5.4.2 yamt
1156 1.5.4.2 yamt if (DBRI_SDP_MODE(sc->sc_pipe[pipe].sdp) != DBRI_SDP_FIXED) {
1157 1.5.4.2 yamt printf("%s: non-fixed pipe %d\n", sc->sc_dev.dv_xname, pipe);
1158 1.5.4.2 yamt return;
1159 1.5.4.2 yamt }
1160 1.5.4.2 yamt
1161 1.5.4.2 yamt if (!(sc->sc_pipe[pipe].sdp & DBRI_SDP_TO_SER)) {
1162 1.5.4.2 yamt printf("%s: called on receive pipe %d\n", sc->sc_dev.dv_xname,
1163 1.5.4.2 yamt pipe);
1164 1.5.4.2 yamt return;
1165 1.5.4.2 yamt }
1166 1.5.4.2 yamt
1167 1.5.4.2 yamt if (sc->sc_pipe[pipe].sdp & DBRI_SDP_MSB)
1168 1.5.4.2 yamt data = reverse_bytes(data, sc->sc_pipe[pipe].length);
1169 1.5.4.2 yamt
1170 1.5.4.2 yamt cmd = dbri_command_lock(sc);
1171 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_SSP, 0, pipe);
1172 1.5.4.2 yamt *(cmd++) = data;
1173 1.5.4.2 yamt
1174 1.5.4.2 yamt dbri_command_send(sc, cmd);
1175 1.5.4.2 yamt
1176 1.5.4.2 yamt return;
1177 1.5.4.2 yamt }
1178 1.5.4.2 yamt
1179 1.5.4.2 yamt void
1180 1.5.4.2 yamt setup_ring(struct dbri_softc *sc, int pipe, int which, int num, int blksz,
1181 1.5.4.2 yamt void (*callback)(void *), void *callback_args)
1182 1.5.4.2 yamt {
1183 1.5.4.2 yamt volatile u_int32_t *cmd;
1184 1.5.4.2 yamt int x, i;
1185 1.5.4.2 yamt int td;
1186 1.5.4.2 yamt int td_first, td_last;
1187 1.5.4.2 yamt bus_addr_t dmabuf, dmabase;
1188 1.5.4.2 yamt struct dbri_desc *dd = &sc->sc_desc[which];
1189 1.5.4.2 yamt
1190 1.5.4.2 yamt td = 0;
1191 1.5.4.2 yamt td_first = td_last = -1;
1192 1.5.4.2 yamt
1193 1.5.4.2 yamt if (pipe < 0 || pipe >= DBRI_PIPE_MAX / 2) {
1194 1.5.4.2 yamt printf("%s: illegal pipe number %d\n", sc->sc_dev.dv_xname,
1195 1.5.4.2 yamt pipe);
1196 1.5.4.2 yamt return;
1197 1.5.4.2 yamt }
1198 1.5.4.2 yamt
1199 1.5.4.2 yamt if (sc->sc_pipe[pipe].sdp == 0) {
1200 1.5.4.2 yamt printf("%s: uninitialized pipe %d\n", sc->sc_dev.dv_xname,
1201 1.5.4.2 yamt pipe);
1202 1.5.4.2 yamt return;
1203 1.5.4.2 yamt }
1204 1.5.4.2 yamt
1205 1.5.4.2 yamt if (!(sc->sc_pipe[pipe].sdp & DBRI_SDP_TO_SER)) {
1206 1.5.4.2 yamt printf("%s: called on receive pipe %d\n",
1207 1.5.4.2 yamt sc->sc_dev.dv_xname, pipe);
1208 1.5.4.2 yamt return;
1209 1.5.4.2 yamt }
1210 1.5.4.2 yamt
1211 1.5.4.2 yamt
1212 1.5.4.2 yamt dmabuf = dd->dmabase;
1213 1.5.4.2 yamt dmabase = sc->sc_dmabase;
1214 1.5.4.2 yamt td = 0;
1215 1.5.4.2 yamt
1216 1.5.4.2 yamt for (i = 0; i < (num-1); i++) {
1217 1.5.4.2 yamt
1218 1.5.4.2 yamt sc->sc_dma->desc[i].flags = TX_BCNT(blksz)
1219 1.5.4.2 yamt | TX_EOF | TX_BINT;
1220 1.5.4.2 yamt sc->sc_dma->desc[i].ba = dmabuf;
1221 1.5.4.2 yamt sc->sc_dma->desc[i].nda = dmabase + dbri_dma_off(desc, i + 1);
1222 1.5.4.2 yamt sc->sc_dma->desc[i].status = 0;
1223 1.5.4.2 yamt
1224 1.5.4.2 yamt td_last = td;
1225 1.5.4.2 yamt dmabuf += blksz;
1226 1.5.4.2 yamt }
1227 1.5.4.2 yamt
1228 1.5.4.2 yamt sc->sc_dma->desc[i].flags = TX_BCNT(blksz) | TX_EOF | TX_BINT;
1229 1.5.4.2 yamt sc->sc_dma->desc[i].ba = dmabuf;
1230 1.5.4.2 yamt sc->sc_dma->desc[i].nda = dmabase + dbri_dma_off(desc, 0);
1231 1.5.4.2 yamt sc->sc_dma->desc[i].status = 0;
1232 1.5.4.2 yamt
1233 1.5.4.2 yamt dd->callback = callback; //sc->intr;
1234 1.5.4.2 yamt dd->callback_args = callback_args; //sc->intrarg;
1235 1.5.4.2 yamt
1236 1.5.4.2 yamt x = splaudio();
1237 1.5.4.2 yamt
1238 1.5.4.2 yamt /* the pipe shouldn't be active */
1239 1.5.4.2 yamt if (pipe_active(sc, pipe)) {
1240 1.5.4.2 yamt printf("pipe active (CDP)\n");
1241 1.5.4.2 yamt /* pipe is already active */
1242 1.5.4.2 yamt #if 0
1243 1.5.4.2 yamt td_last = sc->sc_pipe[pipe].desc;
1244 1.5.4.2 yamt while (sc->sc_desc[td_last].next != -1)
1245 1.5.4.2 yamt td_last = sc->sc_desc[td_last].next;
1246 1.5.4.2 yamt
1247 1.5.4.2 yamt sc->sc_desc[td_last].next = td_first;
1248 1.5.4.2 yamt sc->sc_dma->desc[td_last].nda =
1249 1.5.4.2 yamt sc->sc_dmabase + dbri_dma_off(desc, td_first);
1250 1.5.4.2 yamt
1251 1.5.4.2 yamt cmd = dbri_command_lock(sc);
1252 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_CDP, 0, pipe);
1253 1.5.4.2 yamt dbri_command_send(sc, cmd);
1254 1.5.4.2 yamt #endif
1255 1.5.4.2 yamt } else {
1256 1.5.4.2 yamt /*
1257 1.5.4.2 yamt * pipe isn't active - issue an SDP command to start our
1258 1.5.4.2 yamt * chain of TDs running
1259 1.5.4.2 yamt */
1260 1.5.4.2 yamt sc->sc_pipe[pipe].desc = which;
1261 1.5.4.2 yamt cmd = dbri_command_lock(sc);
1262 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_SDP, 0,
1263 1.5.4.2 yamt sc->sc_pipe[pipe].sdp |
1264 1.5.4.2 yamt DBRI_SDP_VALID_POINTER |
1265 1.5.4.2 yamt DBRI_SDP_EVERY |
1266 1.5.4.2 yamt DBRI_SDP_CLEAR);
1267 1.5.4.2 yamt *(cmd++) = sc->sc_dmabase + dbri_dma_off(desc, 0);
1268 1.5.4.2 yamt dbri_command_send(sc, cmd);
1269 1.5.4.2 yamt }
1270 1.5.4.2 yamt
1271 1.5.4.2 yamt splx(x);
1272 1.5.4.2 yamt
1273 1.5.4.2 yamt return;
1274 1.5.4.2 yamt }
1275 1.5.4.2 yamt
1276 1.5.4.2 yamt void
1277 1.5.4.2 yamt pipe_ts_link(struct dbri_softc *sc, int pipe, enum io dir, int basepipe,
1278 1.5.4.2 yamt int len, int cycle)
1279 1.5.4.2 yamt {
1280 1.5.4.2 yamt volatile u_int32_t *cmd;
1281 1.5.4.2 yamt int prevpipe, nextpipe;
1282 1.5.4.2 yamt int val;
1283 1.5.4.2 yamt
1284 1.5.4.2 yamt if (pipe < 0 || pipe >= DBRI_PIPE_MAX ||
1285 1.5.4.2 yamt basepipe < 0 || basepipe >= DBRI_PIPE_MAX) {
1286 1.5.4.2 yamt printf("%s: illegal pipe numbers (%d, %d)\n",
1287 1.5.4.2 yamt sc->sc_dev.dv_xname, pipe, basepipe);
1288 1.5.4.2 yamt return;
1289 1.5.4.2 yamt }
1290 1.5.4.2 yamt
1291 1.5.4.2 yamt if (sc->sc_pipe[pipe].sdp == 0 || sc->sc_pipe[basepipe].sdp == 0) {
1292 1.5.4.2 yamt printf("%s: uninitialized pipe (%d, %d)\n",
1293 1.5.4.2 yamt sc->sc_dev.dv_xname, pipe, basepipe);
1294 1.5.4.2 yamt return;
1295 1.5.4.2 yamt }
1296 1.5.4.2 yamt
1297 1.5.4.2 yamt if (basepipe == 16 && dir == PIPEoutput && cycle == 0)
1298 1.5.4.2 yamt cycle = sc->sc_chi_bpf;
1299 1.5.4.2 yamt
1300 1.5.4.2 yamt if (basepipe == pipe)
1301 1.5.4.2 yamt prevpipe = nextpipe = pipe;
1302 1.5.4.2 yamt else {
1303 1.5.4.2 yamt if (basepipe == 16) {
1304 1.5.4.2 yamt if (dir == PIPEinput) {
1305 1.5.4.2 yamt prevpipe = sc->sc_chi_pipe_in;
1306 1.5.4.2 yamt } else {
1307 1.5.4.2 yamt prevpipe = sc->sc_chi_pipe_out;
1308 1.5.4.2 yamt }
1309 1.5.4.2 yamt } else
1310 1.5.4.2 yamt prevpipe = basepipe;
1311 1.5.4.2 yamt
1312 1.5.4.2 yamt nextpipe = sc->sc_pipe[prevpipe].next;
1313 1.5.4.2 yamt
1314 1.5.4.2 yamt while (sc->sc_pipe[nextpipe].cycle < cycle &&
1315 1.5.4.2 yamt sc->sc_pipe[nextpipe].next != basepipe) {
1316 1.5.4.2 yamt prevpipe = nextpipe;
1317 1.5.4.2 yamt nextpipe = sc->sc_pipe[nextpipe].next;
1318 1.5.4.2 yamt }
1319 1.5.4.2 yamt }
1320 1.5.4.2 yamt
1321 1.5.4.2 yamt if (prevpipe == 16) {
1322 1.5.4.2 yamt if (dir == PIPEinput) {
1323 1.5.4.2 yamt sc->sc_chi_pipe_in = pipe;
1324 1.5.4.2 yamt } else {
1325 1.5.4.2 yamt sc->sc_chi_pipe_out = pipe;
1326 1.5.4.2 yamt }
1327 1.5.4.2 yamt } else
1328 1.5.4.2 yamt sc->sc_pipe[prevpipe].next = pipe;
1329 1.5.4.2 yamt
1330 1.5.4.2 yamt sc->sc_pipe[pipe].next = nextpipe;
1331 1.5.4.2 yamt sc->sc_pipe[pipe].cycle = cycle;
1332 1.5.4.2 yamt sc->sc_pipe[pipe].length = len;
1333 1.5.4.2 yamt
1334 1.5.4.2 yamt cmd = dbri_command_lock(sc);
1335 1.5.4.2 yamt
1336 1.5.4.2 yamt switch (dir) {
1337 1.5.4.2 yamt case PIPEinput:
1338 1.5.4.2 yamt val = DBRI_DTS_VI | DBRI_DTS_INS | DBRI_DTS_PRVIN(prevpipe);
1339 1.5.4.2 yamt val |= pipe;
1340 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);
1341 1.5.4.2 yamt *(cmd++) = DBRI_TS_LEN(len) | DBRI_TS_CYCLE(cycle) |
1342 1.5.4.2 yamt DBRI_TS_NEXT(nextpipe);
1343 1.5.4.2 yamt *(cmd++) = 0;
1344 1.5.4.2 yamt break;
1345 1.5.4.2 yamt case PIPEoutput:
1346 1.5.4.2 yamt val = DBRI_DTS_VO | DBRI_DTS_INS | DBRI_DTS_PRVOUT(prevpipe);
1347 1.5.4.2 yamt val |= pipe;
1348 1.5.4.2 yamt *(cmd++) = DBRI_CMD(DBRI_COMMAND_DTS, 0, val);
1349 1.5.4.2 yamt *(cmd++) = 0;
1350 1.5.4.2 yamt *(cmd++) = DBRI_TS_LEN(len) | DBRI_TS_CYCLE(cycle) |
1351 1.5.4.2 yamt DBRI_TS_NEXT(nextpipe);
1352 1.5.4.2 yamt break;
1353 1.5.4.2 yamt default:
1354 1.5.4.2 yamt printf("%s: should not have happened!\n",
1355 1.5.4.2 yamt sc->sc_dev.dv_xname);
1356 1.5.4.2 yamt break;
1357 1.5.4.2 yamt }
1358 1.5.4.2 yamt
1359 1.5.4.2 yamt dbri_command_send(sc, cmd);
1360 1.5.4.2 yamt
1361 1.5.4.2 yamt return;
1362 1.5.4.2 yamt }
1363 1.5.4.2 yamt
1364 1.5.4.2 yamt int
1365 1.5.4.2 yamt pipe_active(struct dbri_softc *sc, int pipe)
1366 1.5.4.2 yamt {
1367 1.5.4.2 yamt
1368 1.5.4.2 yamt return (sc->sc_pipe[pipe].desc != -1);
1369 1.5.4.2 yamt }
1370 1.5.4.2 yamt
1371 1.5.4.2 yamt /*
1372 1.5.4.2 yamt * subroutines required to interface with audio(9)
1373 1.5.4.2 yamt */
1374 1.5.4.2 yamt
1375 1.5.4.2 yamt int
1376 1.5.4.2 yamt dbri_query_encoding(void *hdl, struct audio_encoding *ae)
1377 1.5.4.2 yamt {
1378 1.5.4.2 yamt
1379 1.5.4.2 yamt /* XXX we shouldn't claim we support LE samples */
1380 1.5.4.2 yamt switch (ae->index) {
1381 1.5.4.2 yamt case 0:
1382 1.5.4.2 yamt strcpy(ae->name, AudioEulinear);
1383 1.5.4.2 yamt ae->encoding = AUDIO_ENCODING_ULINEAR;
1384 1.5.4.2 yamt ae->precision = 8;
1385 1.5.4.2 yamt ae->flags = AUDIO_ENCODINGFLAG_EMULATED;
1386 1.5.4.2 yamt break;
1387 1.5.4.2 yamt case 1:
1388 1.5.4.2 yamt strcpy(ae->name, AudioEmulaw);
1389 1.5.4.2 yamt ae->encoding = AUDIO_ENCODING_ULAW;
1390 1.5.4.2 yamt ae->precision = 8;
1391 1.5.4.2 yamt ae->flags = 0;
1392 1.5.4.2 yamt break;
1393 1.5.4.2 yamt case 2:
1394 1.5.4.2 yamt strcpy(ae->name, AudioEalaw);
1395 1.5.4.2 yamt ae->encoding = AUDIO_ENCODING_ALAW;
1396 1.5.4.2 yamt ae->precision = 8;
1397 1.5.4.2 yamt ae->flags = 0;
1398 1.5.4.2 yamt break;
1399 1.5.4.2 yamt case 3:
1400 1.5.4.2 yamt strcpy(ae->name, AudioEslinear);
1401 1.5.4.2 yamt ae->encoding = AUDIO_ENCODING_SLINEAR;
1402 1.5.4.2 yamt ae->precision = 8;
1403 1.5.4.2 yamt ae->flags = AUDIO_ENCODINGFLAG_EMULATED;
1404 1.5.4.2 yamt break;
1405 1.5.4.2 yamt case 4:
1406 1.5.4.2 yamt strcpy(ae->name, AudioEslinear_le);
1407 1.5.4.2 yamt ae->encoding = AUDIO_ENCODING_SLINEAR_LE;
1408 1.5.4.2 yamt ae->precision = 16;
1409 1.5.4.2 yamt ae->flags = AUDIO_ENCODINGFLAG_EMULATED;
1410 1.5.4.2 yamt break;
1411 1.5.4.2 yamt case 5:
1412 1.5.4.2 yamt strcpy(ae->name, AudioEulinear_le);
1413 1.5.4.2 yamt ae->encoding = AUDIO_ENCODING_ULINEAR_LE;
1414 1.5.4.2 yamt ae->precision = 16;
1415 1.5.4.2 yamt ae->flags = AUDIO_ENCODINGFLAG_EMULATED;
1416 1.5.4.2 yamt break;
1417 1.5.4.2 yamt case 6:
1418 1.5.4.2 yamt strcpy(ae->name, AudioEslinear_be);
1419 1.5.4.2 yamt ae->encoding = AUDIO_ENCODING_SLINEAR_BE;
1420 1.5.4.2 yamt ae->precision = 16;
1421 1.5.4.2 yamt ae->flags = 0;
1422 1.5.4.2 yamt break;
1423 1.5.4.2 yamt case 7:
1424 1.5.4.2 yamt strcpy(ae->name, AudioEulinear_be);
1425 1.5.4.2 yamt ae->encoding = AUDIO_ENCODING_ULINEAR_BE;
1426 1.5.4.2 yamt ae->precision = 16;
1427 1.5.4.2 yamt ae->flags = 0;
1428 1.5.4.2 yamt break;
1429 1.5.4.2 yamt default:
1430 1.5.4.2 yamt return (EINVAL);
1431 1.5.4.2 yamt }
1432 1.5.4.2 yamt
1433 1.5.4.2 yamt return (0);
1434 1.5.4.2 yamt }
1435 1.5.4.2 yamt
1436 1.5.4.2 yamt /*
1437 1.5.4.2 yamt * XXX: recording isn't supported - jmcneill
1438 1.5.4.2 yamt */
1439 1.5.4.2 yamt int
1440 1.5.4.2 yamt dbri_set_params(void *hdl, int setmode, int usemode,
1441 1.5.4.2 yamt struct audio_params *play, struct audio_params *rec,
1442 1.5.4.2 yamt stream_filter_list_t *pfil, stream_filter_list_t *rfil)
1443 1.5.4.2 yamt {
1444 1.5.4.2 yamt struct dbri_softc *sc = hdl;
1445 1.5.4.2 yamt int i;
1446 1.5.4.2 yamt
1447 1.5.4.2 yamt if ((play->precision != 8 && play->precision != 16) ||
1448 1.5.4.2 yamt (play->channels != 1 && play->channels != 2))
1449 1.5.4.2 yamt return (EINVAL);
1450 1.5.4.2 yamt
1451 1.5.4.2 yamt for (i = 0; CS4215_FREQ[i].freq; i++)
1452 1.5.4.2 yamt if (CS4215_FREQ[i].freq == play->sample_rate)
1453 1.5.4.2 yamt break;
1454 1.5.4.2 yamt
1455 1.5.4.2 yamt if (CS4215_FREQ[i].freq == 0)
1456 1.5.4.2 yamt return (EINVAL);
1457 1.5.4.2 yamt
1458 1.5.4.2 yamt /* set frequency */
1459 1.5.4.2 yamt sc->sc_mm.control[1] &= ~0x38;
1460 1.5.4.2 yamt sc->sc_mm.control[1] |= CS4215_FREQ[i].csval;
1461 1.5.4.2 yamt sc->sc_mm.control[2] &= ~0x70;
1462 1.5.4.2 yamt sc->sc_mm.control[2] |= CS4215_FREQ[i].xtal;
1463 1.5.4.2 yamt
1464 1.5.4.2 yamt /*play->factor = 1;
1465 1.5.4.2 yamt play->sw_code = NULL;*/
1466 1.5.4.2 yamt
1467 1.5.4.2 yamt switch (play->encoding) {
1468 1.5.4.2 yamt case AUDIO_ENCODING_ULAW:
1469 1.5.4.2 yamt sc->sc_mm.control[1] &= ~3;
1470 1.5.4.2 yamt sc->sc_mm.control[1] |= CS4215_DFR_ULAW;
1471 1.5.4.2 yamt break;
1472 1.5.4.2 yamt case AUDIO_ENCODING_ALAW:
1473 1.5.4.2 yamt sc->sc_mm.control[1] &= ~3;
1474 1.5.4.2 yamt sc->sc_mm.control[1] |= CS4215_DFR_ALAW;
1475 1.5.4.2 yamt break;
1476 1.5.4.2 yamt case AUDIO_ENCODING_SLINEAR_LE:
1477 1.5.4.2 yamt case AUDIO_ENCODING_ULINEAR_LE:
1478 1.5.4.2 yamt if (play->precision == 16) {
1479 1.5.4.2 yamt /* XXX this surely needs some changes elsewhere */
1480 1.5.4.2 yamt /*play->sw_code = swap_bytes;*/
1481 1.5.4.2 yamt sc->sc_mm.control[1] &= ~3;
1482 1.5.4.2 yamt sc->sc_mm.control[1] |= CS4215_DFR_LINEAR16;
1483 1.5.4.2 yamt }
1484 1.5.4.2 yamt break;
1485 1.5.4.2 yamt case AUDIO_ENCODING_ULINEAR:
1486 1.5.4.2 yamt case AUDIO_ENCODING_SLINEAR:
1487 1.5.4.2 yamt sc->sc_mm.control[1] &= ~3;
1488 1.5.4.2 yamt if (play->precision == 8) {
1489 1.5.4.2 yamt sc->sc_mm.control[1] |= CS4215_DFR_LINEAR8;
1490 1.5.4.2 yamt } else {
1491 1.5.4.2 yamt sc->sc_mm.control[1] |= CS4215_DFR_LINEAR16;
1492 1.5.4.2 yamt }
1493 1.5.4.2 yamt break;
1494 1.5.4.2 yamt case AUDIO_ENCODING_ULINEAR_BE:
1495 1.5.4.2 yamt case AUDIO_ENCODING_SLINEAR_BE:
1496 1.5.4.2 yamt sc->sc_mm.control[1] &= ~3;
1497 1.5.4.2 yamt sc->sc_mm.control[1] |= CS4215_DFR_LINEAR16;
1498 1.5.4.2 yamt break;
1499 1.5.4.2 yamt }
1500 1.5.4.2 yamt
1501 1.5.4.2 yamt switch (play->channels) {
1502 1.5.4.2 yamt case 1:
1503 1.5.4.2 yamt sc->sc_mm.control[1] &= ~CS4215_DFR_STEREO;
1504 1.5.4.2 yamt break;
1505 1.5.4.2 yamt case 2:
1506 1.5.4.2 yamt sc->sc_mm.control[1] |= CS4215_DFR_STEREO;
1507 1.5.4.2 yamt break;
1508 1.5.4.2 yamt }
1509 1.5.4.2 yamt
1510 1.5.4.2 yamt return (0);
1511 1.5.4.2 yamt }
1512 1.5.4.2 yamt
1513 1.5.4.2 yamt int
1514 1.5.4.2 yamt dbri_round_blocksize(void *hdl, int bs, int mode,
1515 1.5.4.2 yamt const audio_params_t *param)
1516 1.5.4.2 yamt {
1517 1.5.4.2 yamt
1518 1.5.4.2 yamt /* DBRI DMA segment size, rounded town to 32bit alignment */
1519 1.5.4.2 yamt return 0x1ffc;
1520 1.5.4.2 yamt }
1521 1.5.4.2 yamt
1522 1.5.4.2 yamt int
1523 1.5.4.2 yamt dbri_halt_output(void *hdl)
1524 1.5.4.2 yamt {
1525 1.5.4.2 yamt struct dbri_softc *sc = hdl;
1526 1.5.4.2 yamt
1527 1.5.4.2 yamt pipe_reset(sc, 4);
1528 1.5.4.2 yamt
1529 1.5.4.2 yamt return (0);
1530 1.5.4.2 yamt }
1531 1.5.4.2 yamt
1532 1.5.4.2 yamt int
1533 1.5.4.2 yamt dbri_getdev(void *hdl, struct audio_device *ret)
1534 1.5.4.2 yamt {
1535 1.5.4.2 yamt
1536 1.5.4.2 yamt *ret = dbri_device;
1537 1.5.4.2 yamt return (0);
1538 1.5.4.2 yamt }
1539 1.5.4.2 yamt
1540 1.5.4.2 yamt int
1541 1.5.4.2 yamt dbri_set_port(void *hdl, mixer_ctrl_t *mc)
1542 1.5.4.2 yamt {
1543 1.5.4.2 yamt struct dbri_softc *sc = hdl;
1544 1.5.4.2 yamt int latt = sc->sc_latt, ratt = sc->sc_ratt;
1545 1.5.4.2 yamt
1546 1.5.4.2 yamt switch (mc->dev) {
1547 1.5.4.2 yamt case DBRI_VOL_OUTPUT: /* master volume */
1548 1.5.4.2 yamt latt = (latt & 0xc0) | (63 -
1549 1.5.4.2 yamt min(mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] >> 2, 63));
1550 1.5.4.2 yamt ratt = (ratt & 0xc0) | (63 -
1551 1.5.4.2 yamt min(mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] >> 2, 63));
1552 1.5.4.2 yamt break;
1553 1.5.4.2 yamt case DBRI_ENABLE_MONO: /* built-in speaker */
1554 1.5.4.2 yamt if (mc->un.ord == 1) {
1555 1.5.4.2 yamt ratt |= CS4215_SE;
1556 1.5.4.2 yamt } else
1557 1.5.4.2 yamt ratt &= ~CS4215_SE;
1558 1.5.4.2 yamt break;
1559 1.5.4.2 yamt case DBRI_ENABLE_HEADPHONE: /* headphones output */
1560 1.5.4.2 yamt if (mc->un.ord == 1) {
1561 1.5.4.2 yamt latt |= CS4215_HE;
1562 1.5.4.2 yamt } else
1563 1.5.4.2 yamt latt &= ~CS4215_HE;
1564 1.5.4.2 yamt break;
1565 1.5.4.2 yamt case DBRI_ENABLE_LINE: /* line out */
1566 1.5.4.2 yamt if (mc->un.ord == 1) {
1567 1.5.4.2 yamt latt |= CS4215_LE;
1568 1.5.4.2 yamt } else
1569 1.5.4.2 yamt latt &= ~CS4215_LE;
1570 1.5.4.2 yamt break;
1571 1.5.4.2 yamt }
1572 1.5.4.2 yamt
1573 1.5.4.2 yamt sc->sc_latt = latt;
1574 1.5.4.2 yamt sc->sc_ratt = ratt;
1575 1.5.4.2 yamt
1576 1.5.4.2 yamt /* no need to do that here - mmcodec_setgain does it anyway */
1577 1.5.4.2 yamt /*pipe_transmit_fixed(sc, 20, *(int *)__UNVOLATILE(sc->sc_mm.data));*/
1578 1.5.4.2 yamt
1579 1.5.4.2 yamt mmcodec_setgain(sc, 0);
1580 1.5.4.2 yamt
1581 1.5.4.2 yamt return (0);
1582 1.5.4.2 yamt }
1583 1.5.4.2 yamt
1584 1.5.4.2 yamt int
1585 1.5.4.2 yamt dbri_get_port(void *hdl, mixer_ctrl_t *mc)
1586 1.5.4.2 yamt {
1587 1.5.4.2 yamt struct dbri_softc *sc = hdl;
1588 1.5.4.2 yamt
1589 1.5.4.2 yamt switch (mc->dev) {
1590 1.5.4.2 yamt case DBRI_VOL_OUTPUT: /* master volume */
1591 1.5.4.2 yamt mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] =
1592 1.5.4.2 yamt (63 - (sc->sc_latt & 0x3f)) << 2;
1593 1.5.4.2 yamt mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] =
1594 1.5.4.2 yamt (63 - (sc->sc_ratt & 0x3f)) << 2;
1595 1.5.4.2 yamt return (0);
1596 1.5.4.2 yamt case DBRI_ENABLE_MONO: /* built-in speaker */
1597 1.5.4.2 yamt mc->un.ord = (sc->sc_ratt & CS4215_SE) ? 1 : 0;
1598 1.5.4.2 yamt return 0;
1599 1.5.4.2 yamt case DBRI_ENABLE_HEADPHONE: /* headphones output */
1600 1.5.4.2 yamt mc->un.ord = (sc->sc_latt & CS4215_HE) ? 1 : 0;
1601 1.5.4.2 yamt return 0;
1602 1.5.4.2 yamt case DBRI_ENABLE_LINE: /* line out */
1603 1.5.4.2 yamt mc->un.ord = (sc->sc_latt & CS4215_LE) ? 1 : 0;
1604 1.5.4.2 yamt return 0;
1605 1.5.4.2 yamt }
1606 1.5.4.2 yamt return (EINVAL);
1607 1.5.4.2 yamt }
1608 1.5.4.2 yamt
1609 1.5.4.2 yamt int
1610 1.5.4.2 yamt dbri_query_devinfo(void *hdl, mixer_devinfo_t *di)
1611 1.5.4.2 yamt {
1612 1.5.4.2 yamt
1613 1.5.4.2 yamt switch (di->index) {
1614 1.5.4.2 yamt case DBRI_MONITOR_CLASS:
1615 1.5.4.2 yamt di->mixer_class = DBRI_MONITOR_CLASS;
1616 1.5.4.2 yamt strcpy(di->label.name, AudioCmonitor);
1617 1.5.4.2 yamt di->type = AUDIO_MIXER_CLASS;
1618 1.5.4.2 yamt di->next = di->prev = AUDIO_MIXER_LAST;
1619 1.5.4.2 yamt return 0;
1620 1.5.4.2 yamt case DBRI_VOL_OUTPUT: /* master volume */
1621 1.5.4.2 yamt di->mixer_class = DBRI_MONITOR_CLASS;
1622 1.5.4.2 yamt di->next = di->prev = AUDIO_MIXER_LAST;
1623 1.5.4.2 yamt strcpy(di->label.name, AudioNmaster);
1624 1.5.4.2 yamt di->type = AUDIO_MIXER_VALUE;
1625 1.5.4.2 yamt di->un.v.num_channels = 2;
1626 1.5.4.2 yamt strcpy(di->un.v.units.name, AudioNvolume);
1627 1.5.4.2 yamt return (0);
1628 1.5.4.2 yamt case DBRI_ENABLE_MONO: /* built-in speaker */
1629 1.5.4.2 yamt di->mixer_class = DBRI_MONITOR_CLASS;
1630 1.5.4.2 yamt di->next = di->prev = AUDIO_MIXER_LAST;
1631 1.5.4.2 yamt strcpy(di->label.name, AudioNmono);
1632 1.5.4.2 yamt di->type = AUDIO_MIXER_ENUM;
1633 1.5.4.2 yamt di->un.e.num_mem = 2;
1634 1.5.4.2 yamt strcpy(di->un.e.member[0].label.name, AudioNoff);
1635 1.5.4.2 yamt di->un.e.member[0].ord = 0;
1636 1.5.4.2 yamt strcpy(di->un.e.member[1].label.name, AudioNon);
1637 1.5.4.2 yamt di->un.e.member[1].ord = 1;
1638 1.5.4.2 yamt return (0);
1639 1.5.4.2 yamt case DBRI_ENABLE_HEADPHONE: /* headphones output */
1640 1.5.4.2 yamt di->mixer_class = DBRI_MONITOR_CLASS;
1641 1.5.4.2 yamt di->next = di->prev = AUDIO_MIXER_LAST;
1642 1.5.4.2 yamt strcpy(di->label.name, AudioNheadphone);
1643 1.5.4.2 yamt di->type = AUDIO_MIXER_ENUM;
1644 1.5.4.2 yamt di->un.e.num_mem = 2;
1645 1.5.4.2 yamt strcpy(di->un.e.member[0].label.name, AudioNoff);
1646 1.5.4.2 yamt di->un.e.member[0].ord = 0;
1647 1.5.4.2 yamt strcpy(di->un.e.member[1].label.name, AudioNon);
1648 1.5.4.2 yamt di->un.e.member[1].ord = 1;
1649 1.5.4.2 yamt return (0);
1650 1.5.4.2 yamt case DBRI_ENABLE_LINE: /* line out */
1651 1.5.4.2 yamt di->mixer_class = DBRI_MONITOR_CLASS;
1652 1.5.4.2 yamt di->next = di->prev = AUDIO_MIXER_LAST;
1653 1.5.4.2 yamt strcpy(di->label.name, AudioNline);
1654 1.5.4.2 yamt di->type = AUDIO_MIXER_ENUM;
1655 1.5.4.2 yamt di->un.e.num_mem = 2;
1656 1.5.4.2 yamt strcpy(di->un.e.member[0].label.name, AudioNoff);
1657 1.5.4.2 yamt di->un.e.member[0].ord = 0;
1658 1.5.4.2 yamt strcpy(di->un.e.member[1].label.name, AudioNon);
1659 1.5.4.2 yamt di->un.e.member[1].ord = 1;
1660 1.5.4.2 yamt return (0);
1661 1.5.4.2 yamt }
1662 1.5.4.2 yamt
1663 1.5.4.2 yamt return (ENXIO);
1664 1.5.4.2 yamt }
1665 1.5.4.2 yamt
1666 1.5.4.2 yamt size_t
1667 1.5.4.2 yamt dbri_round_buffersize(void *hdl, int dir, size_t bufsize)
1668 1.5.4.2 yamt {
1669 1.5.4.2 yamt #ifdef DBRI_BIG_BUFFER
1670 1.5.4.2 yamt return 16*0x1ffc; /* use ~128KB buffer */
1671 1.5.4.2 yamt #else
1672 1.5.4.2 yamt return bufsize;
1673 1.5.4.2 yamt #endif
1674 1.5.4.2 yamt }
1675 1.5.4.2 yamt
1676 1.5.4.2 yamt int
1677 1.5.4.2 yamt dbri_get_props(void *hdl)
1678 1.5.4.2 yamt {
1679 1.5.4.2 yamt
1680 1.5.4.2 yamt return (AUDIO_PROP_MMAP/* | AUDIO_PROP_INDEPENDENT*/);
1681 1.5.4.2 yamt //return (0);
1682 1.5.4.2 yamt }
1683 1.5.4.2 yamt
1684 1.5.4.2 yamt int
1685 1.5.4.2 yamt dbri_trigger_output(void *hdl, void *start, void *end, int blksize,
1686 1.5.4.2 yamt void (*intr)(void *), void *intrarg,
1687 1.5.4.2 yamt const struct audio_params *param)
1688 1.5.4.2 yamt {
1689 1.5.4.2 yamt struct dbri_softc *sc = hdl;
1690 1.5.4.2 yamt unsigned long count, current, num;
1691 1.5.4.2 yamt
1692 1.5.4.2 yamt count = (unsigned long)(((caddr_t)end - (caddr_t)start));
1693 1.5.4.2 yamt num = count / blksize;
1694 1.5.4.2 yamt
1695 1.5.4.2 yamt DPRINTF(("trigger_output(%lx %lx) : %d %ld %ld\n",
1696 1.5.4.2 yamt (unsigned long)intr,
1697 1.5.4.2 yamt (unsigned long)intrarg, blksize, count, num));
1698 1.5.4.2 yamt
1699 1.5.4.2 yamt sc->sc_params = *param;
1700 1.5.4.2 yamt
1701 1.5.4.2 yamt mmcodec_setcontrol(sc);
1702 1.5.4.2 yamt mmcodec_init_data(sc);
1703 1.5.4.2 yamt current = 0;
1704 1.5.4.2 yamt while ((current < sc->sc_desc_used) &&
1705 1.5.4.2 yamt (sc->sc_desc[current].buf != start))
1706 1.5.4.2 yamt current++;
1707 1.5.4.2 yamt
1708 1.5.4.2 yamt if (current < sc->sc_desc_used) {
1709 1.5.4.2 yamt setup_ring(sc, 4, current, num, blksize, intr, intrarg);
1710 1.5.4.2 yamt return 0;
1711 1.5.4.2 yamt }
1712 1.5.4.2 yamt return EINVAL;
1713 1.5.4.2 yamt }
1714 1.5.4.2 yamt
1715 1.5.4.2 yamt u_int32_t
1716 1.5.4.2 yamt reverse_bytes(u_int32_t b, int len)
1717 1.5.4.2 yamt {
1718 1.5.4.2 yamt switch (len) {
1719 1.5.4.2 yamt case 32:
1720 1.5.4.2 yamt b = ((b & 0xffff0000) >> 16) | ((b & 0x0000ffff) << 16);
1721 1.5.4.2 yamt case 16:
1722 1.5.4.2 yamt b = ((b & 0xff00ff00) >> 8) | ((b & 0x00ff00ff) << 8);
1723 1.5.4.2 yamt case 8:
1724 1.5.4.2 yamt b = ((b & 0xf0f0f0f0) >> 4) | ((b & 0x0f0f0f0f) << 4);
1725 1.5.4.2 yamt case 4:
1726 1.5.4.2 yamt b = ((b & 0xcccccccc) >> 2) | ((b & 0x33333333) << 2);
1727 1.5.4.2 yamt case 2:
1728 1.5.4.2 yamt b = ((b & 0xaaaaaaaa) >> 1) | ((b & 0x55555555) << 1);
1729 1.5.4.2 yamt case 1:
1730 1.5.4.2 yamt case 0:
1731 1.5.4.2 yamt break;
1732 1.5.4.2 yamt default:
1733 1.5.4.2 yamt printf("reverse_bytes: unsupported length\n");
1734 1.5.4.2 yamt };
1735 1.5.4.2 yamt
1736 1.5.4.2 yamt return (b);
1737 1.5.4.2 yamt }
1738 1.5.4.2 yamt
1739 1.5.4.2 yamt static void
1740 1.5.4.2 yamt *dbri_malloc(void *v, int dir, size_t s, struct malloc_type *mt, int flags)
1741 1.5.4.2 yamt {
1742 1.5.4.2 yamt struct dbri_softc *sc = v;
1743 1.5.4.2 yamt struct dbri_desc *dd = &sc->sc_desc[sc->sc_desc_used];
1744 1.5.4.2 yamt int rseg;
1745 1.5.4.2 yamt
1746 1.5.4.2 yamt if (bus_dmamap_create(sc->sc_dmat, s, 1, s, 0, BUS_DMA_NOWAIT,
1747 1.5.4.2 yamt &dd->dmamap) == 0) {
1748 1.5.4.2 yamt if (bus_dmamem_alloc(sc->sc_dmat, s, 0, 0, &dd->dmaseg,
1749 1.5.4.2 yamt 1, &rseg, BUS_DMA_NOWAIT) == 0) {
1750 1.5.4.2 yamt if (bus_dmamem_map(sc->sc_dmat, &dd->dmaseg, rseg, s,
1751 1.5.4.2 yamt &dd->buf, BUS_DMA_NOWAIT|BUS_DMA_COHERENT) == 0) {
1752 1.5.4.2 yamt if (dd->buf!=NULL) {
1753 1.5.4.2 yamt if (bus_dmamap_load(sc->sc_dmat,
1754 1.5.4.2 yamt dd->dmamap, dd->buf, s, NULL,
1755 1.5.4.2 yamt BUS_DMA_NOWAIT) == 0) {
1756 1.5.4.2 yamt dd->len = s;
1757 1.5.4.2 yamt dd->busy = 0;
1758 1.5.4.2 yamt dd->callback = NULL;
1759 1.5.4.2 yamt dd->dmabase =
1760 1.5.4.2 yamt dd->dmamap->dm_segs[0].ds_addr;
1761 1.5.4.2 yamt DPRINTF(("dbri_malloc: using buffer %d\n",
1762 1.5.4.2 yamt sc->sc_desc_used));
1763 1.5.4.2 yamt sc->sc_desc_used++;
1764 1.5.4.2 yamt return dd->buf;
1765 1.5.4.2 yamt } else
1766 1.5.4.2 yamt printf("dbri_malloc: load failed\n");
1767 1.5.4.2 yamt } else
1768 1.5.4.2 yamt printf("dbri_malloc: map returned NULL\n");
1769 1.5.4.2 yamt } else
1770 1.5.4.2 yamt printf("dbri_malloc: map failed\n");
1771 1.5.4.2 yamt bus_dmamem_free(sc->sc_dmat, &dd->dmaseg, rseg);
1772 1.5.4.2 yamt } else
1773 1.5.4.2 yamt printf("dbri_malloc: malloc() failed\n");
1774 1.5.4.2 yamt bus_dmamap_destroy(sc->sc_dmat, dd->dmamap);
1775 1.5.4.2 yamt } else
1776 1.5.4.2 yamt printf("dbri_malloc: bus_dmamap_create() failed\n");
1777 1.5.4.2 yamt return NULL;
1778 1.5.4.2 yamt }
1779 1.5.4.2 yamt
1780 1.5.4.2 yamt static void
1781 1.5.4.2 yamt dbri_free(void *v, void *p, struct malloc_type *mt)
1782 1.5.4.2 yamt {
1783 1.5.4.2 yamt free(p, mt);
1784 1.5.4.2 yamt }
1785 1.5.4.2 yamt
1786 1.5.4.2 yamt static paddr_t
1787 1.5.4.2 yamt dbri_mappage(void *v, void *mem, off_t off, int prot)
1788 1.5.4.2 yamt {
1789 1.5.4.2 yamt struct dbri_softc *sc = v;;
1790 1.5.4.2 yamt int current;
1791 1.5.4.2 yamt
1792 1.5.4.2 yamt if (off < 0)
1793 1.5.4.2 yamt return -1;
1794 1.5.4.2 yamt
1795 1.5.4.2 yamt current = 0;
1796 1.5.4.2 yamt while ((current < sc->sc_desc_used) &&
1797 1.5.4.2 yamt (sc->sc_desc[current].buf != mem))
1798 1.5.4.2 yamt current++;
1799 1.5.4.2 yamt
1800 1.5.4.2 yamt if (current < sc->sc_desc_used) {
1801 1.5.4.2 yamt return bus_dmamem_mmap(sc->sc_dmat,
1802 1.5.4.2 yamt &sc->sc_desc[current].dmaseg, 1, off, prot, BUS_DMA_WAITOK);
1803 1.5.4.2 yamt }
1804 1.5.4.2 yamt
1805 1.5.4.2 yamt return -1;
1806 1.5.4.2 yamt }
1807 1.5.4.2 yamt
1808 1.5.4.2 yamt static int
1809 1.5.4.2 yamt dbri_open(void *cookie, int flags)
1810 1.5.4.2 yamt {
1811 1.5.4.2 yamt struct dbri_softc *sc = cookie;
1812 1.5.4.2 yamt
1813 1.5.4.2 yamt dbri_bring_up(sc);
1814 1.5.4.2 yamt return 0;
1815 1.5.4.2 yamt }
1816 1.5.4.2 yamt
1817 1.5.4.2 yamt static void
1818 1.5.4.2 yamt dbri_close(void *cookie)
1819 1.5.4.2 yamt {
1820 1.5.4.2 yamt struct dbri_softc *sc = cookie;
1821 1.5.4.2 yamt
1822 1.5.4.2 yamt dbri_set_power(sc, 0);
1823 1.5.4.2 yamt }
1824 1.5.4.2 yamt
1825 1.5.4.2 yamt static void
1826 1.5.4.2 yamt dbri_powerhook(int why, void *cookie)
1827 1.5.4.2 yamt {
1828 1.5.4.2 yamt struct dbri_softc *sc = cookie;
1829 1.5.4.2 yamt
1830 1.5.4.2 yamt switch(why)
1831 1.5.4.2 yamt {
1832 1.5.4.2 yamt case PWR_SUSPEND:
1833 1.5.4.2 yamt case PWR_STANDBY:
1834 1.5.4.2 yamt dbri_set_power(sc, 0);
1835 1.5.4.2 yamt break;
1836 1.5.4.2 yamt case PWR_RESUME:
1837 1.5.4.2 yamt dbri_bring_up(sc);
1838 1.5.4.2 yamt break;
1839 1.5.4.2 yamt }
1840 1.5.4.2 yamt }
1841 1.5.4.2 yamt
1842 1.5.4.2 yamt #endif /* NAUDIO > 0 */
1843