dbrivar.h revision 1.6 1 /* $NetBSD: dbrivar.h,v 1.6 2007/03/14 05:40:35 macallan Exp $ */
2
3 /*
4 * Copyright (C) 1997 Rudolf Koenig (rfkoenig (at) immd4.informatik.uni-erlangen.de)
5 * Copyright (c) 1998, 1999 Brent Baccala (baccala (at) freesoft.org)
6 * Copyright (c) 2001, 2002 Jared D. McNeill <jmcneill (at) netbsd.org>
7 * Copyright (c) 2005 Michael Lorenz <macallan (at) netbsd.org>
8 * All rights reserved.
9 *
10 * This driver is losely based on a Linux driver written by Rudolf Koenig and
11 * Brent Baccala who kindly gave their permission to use their code in a
12 * BSD-licensed driver.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 * must display the following acknowledgement:
24 * This product includes software developed by Rudolf Koenig, Brent
25 * Baccala, Jared D. McNeill.
26 * 4. Neither the name of the author nor the names of any contributors may
27 * be used to endorse or promote products derived from this software
28 * without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * SUCH DAMAGE.
41 *
42 */
43
44 #ifndef DBRI_VAR_H
45 #define DBRI_VAR_H
46
47 #define DBRI_NUM_COMMANDS 64
48 #define DBRI_NUM_DESCRIPTORS 64
49 #define DBRI_INT_BLOCKS 64
50
51 #define DBRI_PIPE_MAX 32
52
53 enum direction {
54 in,
55 out
56 };
57
58 /* DBRI DMA transmit descriptor */
59 struct dbri_mem {
60 volatile uint32_t flags;
61 #define TX_EOF 0x80000000 /* End of frame marker */
62 #define TX_BCNT(x) ((x&0x3fff)<<16)
63 #define TX_BINT 0x00008000 /* interrupt when EOF */
64 #define TX_MINT 0x00004000 /* marker interrupt */
65 #define TX_IDLE 0x00002000 /* send idles after data */
66 #define TX_FCNT(x) (x&0x1fff)
67
68 volatile uint32_t ba; /* tx/rx buffer address */
69 volatile uint32_t nda; /* next descriptor address */
70 volatile uint32_t status;
71 #define TS_OK 0x0001 /* transmission completed */
72 #define TS_ABORT 0x0004 /* transmission aborted */
73 #define TS_UNDERRUN 0x0008 /* DMA underrun */
74 };
75
76 struct dbri_pipe {
77 uint32_t sdp; /* SDP command word */
78 enum direction direction;
79 int next; /* next pipe in linked list */
80 int prev; /* previous pipe in linked list */
81 int cycle; /* offset of timeslot (bits) */
82 int length; /* length of timeslot (bits) */
83 int desc; /* index of active descriptor */
84 volatile uint32_t *prec; /* pointer to received fixed data */
85 };
86
87 struct dbri_desc {
88 int busy;
89 void * buf; /* cpu view of buffer */
90 void * buf_dvma; /* device view */
91 bus_addr_t dmabase;
92 bus_dma_segment_t dmaseg;
93 bus_dmamap_t dmamap;
94 size_t len;
95 void (*callback)(void *);
96 void *callback_args;
97 };
98
99 struct dbri_dma {
100 volatile uint32_t command[DBRI_NUM_COMMANDS];
101 volatile int32_t intr[DBRI_INT_BLOCKS];
102 struct dbri_mem desc[DBRI_NUM_DESCRIPTORS];
103 bus_dmamap_t dmamap;
104 };
105
106 struct dbri_softc {
107 struct device sc_dev; /* base device */
108
109 struct sbusdev sc_sd; /* sbus device */
110 bus_space_handle_t sc_ioh;
111 bus_space_tag_t sc_iot;
112 bus_dma_tag_t sc_dmat;
113 bus_dmamap_t sc_dmamap;
114 bus_dma_segment_t sc_dmaseg;
115
116 int sc_have_powerctl;
117 int sc_powerstate; /* DBRI's powered up or not */
118 int sc_pmgrstate; /* PWR_RESUME etc. */
119 int sc_burst; /* DVMA burst size in effect */
120
121 bus_addr_t sc_dmabase; /* VA of buffer we provide */
122 void * sc_membase;
123 int sc_bufsiz; /* size of the buffer */
124 int sc_locked;
125 int sc_irqp;
126
127 int sc_waitseen;
128
129 int sc_open;
130 int sc_playing;
131
132 int sc_liu_state;
133 void (*sc_liu)(void *);
134 void *sc_liu_args;
135
136 struct dbri_pipe sc_pipe[DBRI_PIPE_MAX];
137 struct dbri_desc sc_desc[DBRI_NUM_DESCRIPTORS];
138
139 struct cs4215_state sc_mm;
140 int sc_latt, sc_ratt; /* output attenuation */
141 int sc_linp, sc_rinp; /* input volume */
142 int sc_monitor; /* monitor volume */
143 int sc_input; /* 0 - line, 1 - mic */
144
145 int sc_ctl_mode;
146
147 uint32_t sc_version;
148 int sc_chi_pipe_in;
149 int sc_chi_pipe_out;
150 int sc_chi_bpf;
151
152 int sc_desc_used;
153
154 struct audio_params sc_params;
155
156 struct dbri_dma *sc_dma;
157 };
158
159 #define dbri_dma_off(member, elem) \
160 ((uint32_t)(unsigned long) \
161 (&(((struct dbri_dma *)0)->member[elem])))
162
163 #if 1
164 #define DBRI_CMD(cmd, intr, value) ((cmd << 28) | (intr << 27) | value)
165 #else
166 #define DBRI_CMD(cmd, intr, value) ((cmd << 28) | (1 << 27) | value)
167 #endif
168 #define DBRI_INTR_GETCHAN(v) (((v) >> 24) & 0x3f)
169 #define DBRI_INTR_GETCODE(v) (((v) >> 20) & 0xf)
170 #define DBRI_INTR_GETCMD(v) (((v) >> 16) & 0xf)
171 #define DBRI_INTR_GETVAL(v) ((v) & 0xffff)
172 #define DBRI_INTR_GETRVAL(v) ((v) & 0xfffff)
173
174 #define DBRI_SDP_MODE(v) ((v) & (7 << 13))
175 #define DBRI_PIPE(v) ((v) << 0)
176
177 #endif /* DBRI_VAR_H */
178