isp_sbus.c revision 1.14.2.3 1 1.14.2.3 bouyer /* $NetBSD: isp_sbus.c,v 1.14.2.3 2001/01/05 17:36:26 bouyer Exp $ */
2 1.14.2.2 bouyer /*
3 1.14.2.2 bouyer * This driver, which is contained in NetBSD in the files:
4 1.14.2.2 bouyer *
5 1.14.2.2 bouyer * sys/dev/ic/isp.c
6 1.14.2.3 bouyer * sys/dev/ic/isp_inline.h
7 1.14.2.3 bouyer * sys/dev/ic/isp_netbsd.c
8 1.14.2.3 bouyer * sys/dev/ic/isp_netbsd.h
9 1.14.2.3 bouyer * sys/dev/ic/isp_target.c
10 1.14.2.3 bouyer * sys/dev/ic/isp_target.h
11 1.14.2.3 bouyer * sys/dev/ic/isp_tpublic.h
12 1.14.2.3 bouyer * sys/dev/ic/ispmbox.h
13 1.14.2.3 bouyer * sys/dev/ic/ispreg.h
14 1.14.2.3 bouyer * sys/dev/ic/ispvar.h
15 1.14.2.2 bouyer * sys/microcode/isp/asm_sbus.h
16 1.14.2.2 bouyer * sys/microcode/isp/asm_1040.h
17 1.14.2.2 bouyer * sys/microcode/isp/asm_1080.h
18 1.14.2.2 bouyer * sys/microcode/isp/asm_12160.h
19 1.14.2.2 bouyer * sys/microcode/isp/asm_2100.h
20 1.14.2.2 bouyer * sys/microcode/isp/asm_2200.h
21 1.14.2.2 bouyer * sys/pci/isp_pci.c
22 1.14.2.2 bouyer * sys/sbus/isp_sbus.c
23 1.14.2.2 bouyer *
24 1.14.2.2 bouyer * Is being actively maintained by Matthew Jacob (mjacob (at) netbsd.org).
25 1.14.2.2 bouyer * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris,
26 1.14.2.2 bouyer * Linux versions. This tends to be an interesting maintenance problem.
27 1.14.2.2 bouyer *
28 1.14.2.2 bouyer * Please coordinate with Matthew Jacob on changes you wish to make here.
29 1.14.2.2 bouyer */
30 1.1 mrg /*
31 1.1 mrg * SBus specific probe and attach routines for Qlogic ISP SCSI adapters.
32 1.1 mrg *
33 1.1 mrg * Copyright (c) 1997 by Matthew Jacob
34 1.1 mrg * NASA AMES Research Center
35 1.1 mrg * All rights reserved.
36 1.1 mrg *
37 1.1 mrg * Redistribution and use in source and binary forms, with or without
38 1.1 mrg * modification, are permitted provided that the following conditions
39 1.1 mrg * are met:
40 1.1 mrg * 1. Redistributions of source code must retain the above copyright
41 1.1 mrg * notice immediately at the beginning of the file, without modification,
42 1.1 mrg * this list of conditions, and the following disclaimer.
43 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright
44 1.1 mrg * notice, this list of conditions and the following disclaimer in the
45 1.1 mrg * documentation and/or other materials provided with the distribution.
46 1.1 mrg * 3. The name of the author may not be used to endorse or promote products
47 1.1 mrg * derived from this software without specific prior written permission.
48 1.1 mrg *
49 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
50 1.1 mrg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
51 1.1 mrg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
52 1.1 mrg * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
53 1.1 mrg * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
54 1.1 mrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
55 1.1 mrg * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
56 1.1 mrg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
57 1.1 mrg * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
58 1.1 mrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
59 1.1 mrg * SUCH DAMAGE.
60 1.1 mrg *
61 1.1 mrg */
62 1.1 mrg
63 1.1 mrg #include <sys/param.h>
64 1.1 mrg #include <sys/systm.h>
65 1.1 mrg #include <sys/device.h>
66 1.1 mrg #include <sys/kernel.h>
67 1.1 mrg #include <sys/malloc.h>
68 1.1 mrg #include <sys/queue.h>
69 1.1 mrg
70 1.14.2.2 bouyer #include <machine/bus.h>
71 1.14.2.2 bouyer #include <machine/intr.h>
72 1.1 mrg #include <machine/autoconf.h>
73 1.1 mrg
74 1.1 mrg #include <dev/ic/isp_netbsd.h>
75 1.1 mrg #include <dev/microcode/isp/asm_sbus.h>
76 1.1 mrg #include <dev/sbus/sbusvar.h>
77 1.1 mrg
78 1.14.2.2 bouyer static int isp_sbus_intr __P((void *));
79 1.1 mrg static u_int16_t isp_sbus_rd_reg __P((struct ispsoftc *, int));
80 1.1 mrg static void isp_sbus_wr_reg __P((struct ispsoftc *, int, u_int16_t));
81 1.1 mrg static int isp_sbus_mbxdma __P((struct ispsoftc *));
82 1.1 mrg static int isp_sbus_dmasetup __P((struct ispsoftc *, struct scsipi_xfer *,
83 1.14.2.2 bouyer ispreq_t *, u_int16_t *, u_int16_t));
84 1.1 mrg static void isp_sbus_dmateardown __P((struct ispsoftc *, struct scsipi_xfer *,
85 1.1 mrg u_int32_t));
86 1.1 mrg
87 1.14.2.2 bouyer #ifndef ISP_1000_RISC_CODE
88 1.14.2.2 bouyer #define ISP_1000_RISC_CODE NULL
89 1.14.2.2 bouyer #endif
90 1.14.2.2 bouyer
91 1.1 mrg static struct ispmdvec mdvec = {
92 1.1 mrg isp_sbus_rd_reg,
93 1.1 mrg isp_sbus_wr_reg,
94 1.1 mrg isp_sbus_mbxdma,
95 1.1 mrg isp_sbus_dmasetup,
96 1.1 mrg isp_sbus_dmateardown,
97 1.1 mrg NULL,
98 1.1 mrg NULL,
99 1.1 mrg NULL,
100 1.14.2.2 bouyer ISP_1000_RISC_CODE
101 1.1 mrg };
102 1.1 mrg
103 1.1 mrg struct isp_sbussoftc {
104 1.1 mrg struct ispsoftc sbus_isp;
105 1.14.2.2 bouyer struct sbusdev sbus_sd;
106 1.1 mrg sdparam sbus_dev;
107 1.1 mrg bus_space_tag_t sbus_bustag;
108 1.1 mrg bus_dma_tag_t sbus_dmatag;
109 1.6 mjacob bus_space_handle_t sbus_reg;
110 1.1 mrg int sbus_node;
111 1.1 mrg int sbus_pri;
112 1.1 mrg struct ispmdvec sbus_mdvec;
113 1.14 mjacob bus_dmamap_t *sbus_dmamap;
114 1.14.2.2 bouyer bus_dmamap_t sbus_request_dmamap;
115 1.14.2.2 bouyer bus_dmamap_t sbus_result_dmamap;
116 1.8 mjacob int16_t sbus_poff[_NREG_BLKS];
117 1.1 mrg };
118 1.1 mrg
119 1.1 mrg
120 1.1 mrg static int isp_match __P((struct device *, struct cfdata *, void *));
121 1.1 mrg static void isp_sbus_attach __P((struct device *, struct device *, void *));
122 1.1 mrg struct cfattach isp_sbus_ca = {
123 1.1 mrg sizeof (struct isp_sbussoftc), isp_match, isp_sbus_attach
124 1.1 mrg };
125 1.1 mrg
126 1.1 mrg static int
127 1.1 mrg isp_match(parent, cf, aux)
128 1.1 mrg struct device *parent;
129 1.1 mrg struct cfdata *cf;
130 1.1 mrg void *aux;
131 1.1 mrg {
132 1.1 mrg int rv;
133 1.1 mrg #ifdef DEBUG
134 1.1 mrg static int oneshot = 1;
135 1.1 mrg #endif
136 1.1 mrg struct sbus_attach_args *sa = aux;
137 1.1 mrg
138 1.1 mrg rv = (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0 ||
139 1.1 mrg strcmp("PTI,ptisp", sa->sa_name) == 0 ||
140 1.1 mrg strcmp("ptisp", sa->sa_name) == 0 ||
141 1.1 mrg strcmp("SUNW,isp", sa->sa_name) == 0 ||
142 1.1 mrg strcmp("QLGC,isp", sa->sa_name) == 0);
143 1.1 mrg #ifdef DEBUG
144 1.1 mrg if (rv && oneshot) {
145 1.1 mrg oneshot = 0;
146 1.1 mrg printf("Qlogic ISP Driver, NetBSD (sbus) Platform Version "
147 1.1 mrg "%d.%d Core Version %d.%d\n",
148 1.1 mrg ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
149 1.1 mrg ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
150 1.1 mrg }
151 1.1 mrg #endif
152 1.1 mrg return (rv);
153 1.1 mrg }
154 1.1 mrg
155 1.14.2.2 bouyer
156 1.1 mrg static void
157 1.1 mrg isp_sbus_attach(parent, self, aux)
158 1.1 mrg struct device *parent, *self;
159 1.1 mrg void *aux;
160 1.1 mrg {
161 1.14.2.2 bouyer int freq, ispburst, sbusburst;
162 1.1 mrg struct sbus_attach_args *sa = aux;
163 1.1 mrg struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) self;
164 1.1 mrg struct ispsoftc *isp = &sbc->sbus_isp;
165 1.1 mrg
166 1.1 mrg printf(" for %s\n", sa->sa_name);
167 1.1 mrg
168 1.1 mrg sbc->sbus_bustag = sa->sa_bustag;
169 1.1 mrg sbc->sbus_dmatag = sa->sa_dmatag;
170 1.14.2.2 bouyer if (sa->sa_nintr != 0)
171 1.14.2.2 bouyer sbc->sbus_pri = sa->sa_pri;
172 1.1 mrg sbc->sbus_mdvec = mdvec;
173 1.1 mrg
174 1.1 mrg if (sa->sa_npromvaddrs != 0) {
175 1.6 mjacob sbc->sbus_reg = (bus_space_handle_t)sa->sa_promvaddrs[0];
176 1.1 mrg } else {
177 1.6 mjacob if (sbus_bus_map(sa->sa_bustag, sa->sa_slot, sa->sa_offset,
178 1.6 mjacob sa->sa_size, BUS_SPACE_MAP_LINEAR, 0,
179 1.6 mjacob &sbc->sbus_reg) != 0) {
180 1.1 mrg printf("%s: cannot map registers\n", self->dv_xname);
181 1.1 mrg return;
182 1.1 mrg }
183 1.1 mrg }
184 1.1 mrg sbc->sbus_node = sa->sa_node;
185 1.1 mrg
186 1.1 mrg freq = getpropint(sa->sa_node, "clock-frequency", 0);
187 1.1 mrg if (freq) {
188 1.1 mrg /*
189 1.1 mrg * Convert from HZ to MHz, rounding up.
190 1.1 mrg */
191 1.1 mrg freq = (freq + 500000)/1000000;
192 1.1 mrg #if 0
193 1.1 mrg printf("%s: %d MHz\n", self->dv_xname, freq);
194 1.1 mrg #endif
195 1.1 mrg }
196 1.1 mrg sbc->sbus_mdvec.dv_clock = freq;
197 1.5 mjacob
198 1.5 mjacob /*
199 1.14.2.2 bouyer * Now figure out what the proper burst sizes, etc., to use.
200 1.14.2.2 bouyer * Unfortunately, there is no ddi_dma_burstsizes here which
201 1.14.2.2 bouyer * walks up the tree finding the limiting burst size node (if
202 1.14.2.2 bouyer * any).
203 1.5 mjacob */
204 1.14.2.2 bouyer sbusburst = ((struct sbus_softc *)parent)->sc_burst;
205 1.14.2.2 bouyer if (sbusburst == 0)
206 1.14.2.2 bouyer sbusburst = SBUS_BURST_32 - 1;
207 1.14.2.2 bouyer ispburst = getpropint(sa->sa_node, "burst-sizes", -1);
208 1.14.2.2 bouyer if (ispburst == -1) {
209 1.14.2.2 bouyer ispburst = sbusburst;
210 1.14.2.2 bouyer }
211 1.14.2.2 bouyer ispburst &= sbusburst;
212 1.14.2.2 bouyer ispburst &= ~(1 << 7);
213 1.14.2.2 bouyer ispburst &= ~(1 << 6);
214 1.14.2.2 bouyer sbc->sbus_mdvec.dv_conf1 = 0;
215 1.14.2.2 bouyer if (ispburst & (1 << 5)) {
216 1.14.2.2 bouyer sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_32;
217 1.14.2.2 bouyer } else if (ispburst & (1 << 4)) {
218 1.14.2.2 bouyer sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_16;
219 1.14.2.2 bouyer } else if (ispburst & (1 << 3)) {
220 1.14.2.2 bouyer sbc->sbus_mdvec.dv_conf1 =
221 1.14.2.2 bouyer BIU_SBUS_CONF1_BURST8 | BIU_SBUS_CONF1_FIFO_8;
222 1.14.2.2 bouyer }
223 1.14.2.2 bouyer if (sbc->sbus_mdvec.dv_conf1) {
224 1.14.2.2 bouyer sbc->sbus_mdvec.dv_conf1 |= BIU_BURST_ENABLE;
225 1.14.2.2 bouyer }
226 1.1 mrg
227 1.1 mrg /*
228 1.1 mrg * Some early versions of the PTI SBus adapter
229 1.1 mrg * would fail in trying to download (via poking)
230 1.1 mrg * FW. We give up on them.
231 1.1 mrg */
232 1.1 mrg if (strcmp("PTI,ptisp", sa->sa_name) == 0 ||
233 1.1 mrg strcmp("ptisp", sa->sa_name) == 0) {
234 1.14.2.2 bouyer sbc->sbus_mdvec.dv_ispfw = NULL;
235 1.1 mrg }
236 1.1 mrg
237 1.1 mrg isp->isp_mdvec = &sbc->sbus_mdvec;
238 1.2 mjacob isp->isp_bustype = ISP_BT_SBUS;
239 1.1 mrg isp->isp_type = ISP_HA_SCSI_UNKNOWN;
240 1.1 mrg isp->isp_param = &sbc->sbus_dev;
241 1.1 mrg bzero(isp->isp_param, sizeof (sdparam));
242 1.1 mrg
243 1.8 mjacob sbc->sbus_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
244 1.8 mjacob sbc->sbus_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = SBUS_MBOX_REGS_OFF;
245 1.8 mjacob sbc->sbus_poff[SXP_BLOCK >> _BLK_REG_SHFT] = SBUS_SXP_REGS_OFF;
246 1.8 mjacob sbc->sbus_poff[RISC_BLOCK >> _BLK_REG_SHFT] = SBUS_RISC_REGS_OFF;
247 1.8 mjacob sbc->sbus_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
248 1.1 mrg
249 1.14.2.2 bouyer /*
250 1.14.2.2 bouyer * Set up logging levels.
251 1.14.2.2 bouyer */
252 1.14.2.2 bouyer #ifdef ISP_LOGDEFAULT
253 1.14.2.2 bouyer isp->isp_dblev = ISP_LOGDEFAULT;
254 1.14.2.2 bouyer #else
255 1.14.2.2 bouyer isp->isp_dblev = ISP_LOGCONFIG|ISP_LOGWARN|ISP_LOGERR;
256 1.14.2.2 bouyer #ifdef SCSIDEBUG
257 1.14.2.2 bouyer isp->isp_dblev |= ISP_LOGDEBUG1|ISP_LOGDEBUG2;
258 1.14.2.2 bouyer #endif
259 1.14.2.2 bouyer #ifdef DEBUG
260 1.14.2.2 bouyer isp->isp_dblev |= ISP_LOGDEBUG0|ISP_LOGINFO;
261 1.14.2.2 bouyer #endif
262 1.14.2.2 bouyer #endif
263 1.14.2.2 bouyer isp->isp_confopts = self->dv_cfdata->cf_flags;
264 1.14.2.2 bouyer /*
265 1.14.2.2 bouyer * There's no tool on sparc to set NVRAM for ISPs, so ignore it.
266 1.14.2.2 bouyer */
267 1.14.2.2 bouyer isp->isp_confopts |= ISP_CFG_NONVRAM;
268 1.1 mrg ISP_LOCK(isp);
269 1.14.2.2 bouyer isp->isp_osinfo.no_mbox_ints = 1;
270 1.1 mrg isp_reset(isp);
271 1.1 mrg if (isp->isp_state != ISP_RESETSTATE) {
272 1.1 mrg ISP_UNLOCK(isp);
273 1.1 mrg return;
274 1.1 mrg }
275 1.1 mrg isp_init(isp);
276 1.1 mrg if (isp->isp_state != ISP_INITSTATE) {
277 1.1 mrg isp_uninit(isp);
278 1.1 mrg ISP_UNLOCK(isp);
279 1.1 mrg return;
280 1.1 mrg }
281 1.1 mrg /* Establish interrupt channel */
282 1.14.2.2 bouyer bus_intr_establish(sbc->sbus_bustag, sbc->sbus_pri, IPL_BIO, 0,
283 1.14.2.2 bouyer isp_sbus_intr, sbc);
284 1.14.2.2 bouyer ENABLE_INTS(isp);
285 1.14.2.2 bouyer ISP_UNLOCK(isp);
286 1.14.2.2 bouyer
287 1.14.2.2 bouyer sbus_establish(&sbc->sbus_sd, &sbc->sbus_isp.isp_osinfo._dev);
288 1.1 mrg
289 1.1 mrg /*
290 1.1 mrg * do generic attach.
291 1.1 mrg */
292 1.1 mrg isp_attach(isp);
293 1.1 mrg if (isp->isp_state != ISP_RUNSTATE) {
294 1.1 mrg isp_uninit(isp);
295 1.1 mrg }
296 1.14.2.2 bouyer }
297 1.14.2.2 bouyer
298 1.14.2.2 bouyer static int
299 1.14.2.2 bouyer isp_sbus_intr(arg)
300 1.14.2.2 bouyer void *arg;
301 1.14.2.2 bouyer {
302 1.14.2.2 bouyer int rv;
303 1.14.2.2 bouyer struct isp_sbussoftc *sbc = (struct isp_sbussoftc *)arg;
304 1.14.2.2 bouyer bus_dmamap_sync(sbc->sbus_dmatag, sbc->sbus_result_dmamap, 0,
305 1.14.2.2 bouyer sbc->sbus_result_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
306 1.14.2.2 bouyer sbc->sbus_isp.isp_osinfo.onintstack = 1;
307 1.14.2.2 bouyer rv = isp_intr(arg);
308 1.14.2.2 bouyer sbc->sbus_isp.isp_osinfo.onintstack = 0;
309 1.14.2.2 bouyer return (rv);
310 1.1 mrg }
311 1.1 mrg
312 1.1 mrg static u_int16_t
313 1.1 mrg isp_sbus_rd_reg(isp, regoff)
314 1.1 mrg struct ispsoftc *isp;
315 1.1 mrg int regoff;
316 1.1 mrg {
317 1.1 mrg struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
318 1.8 mjacob int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
319 1.8 mjacob offset += (regoff & 0xff);
320 1.6 mjacob return (bus_space_read_2(sbc->sbus_bustag, sbc->sbus_reg, offset));
321 1.1 mrg }
322 1.1 mrg
323 1.1 mrg static void
324 1.14 mjacob isp_sbus_wr_reg(isp, regoff, val)
325 1.1 mrg struct ispsoftc *isp;
326 1.1 mrg int regoff;
327 1.1 mrg u_int16_t val;
328 1.1 mrg {
329 1.1 mrg struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
330 1.8 mjacob int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
331 1.8 mjacob offset += (regoff & 0xff);
332 1.6 mjacob bus_space_write_2(sbc->sbus_bustag, sbc->sbus_reg, offset, val);
333 1.1 mrg }
334 1.1 mrg
335 1.1 mrg static int
336 1.1 mrg isp_sbus_mbxdma(isp)
337 1.1 mrg struct ispsoftc *isp;
338 1.1 mrg {
339 1.1 mrg struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
340 1.14.2.2 bouyer bus_dma_tag_t dmatag = sbc->sbus_dmatag;
341 1.1 mrg bus_dma_segment_t seg;
342 1.14.2.2 bouyer int rs, i;
343 1.14 mjacob size_t n;
344 1.12 pk bus_size_t len;
345 1.1 mrg
346 1.14 mjacob if (isp->isp_rquest_dma)
347 1.14 mjacob return (0);
348 1.1 mrg
349 1.14.2.2 bouyer n = sizeof (XS_T **) * isp->isp_maxcmds;
350 1.14.2.2 bouyer isp->isp_xflist = (XS_T **) malloc(n, M_DEVBUF, M_WAITOK);
351 1.14 mjacob if (isp->isp_xflist == NULL) {
352 1.14.2.2 bouyer isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
353 1.14 mjacob return (1);
354 1.14 mjacob }
355 1.14 mjacob bzero(isp->isp_xflist, n);
356 1.14 mjacob n = sizeof (bus_dmamap_t) * isp->isp_maxcmds;
357 1.14 mjacob sbc->sbus_dmamap = (bus_dmamap_t *) malloc(n, M_DEVBUF, M_WAITOK);
358 1.14 mjacob if (sbc->sbus_dmamap == NULL) {
359 1.14 mjacob free(isp->isp_xflist, M_DEVBUF);
360 1.14.2.2 bouyer isp->isp_xflist = NULL;
361 1.14.2.2 bouyer isp_prt(isp, ISP_LOGERR, "cannot alloc dmamap array");
362 1.14 mjacob return (1);
363 1.14 mjacob }
364 1.14.2.2 bouyer for (i = 0; i < isp->isp_maxcmds; i++) {
365 1.14.2.2 bouyer /* Allocate a DMA handle */
366 1.14.2.2 bouyer if (bus_dmamap_create(dmatag, MAXPHYS, 1, MAXPHYS, 0,
367 1.14.2.2 bouyer BUS_DMA_NOWAIT, &sbc->sbus_dmamap[i]) != 0) {
368 1.14.2.2 bouyer isp_prt(isp, ISP_LOGERR, "cmd DMA maps create error");
369 1.14.2.2 bouyer break;
370 1.14.2.2 bouyer }
371 1.14.2.2 bouyer }
372 1.14.2.2 bouyer if (i < isp->isp_maxcmds) {
373 1.14.2.2 bouyer while (--i >= 0) {
374 1.14.2.2 bouyer bus_dmamap_destroy(dmatag, sbc->sbus_dmamap[i]);
375 1.14.2.2 bouyer }
376 1.14 mjacob free(isp->isp_xflist, M_DEVBUF);
377 1.14.2.2 bouyer free(sbc->sbus_dmamap, M_DEVBUF);
378 1.14.2.2 bouyer isp->isp_xflist = NULL;
379 1.14.2.2 bouyer sbc->sbus_dmamap = NULL;
380 1.1 mrg return (1);
381 1.14 mjacob }
382 1.1 mrg
383 1.14.2.2 bouyer /*
384 1.14.2.2 bouyer * Allocate and map the request queue.
385 1.14.2.2 bouyer */
386 1.14.2.2 bouyer len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
387 1.14.2.2 bouyer /* Allocate DMA map */
388 1.14.2.2 bouyer if (bus_dmamap_create(dmatag, len, 1, len, 0, BUS_DMA_NOWAIT,
389 1.14.2.2 bouyer &sbc->sbus_request_dmamap) != 0) {
390 1.14.2.2 bouyer goto dmafail;
391 1.14.2.2 bouyer }
392 1.14.2.2 bouyer
393 1.14.2.2 bouyer /* Allocate DMA buffer */
394 1.14.2.2 bouyer if (bus_dmamem_alloc(dmatag, len, 0, 0, &seg, 1, &rs, BUS_DMA_NOWAIT)) {
395 1.14.2.2 bouyer goto dmafail;
396 1.14.2.2 bouyer }
397 1.14.2.2 bouyer
398 1.14.2.2 bouyer /* Load the buffer */
399 1.14.2.2 bouyer if (bus_dmamap_load_raw(dmatag, sbc->sbus_request_dmamap,
400 1.14.2.2 bouyer &seg, rs, len, BUS_DMA_NOWAIT) != 0) {
401 1.14.2.2 bouyer bus_dmamem_free(dmatag, &seg, rs);
402 1.14.2.2 bouyer goto dmafail;
403 1.14.2.2 bouyer }
404 1.14.2.2 bouyer isp->isp_rquest_dma = sbc->sbus_request_dmamap->dm_segs[0].ds_addr;
405 1.14.2.2 bouyer
406 1.14.2.2 bouyer /* Map DMA buffer in CPU addressable space */
407 1.14.2.2 bouyer if (bus_dmamem_map(dmatag, &seg, rs, len, (caddr_t *)&isp->isp_rquest,
408 1.14.2.2 bouyer BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
409 1.14.2.2 bouyer bus_dmamap_unload(dmatag, sbc->sbus_request_dmamap);
410 1.14.2.2 bouyer bus_dmamem_free(dmatag, &seg, rs);
411 1.14.2.2 bouyer goto dmafail;
412 1.14 mjacob }
413 1.1 mrg
414 1.1 mrg /*
415 1.1 mrg * Allocate and map the result queue.
416 1.1 mrg */
417 1.14.2.2 bouyer len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
418 1.14.2.2 bouyer /* Allocate DMA map */
419 1.14.2.2 bouyer if (bus_dmamap_create(dmatag, len, 1, len, 0, BUS_DMA_NOWAIT,
420 1.14.2.2 bouyer &sbc->sbus_result_dmamap) != 0) {
421 1.14.2.2 bouyer goto dmafail;
422 1.14 mjacob }
423 1.14.2.2 bouyer
424 1.14.2.2 bouyer /* Allocate DMA buffer */
425 1.14.2.2 bouyer if (bus_dmamem_alloc(dmatag, len, 0, 0, &seg, 1, &rs, BUS_DMA_NOWAIT)) {
426 1.14.2.2 bouyer goto dmafail;
427 1.14 mjacob }
428 1.14.2.2 bouyer
429 1.14.2.2 bouyer /* Load the buffer */
430 1.14.2.2 bouyer if (bus_dmamap_load_raw(dmatag, sbc->sbus_result_dmamap,
431 1.14.2.2 bouyer &seg, rs, len, BUS_DMA_NOWAIT) != 0) {
432 1.14.2.2 bouyer bus_dmamem_free(dmatag, &seg, rs);
433 1.14.2.2 bouyer goto dmafail;
434 1.14.2.2 bouyer }
435 1.14.2.2 bouyer
436 1.14.2.2 bouyer /* Map DMA buffer in CPU addressable space */
437 1.14.2.2 bouyer if (bus_dmamem_map(dmatag, &seg, rs, len, (caddr_t *)&isp->isp_result,
438 1.14.2.2 bouyer BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
439 1.14.2.2 bouyer bus_dmamap_unload(dmatag, sbc->sbus_result_dmamap);
440 1.14.2.2 bouyer bus_dmamem_free(dmatag, &seg, rs);
441 1.14.2.2 bouyer goto dmafail;
442 1.14.2.2 bouyer }
443 1.14.2.2 bouyer isp->isp_result_dma = sbc->sbus_result_dmamap->dm_segs[0].ds_addr;
444 1.14.2.2 bouyer
445 1.1 mrg return (0);
446 1.14.2.2 bouyer
447 1.14.2.2 bouyer dmafail:
448 1.14.2.2 bouyer for (i = 0; i < isp->isp_maxcmds; i++) {
449 1.14.2.2 bouyer bus_dmamap_destroy(dmatag, sbc->sbus_dmamap[i]);
450 1.14.2.2 bouyer }
451 1.14.2.2 bouyer free(sbc->sbus_dmamap, M_DEVBUF);
452 1.14.2.2 bouyer free(isp->isp_xflist, M_DEVBUF);
453 1.14.2.2 bouyer isp->isp_xflist = NULL;
454 1.14.2.2 bouyer sbc->sbus_dmamap = NULL;
455 1.14.2.2 bouyer return (1);
456 1.1 mrg }
457 1.1 mrg
458 1.1 mrg /*
459 1.14 mjacob * Map a DMA request.
460 1.14 mjacob * We're guaranteed that rq->req_handle is a value from 1 to isp->isp_maxcmds.
461 1.1 mrg */
462 1.1 mrg
463 1.1 mrg static int
464 1.1 mrg isp_sbus_dmasetup(isp, xs, rq, iptrp, optr)
465 1.1 mrg struct ispsoftc *isp;
466 1.1 mrg struct scsipi_xfer *xs;
467 1.1 mrg ispreq_t *rq;
468 1.14.2.2 bouyer u_int16_t *iptrp;
469 1.14.2.2 bouyer u_int16_t optr;
470 1.1 mrg {
471 1.1 mrg struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
472 1.14.2.2 bouyer bus_dmamap_t dmap;
473 1.14.2.2 bouyer ispcontreq_t *crq;
474 1.14.2.2 bouyer int cansleep = (xs->xs_control & XS_CTL_NOSLEEP) == 0;
475 1.14 mjacob int in = (xs->xs_control & XS_CTL_DATA_IN) != 0;
476 1.1 mrg
477 1.1 mrg if (xs->datalen == 0) {
478 1.1 mrg rq->req_seg_count = 1;
479 1.14 mjacob goto mbxsync;
480 1.1 mrg }
481 1.14.2.2 bouyer
482 1.14.2.2 bouyer dmap = sbc->sbus_dmamap[isp_handle_index(rq->req_handle)];
483 1.14.2.2 bouyer if (dmap->dm_nsegs != 0) {
484 1.1 mrg panic("%s: dma map already allocated\n", isp->isp_name);
485 1.1 mrg /* NOTREACHED */
486 1.1 mrg }
487 1.14.2.2 bouyer if (bus_dmamap_load(sbc->sbus_dmatag, dmap, xs->data, xs->datalen,
488 1.14.2.2 bouyer NULL, cansleep? BUS_DMA_WAITOK : BUS_DMA_NOWAIT) != 0) {
489 1.1 mrg XS_SETERR(xs, HBA_BOTCH);
490 1.3 mjacob return (CMD_COMPLETE);
491 1.1 mrg }
492 1.14.2.2 bouyer
493 1.14.2.2 bouyer bus_dmamap_sync(sbc->sbus_dmatag, dmap, dmap->dm_segs[0].ds_addr,
494 1.14 mjacob xs->datalen, in? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
495 1.14.2.2 bouyer
496 1.14 mjacob if (in) {
497 1.1 mrg rq->req_flags |= REQFLAG_DATA_IN;
498 1.1 mrg } else {
499 1.1 mrg rq->req_flags |= REQFLAG_DATA_OUT;
500 1.1 mrg }
501 1.14.2.2 bouyer
502 1.14.2.2 bouyer if (XS_CDBLEN(xs) > 12) {
503 1.14.2.2 bouyer crq = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, *iptrp);
504 1.14.2.2 bouyer *iptrp = ISP_NXT_QENTRY(*iptrp, RQUEST_QUEUE_LEN(isp));
505 1.14.2.2 bouyer if (*iptrp == optr) {
506 1.14.2.2 bouyer isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++");
507 1.14.2.2 bouyer bus_dmamap_unload(sbc->sbus_dmatag, dmap);
508 1.14.2.2 bouyer XS_SETERR(xs, HBA_BOTCH);
509 1.14.2.2 bouyer return (CMD_EAGAIN);
510 1.14.2.2 bouyer }
511 1.14.2.2 bouyer rq->req_seg_count = 2;
512 1.14.2.2 bouyer rq->req_dataseg[0].ds_count = 0;
513 1.14.2.2 bouyer rq->req_dataseg[0].ds_base = 0;
514 1.14.2.2 bouyer bzero((void *)crq, sizeof (*crq));
515 1.14.2.2 bouyer crq->req_header.rqs_entry_count = 1;
516 1.14.2.2 bouyer crq->req_header.rqs_entry_type = RQSTYPE_DATASEG;
517 1.14.2.2 bouyer crq->req_dataseg[0].ds_count = xs->datalen;
518 1.14.2.2 bouyer crq->req_dataseg[0].ds_base = dmap->dm_segs[0].ds_addr;
519 1.14.2.2 bouyer ISP_SBUSIFY_ISPHDR(isp, &crq->req_header)
520 1.14.2.2 bouyer } else {
521 1.14.2.2 bouyer rq->req_dataseg[0].ds_count = xs->datalen;
522 1.14.2.2 bouyer rq->req_dataseg[0].ds_base = dmap->dm_segs[0].ds_addr;
523 1.14.2.2 bouyer rq->req_seg_count = 1;
524 1.14.2.2 bouyer }
525 1.14.2.2 bouyer
526 1.14 mjacob mbxsync:
527 1.14 mjacob ISP_SWIZZLE_REQUEST(isp, rq);
528 1.14 mjacob #if 0
529 1.14 mjacob /*
530 1.14 mjacob * If we ever map cacheable memory, we need to do something like this.
531 1.14 mjacob */
532 1.14 mjacob bus_dmamap_sync(sbc->sbus_dmat, sbc->sbus_rquest_dmap, 0,
533 1.14 mjacob sbc->sbus_rquest_dmap->dm_mapsize, BUS_DMASYNC_PREWRITE);
534 1.14 mjacob #endif
535 1.3 mjacob return (CMD_QUEUED);
536 1.1 mrg }
537 1.1 mrg
538 1.1 mrg static void
539 1.1 mrg isp_sbus_dmateardown(isp, xs, handle)
540 1.1 mrg struct ispsoftc *isp;
541 1.1 mrg struct scsipi_xfer *xs;
542 1.1 mrg u_int32_t handle;
543 1.1 mrg {
544 1.1 mrg struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp;
545 1.14.2.2 bouyer bus_dmamap_t dmap;
546 1.14.2.2 bouyer
547 1.14.2.2 bouyer dmap = sbc->sbus_dmamap[isp_handle_index(handle)];
548 1.14.2.2 bouyer
549 1.14.2.2 bouyer if (dmap->dm_nsegs == 0) {
550 1.1 mrg panic("%s: dma map not already allocated\n", isp->isp_name);
551 1.1 mrg /* NOTREACHED */
552 1.1 mrg }
553 1.14.2.2 bouyer bus_dmamap_sync(sbc->sbus_dmatag, dmap, dmap->dm_segs[0].ds_addr,
554 1.14 mjacob xs->datalen, (xs->xs_control & XS_CTL_DATA_IN)?
555 1.14 mjacob BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
556 1.14.2.2 bouyer bus_dmamap_unload(sbc->sbus_dmatag, dmap);
557 1.1 mrg }
558