isp_sbus.c revision 1.33
1 /* $NetBSD: isp_sbus.c,v 1.33 2000/10/22 03:04:50 mjacob Exp $ */ 2 /* 3 * This driver, which is contained in NetBSD in the files: 4 * 5 * sys/dev/ic/isp.c 6 * sys/dev/ic/ic/isp.c 7 * sys/dev/ic/ic/isp_inline.h 8 * sys/dev/ic/ic/isp_netbsd.c 9 * sys/dev/ic/ic/isp_netbsd.h 10 * sys/dev/ic/ic/isp_target.c 11 * sys/dev/ic/ic/isp_target.h 12 * sys/dev/ic/ic/isp_tpublic.h 13 * sys/dev/ic/ic/ispmbox.h 14 * sys/dev/ic/ic/ispreg.h 15 * sys/dev/ic/ic/ispvar.h 16 * sys/microcode/isp/asm_sbus.h 17 * sys/microcode/isp/asm_1040.h 18 * sys/microcode/isp/asm_1080.h 19 * sys/microcode/isp/asm_12160.h 20 * sys/microcode/isp/asm_2100.h 21 * sys/microcode/isp/asm_2200.h 22 * sys/pci/isp_pci.c 23 * sys/sbus/isp_sbus.c 24 * 25 * Is being actively maintained by Matthew Jacob (mjacob (at) netbsd.org). 26 * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris, 27 * Linux versions. This tends to be an interesting maintenance problem. 28 * 29 * Please coordinate with Matthew Jacob on changes you wish to make here. 30 */ 31 /* 32 * SBus specific probe and attach routines for Qlogic ISP SCSI adapters. 33 * 34 * Copyright (c) 1997 by Matthew Jacob 35 * NASA AMES Research Center 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice immediately at the beginning of the file, without modification, 43 * this list of conditions, and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. The name of the author may not be used to endorse or promote products 48 * derived from this software without specific prior written permission. 49 * 50 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 53 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 54 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 55 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 56 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 57 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 58 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 59 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 60 * SUCH DAMAGE. 61 * 62 */ 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/device.h> 67 #include <sys/kernel.h> 68 #include <sys/malloc.h> 69 #include <sys/queue.h> 70 71 #include <machine/bus.h> 72 #include <machine/intr.h> 73 #include <machine/autoconf.h> 74 75 #include <dev/ic/isp_netbsd.h> 76 #include <dev/microcode/isp/asm_sbus.h> 77 #include <dev/sbus/sbusvar.h> 78 79 static int isp_sbus_intr __P((void *)); 80 static u_int16_t isp_sbus_rd_reg __P((struct ispsoftc *, int)); 81 static void isp_sbus_wr_reg __P((struct ispsoftc *, int, u_int16_t)); 82 static int isp_sbus_mbxdma __P((struct ispsoftc *)); 83 static int isp_sbus_dmasetup __P((struct ispsoftc *, struct scsipi_xfer *, 84 ispreq_t *, u_int16_t *, u_int16_t)); 85 static void isp_sbus_dmateardown __P((struct ispsoftc *, struct scsipi_xfer *, 86 u_int32_t)); 87 88 #ifndef ISP_1000_RISC_CODE 89 #define ISP_1000_RISC_CODE NULL 90 #endif 91 92 static struct ispmdvec mdvec = { 93 isp_sbus_rd_reg, 94 isp_sbus_wr_reg, 95 isp_sbus_mbxdma, 96 isp_sbus_dmasetup, 97 isp_sbus_dmateardown, 98 NULL, 99 NULL, 100 NULL, 101 ISP_1000_RISC_CODE 102 }; 103 104 struct isp_sbussoftc { 105 struct ispsoftc sbus_isp; 106 struct sbusdev sbus_sd; 107 sdparam sbus_dev; 108 bus_space_tag_t sbus_bustag; 109 bus_dma_tag_t sbus_dmatag; 110 bus_space_handle_t sbus_reg; 111 int sbus_node; 112 int sbus_pri; 113 struct ispmdvec sbus_mdvec; 114 bus_dmamap_t *sbus_dmamap; 115 bus_dmamap_t sbus_request_dmamap; 116 bus_dmamap_t sbus_result_dmamap; 117 int16_t sbus_poff[_NREG_BLKS]; 118 }; 119 120 121 static int isp_match __P((struct device *, struct cfdata *, void *)); 122 static void isp_sbus_attach __P((struct device *, struct device *, void *)); 123 struct cfattach isp_sbus_ca = { 124 sizeof (struct isp_sbussoftc), isp_match, isp_sbus_attach 125 }; 126 127 static int 128 isp_match(parent, cf, aux) 129 struct device *parent; 130 struct cfdata *cf; 131 void *aux; 132 { 133 int rv; 134 #ifdef DEBUG 135 static int oneshot = 1; 136 #endif 137 struct sbus_attach_args *sa = aux; 138 139 rv = (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0 || 140 strcmp("PTI,ptisp", sa->sa_name) == 0 || 141 strcmp("ptisp", sa->sa_name) == 0 || 142 strcmp("SUNW,isp", sa->sa_name) == 0 || 143 strcmp("QLGC,isp", sa->sa_name) == 0); 144 #ifdef DEBUG 145 if (rv && oneshot) { 146 oneshot = 0; 147 printf("Qlogic ISP Driver, NetBSD (sbus) Platform Version " 148 "%d.%d Core Version %d.%d\n", 149 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR, 150 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR); 151 } 152 #endif 153 return (rv); 154 } 155 156 157 static void 158 isp_sbus_attach(parent, self, aux) 159 struct device *parent, *self; 160 void *aux; 161 { 162 int freq, ispburst, sbusburst; 163 struct sbus_attach_args *sa = aux; 164 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) self; 165 struct ispsoftc *isp = &sbc->sbus_isp; 166 167 printf(" for %s\n", sa->sa_name); 168 169 sbc->sbus_bustag = sa->sa_bustag; 170 sbc->sbus_dmatag = sa->sa_dmatag; 171 if (sa->sa_nintr != 0) 172 sbc->sbus_pri = sa->sa_pri; 173 sbc->sbus_mdvec = mdvec; 174 175 if (sa->sa_npromvaddrs != 0) { 176 sbc->sbus_reg = (bus_space_handle_t)sa->sa_promvaddrs[0]; 177 } else { 178 if (sbus_bus_map(sa->sa_bustag, sa->sa_slot, sa->sa_offset, 179 sa->sa_size, BUS_SPACE_MAP_LINEAR, 0, 180 &sbc->sbus_reg) != 0) { 181 printf("%s: cannot map registers\n", self->dv_xname); 182 return; 183 } 184 } 185 sbc->sbus_node = sa->sa_node; 186 187 freq = getpropint(sa->sa_node, "clock-frequency", 0); 188 if (freq) { 189 /* 190 * Convert from HZ to MHz, rounding up. 191 */ 192 freq = (freq + 500000)/1000000; 193 #if 0 194 printf("%s: %d MHz\n", self->dv_xname, freq); 195 #endif 196 } 197 sbc->sbus_mdvec.dv_clock = freq; 198 199 /* 200 * Now figure out what the proper burst sizes, etc., to use. 201 * Unfortunately, there is no ddi_dma_burstsizes here which 202 * walks up the tree finding the limiting burst size node (if 203 * any). 204 */ 205 sbusburst = ((struct sbus_softc *)parent)->sc_burst; 206 if (sbusburst == 0) 207 sbusburst = SBUS_BURST_32 - 1; 208 ispburst = getpropint(sa->sa_node, "burst-sizes", -1); 209 if (ispburst == -1) { 210 ispburst = sbusburst; 211 } 212 ispburst &= sbusburst; 213 ispburst &= ~(1 << 7); 214 ispburst &= ~(1 << 6); 215 sbc->sbus_mdvec.dv_conf1 = 0; 216 if (ispburst & (1 << 5)) { 217 sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_32; 218 } else if (ispburst & (1 << 4)) { 219 sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_16; 220 } else if (ispburst & (1 << 3)) { 221 sbc->sbus_mdvec.dv_conf1 = 222 BIU_SBUS_CONF1_BURST8 | BIU_SBUS_CONF1_FIFO_8; 223 } 224 if (sbc->sbus_mdvec.dv_conf1) { 225 sbc->sbus_mdvec.dv_conf1 |= BIU_BURST_ENABLE; 226 } 227 228 /* 229 * Some early versions of the PTI SBus adapter 230 * would fail in trying to download (via poking) 231 * FW. We give up on them. 232 */ 233 if (strcmp("PTI,ptisp", sa->sa_name) == 0 || 234 strcmp("ptisp", sa->sa_name) == 0) { 235 sbc->sbus_mdvec.dv_ispfw = NULL; 236 } 237 238 isp->isp_mdvec = &sbc->sbus_mdvec; 239 isp->isp_bustype = ISP_BT_SBUS; 240 isp->isp_type = ISP_HA_SCSI_UNKNOWN; 241 isp->isp_param = &sbc->sbus_dev; 242 bzero(isp->isp_param, sizeof (sdparam)); 243 244 sbc->sbus_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF; 245 sbc->sbus_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = SBUS_MBOX_REGS_OFF; 246 sbc->sbus_poff[SXP_BLOCK >> _BLK_REG_SHFT] = SBUS_SXP_REGS_OFF; 247 sbc->sbus_poff[RISC_BLOCK >> _BLK_REG_SHFT] = SBUS_RISC_REGS_OFF; 248 sbc->sbus_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF; 249 250 /* 251 * Set up logging levels. 252 */ 253 #ifdef ISP_LOGDEFAULT 254 isp->isp_dblev = ISP_LOGDEFAULT; 255 #else 256 isp->isp_dblev = ISP_LOGCONFIG|ISP_LOGWARN|ISP_LOGERR; 257 #ifdef SCSIDEBUG 258 isp->isp_dblev |= ISP_LOGDEBUG1|ISP_LOGDEBUG2; 259 #endif 260 #ifdef DEBUG 261 isp->isp_dblev |= ISP_LOGDEBUG0|ISP_LOGINFO; 262 #endif 263 #endif 264 isp->isp_confopts = self->dv_cfdata->cf_flags; 265 /* 266 * There's no tool on sparc to set NVRAM for ISPs, so ignore it. 267 */ 268 isp->isp_confopts |= ISP_CFG_NONVRAM; 269 ISP_LOCK(isp); 270 isp->isp_osinfo.no_mbox_ints = 1; 271 isp_reset(isp); 272 if (isp->isp_state != ISP_RESETSTATE) { 273 ISP_UNLOCK(isp); 274 return; 275 } 276 isp_init(isp); 277 if (isp->isp_state != ISP_INITSTATE) { 278 isp_uninit(isp); 279 ISP_UNLOCK(isp); 280 return; 281 } 282 /* Establish interrupt channel */ 283 bus_intr_establish(sbc->sbus_bustag, sbc->sbus_pri, IPL_BIO, 0, 284 isp_sbus_intr, sbc); 285 ENABLE_INTS(isp); 286 ISP_UNLOCK(isp); 287 288 sbus_establish(&sbc->sbus_sd, &sbc->sbus_isp.isp_osinfo._dev); 289 290 /* 291 * do generic attach. 292 */ 293 isp_attach(isp); 294 if (isp->isp_state != ISP_RUNSTATE) { 295 isp_uninit(isp); 296 } 297 } 298 299 static int 300 isp_sbus_intr(arg) 301 void *arg; 302 { 303 int rv; 304 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *)arg; 305 bus_dmamap_sync(sbc->sbus_dmatag, sbc->sbus_result_dmamap, 0, 306 sbc->sbus_result_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 307 sbc->sbus_isp.isp_osinfo.onintstack = 1; 308 rv = isp_intr(arg); 309 sbc->sbus_isp.isp_osinfo.onintstack = 0; 310 return (rv); 311 } 312 313 static u_int16_t 314 isp_sbus_rd_reg(isp, regoff) 315 struct ispsoftc *isp; 316 int regoff; 317 { 318 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 319 int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 320 offset += (regoff & 0xff); 321 return (bus_space_read_2(sbc->sbus_bustag, sbc->sbus_reg, offset)); 322 } 323 324 static void 325 isp_sbus_wr_reg(isp, regoff, val) 326 struct ispsoftc *isp; 327 int regoff; 328 u_int16_t val; 329 { 330 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 331 int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 332 offset += (regoff & 0xff); 333 bus_space_write_2(sbc->sbus_bustag, sbc->sbus_reg, offset, val); 334 } 335 336 static int 337 isp_sbus_mbxdma(isp) 338 struct ispsoftc *isp; 339 { 340 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 341 bus_dma_tag_t dmatag = sbc->sbus_dmatag; 342 bus_dma_segment_t seg; 343 int rs, i; 344 size_t n; 345 bus_size_t len; 346 347 if (isp->isp_rquest_dma) 348 return (0); 349 350 n = sizeof (XS_T **) * isp->isp_maxcmds; 351 isp->isp_xflist = (XS_T **) malloc(n, M_DEVBUF, M_WAITOK); 352 if (isp->isp_xflist == NULL) { 353 isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array"); 354 return (1); 355 } 356 bzero(isp->isp_xflist, n); 357 n = sizeof (bus_dmamap_t) * isp->isp_maxcmds; 358 sbc->sbus_dmamap = (bus_dmamap_t *) malloc(n, M_DEVBUF, M_WAITOK); 359 if (sbc->sbus_dmamap == NULL) { 360 free(isp->isp_xflist, M_DEVBUF); 361 isp->isp_xflist = NULL; 362 isp_prt(isp, ISP_LOGERR, "cannot alloc dmamap array"); 363 return (1); 364 } 365 for (i = 0; i < isp->isp_maxcmds; i++) { 366 /* Allocate a DMA handle */ 367 if (bus_dmamap_create(dmatag, MAXPHYS, 1, MAXPHYS, 0, 368 BUS_DMA_NOWAIT, &sbc->sbus_dmamap[i]) != 0) { 369 isp_prt(isp, ISP_LOGERR, "cmd DMA maps create error"); 370 break; 371 } 372 } 373 if (i < isp->isp_maxcmds) { 374 while (--i >= 0) { 375 bus_dmamap_destroy(dmatag, sbc->sbus_dmamap[i]); 376 } 377 free(isp->isp_xflist, M_DEVBUF); 378 free(sbc->sbus_dmamap, M_DEVBUF); 379 isp->isp_xflist = NULL; 380 sbc->sbus_dmamap = NULL; 381 return (1); 382 } 383 384 /* 385 * Allocate and map the request queue. 386 */ 387 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 388 /* Allocate DMA map */ 389 if (bus_dmamap_create(dmatag, len, 1, len, 0, BUS_DMA_NOWAIT, 390 &sbc->sbus_request_dmamap) != 0) { 391 goto dmafail; 392 } 393 394 /* Allocate DMA buffer */ 395 if (bus_dmamem_alloc(dmatag, len, 0, 0, &seg, 1, &rs, BUS_DMA_NOWAIT)) { 396 goto dmafail; 397 } 398 399 /* Load the buffer */ 400 if (bus_dmamap_load_raw(dmatag, sbc->sbus_request_dmamap, 401 &seg, rs, len, BUS_DMA_NOWAIT) != 0) { 402 bus_dmamem_free(dmatag, &seg, rs); 403 goto dmafail; 404 } 405 isp->isp_rquest_dma = sbc->sbus_request_dmamap->dm_segs[0].ds_addr; 406 407 /* Map DMA buffer in CPU addressable space */ 408 if (bus_dmamem_map(dmatag, &seg, rs, len, (caddr_t *)&isp->isp_rquest, 409 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) { 410 bus_dmamap_unload(dmatag, sbc->sbus_request_dmamap); 411 bus_dmamem_free(dmatag, &seg, rs); 412 goto dmafail; 413 } 414 415 /* 416 * Allocate and map the result queue. 417 */ 418 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp)); 419 /* Allocate DMA map */ 420 if (bus_dmamap_create(dmatag, len, 1, len, 0, BUS_DMA_NOWAIT, 421 &sbc->sbus_result_dmamap) != 0) { 422 goto dmafail; 423 } 424 425 /* Allocate DMA buffer */ 426 if (bus_dmamem_alloc(dmatag, len, 0, 0, &seg, 1, &rs, BUS_DMA_NOWAIT)) { 427 goto dmafail; 428 } 429 430 /* Load the buffer */ 431 if (bus_dmamap_load_raw(dmatag, sbc->sbus_result_dmamap, 432 &seg, rs, len, BUS_DMA_NOWAIT) != 0) { 433 bus_dmamem_free(dmatag, &seg, rs); 434 goto dmafail; 435 } 436 437 /* Map DMA buffer in CPU addressable space */ 438 if (bus_dmamem_map(dmatag, &seg, rs, len, (caddr_t *)&isp->isp_result, 439 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) { 440 bus_dmamap_unload(dmatag, sbc->sbus_result_dmamap); 441 bus_dmamem_free(dmatag, &seg, rs); 442 goto dmafail; 443 } 444 isp->isp_result_dma = sbc->sbus_result_dmamap->dm_segs[0].ds_addr; 445 446 return (0); 447 448 dmafail: 449 for (i = 0; i < isp->isp_maxcmds; i++) { 450 bus_dmamap_destroy(dmatag, sbc->sbus_dmamap[i]); 451 } 452 free(sbc->sbus_dmamap, M_DEVBUF); 453 free(isp->isp_xflist, M_DEVBUF); 454 isp->isp_xflist = NULL; 455 sbc->sbus_dmamap = NULL; 456 return (1); 457 } 458 459 /* 460 * Map a DMA request. 461 * We're guaranteed that rq->req_handle is a value from 1 to isp->isp_maxcmds. 462 */ 463 464 static int 465 isp_sbus_dmasetup(isp, xs, rq, iptrp, optr) 466 struct ispsoftc *isp; 467 struct scsipi_xfer *xs; 468 ispreq_t *rq; 469 u_int16_t *iptrp; 470 u_int16_t optr; 471 { 472 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 473 bus_dmamap_t dmap; 474 ispcontreq_t *crq; 475 int cansleep = (xs->xs_control & XS_CTL_NOSLEEP) == 0; 476 int in = (xs->xs_control & XS_CTL_DATA_IN) != 0; 477 478 if (xs->datalen == 0) { 479 rq->req_seg_count = 1; 480 goto mbxsync; 481 } 482 483 dmap = sbc->sbus_dmamap[isp_handle_index(rq->req_handle)]; 484 if (dmap->dm_nsegs != 0) { 485 panic("%s: dma map already allocated\n", isp->isp_name); 486 /* NOTREACHED */ 487 } 488 if (bus_dmamap_load(sbc->sbus_dmatag, dmap, xs->data, xs->datalen, 489 NULL, cansleep? BUS_DMA_WAITOK : BUS_DMA_NOWAIT) != 0) { 490 XS_SETERR(xs, HBA_BOTCH); 491 return (CMD_COMPLETE); 492 } 493 494 bus_dmamap_sync(sbc->sbus_dmatag, dmap, dmap->dm_segs[0].ds_addr, 495 xs->datalen, in? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 496 497 if (in) { 498 rq->req_flags |= REQFLAG_DATA_IN; 499 } else { 500 rq->req_flags |= REQFLAG_DATA_OUT; 501 } 502 503 if (XS_CDBLEN(xs) > 12) { 504 crq = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, *iptrp); 505 *iptrp = ISP_NXT_QENTRY(*iptrp, RQUEST_QUEUE_LEN(isp)); 506 if (*iptrp == optr) { 507 isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++"); 508 bus_dmamap_unload(sbc->sbus_dmatag, dmap); 509 XS_SETERR(xs, HBA_BOTCH); 510 return (CMD_EAGAIN); 511 } 512 rq->req_seg_count = 2; 513 rq->req_dataseg[0].ds_count = 0; 514 rq->req_dataseg[0].ds_base = 0; 515 bzero((void *)crq, sizeof (*crq)); 516 crq->req_header.rqs_entry_count = 1; 517 crq->req_header.rqs_entry_type = RQSTYPE_DATASEG; 518 crq->req_dataseg[0].ds_count = xs->datalen; 519 crq->req_dataseg[0].ds_base = dmap->dm_segs[0].ds_addr; 520 ISP_SBUSIFY_ISPHDR(isp, &crq->req_header) 521 } else { 522 rq->req_dataseg[0].ds_count = xs->datalen; 523 rq->req_dataseg[0].ds_base = dmap->dm_segs[0].ds_addr; 524 rq->req_seg_count = 1; 525 } 526 527 mbxsync: 528 ISP_SWIZZLE_REQUEST(isp, rq); 529 #if 0 530 /* 531 * If we ever map cacheable memory, we need to do something like this. 532 */ 533 bus_dmamap_sync(sbc->sbus_dmat, sbc->sbus_rquest_dmap, 0, 534 sbc->sbus_rquest_dmap->dm_mapsize, BUS_DMASYNC_PREWRITE); 535 #endif 536 return (CMD_QUEUED); 537 } 538 539 static void 540 isp_sbus_dmateardown(isp, xs, handle) 541 struct ispsoftc *isp; 542 struct scsipi_xfer *xs; 543 u_int32_t handle; 544 { 545 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 546 bus_dmamap_t dmap; 547 548 dmap = sbc->sbus_dmamap[isp_handle_index(handle)]; 549 550 if (dmap->dm_nsegs == 0) { 551 panic("%s: dma map not already allocated\n", isp->isp_name); 552 /* NOTREACHED */ 553 } 554 bus_dmamap_sync(sbc->sbus_dmatag, dmap, dmap->dm_segs[0].ds_addr, 555 xs->datalen, (xs->xs_control & XS_CTL_DATA_IN)? 556 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 557 bus_dmamap_unload(sbc->sbus_dmatag, dmap); 558 } 559
Indexes created Tue Oct 21 12:09:54 GMT 2025