isp_sbus.c revision 1.40.2.1
1 /* $NetBSD: isp_sbus.c,v 1.40.2.1 2001/04/09 01:57:25 nathanw Exp $ */ 2 /* 3 * This driver, which is contained in NetBSD in the files: 4 * 5 * sys/dev/ic/isp.c 6 * sys/dev/ic/isp_inline.h 7 * sys/dev/ic/isp_netbsd.c 8 * sys/dev/ic/isp_netbsd.h 9 * sys/dev/ic/isp_target.c 10 * sys/dev/ic/isp_target.h 11 * sys/dev/ic/isp_tpublic.h 12 * sys/dev/ic/ispmbox.h 13 * sys/dev/ic/ispreg.h 14 * sys/dev/ic/ispvar.h 15 * sys/microcode/isp/asm_sbus.h 16 * sys/microcode/isp/asm_1040.h 17 * sys/microcode/isp/asm_1080.h 18 * sys/microcode/isp/asm_12160.h 19 * sys/microcode/isp/asm_2100.h 20 * sys/microcode/isp/asm_2200.h 21 * sys/pci/isp_pci.c 22 * sys/sbus/isp_sbus.c 23 * 24 * Is being actively maintained by Matthew Jacob (mjacob (at) netbsd.org). 25 * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris, 26 * Linux versions. This tends to be an interesting maintenance problem. 27 * 28 * Please coordinate with Matthew Jacob on changes you wish to make here. 29 */ 30 /* 31 * SBus specific probe and attach routines for Qlogic ISP SCSI adapters. 32 * 33 * Copyright (c) 1997, 2001 by Matthew Jacob 34 * NASA AMES Research Center 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice immediately at the beginning of the file, without modification, 42 * this list of conditions, and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 51 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 57 * SUCH DAMAGE. 58 * 59 */ 60 61 #include <sys/param.h> 62 #include <sys/systm.h> 63 #include <sys/device.h> 64 #include <sys/kernel.h> 65 #include <sys/malloc.h> 66 #include <sys/queue.h> 67 68 #include <machine/bus.h> 69 #include <machine/intr.h> 70 #include <machine/autoconf.h> 71 72 #include <dev/ic/isp_netbsd.h> 73 #include <dev/microcode/isp/asm_sbus.h> 74 #include <dev/sbus/sbusvar.h> 75 #include <sys/reboot.h> 76 77 /* 78 * Gross! But there's no way around this until sparc64 iommu.c is fixed. 79 */ 80 #if _MACHINE == sparc64 81 #define LMAP_FLAGS BUS_DMA_NOWAIT|BUS_DMA_COHERENT 82 #else 83 #define LMAP_FLAGS BUS_DMA_NOWAIT 84 #endif 85 86 static int isp_sbus_intr(void *); 87 static u_int16_t isp_sbus_rd_reg(struct ispsoftc *, int); 88 static void isp_sbus_wr_reg (struct ispsoftc *, int, u_int16_t); 89 static int isp_sbus_mbxdma(struct ispsoftc *); 90 static int isp_sbus_dmasetup(struct ispsoftc *, XS_T *, ispreq_t *, u_int16_t *, 91 u_int16_t); 92 static void isp_sbus_dmateardown(struct ispsoftc *, XS_T *, u_int16_t); 93 94 #ifndef ISP_1000_RISC_CODE 95 #define ISP_1000_RISC_CODE NULL 96 #endif 97 98 static struct ispmdvec mdvec = { 99 isp_sbus_rd_reg, 100 isp_sbus_wr_reg, 101 isp_sbus_mbxdma, 102 isp_sbus_dmasetup, 103 isp_sbus_dmateardown, 104 NULL, 105 NULL, 106 NULL, 107 ISP_1000_RISC_CODE 108 }; 109 110 struct isp_sbussoftc { 111 struct ispsoftc sbus_isp; 112 struct sbusdev sbus_sd; 113 sdparam sbus_dev; 114 bus_space_tag_t sbus_bustag; 115 bus_dma_tag_t sbus_dmatag; 116 bus_space_handle_t sbus_reg; 117 int sbus_node; 118 int sbus_pri; 119 struct ispmdvec sbus_mdvec; 120 bus_dmamap_t *sbus_dmamap; 121 bus_dmamap_t sbus_rquest_dmamap; 122 bus_dmamap_t sbus_result_dmamap; 123 int16_t sbus_poff[_NREG_BLKS]; 124 }; 125 126 127 static int isp_match(struct device *, struct cfdata *, void *); 128 static void isp_sbus_attach(struct device *, struct device *, void *); 129 struct cfattach isp_sbus_ca = { 130 sizeof (struct isp_sbussoftc), isp_match, isp_sbus_attach 131 }; 132 133 static int 134 isp_match(struct device *parent, struct cfdata *cf, void *aux) 135 { 136 int rv; 137 #ifdef DEBUG 138 static int oneshot = 1; 139 #endif 140 struct sbus_attach_args *sa = aux; 141 142 rv = (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0 || 143 strcmp("PTI,ptisp", sa->sa_name) == 0 || 144 strcmp("ptisp", sa->sa_name) == 0 || 145 strcmp("SUNW,isp", sa->sa_name) == 0 || 146 strcmp("QLGC,isp", sa->sa_name) == 0); 147 #ifdef DEBUG 148 if (rv && oneshot) { 149 oneshot = 0; 150 printf("Qlogic ISP Driver, NetBSD (sbus) Platform Version " 151 "%d.%d Core Version %d.%d\n", 152 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR, 153 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR); 154 } 155 #endif 156 return (rv); 157 } 158 159 160 static void 161 isp_sbus_attach(struct device *parent, struct device *self, void *aux) 162 { 163 int freq, ispburst, sbusburst; 164 struct sbus_attach_args *sa = aux; 165 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) self; 166 struct ispsoftc *isp = &sbc->sbus_isp; 167 168 printf(" for %s\n", sa->sa_name); 169 170 sbc->sbus_bustag = sa->sa_bustag; 171 sbc->sbus_dmatag = sa->sa_dmatag; 172 if (sa->sa_nintr != 0) 173 sbc->sbus_pri = sa->sa_pri; 174 sbc->sbus_mdvec = mdvec; 175 176 if (sa->sa_npromvaddrs != 0) { 177 sbc->sbus_reg = (bus_space_handle_t)sa->sa_promvaddrs[0]; 178 } else { 179 if (sbus_bus_map(sa->sa_bustag, sa->sa_slot, sa->sa_offset, 180 sa->sa_size, BUS_SPACE_MAP_LINEAR, 0, 181 &sbc->sbus_reg) != 0) { 182 printf("%s: cannot map registers\n", self->dv_xname); 183 return; 184 } 185 } 186 sbc->sbus_node = sa->sa_node; 187 188 freq = getpropint(sa->sa_node, "clock-frequency", 0); 189 if (freq) { 190 /* 191 * Convert from HZ to MHz, rounding up. 192 */ 193 freq = (freq + 500000)/1000000; 194 #if 0 195 printf("%s: %d MHz\n", self->dv_xname, freq); 196 #endif 197 } 198 sbc->sbus_mdvec.dv_clock = freq; 199 200 /* 201 * Now figure out what the proper burst sizes, etc., to use. 202 * Unfortunately, there is no ddi_dma_burstsizes here which 203 * walks up the tree finding the limiting burst size node (if 204 * any). 205 */ 206 sbusburst = ((struct sbus_softc *)parent)->sc_burst; 207 if (sbusburst == 0) 208 sbusburst = SBUS_BURST_32 - 1; 209 ispburst = getpropint(sa->sa_node, "burst-sizes", -1); 210 if (ispburst == -1) { 211 ispburst = sbusburst; 212 } 213 ispburst &= sbusburst; 214 ispburst &= ~(1 << 7); 215 ispburst &= ~(1 << 6); 216 sbc->sbus_mdvec.dv_conf1 = 0; 217 if (ispburst & (1 << 5)) { 218 sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_32; 219 } else if (ispburst & (1 << 4)) { 220 sbc->sbus_mdvec.dv_conf1 = BIU_SBUS_CONF1_FIFO_16; 221 } else if (ispburst & (1 << 3)) { 222 sbc->sbus_mdvec.dv_conf1 = 223 BIU_SBUS_CONF1_BURST8 | BIU_SBUS_CONF1_FIFO_8; 224 } 225 if (sbc->sbus_mdvec.dv_conf1) { 226 sbc->sbus_mdvec.dv_conf1 |= BIU_BURST_ENABLE; 227 } 228 229 /* 230 * Some early versions of the PTI SBus adapter 231 * would fail in trying to download (via poking) 232 * FW. We give up on them. 233 */ 234 if (strcmp("PTI,ptisp", sa->sa_name) == 0 || 235 strcmp("ptisp", sa->sa_name) == 0) { 236 sbc->sbus_mdvec.dv_ispfw = NULL; 237 } 238 239 isp->isp_mdvec = &sbc->sbus_mdvec; 240 isp->isp_bustype = ISP_BT_SBUS; 241 isp->isp_type = ISP_HA_SCSI_UNKNOWN; 242 isp->isp_param = &sbc->sbus_dev; 243 bzero(isp->isp_param, sizeof (sdparam)); 244 245 sbc->sbus_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF; 246 sbc->sbus_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = SBUS_MBOX_REGS_OFF; 247 sbc->sbus_poff[SXP_BLOCK >> _BLK_REG_SHFT] = SBUS_SXP_REGS_OFF; 248 sbc->sbus_poff[RISC_BLOCK >> _BLK_REG_SHFT] = SBUS_RISC_REGS_OFF; 249 sbc->sbus_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF; 250 251 /* Establish interrupt channel */ 252 bus_intr_establish(sbc->sbus_bustag, sbc->sbus_pri, IPL_BIO, 0, 253 isp_sbus_intr, sbc); 254 sbus_establish(&sbc->sbus_sd, &sbc->sbus_isp.isp_osinfo._dev); 255 256 /* 257 * Set up logging levels. 258 */ 259 #ifdef ISP_LOGDEFAULT 260 isp->isp_dblev = ISP_LOGDEFAULT; 261 #else 262 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR; 263 if (bootverbose) 264 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO; 265 #ifdef SCSIDEBUG 266 isp->isp_dblev |= ISP_LOGDEBUG1|ISP_LOGDEBUG2; 267 #endif 268 #ifdef DEBUG 269 isp->isp_dblev |= ISP_LOGDEBUG0; 270 #endif 271 #endif 272 273 isp->isp_confopts = self->dv_cfdata->cf_flags; 274 isp->isp_role = ISP_DEFAULT_ROLES; 275 276 /* 277 * There's no tool on sparc to set NVRAM for ISPs, so ignore it. 278 */ 279 isp->isp_confopts |= ISP_CFG_NONVRAM; 280 ISP_LOCK(isp); 281 isp->isp_osinfo.no_mbox_ints = 1; 282 isp_reset(isp); 283 if (isp->isp_state != ISP_RESETSTATE) { 284 ISP_UNLOCK(isp); 285 return; 286 } 287 ENABLE_INTS(isp); 288 isp_init(isp); 289 if (isp->isp_state != ISP_INITSTATE) { 290 isp_uninit(isp); 291 ISP_UNLOCK(isp); 292 return; 293 } 294 295 /* 296 * do generic attach. 297 */ 298 ISP_UNLOCK(isp); 299 isp_attach(isp); 300 if (isp->isp_state != ISP_RUNSTATE) { 301 ISP_LOCK(isp); 302 isp_uninit(isp); 303 ISP_UNLOCK(isp); 304 } 305 } 306 307 static int 308 isp_sbus_intr(void *arg) 309 { 310 int rv; 311 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *)arg; 312 bus_dmamap_sync(sbc->sbus_dmatag, sbc->sbus_result_dmamap, 0, 313 sbc->sbus_result_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); 314 sbc->sbus_isp.isp_osinfo.onintstack = 1; 315 rv = isp_intr(arg); 316 sbc->sbus_isp.isp_osinfo.onintstack = 0; 317 return (rv); 318 } 319 320 static u_int16_t 321 isp_sbus_rd_reg(struct ispsoftc *isp, int regoff) 322 { 323 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 324 int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 325 offset += (regoff & 0xff); 326 return (bus_space_read_2(sbc->sbus_bustag, sbc->sbus_reg, offset)); 327 } 328 329 static void 330 isp_sbus_wr_reg(struct ispsoftc *isp, int regoff, u_int16_t val) 331 { 332 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 333 int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT]; 334 offset += (regoff & 0xff); 335 bus_space_write_2(sbc->sbus_bustag, sbc->sbus_reg, offset, val); 336 } 337 338 static int 339 isp_sbus_mbxdma(struct ispsoftc *isp) 340 { 341 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 342 bus_dma_tag_t dmatag = sbc->sbus_dmatag; 343 bus_dma_segment_t reqseg, rspseg; 344 int reqrs, rsprs, i, progress; 345 size_t n; 346 bus_size_t len; 347 348 if (isp->isp_rquest_dma) 349 return (0); 350 351 n = sizeof (XS_T **) * isp->isp_maxcmds; 352 isp->isp_xflist = (XS_T **) malloc(n, M_DEVBUF, M_WAITOK); 353 if (isp->isp_xflist == NULL) { 354 isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array"); 355 return (1); 356 } 357 bzero(isp->isp_xflist, n); 358 n = sizeof (bus_dmamap_t) * isp->isp_maxcmds; 359 sbc->sbus_dmamap = (bus_dmamap_t *) malloc(n, M_DEVBUF, M_WAITOK); 360 if (sbc->sbus_dmamap == NULL) { 361 free(isp->isp_xflist, M_DEVBUF); 362 isp->isp_xflist = NULL; 363 isp_prt(isp, ISP_LOGERR, "cannot alloc dmamap array"); 364 return (1); 365 } 366 for (i = 0; i < isp->isp_maxcmds; i++) { 367 /* Allocate a DMA handle */ 368 if (bus_dmamap_create(dmatag, MAXPHYS, 1, MAXPHYS, 0, 369 BUS_DMA_NOWAIT, &sbc->sbus_dmamap[i]) != 0) { 370 isp_prt(isp, ISP_LOGERR, "cmd DMA maps create error"); 371 break; 372 } 373 } 374 if (i < isp->isp_maxcmds) { 375 while (--i >= 0) { 376 bus_dmamap_destroy(dmatag, sbc->sbus_dmamap[i]); 377 } 378 free(isp->isp_xflist, M_DEVBUF); 379 free(sbc->sbus_dmamap, M_DEVBUF); 380 isp->isp_xflist = NULL; 381 sbc->sbus_dmamap = NULL; 382 return (1); 383 } 384 385 /* 386 * Allocate and map the request and response queues 387 */ 388 progress = 0; 389 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp)); 390 if (bus_dmamap_create(dmatag, len, 1, len, 0, BUS_DMA_NOWAIT, 391 &sbc->sbus_rquest_dmamap) != 0) { 392 goto dmafail; 393 } 394 progress++; 395 if (bus_dmamem_alloc(dmatag, len, 0, 0, &reqseg, 1, &reqrs, 396 BUS_DMA_NOWAIT)) { 397 goto dmafail; 398 } 399 isp->isp_rquest_dma = sbc->sbus_rquest_dmamap->dm_segs[0].ds_addr; 400 progress++; 401 if (bus_dmamem_map(dmatag, &reqseg, reqrs, len, 402 (caddr_t *)&isp->isp_rquest, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) { 403 goto dmafail; 404 } 405 progress++; 406 if (bus_dmamap_load(dmatag, sbc->sbus_rquest_dmamap, 407 isp->isp_rquest, len, NULL, LMAP_FLAGS) != 0) { 408 goto dmafail; 409 } 410 progress++; 411 412 len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp)); 413 if (bus_dmamap_create(dmatag, len, 1, len, 0, BUS_DMA_NOWAIT, 414 &sbc->sbus_result_dmamap) != 0) { 415 goto dmafail; 416 } 417 progress++; 418 if (bus_dmamem_alloc(dmatag, len, 0, 0, &rspseg, 1, &rsprs, 419 BUS_DMA_NOWAIT)) { 420 goto dmafail; 421 } 422 isp->isp_result_dma = sbc->sbus_result_dmamap->dm_segs[0].ds_addr; 423 progress++; 424 if (bus_dmamem_map(dmatag, &rspseg, rsprs, len, 425 (caddr_t *)&isp->isp_result, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) { 426 goto dmafail; 427 } 428 progress++; 429 if (bus_dmamap_load(dmatag, sbc->sbus_result_dmamap, 430 isp->isp_result, len, NULL, LMAP_FLAGS) != 0) { 431 goto dmafail; 432 } 433 progress++; 434 return (0); 435 436 dmafail: 437 isp_prt(isp, ISP_LOGERR, "Mailbox DMA Setup Failure"); 438 439 if (progress >= 8) { 440 bus_dmamap_unload(dmatag, sbc->sbus_result_dmamap); 441 } 442 if (progress >= 7) { 443 bus_dmamem_unmap(dmatag, 444 isp->isp_result, ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp))); 445 } 446 if (progress >= 6) { 447 bus_dmamem_free(dmatag, &rspseg, rsprs); 448 } 449 if (progress >= 5) { 450 bus_dmamap_destroy(dmatag, sbc->sbus_result_dmamap); 451 } 452 453 if (progress >= 4) { 454 bus_dmamap_unload(dmatag, sbc->sbus_rquest_dmamap); 455 } 456 if (progress >= 3) { 457 bus_dmamem_unmap(dmatag, 458 isp->isp_rquest, ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp))); 459 460 } 461 if (progress >= 2) { 462 bus_dmamem_free(dmatag, &reqseg, reqrs); 463 } 464 if (progress >= 1) { 465 bus_dmamap_destroy(dmatag, sbc->sbus_rquest_dmamap); 466 } 467 468 for (i = 0; i < isp->isp_maxcmds; i++) { 469 bus_dmamap_destroy(dmatag, sbc->sbus_dmamap[i]); 470 } 471 free(sbc->sbus_dmamap, M_DEVBUF); 472 free(isp->isp_xflist, M_DEVBUF); 473 isp->isp_xflist = NULL; 474 sbc->sbus_dmamap = NULL; 475 return (1); 476 } 477 478 /* 479 * Map a DMA request. 480 * We're guaranteed that rq->req_handle is a value from 1 to isp->isp_maxcmds. 481 */ 482 483 static int 484 isp_sbus_dmasetup(struct ispsoftc *isp, XS_T *xs, ispreq_t *rq, 485 u_int16_t *iptrp, u_int16_t optr) 486 { 487 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 488 bus_dmamap_t dmap; 489 ispcontreq_t *crq; 490 int cansleep = (xs->xs_control & XS_CTL_NOSLEEP) == 0; 491 int in = (xs->xs_control & XS_CTL_DATA_IN) != 0; 492 493 if (xs->datalen == 0) { 494 rq->req_seg_count = 1; 495 goto mbxsync; 496 } 497 498 dmap = sbc->sbus_dmamap[isp_handle_index(rq->req_handle)]; 499 if (dmap->dm_nsegs != 0) { 500 panic("%s: dma map already allocated\n", isp->isp_name); 501 /* NOTREACHED */ 502 } 503 if (bus_dmamap_load(sbc->sbus_dmatag, dmap, xs->data, xs->datalen, 504 NULL, (cansleep ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT) | 505 BUS_DMA_STREAMING) != 0) { 506 XS_SETERR(xs, HBA_BOTCH); 507 return (CMD_COMPLETE); 508 } 509 510 bus_dmamap_sync(sbc->sbus_dmatag, dmap, 0, xs->datalen, 511 in? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 512 513 if (in) { 514 rq->req_flags |= REQFLAG_DATA_IN; 515 } else { 516 rq->req_flags |= REQFLAG_DATA_OUT; 517 } 518 519 if (XS_CDBLEN(xs) > 12) { 520 crq = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest, *iptrp); 521 *iptrp = ISP_NXT_QENTRY(*iptrp, RQUEST_QUEUE_LEN(isp)); 522 if (*iptrp == optr) { 523 isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow++"); 524 bus_dmamap_unload(sbc->sbus_dmatag, dmap); 525 XS_SETERR(xs, HBA_BOTCH); 526 return (CMD_EAGAIN); 527 } 528 rq->req_seg_count = 2; 529 rq->req_dataseg[0].ds_count = 0; 530 rq->req_dataseg[0].ds_base = 0; 531 bzero((void *)crq, sizeof (*crq)); 532 crq->req_header.rqs_entry_count = 1; 533 crq->req_header.rqs_entry_type = RQSTYPE_DATASEG; 534 crq->req_dataseg[0].ds_count = xs->datalen; 535 crq->req_dataseg[0].ds_base = dmap->dm_segs[0].ds_addr; 536 ISP_SBUSIFY_ISPHDR(isp, &crq->req_header) 537 } else { 538 rq->req_dataseg[0].ds_count = xs->datalen; 539 rq->req_dataseg[0].ds_base = dmap->dm_segs[0].ds_addr; 540 rq->req_seg_count = 1; 541 } 542 543 mbxsync: 544 ISP_SWIZZLE_REQUEST(isp, rq); 545 bus_dmamap_sync(sbc->sbus_dmatag, sbc->sbus_rquest_dmamap, 0, 546 sbc->sbus_rquest_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE); 547 return (CMD_QUEUED); 548 } 549 550 static void 551 isp_sbus_dmateardown(struct ispsoftc *isp, XS_T *xs, u_int16_t handle) 552 { 553 struct isp_sbussoftc *sbc = (struct isp_sbussoftc *) isp; 554 bus_dmamap_t dmap; 555 556 dmap = sbc->sbus_dmamap[isp_handle_index(handle)]; 557 558 if (dmap->dm_nsegs == 0) { 559 panic("%s: dma map not already allocated\n", isp->isp_name); 560 /* NOTREACHED */ 561 } 562 bus_dmamap_sync(sbc->sbus_dmatag, dmap, 0, 563 xs->datalen, (xs->xs_control & XS_CTL_DATA_IN)? 564 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 565 bus_dmamap_unload(sbc->sbus_dmatag, dmap); 566 } 567
Indexes created Thu Oct 23 22:10:10 GMT 2025