mgxreg.h revision 1.2.2.2
1 1.2.2.2 skrll /* $NetBSD: mgxreg.h,v 1.2.2.2 2015/04/06 15:18:13 skrll Exp $ */ 2 1.2.2.2 skrll 3 1.2.2.2 skrll /*- 4 1.2.2.2 skrll * Copyright (c) 2014 Michael Lorenz 5 1.2.2.2 skrll * All rights reserved. 6 1.2.2.2 skrll * 7 1.2.2.2 skrll * Redistribution and use in source and binary forms, with or without 8 1.2.2.2 skrll * modification, are permitted provided that the following conditions 9 1.2.2.2 skrll * are met: 10 1.2.2.2 skrll * 1. Redistributions of source code must retain the above copyright 11 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer. 12 1.2.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 13 1.2.2.2 skrll * notice, this list of conditions and the following disclaimer in the 14 1.2.2.2 skrll * documentation and/or other materials provided with the distribution. 15 1.2.2.2 skrll * 16 1.2.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 1.2.2.2 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 1.2.2.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 1.2.2.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 1.2.2.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 1.2.2.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 1.2.2.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 1.2.2.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 1.2.2.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 1.2.2.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 1.2.2.2 skrll * POSSIBILITY OF SUCH DAMAGE. 27 1.2.2.2 skrll */ 28 1.2.2.2 skrll 29 1.2.2.2 skrll #ifndef MGX_REG_H 30 1.2.2.2 skrll #define MGX_REG_H 31 1.2.2.2 skrll 32 1.2.2.2 skrll #define VGA_BASE 0x3c0 33 1.2.2.2 skrll 34 1.2.2.2 skrll /* register definitions based on OpenBSD's atxxreg.h: */ 35 1.2.2.2 skrll 36 1.2.2.2 skrll /* 37 1.2.2.2 skrll * Copyright (c) 2008 Miodrag Vallat. 38 1.2.2.2 skrll * 39 1.2.2.2 skrll * Permission to use, copy, modify, and distribute this software for any 40 1.2.2.2 skrll * purpose with or without fee is hereby granted, provided that the above 41 1.2.2.2 skrll * copyright notice and this permission notice appear in all copies. 42 1.2.2.2 skrll * 43 1.2.2.2 skrll * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 44 1.2.2.2 skrll * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 45 1.2.2.2 skrll * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 46 1.2.2.2 skrll * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 47 1.2.2.2 skrll * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 48 1.2.2.2 skrll * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 49 1.2.2.2 skrll * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 50 1.2.2.2 skrll */ 51 1.2.2.2 skrll 52 1.2.2.2 skrll /* 53 1.2.2.2 skrll * Alliance Promotion AP6422, AT24 and AT3D extended register set definitions. 54 1.2.2.2 skrll * 55 1.2.2.2 skrll * This has been reconstructed from XFree86 ``apm'' driver, whose authors 56 1.2.2.2 skrll * apparently do not believe in meaningful constants for numbers. See 57 1.2.2.2 skrll * apm_regs.h for more madness. 58 1.2.2.2 skrll */ 59 1.2.2.2 skrll 60 1.2.2.2 skrll /* 61 1.2.2.2 skrll * Clipping Control 62 1.2.2.2 skrll */ 63 1.2.2.2 skrll 64 1.2.2.2 skrll #define ATR_CLIP_CONTROL 0x0030 /* byte access */ 65 1.2.2.2 skrll #define ATR_CLIP_LEFT 0x0038 66 1.2.2.2 skrll #define ATR_CLIP_TOP 0x003a 67 1.2.2.2 skrll #define ATR_CLIP_LEFTTOP 0x0038 68 1.2.2.2 skrll #define ATR_CLIP_RIGHT 0x003c 69 1.2.2.2 skrll #define ATR_CLIP_BOTTOM 0x003e 70 1.2.2.2 skrll #define ATR_CLIP_RIGHTBOTTOM 0x003c 71 1.2.2.2 skrll 72 1.2.2.2 skrll /* 73 1.2.2.2 skrll * Drawing Engine 74 1.2.2.2 skrll */ 75 1.2.2.2 skrll 76 1.2.2.2 skrll #define ATR_DEC 0x0040 77 1.2.2.2 skrll #define ATR_ROP 0x0046 78 1.2.2.2 skrll #define ATR_BYTEMASK 0x0047 79 1.2.2.2 skrll #define ATR_PATTERN1 0x0048 80 1.2.2.2 skrll #define ATR_PATTERN2 0x004c 81 1.2.2.2 skrll #define ATR_SRC_X 0x0050 82 1.2.2.2 skrll #define ATR_SRC_Y 0x0052 83 1.2.2.2 skrll #define ATR_SRC_XY 0x0050 84 1.2.2.2 skrll #define ATR_DST_X 0x0054 85 1.2.2.2 skrll #define ATR_DST_Y 0x0056 86 1.2.2.2 skrll #define ATR_DST_XY 0x0054 87 1.2.2.2 skrll #define ATR_W 0x0058 88 1.2.2.2 skrll #define ATR_H 0x005a 89 1.2.2.2 skrll #define ATR_WH 0x0058 90 1.2.2.2 skrll #define ATR_OFFSET 0x005c 91 1.2.2.2 skrll #define ATR_SRC_OFFSET 0x005e 92 1.2.2.2 skrll #define ATR_FG 0x0060 93 1.2.2.2 skrll #define ATR_BG 0x0064 94 1.2.2.2 skrll 95 1.2.2.2 skrll /* DEC layout */ 96 1.2.2.2 skrll #define DEC_COMMAND_MASK 0x0000003f 97 1.2.2.2 skrll #define DEC_COMMAND_SHIFT 0 98 1.2.2.2 skrll #define DEC_DIR_X_REVERSE 0x00000040 99 1.2.2.2 skrll #define DEC_DIR_Y_REVERSE 0x00000080 100 1.2.2.2 skrll #define DEC_DIR_Y_MAJOR 0x00000100 101 1.2.2.2 skrll #define DEC_SRC_LINEAR 0x00000200 102 1.2.2.2 skrll #define DEC_SRC_CONTIGUOUS 0x00000800 103 1.2.2.2 skrll #define DEC_MONOCHROME 0x00001000 104 1.2.2.2 skrll #define DEC_SRC_TRANSPARENT 0x00002000 105 1.2.2.2 skrll #define DEC_DEPTH_MASK 0x0001c000 106 1.2.2.2 skrll #define DEC_DEPTH_SHIFT 14 107 1.2.2.2 skrll #define DEC_DST_LINEAR 0x00040000 108 1.2.2.2 skrll #define DEC_DST_CONTIGUOUS 0x00080000 109 1.2.2.2 skrll #define DEC_DST_TRANSPARENT 0x00100000 110 1.2.2.2 skrll #define DEC_DST_TRANSPARENT_POLARITY 0x00200000 111 1.2.2.2 skrll #define DEC_PATTERN_MASK 0x00c00000 112 1.2.2.2 skrll #define DEC_PATTERN_SHIFT 22 113 1.2.2.2 skrll #define DEC_WIDTH_MASK 0x07000000 114 1.2.2.2 skrll #define DEC_WIDTH_SHIFT 24 115 1.2.2.2 skrll #define DEC_UPDATE_MASK 0x18000000 116 1.2.2.2 skrll #define DEC_UPDATE_SHIFT 27 117 1.2.2.2 skrll #define DEC_START_MASK 0x60000000 118 1.2.2.2 skrll #define DEC_START_SHIFT 29 119 1.2.2.2 skrll #define DEC_START 0x80000000 120 1.2.2.2 skrll 121 1.2.2.2 skrll /* DEC commands */ 122 1.2.2.2 skrll #define DEC_COMMAND_NOP 0x00 123 1.2.2.2 skrll #define DEC_COMMAND_BLT 0x01 /* screen to screen blt */ 124 1.2.2.2 skrll #define DEC_COMMAND_RECT 0x02 /* rectangle fill */ 125 1.2.2.2 skrll #define DEC_COMMAND_BLT_STRETCH 0x03 /* blt and stretch */ 126 1.2.2.2 skrll #define DEC_COMMAND_STRIP 0x04 /* strip pattern */ 127 1.2.2.2 skrll #define DEC_COMMAND_HOST_BLT 0x08 /* host to screen blt */ 128 1.2.2.2 skrll #define DEC_COMMAND_SCREEN_BLT 0x09 /* screen to host blt */ 129 1.2.2.2 skrll #define DEC_COMMAND_VECT_ENDP 0x0c /* vector with end point */ 130 1.2.2.2 skrll #define DEC_COMMAND_VECT_NO_ENDP 0x0d /* vector without end point */ 131 1.2.2.2 skrll 132 1.2.2.2 skrll /* depth */ 133 1.2.2.2 skrll #define DEC_DEPTH_8 0x01 134 1.2.2.2 skrll #define DEC_DEPTH_16 0x02 135 1.2.2.2 skrll #define DEC_DEPTH_32 0x03 136 1.2.2.2 skrll #define DEC_DEPTH_24 0x04 137 1.2.2.2 skrll 138 1.2.2.2 skrll /* width */ 139 1.2.2.2 skrll #define DEC_WIDTH_LINEAR 0x00 140 1.2.2.2 skrll #define DEC_WIDTH_640 0x01 141 1.2.2.2 skrll #define DEC_WIDTH_800 0x02 142 1.2.2.2 skrll #define DEC_WIDTH_1024 0x04 143 1.2.2.2 skrll #define DEC_WIDTH_1152 0x05 144 1.2.2.2 skrll #define DEC_WIDTH_1280 0x06 145 1.2.2.2 skrll #define DEC_WIDTH_1600 0x07 146 1.2.2.2 skrll 147 1.2.2.2 skrll /* update mode */ 148 1.2.2.2 skrll #define DEC_UPDATE_NONE 0x00 149 1.2.2.2 skrll #define DEC_UPDATE_TOP_RIGHT 0x01 150 1.2.2.2 skrll #define DEC_UPDATE_BOTTOM_LEFT 0x02 151 1.2.2.2 skrll #define DEC_UPDATE_LASTPIX 0x03 152 1.2.2.2 skrll 153 1.2.2.2 skrll /* quickstart mode - operation starts as soon as given register is written to */ 154 1.2.2.2 skrll #define DEC_START_DIMX 0x01 155 1.2.2.2 skrll #define DEC_START_SRC 0x02 156 1.2.2.2 skrll #define DEC_START_DST 0x03 157 1.2.2.2 skrll 158 1.2.2.2 skrll /* ROP */ 159 1.2.2.2 skrll #define ROP_DST 0x66 160 1.2.2.2 skrll #define ROP_SRC 0xcc 161 1.2.2.2 skrll #define ROP_INV 0x33 162 1.2.2.2 skrll #define ROP_PATTERN 0xf0 163 1.2.2.2 skrll 164 1.2.2.2 skrll /* 165 1.2.2.2 skrll * Configuration Registers 166 1.2.2.2 skrll */ 167 1.2.2.2 skrll 168 1.2.2.2 skrll #define ATR_PIXEL 0x0080 /* byte access */ 169 1.2.2.2 skrll #define PIXEL_DEPTH_MASK 0x0f 170 1.2.2.2 skrll #define PIXEL_DEPTH_SHIFT 0 171 1.2.2.2 skrll 172 1.2.2.2 skrll /* pixel depth */ 173 1.2.2.2 skrll #define PIXEL_4 0x01 174 1.2.2.2 skrll #define PIXEL_8 0x02 175 1.2.2.2 skrll #define PIXEL_15 0x0c 176 1.2.2.2 skrll #define PIXEL_16 0x0d 177 1.2.2.2 skrll #define PIXEL_24 0x0e 178 1.2.2.2 skrll #define PIXEL_32 0x0f 179 1.2.2.2 skrll 180 1.2.2.2 skrll #define ATR_APERTURE 0x00c0 /* short access */ 181 1.2.2.2 skrll 182 1.2.2.2 skrll /* 183 1.2.2.2 skrll * DPMS Control 184 1.2.2.2 skrll */ 185 1.2.2.2 skrll 186 1.2.2.2 skrll #define ATR_DPMS 0x00d0 /* byte access */ 187 1.2.2.2 skrll #define DPMS_HSYNC_DISABLE 0x01 188 1.2.2.2 skrll #define DPMS_VSYNC_DISABLE 0x02 189 1.2.2.2 skrll 190 1.2.2.2 skrll /* 191 1.2.2.2 skrll * RAMDAC 192 1.2.2.2 skrll */ 193 1.2.2.2 skrll 194 1.2.2.2 skrll #define ATR_COLOR_CORRECTION 0x00e0 195 1.2.2.2 skrll #define ATR_MCLK 0x00e8 196 1.2.2.2 skrll #define ATR_PCLK 0x00ec 197 1.2.2.2 skrll 198 1.2.2.2 skrll /* 199 1.2.2.2 skrll * Hardware Cursor 200 1.2.2.2 skrll * 201 1.2.2.2 skrll * The position can not become negative; the offset register, encoded as 202 1.2.2.2 skrll * (signed y delta << 8) | signed x delta, allow the cursor image to 203 1.2.2.2 skrll * cross the upper-left corner. 204 1.2.2.2 skrll */ 205 1.2.2.2 skrll 206 1.2.2.2 skrll #define ATR_CURSOR_ENABLE 0x0140 207 1.2.2.2 skrll #define ATR_CURSOR_FG 0x0141 /* 3:3:2 */ 208 1.2.2.2 skrll #define ATR_CURSOR_BG 0x0142 /* 3:3:2 */ 209 1.2.2.2 skrll #define ATR_CURSOR_ADDRESS 0x0144 /* in KB from vram */ 210 1.2.2.2 skrll #define ATR_CURSOR_POSITION 0x0148 211 1.2.2.2 skrll #define ATR_CURSOR_OFFSET 0x014c /* short access */ 212 1.2.2.2 skrll 213 1.2.2.2 skrll /* 214 1.2.2.2 skrll * Identification Register 215 1.2.2.2 skrll */ 216 1.2.2.2 skrll 217 1.2.2.2 skrll #define ATR_ID 0x0182 218 1.2.2.2 skrll #define ID_AP6422 0x6422 219 1.2.2.2 skrll #define ID_AT24 0x6424 220 1.2.2.2 skrll #define ID_AT3D 0x643d 221 1.2.2.2 skrll 222 1.2.2.2 skrll /* 223 1.2.2.2 skrll * Status Registers 224 1.2.2.2 skrll */ 225 1.2.2.2 skrll 226 1.2.2.2 skrll #define ATR_FIFO_STATUS 0x01fc 227 1.2.2.2 skrll #define ATR_BLT_STATUS 0x01fd 228 1.2.2.2 skrll #define FIFO_MASK 0x0f 229 1.2.2.2 skrll #define FIFO_SHIFT 0 230 1.2.2.2 skrll #define FIFO_AP6422 4 231 1.2.2.2 skrll #define FIFO_AT24 8 232 1.2.2.2 skrll 233 1.2.2.2 skrll #define BLT_HOST_BUSY 0x01 234 1.2.2.2 skrll #define BLT_ENGINE_BUSY 0x04 235 1.2.2.2 skrll 236 1.2.2.2 skrll #define MGX_REG_ATREG_OFFSET 0x000b0000 237 1.2.2.2 skrll 238 1.2.2.2 skrll #endif /* MGX_REG_H */ 239
Indexes created Sat Nov 01 05:10:12 GMT 2025