p9100.c revision 1.37.4.5
1 /* $NetBSD: p9100.c,v 1.37.4.5 2009/09/16 13:37:57 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2005, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * color display (p9100) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: p9100.c,v 1.37.4.5 2009/09/16 13:37:57 yamt Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/buf.h> 46 #include <sys/device.h> 47 #include <sys/ioctl.h> 48 #include <sys/malloc.h> 49 #include <sys/mman.h> 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 53 #include <sys/bus.h> 54 #include <machine/autoconf.h> 55 56 #include <dev/sun/fbio.h> 57 #include <dev/sun/fbvar.h> 58 #include <dev/sun/btreg.h> 59 #include <dev/sun/btvar.h> 60 61 #include <dev/sbus/p9100reg.h> 62 63 #include <dev/sbus/sbusvar.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/wscons/wsconsio.h> 67 #include <dev/wsfont/wsfont.h> 68 #include <dev/rasops/rasops.h> 69 70 #include <dev/wscons/wsdisplay_vconsvar.h> 71 72 #include "opt_wsemul.h" 73 #include "rasops_glue.h" 74 #include "opt_pnozz.h" 75 76 #include "tctrl.h" 77 #if NTCTRL > 0 78 #include <machine/tctrl.h> 79 #include <sparc/dev/tctrlvar.h> /*XXX*/ 80 #endif 81 82 #ifdef PNOZZ_DEBUG 83 #define DPRINTF aprint_normal 84 #else 85 #define DPRINTF while (0) aprint_normal 86 #endif 87 88 struct pnozz_cursor { 89 short pc_enable; /* cursor is enabled */ 90 struct fbcurpos pc_pos; /* position */ 91 struct fbcurpos pc_hot; /* hot-spot */ 92 struct fbcurpos pc_size; /* size of mask & image fields */ 93 uint32_t pc_bits[0x100]; /* space for mask & image bits */ 94 unsigned char red[3], green[3]; 95 unsigned char blue[3]; /* cursor palette */ 96 }; 97 98 /* per-display variables */ 99 struct p9100_softc { 100 device_t sc_dev; /* base device */ 101 struct sbusdev sc_sd; /* sbus device */ 102 struct fbdevice sc_fb; /* frame buffer device */ 103 104 bus_space_tag_t sc_bustag; 105 106 bus_addr_t sc_ctl_paddr; /* phys address description */ 107 bus_size_t sc_ctl_psize; /* for device mmap() */ 108 bus_space_handle_t sc_ctl_memh; /* bus space handle */ 109 110 bus_addr_t sc_fb_paddr; /* phys address description */ 111 bus_size_t sc_fb_psize; /* for device mmap() */ 112 bus_space_handle_t sc_fb_memh; /* bus space handle */ 113 114 volatile uint32_t sc_junk; 115 uint32_t sc_mono_width; /* for setup_mono */ 116 117 uint32_t sc_width; 118 uint32_t sc_height; /* panel width / height */ 119 uint32_t sc_stride; 120 uint32_t sc_depth; 121 int sc_depthshift; /* blitter works on bytes not pixels */ 122 123 union bt_cmap sc_cmap; /* Brooktree color map */ 124 125 struct pnozz_cursor sc_cursor; 126 127 int sc_mode; 128 int sc_video, sc_powerstate; 129 uint32_t sc_bg; 130 volatile uint32_t sc_last_offset; 131 struct vcons_data vd; 132 uint8_t sc_dac_power; 133 }; 134 135 136 static struct vcons_screen p9100_console_screen; 137 138 extern const u_char rasops_cmap[768]; 139 140 struct wsscreen_descr p9100_defscreendesc = { 141 "default", 142 0, 0, 143 NULL, 144 8, 16, 145 WSSCREEN_WSCOLORS, 146 }; 147 148 const struct wsscreen_descr *_p9100_scrlist[] = { 149 &p9100_defscreendesc, 150 /* XXX other formats, graphics screen? */ 151 }; 152 153 struct wsscreen_list p9100_screenlist = { 154 sizeof(_p9100_scrlist) / sizeof(struct wsscreen_descr *), 155 _p9100_scrlist 156 }; 157 158 /* autoconfiguration driver */ 159 static int p9100_sbus_match(device_t, cfdata_t, void *); 160 static void p9100_sbus_attach(device_t, device_t, void *); 161 162 static void p9100unblank(device_t); 163 164 CFATTACH_DECL_NEW(pnozz, sizeof(struct p9100_softc), 165 p9100_sbus_match, p9100_sbus_attach, NULL, NULL); 166 167 extern struct cfdriver pnozz_cd; 168 169 static dev_type_open(p9100open); 170 static dev_type_ioctl(p9100ioctl); 171 static dev_type_mmap(p9100mmap); 172 173 const struct cdevsw pnozz_cdevsw = { 174 p9100open, nullclose, noread, nowrite, p9100ioctl, 175 nostop, notty, nopoll, p9100mmap, nokqfilter, 176 }; 177 178 /* frame buffer generic driver */ 179 static struct fbdriver p9100fbdriver = { 180 p9100unblank, p9100open, nullclose, p9100ioctl, nopoll, 181 p9100mmap, nokqfilter 182 }; 183 184 static void p9100loadcmap(struct p9100_softc *, int, int); 185 static void p9100_set_video(struct p9100_softc *, int); 186 static int p9100_get_video(struct p9100_softc *); 187 static uint32_t p9100_ctl_read_4(struct p9100_softc *, bus_size_t); 188 static void p9100_ctl_write_4(struct p9100_softc *, bus_size_t, uint32_t); 189 static uint8_t p9100_ramdac_read(struct p9100_softc *, bus_size_t); 190 static void p9100_ramdac_write(struct p9100_softc *, bus_size_t, uint8_t); 191 192 static uint8_t p9100_ramdac_read_ctl(struct p9100_softc *, int); 193 static void p9100_ramdac_write_ctl(struct p9100_softc *, int, uint8_t); 194 195 static void p9100_init_engine(struct p9100_softc *); 196 static int p9100_set_depth(struct p9100_softc *, int); 197 198 #if NWSDISPLAY > 0 199 static void p9100_sync(struct p9100_softc *); 200 static void p9100_bitblt(void *, int, int, int, int, int, int, uint32_t); 201 static void p9100_rectfill(void *, int, int, int, int, uint32_t); 202 static void p9100_clearscreen(struct p9100_softc *); 203 204 static void p9100_setup_mono(struct p9100_softc *, int, int, int, int, 205 uint32_t, uint32_t); 206 static void p9100_feed_line(struct p9100_softc *, int, uint8_t *); 207 static void p9100_set_color_reg(struct p9100_softc *, int, int32_t); 208 209 static void p9100_copycols(void *, int, int, int, int); 210 static void p9100_erasecols(void *, int, int, int, long); 211 static void p9100_copyrows(void *, int, int, int); 212 static void p9100_eraserows(void *, int, int, long); 213 /*static int p9100_mapchar(void *, int, u_int *);*/ 214 static void p9100_putchar(void *, int, int, u_int, long); 215 static void p9100_cursor(void *, int, int, int); 216 static int p9100_allocattr(void *, int, int, int, long *); 217 218 static int p9100_putcmap(struct p9100_softc *, struct wsdisplay_cmap *); 219 static int p9100_getcmap(struct p9100_softc *, struct wsdisplay_cmap *); 220 static int p9100_ioctl(void *, void *, u_long, void *, int, struct lwp *); 221 static paddr_t p9100_mmap(void *, void *, off_t, int); 222 223 /*static int p9100_load_font(void *, void *, struct wsdisplay_font *);*/ 224 225 static void p9100_init_screen(void *, struct vcons_screen *, int, 226 long *); 227 #endif 228 229 static void p9100_init_cursor(struct p9100_softc *); 230 231 static void p9100_set_fbcursor(struct p9100_softc *); 232 static void p9100_setcursorcmap(struct p9100_softc *); 233 static void p9100_loadcursor(struct p9100_softc *); 234 235 #if 0 236 static int p9100_intr(void *); 237 #endif 238 239 /* power management stuff */ 240 static bool p9100_suspend(device_t PMF_FN_PROTO); 241 static bool p9100_resume(device_t PMF_FN_PROTO); 242 243 #if NTCTRL > 0 244 static void p9100_set_extvga(void *, int); 245 #endif 246 247 #if NWSDISPLAY > 0 248 struct wsdisplay_accessops p9100_accessops = { 249 p9100_ioctl, 250 p9100_mmap, 251 NULL, /* vcons_alloc_screen */ 252 NULL, /* vcons_free_screen */ 253 NULL, /* vcons_show_screen */ 254 NULL, /* load_font */ 255 NULL, /* polls */ 256 NULL, /* scroll */ 257 }; 258 #endif 259 260 #define PNOZZ_LATCH(sc, off) if(sc->sc_last_offset == (off & 0xffffff80)) { \ 261 sc->sc_junk = bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, \ 262 off); \ 263 sc->sc_last_offset = off & 0xffffff80; } 264 265 /* 266 * Match a p9100. 267 */ 268 static int 269 p9100_sbus_match(device_t parent, cfdata_t cf, void *aux) 270 { 271 struct sbus_attach_args *sa = aux; 272 273 if (strcmp("p9100", sa->sa_name) == 0) 274 return 100; 275 return 0; 276 } 277 278 279 /* 280 * Attach a display. We need to notice if it is the console, too. 281 */ 282 static void 283 p9100_sbus_attach(device_t parent, device_t self, void *args) 284 { 285 struct p9100_softc *sc = device_private(self); 286 struct sbus_attach_args *sa = args; 287 struct fbdevice *fb = &sc->sc_fb; 288 int isconsole; 289 int node = sa->sa_node; 290 int i, j; 291 uint8_t ver; 292 293 #if NWSDISPLAY > 0 294 struct wsemuldisplaydev_attach_args aa; 295 struct rasops_info *ri; 296 unsigned long defattr; 297 #endif 298 299 sc->sc_last_offset = 0xffffffff; 300 sc->sc_dev = self; 301 302 /* 303 * When the ROM has mapped in a p9100 display, the address 304 * maps only the video RAM, so in any case we have to map the 305 * registers ourselves. 306 */ 307 308 if (sa->sa_npromvaddrs != 0) 309 fb->fb_pixels = (void *)sa->sa_promvaddrs[0]; 310 311 /* Remember cookies for p9100_mmap() */ 312 sc->sc_bustag = sa->sa_bustag; 313 314 sc->sc_ctl_paddr = sbus_bus_addr(sa->sa_bustag, 315 sa->sa_reg[0].oa_space, sa->sa_reg[0].oa_base); 316 sc->sc_ctl_psize = 0x8000;/*(bus_size_t)sa->sa_reg[0].oa_size;*/ 317 318 sc->sc_fb_paddr = sbus_bus_addr(sa->sa_bustag, 319 sa->sa_reg[2].oa_space, sa->sa_reg[2].oa_base); 320 sc->sc_fb_psize = (bus_size_t)sa->sa_reg[2].oa_size; 321 322 if (sbus_bus_map(sc->sc_bustag, 323 sa->sa_reg[0].oa_space, 324 sa->sa_reg[0].oa_base, 325 /* 326 * XXX for some reason the SBus resources don't cover 327 * all registers, so we just map what we need 328 */ 329 0x8000, 330 0, &sc->sc_ctl_memh) != 0) { 331 printf("%s: cannot map control registers\n", 332 self->dv_xname); 333 return; 334 } 335 336 /* 337 * we need to map the framebuffer even though we never write to it, 338 * thanks to some weirdness in the SPARCbook's SBus glue for the 339 * P9100 - all register accesses need to be 'latched in' whenever we 340 * go to another 0x80 aligned 'page' by reading the framebuffer at the 341 * same offset 342 */ 343 if (fb->fb_pixels == NULL) { 344 if (sbus_bus_map(sc->sc_bustag, 345 sa->sa_reg[2].oa_space, 346 sa->sa_reg[2].oa_base, 347 sc->sc_fb_psize, 348 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE, 349 &sc->sc_fb_memh) != 0) { 350 printf("%s: cannot map framebuffer\n", 351 self->dv_xname); 352 return; 353 } 354 fb->fb_pixels = (char *)sc->sc_fb_memh; 355 } else { 356 sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels; 357 } 358 sc->sc_width = prom_getpropint(node, "width", 800); 359 sc->sc_height = prom_getpropint(node, "height", 600); 360 sc->sc_depth = prom_getpropint(node, "depth", 8) >> 3; 361 362 sc->sc_stride = prom_getpropint(node, "linebytes", 363 sc->sc_width * sc->sc_depth); 364 365 fb->fb_driver = &p9100fbdriver; 366 fb->fb_device = sc->sc_dev; 367 fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK; 368 #ifdef PNOZZ_EMUL_CG3 369 fb->fb_type.fb_type = FBTYPE_SUN3COLOR; 370 #else 371 fb->fb_type.fb_type = FBTYPE_P9100; 372 #endif 373 fb->fb_pixels = NULL; 374 375 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 376 377 isconsole = fb_is_console(node); 378 #if 0 379 if (!isconsole) { 380 aprint_normal("\n"); 381 aprint_error_dev(self, "fatal error: PROM didn't configure device\n"); 382 return; 383 } 384 #endif 385 386 fb->fb_type.fb_depth = 8; 387 sc->sc_depth = 1; 388 sc->sc_depthshift = 0; 389 390 /* check the RAMDAC */ 391 ver = p9100_ramdac_read_ctl(sc, DAC_VERSION); 392 393 p9100_init_engine(sc); 394 p9100_set_depth(sc, 8); 395 396 fb_setsize_obp(fb, fb->fb_type.fb_depth, sc->sc_width, sc->sc_height, 397 node); 398 399 sbus_establish(&sc->sc_sd, sc->sc_dev); 400 #if 0 401 bus_intr_establish(sc->sc_bustag, sa->sa_pri, IPL_BIO, 402 p9100_intr, sc); 403 #endif 404 405 fb->fb_type.fb_cmsize = prom_getpropint(node, "cmsize", 256); 406 if ((1 << fb->fb_type.fb_depth) != fb->fb_type.fb_cmsize) 407 printf(", %d entry colormap", fb->fb_type.fb_cmsize); 408 409 /* Initialize the default color map. */ 410 j = 0; 411 for (i = 0; i < 256; i++) { 412 sc->sc_cmap.cm_map[i][0] = rasops_cmap[j]; 413 j++; 414 sc->sc_cmap.cm_map[i][1] = rasops_cmap[j]; 415 j++; 416 sc->sc_cmap.cm_map[i][2] = rasops_cmap[j]; 417 j++; 418 } 419 p9100loadcmap(sc, 0, 256); 420 421 /* make sure we are not blanked */ 422 if (isconsole) 423 p9100_set_video(sc, 1); 424 425 /* register with power management */ 426 sc->sc_video = 1; 427 sc->sc_powerstate = PWR_RESUME; 428 if (!pmf_device_register(self, p9100_suspend, p9100_resume)) { 429 panic("%s: could not register with PMF", 430 device_xname(sc->sc_dev)); 431 } 432 433 if (isconsole) { 434 printf(" (console)\n"); 435 #ifdef RASTERCONSOLE 436 /*p9100loadcmap(sc, 255, 1);*/ 437 fbrcons_init(fb); 438 #endif 439 } else 440 printf("\n"); 441 442 #if NWSDISPLAY > 0 443 wsfont_init(); 444 445 vcons_init(&sc->vd, sc, &p9100_defscreendesc, &p9100_accessops); 446 sc->vd.init_screen = p9100_init_screen; 447 448 vcons_init_screen(&sc->vd, &p9100_console_screen, 1, &defattr); 449 p9100_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 450 451 sc->sc_bg = (defattr >> 16) & 0xff; 452 p9100_clearscreen(sc); 453 454 ri = &p9100_console_screen.scr_ri; 455 456 p9100_defscreendesc.nrows = ri->ri_rows; 457 p9100_defscreendesc.ncols = ri->ri_cols; 458 p9100_defscreendesc.textops = &ri->ri_ops; 459 p9100_defscreendesc.capabilities = ri->ri_caps; 460 461 if(isconsole) { 462 wsdisplay_cnattach(&p9100_defscreendesc, ri, 0, 0, defattr); 463 vcons_replay_msgbuf(&p9100_console_screen); 464 } 465 466 aa.console = isconsole; 467 aa.scrdata = &p9100_screenlist; 468 aa.accessops = &p9100_accessops; 469 aa.accesscookie = &sc->vd; 470 471 config_found(self, &aa, wsemuldisplaydevprint); 472 #endif 473 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 474 printf("%s: rev %d / %x, %dx%d, depth %d mem %x\n", 475 device_xname(self), 476 (i & 7), ver, fb->fb_type.fb_width, fb->fb_type.fb_height, 477 fb->fb_type.fb_depth, (unsigned int)sc->sc_fb_psize); 478 /* cursor sprite handling */ 479 p9100_init_cursor(sc); 480 481 /* attach the fb */ 482 fb_attach(fb, isconsole); 483 484 #if NTCTRL > 0 485 /* register callback for external monitor status change */ 486 tadpole_register_callback(p9100_set_extvga, sc); 487 #endif 488 } 489 490 int 491 p9100open(dev_t dev, int flags, int mode, struct lwp *l) 492 { 493 int unit = minor(dev); 494 495 if (device_lookup(&pnozz_cd, unit) == NULL) 496 return (ENXIO); 497 return (0); 498 } 499 500 int 501 p9100ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 502 { 503 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 504 struct fbgattr *fba; 505 int error, v; 506 507 switch (cmd) { 508 509 case FBIOGTYPE: 510 *(struct fbtype *)data = sc->sc_fb.fb_type; 511 break; 512 513 case FBIOGATTR: 514 fba = (struct fbgattr *)data; 515 fba->real_type = sc->sc_fb.fb_type.fb_type; 516 fba->owner = 0; /* XXX ??? */ 517 fba->fbtype = sc->sc_fb.fb_type; 518 fba->sattr.flags = 0; 519 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 520 fba->sattr.dev_specific[0] = -1; 521 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 522 fba->emu_types[1] = -1; 523 break; 524 525 case FBIOGETCMAP: 526 #define p ((struct fbcmap *)data) 527 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 528 529 case FBIOPUTCMAP: 530 /* copy to software map */ 531 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 532 if (error) 533 return (error); 534 /* now blast them into the chip */ 535 /* XXX should use retrace interrupt */ 536 p9100loadcmap(sc, p->index, p->count); 537 #undef p 538 break; 539 540 case FBIOGVIDEO: 541 *(int *)data = p9100_get_video(sc); 542 break; 543 544 case FBIOSVIDEO: 545 p9100_set_video(sc, *(int *)data); 546 break; 547 548 /* these are for both FBIOSCURSOR and FBIOGCURSOR */ 549 #define p ((struct fbcursor *)data) 550 #define pc (&sc->sc_cursor) 551 552 case FBIOGCURSOR: 553 p->set = FB_CUR_SETALL; /* close enough, anyway */ 554 p->enable = pc->pc_enable; 555 p->pos = pc->pc_pos; 556 p->hot = pc->pc_hot; 557 p->size = pc->pc_size; 558 559 if (p->image != NULL) { 560 error = copyout(pc->pc_bits, p->image, 0x200); 561 if (error) 562 return error; 563 error = copyout(&pc->pc_bits[0x80], p->mask, 0x200); 564 if (error) 565 return error; 566 } 567 568 p->cmap.index = 0; 569 p->cmap.count = 3; 570 if (p->cmap.red != NULL) { 571 copyout(pc->red, p->cmap.red, 3); 572 copyout(pc->green, p->cmap.green, 3); 573 copyout(pc->blue, p->cmap.blue, 3); 574 } 575 break; 576 577 case FBIOSCURSOR: 578 { 579 int count; 580 uint32_t image[0x80], mask[0x80]; 581 uint8_t red[3], green[3], blue[3]; 582 583 v = p->set; 584 if (v & FB_CUR_SETCMAP) { 585 error = copyin(p->cmap.red, red, 3); 586 error |= copyin(p->cmap.green, green, 3); 587 error |= copyin(p->cmap.blue, blue, 3); 588 if (error) 589 return error; 590 } 591 if (v & FB_CUR_SETSHAPE) { 592 if (p->size.x > 64 || p->size.y > 64) 593 return EINVAL; 594 memset(&mask, 0, 0x200); 595 memset(&image, 0, 0x200); 596 count = p->size.y * 8; 597 error = copyin(p->image, image, count); 598 if (error) 599 return error; 600 error = copyin(p->mask, mask, count); 601 if (error) 602 return error; 603 } 604 605 /* parameters are OK; do it */ 606 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 607 if (v & FB_CUR_SETCUR) 608 pc->pc_enable = p->enable; 609 if (v & FB_CUR_SETPOS) 610 pc->pc_pos = p->pos; 611 if (v & FB_CUR_SETHOT) 612 pc->pc_hot = p->hot; 613 p9100_set_fbcursor(sc); 614 } 615 616 if (v & FB_CUR_SETCMAP) { 617 memcpy(pc->red, red, 3); 618 memcpy(pc->green, green, 3); 619 memcpy(pc->blue, blue, 3); 620 p9100_setcursorcmap(sc); 621 } 622 623 if (v & FB_CUR_SETSHAPE) { 624 memcpy(pc->pc_bits, image, 0x200); 625 memcpy(&pc->pc_bits[0x80], mask, 0x200); 626 p9100_loadcursor(sc); 627 } 628 } 629 break; 630 631 #undef p 632 #undef cc 633 634 case FBIOGCURPOS: 635 *(struct fbcurpos *)data = sc->sc_cursor.pc_pos; 636 break; 637 638 case FBIOSCURPOS: 639 sc->sc_cursor.pc_pos = *(struct fbcurpos *)data; 640 p9100_set_fbcursor(sc); 641 break; 642 643 case FBIOGCURMAX: 644 /* max cursor size is 64x64 */ 645 ((struct fbcurpos *)data)->x = 64; 646 ((struct fbcurpos *)data)->y = 64; 647 break; 648 649 default: 650 return (ENOTTY); 651 } 652 return (0); 653 } 654 655 static uint32_t 656 p9100_ctl_read_4(struct p9100_softc *sc, bus_size_t off) 657 { 658 659 PNOZZ_LATCH(sc, off); 660 return bus_space_read_4(sc->sc_bustag, sc->sc_ctl_memh, off); 661 } 662 663 static void 664 p9100_ctl_write_4(struct p9100_softc *sc, bus_size_t off, uint32_t v) 665 { 666 667 PNOZZ_LATCH(sc, off); 668 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, v); 669 } 670 671 /* initialize the drawing engine */ 672 static void 673 p9100_init_engine(struct p9100_softc *sc) 674 { 675 /* reset clipping rectangles */ 676 uint32_t rmax = ((sc->sc_width & 0x3fff) << 16) | 677 (sc->sc_height & 0x3fff); 678 679 sc->sc_last_offset = 0xffffffff; 680 681 p9100_ctl_write_4(sc, WINDOW_OFFSET, 0); 682 p9100_ctl_write_4(sc, WINDOW_MIN, 0); 683 p9100_ctl_write_4(sc, WINDOW_MAX, rmax); 684 p9100_ctl_write_4(sc, BYTE_CLIP_MIN, 0); 685 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, rmax); 686 p9100_ctl_write_4(sc, DRAW_MODE, 0); 687 p9100_ctl_write_4(sc, PLANE_MASK, 0xffffffff); 688 p9100_ctl_write_4(sc, PATTERN0, 0xffffffff); 689 p9100_ctl_write_4(sc, PATTERN1, 0xffffffff); 690 p9100_ctl_write_4(sc, PATTERN2, 0xffffffff); 691 p9100_ctl_write_4(sc, PATTERN3, 0xffffffff); 692 693 } 694 695 /* we only need these in the wsdisplay case */ 696 #if NWSDISPLAY > 0 697 698 /* wait until the engine is idle */ 699 static void 700 p9100_sync(struct p9100_softc *sc) 701 { 702 while((p9100_ctl_read_4(sc, ENGINE_STATUS) & 703 (ENGINE_BUSY | BLITTER_BUSY)) != 0); 704 } 705 706 static void 707 p9100_set_color_reg(struct p9100_softc *sc, int reg, int32_t col) 708 { 709 uint32_t out; 710 711 switch(sc->sc_depth) 712 { 713 case 1: /* 8 bit */ 714 out = (col << 8) | col; 715 out |= out << 16; 716 break; 717 case 2: /* 16 bit */ 718 out = col | (col << 16); 719 break; 720 default: 721 out = col; 722 } 723 p9100_ctl_write_4(sc, reg, out); 724 } 725 726 /* screen-to-screen blit */ 727 static void 728 p9100_bitblt(void *cookie, int xs, int ys, int xd, int yd, int wi, 729 int he, uint32_t rop) 730 { 731 struct p9100_softc *sc = cookie; 732 uint32_t src, dst, srcw, dstw; 733 734 sc->sc_last_offset = 0xffffffff; 735 736 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 737 dst = ((xd & 0x3fff) << 16) | (yd & 0x3fff); 738 srcw = (((xs + wi - 1) & 0x3fff) << 16) | ((ys + he - 1) & 0x3fff); 739 dstw = (((xd + wi - 1) & 0x3fff) << 16) | ((yd + he - 1) & 0x3fff); 740 741 p9100_sync(sc); 742 743 p9100_ctl_write_4(sc, RASTER_OP, rop); 744 745 p9100_ctl_write_4(sc, ABS_XY0, src << sc->sc_depthshift); 746 p9100_ctl_write_4(sc, ABS_XY1, srcw << sc->sc_depthshift); 747 p9100_ctl_write_4(sc, ABS_XY2, dst << sc->sc_depthshift); 748 p9100_ctl_write_4(sc, ABS_XY3, dstw << sc->sc_depthshift); 749 750 sc->sc_junk = p9100_ctl_read_4(sc, COMMAND_BLIT); 751 } 752 753 /* solid rectangle fill */ 754 static void 755 p9100_rectfill(void *cookie, int xs, int ys, int wi, int he, uint32_t col) 756 { 757 struct p9100_softc *sc = cookie; 758 uint32_t src, srcw; 759 760 sc->sc_last_offset = 0xffffffff; 761 762 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 763 srcw = (((xs + wi) & 0x3fff) << 16) | ((ys + he) & 0x3fff); 764 p9100_sync(sc); 765 p9100_set_color_reg(sc, FOREGROUND_COLOR, col); 766 p9100_set_color_reg(sc, BACKGROUND_COLOR, col); 767 p9100_ctl_write_4(sc, RASTER_OP, ROP_PAT); 768 p9100_ctl_write_4(sc, COORD_INDEX, 0); 769 p9100_ctl_write_4(sc, RECT_RTW_XY, src); 770 p9100_ctl_write_4(sc, RECT_RTW_XY, srcw); 771 sc->sc_junk = p9100_ctl_read_4(sc, COMMAND_QUAD); 772 } 773 774 /* setup for mono->colour expansion */ 775 static void 776 p9100_setup_mono(struct p9100_softc *sc, int x, int y, int wi, int he, 777 uint32_t fg, uint32_t bg) 778 { 779 780 sc->sc_last_offset = 0xffffffff; 781 782 p9100_sync(sc); 783 /* 784 * this doesn't make any sense to me either, but for some reason the 785 * chip applies the foreground colour to 0 pixels 786 */ 787 788 p9100_set_color_reg(sc,FOREGROUND_COLOR,bg); 789 p9100_set_color_reg(sc,BACKGROUND_COLOR,fg); 790 791 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 792 p9100_ctl_write_4(sc, ABS_X0, x); 793 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 794 p9100_ctl_write_4(sc, ABS_X2, (x + wi)); 795 p9100_ctl_write_4(sc, ABS_Y3, he); 796 /* now feed the data into the chip */ 797 sc->sc_mono_width = wi; 798 } 799 800 /* write monochrome data to the screen through the blitter */ 801 static void 802 p9100_feed_line(struct p9100_softc *sc, int count, uint8_t *data) 803 { 804 int i; 805 uint32_t latch = 0, bork; 806 int shift = 24; 807 int to_go = sc->sc_mono_width; 808 809 PNOZZ_LATCH(sc, PIXEL_1); 810 811 for (i = 0; i < count; i++) { 812 bork = data[i]; 813 latch |= (bork << shift); 814 if (shift == 0) { 815 /* check how many bits are significant */ 816 if (to_go > 31) { 817 bus_space_write_4(sc->sc_bustag, 818 sc->sc_ctl_memh, 819 (PIXEL_1 + (31 << 2)), latch); 820 to_go -= 32; 821 } else 822 { 823 bus_space_write_4(sc->sc_bustag, 824 sc->sc_ctl_memh, 825 (PIXEL_1 + ((to_go - 1) << 2)), latch); 826 to_go = 0; 827 } 828 latch = 0; 829 shift = 24; 830 } else 831 shift -= 8; 832 } 833 if (shift != 24) 834 p9100_ctl_write_4(sc, (PIXEL_1 + ((to_go - 1) << 2)), latch); 835 } 836 837 static void 838 p9100_clearscreen(struct p9100_softc *sc) 839 { 840 841 p9100_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, sc->sc_bg); 842 } 843 #endif /* NWSDISPLAY > 0 */ 844 845 static uint8_t 846 p9100_ramdac_read(struct p9100_softc *sc, bus_size_t off) 847 { 848 849 sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG); 850 return ((bus_space_read_4(sc->sc_bustag, 851 sc->sc_ctl_memh, off) >> 16) & 0xff); 852 } 853 854 static void 855 p9100_ramdac_write(struct p9100_softc *sc, bus_size_t off, uint8_t v) 856 { 857 858 sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG); 859 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, 860 ((uint32_t)v) << 16); 861 } 862 863 static uint8_t 864 p9100_ramdac_read_ctl(struct p9100_softc *sc, int off) 865 { 866 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 867 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 868 return p9100_ramdac_read(sc, DAC_INDX_DATA); 869 } 870 871 static void 872 p9100_ramdac_write_ctl(struct p9100_softc *sc, int off, uint8_t val) 873 { 874 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 875 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 876 p9100_ramdac_write(sc, DAC_INDX_DATA, val); 877 } 878 879 /* 880 * Undo the effect of an FBIOSVIDEO that turns the video off. 881 */ 882 static void 883 p9100unblank(device_t dev) 884 { 885 struct p9100_softc *sc = device_private(dev); 886 887 p9100_set_video(sc, 1); 888 889 /* 890 * Check if we're in terminal mode. If not force the console screen 891 * to front so we can see ddb, panic messages and so on 892 */ 893 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) { 894 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 895 if (sc->vd.active != &p9100_console_screen) { 896 SCREEN_INVISIBLE(sc->vd.active); 897 sc->vd.active = &p9100_console_screen; 898 SCREEN_VISIBLE(&p9100_console_screen); 899 } 900 p9100_init_engine(sc); 901 p9100_set_depth(sc, 8); 902 vcons_redraw_screen(&p9100_console_screen); 903 } 904 } 905 906 static void 907 p9100_set_video(struct p9100_softc *sc, int enable) 908 { 909 u_int32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1); 910 911 if (enable) 912 v |= VIDEO_ENABLED; 913 else 914 v &= ~VIDEO_ENABLED; 915 p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v); 916 #if NTCTRL > 0 917 /* Turn On/Off the TFT if we know how. 918 */ 919 tadpole_set_video(enable); 920 #endif 921 } 922 923 static int 924 p9100_get_video(struct p9100_softc *sc) 925 { 926 return (p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1) & VIDEO_ENABLED) != 0; 927 } 928 929 static bool 930 p9100_suspend(device_t dev PMF_FN_ARGS) 931 { 932 struct p9100_softc *sc = device_private(dev); 933 934 if (sc->sc_powerstate == PWR_SUSPEND) 935 return TRUE; 936 937 sc->sc_video = p9100_get_video(sc); 938 sc->sc_dac_power = p9100_ramdac_read_ctl(sc, DAC_POWER_MGT); 939 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 940 DAC_POWER_SCLK_DISABLE | 941 DAC_POWER_DDOT_DISABLE | 942 DAC_POWER_SYNC_DISABLE | 943 DAC_POWER_ICLK_DISABLE | 944 DAC_POWER_IPWR_DISABLE); 945 p9100_set_video(sc, 0); 946 sc->sc_powerstate = PWR_SUSPEND; 947 return TRUE; 948 } 949 950 static bool 951 p9100_resume(device_t dev PMF_FN_ARGS) 952 { 953 struct p9100_softc *sc = device_private(dev); 954 955 if (sc->sc_powerstate == PWR_RESUME) 956 return TRUE; 957 958 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, sc->sc_dac_power); 959 p9100_set_video(sc, sc->sc_video); 960 961 sc->sc_powerstate = PWR_RESUME; 962 return TRUE; 963 } 964 965 /* 966 * Load a subset of the current (new) colormap into the IBM RAMDAC. 967 */ 968 static void 969 p9100loadcmap(struct p9100_softc *sc, int start, int ncolors) 970 { 971 int i; 972 sc->sc_last_offset = 0xffffffff; 973 974 p9100_ramdac_write(sc, DAC_CMAP_WRIDX, start); 975 976 for (i=0;i<ncolors;i++) { 977 p9100_ramdac_write(sc, DAC_CMAP_DATA, 978 sc->sc_cmap.cm_map[i + start][0]); 979 p9100_ramdac_write(sc, DAC_CMAP_DATA, 980 sc->sc_cmap.cm_map[i + start][1]); 981 p9100_ramdac_write(sc, DAC_CMAP_DATA, 982 sc->sc_cmap.cm_map[i + start][2]); 983 } 984 } 985 986 /* 987 * Return the address that would map the given device at the given 988 * offset, allowing for the given protection, or return -1 for error. 989 */ 990 static paddr_t 991 p9100mmap(dev_t dev, off_t off, int prot) 992 { 993 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 994 995 if (off & PGOFSET) 996 panic("p9100mmap"); 997 if (off < 0) 998 return (-1); 999 1000 #ifdef PNOZZ_EMUL_CG3 1001 #define CG3_MMAP_OFFSET 0x04000000 1002 /* Make Xsun think we are a CG3 (SUN3COLOR) 1003 */ 1004 if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) { 1005 off -= CG3_MMAP_OFFSET; 1006 return (bus_space_mmap(sc->sc_bustag, 1007 sc->sc_fb_paddr, 1008 off, 1009 prot, 1010 BUS_SPACE_MAP_LINEAR)); 1011 } 1012 #endif 1013 1014 if (off >= sc->sc_fb_psize + sc->sc_ctl_psize/* + sc->sc_cmd_psize*/) 1015 return (-1); 1016 1017 if (off < sc->sc_fb_psize) { 1018 return (bus_space_mmap(sc->sc_bustag, 1019 sc->sc_fb_paddr, 1020 off, 1021 prot, 1022 BUS_SPACE_MAP_LINEAR)); 1023 } 1024 1025 off -= sc->sc_fb_psize; 1026 if (off < sc->sc_ctl_psize) { 1027 return (bus_space_mmap(sc->sc_bustag, 1028 sc->sc_ctl_paddr, 1029 off, 1030 prot, 1031 BUS_SPACE_MAP_LINEAR)); 1032 } 1033 1034 return EINVAL; 1035 } 1036 1037 /* wscons stuff */ 1038 #if NWSDISPLAY > 0 1039 1040 static void 1041 p9100_cursor(void *cookie, int on, int row, int col) 1042 { 1043 struct rasops_info *ri = cookie; 1044 struct vcons_screen *scr = ri->ri_hw; 1045 struct p9100_softc *sc = scr->scr_cookie; 1046 int x, y, wi,he; 1047 1048 wi = ri->ri_font->fontwidth; 1049 he = ri->ri_font->fontheight; 1050 1051 if (ri->ri_flg & RI_CURSOR) { 1052 x = ri->ri_ccol * wi + ri->ri_xorigin; 1053 y = ri->ri_crow * he + ri->ri_yorigin; 1054 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1055 ri->ri_flg &= ~RI_CURSOR; 1056 } 1057 1058 ri->ri_crow = row; 1059 ri->ri_ccol = col; 1060 1061 if (on) 1062 { 1063 x = ri->ri_ccol * wi + ri->ri_xorigin; 1064 y = ri->ri_crow * he + ri->ri_yorigin; 1065 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1066 ri->ri_flg |= RI_CURSOR; 1067 } 1068 } 1069 1070 #if 0 1071 static int 1072 p9100_mapchar(void *cookie, int uni, u_int *index) 1073 { 1074 return 0; 1075 } 1076 #endif 1077 1078 static void 1079 p9100_putchar(void *cookie, int row, int col, u_int c, long attr) 1080 { 1081 struct rasops_info *ri = cookie; 1082 struct vcons_screen *scr = ri->ri_hw; 1083 struct p9100_softc *sc = scr->scr_cookie; 1084 1085 int fg, bg, uc, i; 1086 uint8_t *data; 1087 int x, y, wi, he; 1088 1089 wi = ri->ri_font->fontwidth; 1090 he = ri->ri_font->fontheight; 1091 1092 if (!CHAR_IN_FONT(c, ri->ri_font)) 1093 return; 1094 1095 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xff]; 1096 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xff]; 1097 x = ri->ri_xorigin + col * wi; 1098 y = ri->ri_yorigin + row * he; 1099 1100 if (c == 0x20) { 1101 p9100_rectfill(sc, x, y, wi, he, bg); 1102 } else { 1103 uc = c-ri->ri_font->firstchar; 1104 data = (uint8_t *)ri->ri_font->data + uc * 1105 ri->ri_fontscale; 1106 1107 p9100_setup_mono(sc, x, y, wi, 1, fg, bg); 1108 for (i = 0; i < he; i++) { 1109 p9100_feed_line(sc, ri->ri_font->stride, 1110 data); 1111 data += ri->ri_font->stride; 1112 } 1113 } 1114 } 1115 1116 /* 1117 * wsdisplay_accessops 1118 */ 1119 1120 int 1121 p9100_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 1122 struct lwp *l) 1123 { 1124 struct vcons_data *vd = v; 1125 struct p9100_softc *sc = vd->cookie; 1126 struct wsdisplay_fbinfo *wdf; 1127 struct vcons_screen *ms = vd->active; 1128 1129 switch (cmd) { 1130 case WSDISPLAYIO_GTYPE: 1131 *(u_int *)data = WSDISPLAY_TYPE_SB_P9100; 1132 return 0; 1133 1134 case FBIOGVIDEO: 1135 case WSDISPLAYIO_GVIDEO: 1136 *(int *)data = p9100_get_video(sc); 1137 return 0; 1138 1139 case WSDISPLAYIO_SVIDEO: 1140 case FBIOSVIDEO: 1141 p9100_set_video(sc, *(int *)data); 1142 return 0; 1143 1144 case WSDISPLAYIO_GINFO: 1145 wdf = (void *)data; 1146 wdf->height = ms->scr_ri.ri_height; 1147 wdf->width = ms->scr_ri.ri_width; 1148 wdf->depth = ms->scr_ri.ri_depth; 1149 wdf->cmsize = 256; 1150 return 0; 1151 1152 case WSDISPLAYIO_GETCMAP: 1153 return p9100_getcmap(sc, (struct wsdisplay_cmap *)data); 1154 1155 case WSDISPLAYIO_PUTCMAP: 1156 return p9100_putcmap(sc, (struct wsdisplay_cmap *)data); 1157 1158 case WSDISPLAYIO_SMODE: 1159 { 1160 int new_mode = *(int*)data; 1161 if (new_mode != sc->sc_mode) 1162 { 1163 sc->sc_mode = new_mode; 1164 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1165 { 1166 p9100_init_engine(sc); 1167 p9100_set_depth(sc, 8); 1168 p9100loadcmap(sc, 0, 256); 1169 p9100_clearscreen(sc); 1170 vcons_redraw_screen(ms); 1171 } 1172 } 1173 } 1174 } 1175 return EPASSTHROUGH; 1176 } 1177 1178 static paddr_t 1179 p9100_mmap(void *v, void *vs, off_t offset, int prot) 1180 { 1181 struct vcons_data *vd = v; 1182 struct p9100_softc *sc = vd->cookie; 1183 paddr_t pa; 1184 1185 /* 'regular' framebuffer mmap()ing */ 1186 if (offset < sc->sc_fb_psize) { 1187 pa = bus_space_mmap(sc->sc_bustag, sc->sc_fb_paddr + offset, 0, 1188 prot, BUS_SPACE_MAP_LINEAR); 1189 return pa; 1190 } 1191 1192 if ((offset >= sc->sc_fb_paddr) && (offset < (sc->sc_fb_paddr + 1193 sc->sc_fb_psize))) { 1194 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1195 BUS_SPACE_MAP_LINEAR); 1196 return pa; 1197 } 1198 1199 if ((offset >= sc->sc_ctl_paddr) && (offset < (sc->sc_ctl_paddr + 1200 sc->sc_ctl_psize))) { 1201 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1202 BUS_SPACE_MAP_LINEAR); 1203 return pa; 1204 } 1205 1206 return -1; 1207 } 1208 1209 static void 1210 p9100_init_screen(void *cookie, struct vcons_screen *scr, 1211 int existing, long *defattr) 1212 { 1213 struct p9100_softc *sc = cookie; 1214 struct rasops_info *ri = &scr->scr_ri; 1215 1216 ri->ri_depth = sc->sc_depth << 3; 1217 ri->ri_width = sc->sc_width; 1218 ri->ri_height = sc->sc_height; 1219 ri->ri_stride = sc->sc_stride; 1220 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 1221 1222 ri->ri_bits = bus_space_vaddr(sc->sc_bustag, sc->sc_fb_memh); 1223 1224 DPRINTF("addr: %08lx\n",(ulong)ri->ri_bits); 1225 1226 rasops_init(ri, sc->sc_height/8, sc->sc_width/8); 1227 ri->ri_caps = WSSCREEN_WSCOLORS; 1228 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 1229 sc->sc_width / ri->ri_font->fontwidth); 1230 1231 /* enable acceleration */ 1232 ri->ri_ops.cursor = p9100_cursor; 1233 ri->ri_ops.copyrows = p9100_copyrows; 1234 ri->ri_ops.eraserows = p9100_eraserows; 1235 ri->ri_ops.copycols = p9100_copycols; 1236 ri->ri_ops.erasecols = p9100_erasecols; 1237 ri->ri_ops.putchar = p9100_putchar; 1238 ri->ri_ops.allocattr = p9100_allocattr; 1239 } 1240 1241 static int 1242 p9100_putcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1243 { 1244 u_int index = cm->index; 1245 u_int count = cm->count; 1246 int i, error; 1247 u_char rbuf[256], gbuf[256], bbuf[256]; 1248 u_char *r, *g, *b; 1249 1250 if (cm->index >= 256 || cm->count > 256 || 1251 (cm->index + cm->count) > 256) 1252 return EINVAL; 1253 error = copyin(cm->red, &rbuf[index], count); 1254 if (error) 1255 return error; 1256 error = copyin(cm->green, &gbuf[index], count); 1257 if (error) 1258 return error; 1259 error = copyin(cm->blue, &bbuf[index], count); 1260 if (error) 1261 return error; 1262 1263 r = &rbuf[index]; 1264 g = &gbuf[index]; 1265 b = &bbuf[index]; 1266 1267 for (i = 0; i < count; i++) { 1268 sc->sc_cmap.cm_map[index][0] = *r; 1269 sc->sc_cmap.cm_map[index][1] = *g; 1270 sc->sc_cmap.cm_map[index][2] = *b; 1271 index++; 1272 r++, g++, b++; 1273 } 1274 p9100loadcmap(sc, 0, 256); 1275 return 0; 1276 } 1277 1278 static int 1279 p9100_getcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1280 { 1281 u_int index = cm->index; 1282 u_int count = cm->count; 1283 int error, i; 1284 uint8_t red[256], green[256], blue[256]; 1285 1286 if (index >= 255 || count > 256 || index + count > 256) 1287 return EINVAL; 1288 1289 i = index; 1290 while (i < (index + count)) { 1291 red[i] = sc->sc_cmap.cm_map[i][0]; 1292 green[i] = sc->sc_cmap.cm_map[i][1]; 1293 blue[i] = sc->sc_cmap.cm_map[i][2]; 1294 i++; 1295 } 1296 error = copyout(&red[index], cm->red, count); 1297 if (error) 1298 return error; 1299 error = copyout(&green[index], cm->green, count); 1300 if (error) 1301 return error; 1302 error = copyout(&blue[index], cm->blue, count); 1303 if (error) 1304 return error; 1305 1306 return 0; 1307 } 1308 1309 static void 1310 p9100_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1311 { 1312 struct rasops_info *ri = cookie; 1313 struct vcons_screen *scr = ri->ri_hw; 1314 int32_t xs, xd, y, width, height; 1315 1316 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1317 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1318 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1319 width = ri->ri_font->fontwidth * ncols; 1320 height = ri->ri_font->fontheight; 1321 p9100_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, ROP_SRC); 1322 } 1323 1324 static void 1325 p9100_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1326 { 1327 struct rasops_info *ri = cookie; 1328 struct vcons_screen *scr = ri->ri_hw; 1329 int32_t x, y, width, height, bg; 1330 1331 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1332 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1333 width = ri->ri_font->fontwidth * ncols; 1334 height = ri->ri_font->fontheight; 1335 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1336 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1337 } 1338 1339 static void 1340 p9100_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1341 { 1342 struct rasops_info *ri = cookie; 1343 struct vcons_screen *scr = ri->ri_hw; 1344 int32_t x, ys, yd, width, height; 1345 1346 x = ri->ri_xorigin; 1347 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1348 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1349 width = ri->ri_emuwidth; 1350 height = ri->ri_font->fontheight * nrows; 1351 p9100_bitblt(scr->scr_cookie, x, ys, x, yd, width, height, ROP_SRC); 1352 } 1353 1354 static void 1355 p9100_eraserows(void *cookie, int row, int nrows, long fillattr) 1356 { 1357 struct rasops_info *ri = cookie; 1358 struct vcons_screen *scr = ri->ri_hw; 1359 int32_t x, y, width, height, bg; 1360 1361 if ((row == 0) && (nrows == ri->ri_rows)) { 1362 x = y = 0; 1363 width = ri->ri_width; 1364 height = ri->ri_height; 1365 } else { 1366 x = ri->ri_xorigin; 1367 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1368 width = ri->ri_emuwidth; 1369 height = ri->ri_font->fontheight * nrows; 1370 } 1371 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1372 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1373 } 1374 1375 1376 static int 1377 p9100_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 1378 { 1379 if ((fg == 0) && (bg == 0)) 1380 { 1381 fg = WS_DEFAULT_FG; 1382 bg = WS_DEFAULT_BG; 1383 } 1384 1385 *attrp = (fg & 0xff) << 24 | (bg & 0xff) << 16 | (flags & 0xff); 1386 1387 if (flags & WSATTR_REVERSE) { 1388 *attrp = (bg & 0xff) << 24 | (fg & 0xff) << 16 | 1389 (flags & 0xff) << 8; 1390 } else 1391 *attrp = (fg & 0xff) << 24 | (bg & 0xff) << 16 | 1392 (flags & 0xff) << 8; 1393 1394 return 0; 1395 } 1396 1397 #if 0 1398 static int 1399 p9100_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1400 { 1401 1402 return 0; 1403 } 1404 #endif 1405 1406 #endif /* NWSDISPLAY > 0 */ 1407 1408 #if 0 1409 static int 1410 p9100_intr(void *arg) 1411 { 1412 /*p9100_softc *sc=arg;*/ 1413 DPRINTF("."); 1414 return 1; 1415 } 1416 #endif 1417 1418 static void 1419 p9100_init_cursor(struct p9100_softc *sc) 1420 { 1421 1422 memset(&sc->sc_cursor, 0, sizeof(struct pnozz_cursor)); 1423 sc->sc_cursor.pc_size.x = 64; 1424 sc->sc_cursor.pc_size.y = 64; 1425 1426 } 1427 1428 static void 1429 p9100_set_fbcursor(struct p9100_softc *sc) 1430 { 1431 #ifdef PNOZZ_PARANOID 1432 int s; 1433 1434 s = splhigh(); /* just in case... */ 1435 #endif 1436 sc->sc_last_offset = 0xffffffff; 1437 1438 /* set position and hotspot */ 1439 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1440 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1441 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_CTL); 1442 if (sc->sc_cursor.pc_enable) { 1443 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_X11 | 1444 DAC_CURSOR_64); 1445 } else 1446 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_OFF); 1447 /* next two registers - x low, high, y low, high */ 1448 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.x & 0xff); 1449 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.x >> 8) & 1450 0xff); 1451 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.y & 0xff); 1452 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.y >> 8) & 1453 0xff); 1454 /* hotspot */ 1455 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.x & 0xff); 1456 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.y & 0xff); 1457 1458 #ifdef PNOZZ_PARANOID 1459 splx(s); 1460 #endif 1461 1462 } 1463 1464 static void 1465 p9100_setcursorcmap(struct p9100_softc *sc) 1466 { 1467 int i; 1468 1469 #ifdef PNOZZ_PARANOID 1470 int s; 1471 s = splhigh(); /* just in case... */ 1472 #endif 1473 sc->sc_last_offset = 0xffffffff; 1474 1475 /* set cursor colours */ 1476 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1477 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1478 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_COL_1); 1479 1480 for (i = 0; i < 3; i++) { 1481 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.red[i]); 1482 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.green[i]); 1483 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.blue[i]); 1484 } 1485 1486 #ifdef PNOZZ_PARANOID 1487 splx(s); 1488 #endif 1489 } 1490 1491 static void 1492 p9100_loadcursor(struct p9100_softc *sc) 1493 { 1494 uint32_t *image, *mask; 1495 uint32_t bit, bbit, im, ma; 1496 int i, j, k; 1497 uint8_t latch1, latch2; 1498 1499 #ifdef PNOZZ_PARANOID 1500 int s; 1501 s = splhigh(); /* just in case... */ 1502 #endif 1503 sc->sc_last_offset = 0xffffffff; 1504 1505 /* set cursor shape */ 1506 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1507 p9100_ramdac_write(sc, DAC_INDX_HI, 1); 1508 p9100_ramdac_write(sc, DAC_INDX_LO, 0); 1509 1510 image = sc->sc_cursor.pc_bits; 1511 mask = &sc->sc_cursor.pc_bits[0x80]; 1512 1513 for (i = 0; i < 0x80; i++) { 1514 bit = 0x80000000; 1515 im = image[i]; 1516 ma = mask[i]; 1517 for (k = 0; k < 4; k++) { 1518 bbit = 0x1; 1519 latch1 = 0; 1520 for (j = 0; j < 4; j++) { 1521 if (im & bit) 1522 latch1 |= bbit; 1523 bbit <<= 1; 1524 if (ma & bit) 1525 latch1 |= bbit; 1526 bbit <<= 1; 1527 bit >>= 1; 1528 } 1529 bbit = 0x1; 1530 latch2 = 0; 1531 for (j = 0; j < 4; j++) { 1532 if (im & bit) 1533 latch2 |= bbit; 1534 bbit <<= 1; 1535 if (ma & bit) 1536 latch2 |= bbit; 1537 bbit <<= 1; 1538 bit >>= 1; 1539 } 1540 p9100_ramdac_write(sc, DAC_INDX_DATA, latch1); 1541 p9100_ramdac_write(sc, DAC_INDX_DATA, latch2); 1542 } 1543 } 1544 #ifdef PNOZZ_DEBUG_CURSOR 1545 printf("image:\n"); 1546 for (i=0;i<0x80;i+=2) 1547 printf("%08x %08x\n", image[i], image[i+1]); 1548 printf("mask:\n"); 1549 for (i=0;i<0x80;i+=2) 1550 printf("%08x %08x\n", mask[i], mask[i+1]); 1551 #endif 1552 #ifdef PNOZZ_PARANOID 1553 splx(s); 1554 #endif 1555 } 1556 1557 #if NTCTRL > 0 1558 static void 1559 p9100_set_extvga(void *cookie, int status) 1560 { 1561 struct p9100_softc *sc = cookie; 1562 #ifdef PNOZZ_PARANOID 1563 int s; 1564 1565 s = splhigh(); 1566 #endif 1567 1568 #ifdef PNOZZ_DEBUG 1569 printf("%s: external VGA %s\n", device_xname(sc->sc_dev), 1570 status ? "on" : "off"); 1571 #endif 1572 1573 sc->sc_last_offset = 0xffffffff; 1574 1575 if (status) { 1576 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1577 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) & 1578 ~DAC_POWER_IPWR_DISABLE); 1579 } else { 1580 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1581 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) | 1582 DAC_POWER_IPWR_DISABLE); 1583 } 1584 #ifdef PNOZZ_PARANOID 1585 splx(s); 1586 #endif 1587 } 1588 #endif /* NTCTRL > 0 */ 1589 1590 static int 1591 upper_bit(uint32_t b) 1592 { 1593 uint32_t mask=0x80000000; 1594 int cnt = 31; 1595 if (b == 0) 1596 return -1; 1597 while ((mask != 0) && ((b & mask) == 0)) { 1598 mask = mask >> 1; 1599 cnt--; 1600 } 1601 return cnt; 1602 } 1603 1604 static int 1605 p9100_set_depth(struct p9100_softc *sc, int depth) 1606 { 1607 int new_sls; 1608 uint32_t bits, scr, memctl, mem; 1609 int s0, s1, s2, s3, ps, crtcline; 1610 uint8_t pf, mc3, es; 1611 1612 switch (depth) { 1613 case 8: 1614 sc->sc_depthshift = 0; 1615 ps = 2; 1616 pf = 3; 1617 mc3 = 0; 1618 es = 0; /* no swapping */ 1619 memctl = 3; 1620 break; 1621 case 16: 1622 sc->sc_depthshift = 1; 1623 ps = 3; 1624 pf = 4; 1625 mc3 = 0; 1626 es = 2; /* swap bytes in 16bit words */ 1627 memctl = 2; 1628 break; 1629 case 24: 1630 /* boo */ 1631 printf("We don't DO 24bit pixels dammit!\n"); 1632 return 0; 1633 case 32: 1634 sc->sc_depthshift = 2; 1635 ps = 5; 1636 pf = 6; 1637 mc3 = 0; 1638 es = 6; /* swap both half-words and bytes */ 1639 memctl = 1; /* 0 */ 1640 break; 1641 default: 1642 aprint_error("%s: bogus colour depth (%d)\n", 1643 __func__, depth); 1644 return FALSE; 1645 } 1646 /* 1647 * this could be done a lot shorter and faster but then nobody would 1648 * understand what the hell we're doing here without getting a major 1649 * headache. Scanline size is encoded as 4 shift values, 3 of them 3 bits 1650 * wide, 16 << n for n>0, one 2 bits, 512 << n for n>0. n==0 means 0 1651 */ 1652 new_sls = sc->sc_width << sc->sc_depthshift; 1653 sc->sc_stride = new_sls; 1654 bits = new_sls; 1655 s3 = upper_bit(bits); 1656 if (s3 > 9) { 1657 bits &= ~(1 << s3); 1658 s3 -= 9; 1659 } else 1660 s3 = 0; 1661 s2 = upper_bit(bits); 1662 if (s2 > 0) { 1663 bits &= ~(1 << s2); 1664 s2 -= 4; 1665 } else 1666 s2 = 0; 1667 s1 = upper_bit(bits); 1668 if (s1 > 0) { 1669 bits &= ~(1 << s1); 1670 s1 -= 4; 1671 } else 1672 s1 = 0; 1673 s0 = upper_bit(bits); 1674 if (s0 > 0) { 1675 bits &= ~(1 << s0); 1676 s0 -= 4; 1677 } else 1678 s0 = 0; 1679 1680 1681 DPRINTF("sls: %x sh: %d %d %d %d leftover: %x\n", new_sls, s0, s1, 1682 s2, s3, bits); 1683 1684 /* 1685 * now let's put these values into the System Config Register. No need to 1686 * read it here since we (hopefully) just saved the content 1687 */ 1688 scr = p9100_ctl_read_4(sc, SYS_CONF); 1689 scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) | 1690 (s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT); 1691 1692 DPRINTF("new scr: %x DAC %x %x\n", scr, pf, mc3); 1693 1694 mem = p9100_ctl_read_4(sc, VID_MEM_CONFIG); 1695 1696 DPRINTF("old memctl: %08x\n", mem); 1697 1698 /* set shift and crtc clock */ 1699 mem &= ~(0x0000fc00); 1700 mem |= (memctl << 10) | (memctl << 13); 1701 p9100_ctl_write_4(sc, VID_MEM_CONFIG, mem); 1702 1703 DPRINTF("new memctl: %08x\n", mem); 1704 1705 /* whack the engine... */ 1706 p9100_ctl_write_4(sc, SYS_CONF, scr); 1707 1708 /* ok, whack the DAC */ 1709 p9100_ramdac_write_ctl(sc, DAC_MISC_1, 0x11); 1710 p9100_ramdac_write_ctl(sc, DAC_MISC_2, 0x45); 1711 p9100_ramdac_write_ctl(sc, DAC_MISC_3, mc3); 1712 /* 1713 * despite the 3GX manual saying otherwise we don't need to mess with 1714 * any clock dividers here 1715 */ 1716 p9100_ramdac_write_ctl(sc, DAC_MISC_CLK, 1); 1717 p9100_ramdac_write_ctl(sc, 3, 0); 1718 p9100_ramdac_write_ctl(sc, 4, 0); 1719 1720 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 0); 1721 p9100_ramdac_write_ctl(sc, DAC_OPERATION, 0); 1722 p9100_ramdac_write_ctl(sc, DAC_PALETTE_CTRL, 0); 1723 1724 p9100_ramdac_write_ctl(sc, DAC_PIXEL_FMT, pf); 1725 1726 /* TODO: distinguish between 15 and 16 bit */ 1727 p9100_ramdac_write_ctl(sc, DAC_8BIT_CTRL, 0); 1728 /* direct colour, linear, 565 */ 1729 p9100_ramdac_write_ctl(sc, DAC_16BIT_CTRL, 0xc6); 1730 /* direct colour */ 1731 p9100_ramdac_write_ctl(sc, DAC_32BIT_CTRL, 3); 1732 1733 /* From the 3GX manual. Needs magic number reduction */ 1734 p9100_ramdac_write_ctl(sc, 0x10, 2); 1735 p9100_ramdac_write_ctl(sc, 0x11, 0); 1736 p9100_ramdac_write_ctl(sc, 0x14, 5); 1737 p9100_ramdac_write_ctl(sc, 0x08, 1); 1738 p9100_ramdac_write_ctl(sc, 0x15, 5); 1739 p9100_ramdac_write_ctl(sc, 0x16, 0x63); 1740 1741 /* whack the CRTC */ 1742 /* we always transfer 64bit in one go */ 1743 crtcline = sc->sc_stride >> 3; 1744 1745 DPRINTF("crtcline: %d\n", crtcline); 1746 1747 p9100_ctl_write_4(sc, VID_HTOTAL, (24 << sc->sc_depthshift) + crtcline); 1748 p9100_ctl_write_4(sc, VID_HSRE, 8 << sc->sc_depthshift); 1749 p9100_ctl_write_4(sc, VID_HBRE, 18 << sc->sc_depthshift); 1750 p9100_ctl_write_4(sc, VID_HBFE, (18 << sc->sc_depthshift) + crtcline); 1751 1752 #ifdef PNOZZ_DEBUG 1753 { 1754 uint32_t sscr; 1755 sscr = p9100_ctl_read_4(sc, SYS_CONF); 1756 printf("scr: %x\n", sscr); 1757 } 1758 #endif 1759 return TRUE; 1760 } 1761
Indexes created Wed Oct 22 13:09:56 GMT 2025