p9100.c revision 1.44
1 /* $NetBSD: p9100.c,v 1.44 2009/05/27 00:35:34 macallan Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2005, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * color display (p9100) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: p9100.c,v 1.44 2009/05/27 00:35:34 macallan Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/buf.h> 46 #include <sys/device.h> 47 #include <sys/ioctl.h> 48 #include <sys/malloc.h> 49 #include <sys/mman.h> 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 53 #include <sys/bus.h> 54 #include <machine/autoconf.h> 55 56 #include <dev/sun/fbio.h> 57 #include <dev/sun/fbvar.h> 58 #include <dev/sun/btreg.h> 59 #include <dev/sun/btvar.h> 60 61 #include <dev/sbus/p9100reg.h> 62 63 #include <dev/sbus/sbusvar.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/wscons/wsconsio.h> 67 #include <dev/wsfont/wsfont.h> 68 #include <dev/rasops/rasops.h> 69 70 #include <dev/wscons/wsdisplay_vconsvar.h> 71 72 #include "opt_wsemul.h" 73 #include "rasops_glue.h" 74 75 #include "tctrl.h" 76 #if NTCTRL > 0 77 #include <machine/tctrl.h> 78 #include <sparc/dev/tctrlvar.h>/*XXX*/ 79 #endif 80 81 #ifdef PNOZZ_DEBUG 82 #define DPRINTF aprint_normal 83 #else 84 #define DPRINTF while (0) aprint_normal 85 #endif 86 87 struct pnozz_cursor { 88 short pc_enable; /* cursor is enabled */ 89 struct fbcurpos pc_pos; /* position */ 90 struct fbcurpos pc_hot; /* hot-spot */ 91 struct fbcurpos pc_size; /* size of mask & image fields */ 92 uint32_t pc_bits[0x100]; /* space for mask & image bits */ 93 unsigned char red[3], green[3]; 94 unsigned char blue[3]; /* cursor palette */ 95 }; 96 97 /* per-display variables */ 98 struct p9100_softc { 99 device_t sc_dev; /* base device */ 100 struct sbusdev sc_sd; /* sbus device */ 101 struct fbdevice sc_fb; /* frame buffer device */ 102 103 bus_space_tag_t sc_bustag; 104 105 bus_addr_t sc_ctl_paddr; /* phys address description */ 106 bus_size_t sc_ctl_psize; /* for device mmap() */ 107 bus_space_handle_t sc_ctl_memh; /* bus space handle */ 108 109 #if 0 110 bus_addr_t sc_cmd_paddr; /* phys address description */ 111 bus_size_t sc_cmd_psize; /* for device mmap() */ 112 bus_space_handle_t sc_cmd_memh; /* bus space handle */ 113 #endif 114 bus_addr_t sc_fb_paddr; /* phys address description */ 115 bus_size_t sc_fb_psize; /* for device mmap() */ 116 bus_space_handle_t sc_fb_memh; /* bus space handle */ 117 118 volatile uint32_t sc_junk; 119 uint32_t sc_mono_width; /* for setup_mono */ 120 121 uint32_t sc_width; 122 uint32_t sc_height; /* panel width / height */ 123 uint32_t sc_stride; 124 uint32_t sc_depth; 125 int sc_depthshift; /* blitter works on bytes not pixels */ 126 127 union bt_cmap sc_cmap; /* Brooktree color map */ 128 129 struct pnozz_cursor sc_cursor; 130 131 int sc_mode; 132 int sc_video, sc_powerstate; 133 uint32_t sc_bg; 134 volatile uint32_t sc_last_offset; 135 struct vcons_data vd; 136 }; 137 138 139 static struct vcons_screen p9100_console_screen; 140 141 extern const u_char rasops_cmap[768]; 142 143 struct wsscreen_descr p9100_defscreendesc = { 144 "default", 145 0, 0, 146 NULL, 147 8, 16, 148 WSSCREEN_WSCOLORS, 149 }; 150 151 const struct wsscreen_descr *_p9100_scrlist[] = { 152 &p9100_defscreendesc, 153 /* XXX other formats, graphics screen? */ 154 }; 155 156 struct wsscreen_list p9100_screenlist = { 157 sizeof(_p9100_scrlist) / sizeof(struct wsscreen_descr *), _p9100_scrlist 158 }; 159 160 /* autoconfiguration driver */ 161 static int p9100_sbus_match(device_t, cfdata_t, void *); 162 static void p9100_sbus_attach(device_t, device_t, void *); 163 164 static void p9100unblank(device_t); 165 static void p9100_shutdown(void *); 166 167 CFATTACH_DECL_NEW(pnozz, sizeof(struct p9100_softc), 168 p9100_sbus_match, p9100_sbus_attach, NULL, NULL); 169 170 extern struct cfdriver pnozz_cd; 171 172 static dev_type_open(p9100open); 173 static dev_type_ioctl(p9100ioctl); 174 static dev_type_mmap(p9100mmap); 175 176 const struct cdevsw pnozz_cdevsw = { 177 p9100open, nullclose, noread, nowrite, p9100ioctl, 178 nostop, notty, nopoll, p9100mmap, nokqfilter, 179 }; 180 181 /* frame buffer generic driver */ 182 static struct fbdriver p9100fbdriver = { 183 p9100unblank, p9100open, nullclose, p9100ioctl, nopoll, 184 p9100mmap, nokqfilter 185 }; 186 187 static void p9100loadcmap(struct p9100_softc *, int, int); 188 static void p9100_set_video(struct p9100_softc *, int); 189 static int p9100_get_video(struct p9100_softc *); 190 static uint32_t p9100_ctl_read_4(struct p9100_softc *, bus_size_t); 191 static void p9100_ctl_write_4(struct p9100_softc *, bus_size_t, uint32_t); 192 static uint8_t p9100_ramdac_read(struct p9100_softc *, bus_size_t); 193 static void p9100_ramdac_write(struct p9100_softc *, bus_size_t, uint8_t); 194 195 static uint8_t p9100_ramdac_read_ctl(struct p9100_softc *, int); 196 #if NTCTRL > 0 197 static void p9100_ramdac_write_ctl(struct p9100_softc *, int, uint8_t); 198 #endif 199 200 static void p9100_init_engine(struct p9100_softc *); 201 static int p9100_set_depth(struct p9100_softc *, int); 202 203 #if NWSDISPLAY > 0 204 static void p9100_sync(struct p9100_softc *); 205 static void p9100_bitblt(void *, int, int, int, int, int, int, uint32_t); 206 static void p9100_rectfill(void *, int, int, int, int, uint32_t); 207 static void p9100_clearscreen(struct p9100_softc *); 208 209 static void p9100_setup_mono(struct p9100_softc *, int, int, int, int, 210 uint32_t, uint32_t); 211 static void p9100_feed_line(struct p9100_softc *, int, uint8_t *); 212 static void p9100_set_color_reg(struct p9100_softc *, int, int32_t); 213 214 static void p9100_copycols(void *, int, int, int, int); 215 static void p9100_erasecols(void *, int, int, int, long); 216 static void p9100_copyrows(void *, int, int, int); 217 static void p9100_eraserows(void *, int, int, long); 218 /*static int p9100_mapchar(void *, int, u_int *);*/ 219 static void p9100_putchar(void *, int, int, u_int, long); 220 static void p9100_cursor(void *, int, int, int); 221 static int p9100_allocattr(void *, int, int, int, long *); 222 223 /*static void p9100_scroll(void *, void *, int);*/ 224 225 static int p9100_putcmap(struct p9100_softc *, struct wsdisplay_cmap *); 226 static int p9100_getcmap(struct p9100_softc *, struct wsdisplay_cmap *); 227 static int p9100_ioctl(void *, void *, u_long, void *, int, struct lwp *); 228 static paddr_t p9100_mmap(void *, void *, off_t, int); 229 230 /*static int p9100_load_font(void *, void *, struct wsdisplay_font *);*/ 231 232 static void p9100_init_screen(void *, struct vcons_screen *, int, 233 long *); 234 #endif 235 236 static void p9100_init_cursor(struct p9100_softc *); 237 238 static void p9100_set_fbcursor(struct p9100_softc *); 239 static void p9100_setcursorcmap(struct p9100_softc *); 240 static void p9100_loadcursor(struct p9100_softc *); 241 242 #if 0 243 static int p9100_intr(void *); 244 #endif 245 246 /* power management stuff */ 247 static void p9100_power_hook(int, void *); 248 249 #if NTCTRL > 0 250 static void p9100_set_extvga(void *, int); 251 #endif 252 253 #if NWSDISPLAY > 0 254 struct wsdisplay_accessops p9100_accessops = { 255 p9100_ioctl, 256 p9100_mmap, 257 NULL, /* vcons_alloc_screen */ 258 NULL, /* vcons_free_screen */ 259 NULL, /* vcons_show_screen */ 260 NULL, /* load_font */ 261 NULL, /* polls */ 262 NULL, /* scroll */ 263 }; 264 #endif 265 266 #define PNOZZ_LATCH(sc, off) if(sc->sc_last_offset == (off & 0xffffff80)) { \ 267 sc->sc_junk = bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, \ 268 off); \ 269 sc->sc_last_offset = off & 0xffffff80; } 270 271 /* 272 * Match a p9100. 273 */ 274 static int 275 p9100_sbus_match(device_t parent, cfdata_t cf, void *aux) 276 { 277 struct sbus_attach_args *sa = aux; 278 279 if (strcmp("p9100", sa->sa_name) == 0) 280 return 100; 281 return 0; 282 } 283 284 285 /* 286 * Attach a display. We need to notice if it is the console, too. 287 */ 288 static void 289 p9100_sbus_attach(device_t parent, device_t self, void *args) 290 { 291 struct p9100_softc *sc = device_private(self); 292 struct sbus_attach_args *sa = args; 293 struct fbdevice *fb = &sc->sc_fb; 294 int isconsole; 295 int node = sa->sa_node; 296 int i, j; 297 uint8_t ver; 298 299 #if NWSDISPLAY > 0 300 struct wsemuldisplaydev_attach_args aa; 301 struct rasops_info *ri; 302 unsigned long defattr; 303 #endif 304 305 sc->sc_last_offset = 0xffffffff; 306 sc->sc_dev = self; 307 308 /* 309 * When the ROM has mapped in a p9100 display, the address 310 * maps only the video RAM, so in any case we have to map the 311 * registers ourselves. We only need the video RAM if we are 312 * going to print characters via rconsole. 313 */ 314 315 if (sa->sa_npromvaddrs != 0) 316 fb->fb_pixels = (void *)sa->sa_promvaddrs[0]; 317 318 /* Remember cookies for p9100_mmap() */ 319 sc->sc_bustag = sa->sa_bustag; 320 321 sc->sc_ctl_paddr = sbus_bus_addr(sa->sa_bustag, 322 sa->sa_reg[0].oa_space, sa->sa_reg[0].oa_base); 323 sc->sc_ctl_psize = 0x8000;/*(bus_size_t)sa->sa_reg[0].oa_size;*/ 324 325 sc->sc_fb_paddr = sbus_bus_addr(sa->sa_bustag, 326 sa->sa_reg[2].oa_space, sa->sa_reg[2].oa_base); 327 sc->sc_fb_psize = (bus_size_t)sa->sa_reg[2].oa_size; 328 329 if (sbus_bus_map(sc->sc_bustag, 330 sa->sa_reg[0].oa_space, 331 sa->sa_reg[0].oa_base, 332 /* 333 * XXX for some reason the SBus resources don't cover 334 * all registers, so we just map what we need 335 */ 336 0x8000, 337 0, &sc->sc_ctl_memh) != 0) { 338 printf("%s: cannot map control registers\n", 339 self->dv_xname); 340 return; 341 } 342 343 if (fb->fb_pixels == NULL) { 344 if (sbus_bus_map(sc->sc_bustag, 345 sa->sa_reg[2].oa_space, 346 sa->sa_reg[2].oa_base, 347 sc->sc_fb_psize, 348 BUS_SPACE_MAP_LINEAR, &sc->sc_fb_memh) != 0) { 349 printf("%s: cannot map framebuffer\n", 350 self->dv_xname); 351 return; 352 } 353 fb->fb_pixels = (char *)sc->sc_fb_memh; 354 } else { 355 sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels; 356 } 357 sc->sc_width = prom_getpropint(node, "width", 800); 358 sc->sc_height = prom_getpropint(node, "height", 600); 359 sc->sc_depth = prom_getpropint(node, "depth", 8) >> 3; 360 361 sc->sc_stride = prom_getpropint(node, "linebytes", 362 sc->sc_width * sc->sc_depth); 363 364 fb->fb_driver = &p9100fbdriver; 365 fb->fb_device = sc->sc_dev; 366 fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK; 367 #ifdef PNOZZ_EMUL_CG3 368 fb->fb_type.fb_type = FBTYPE_SUN3COLOR; 369 #else 370 fb->fb_type.fb_type = FBTYPE_P9100; 371 #endif 372 fb->fb_pixels = NULL; 373 374 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 375 376 isconsole = fb_is_console(node); 377 #if 0 378 if (!isconsole) { 379 aprint_normal("\n"); 380 aprint_error_dev(self, "fatal error: PROM didn't configure device\n"); 381 return; 382 } 383 #endif 384 385 /* 386 * When the ROM has mapped in a p9100 display, the address 387 * maps only the video RAM, so in any case we have to map the 388 * registers ourselves. We only need the video RAM if we are 389 * going to print characters via rconsole. 390 */ 391 if (sbus_bus_map(sc->sc_bustag, 392 sa->sa_reg[0].oa_space, 393 sa->sa_reg[0].oa_base, 394 /* 395 * XXX for some reason the SBus resources don't cover 396 * all registers, so we just map what we need 397 */ 398 /*sc->sc_ctl_psize*/ 0x8000, 399 /*BUS_SPACE_MAP_LINEAR*/0, &sc->sc_ctl_memh) != 0) { 400 aprint_error_dev(self, "cannot map control registers\n"); 401 return; 402 } 403 404 if (sa->sa_npromvaddrs != 0) 405 fb->fb_pixels = (void *)sa->sa_promvaddrs[0]; 406 407 if (fb->fb_pixels == NULL) { 408 if (sbus_bus_map(sc->sc_bustag, 409 sa->sa_reg[2].oa_space, 410 sa->sa_reg[2].oa_base, 411 sc->sc_fb_psize, 412 BUS_SPACE_MAP_LINEAR, &sc->sc_fb_memh) != 0) { 413 aprint_error_dev(self, "cannot map framebuffer\n"); 414 return; 415 } 416 fb->fb_pixels = (char *)sc->sc_fb_memh; 417 } else { 418 sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels; 419 } 420 421 #if 0 422 /* 423 * we set our own depth and OBP won't hand us anything else than 8 bit 424 * anyway 425 */ 426 i = p9100_ctl_read_4(sc, 0x0004); 427 switch ((i >> 26) & 7) { 428 case 5: 429 fb->fb_type.fb_depth = 32; 430 sc->sc_depth = 4; 431 sc->sc_depthshift = 2; 432 break; 433 case 7: 434 fb->fb_type.fb_depth = 24; 435 /* bitch and moan */ 436 break; 437 case 3: 438 fb->fb_type.fb_depth = 16; 439 sc->sc_depth = 2; 440 sc->sc_depthshift = 1; 441 break; 442 case 2: 443 fb->fb_type.fb_depth = 8; 444 sc->sc_depth = 1; 445 sc->sc_depthshift = 0; 446 break; 447 default: { 448 panic("pnozz: can't determine screen depth (0x%02x)", i); 449 } 450 } 451 #else 452 fb->fb_type.fb_depth = 8; 453 sc->sc_depth = 1; 454 sc->sc_depthshift = 0; 455 #endif 456 457 /* check the RAMDAC */ 458 ver = p9100_ramdac_read_ctl(sc, DAC_VERSION); 459 460 p9100_init_engine(sc); 461 p9100_set_depth(sc, 8); 462 463 fb_setsize_obp(fb, fb->fb_type.fb_depth, sc->sc_width, sc->sc_height, 464 node); 465 466 sbus_establish(&sc->sc_sd, sc->sc_dev); 467 #if 0 468 bus_intr_establish(sc->sc_bustag, sa->sa_pri, IPL_BIO, 469 p9100_intr, sc); 470 #endif 471 472 fb->fb_type.fb_cmsize = prom_getpropint(node, "cmsize", 256); 473 if ((1 << fb->fb_type.fb_depth) != fb->fb_type.fb_cmsize) 474 printf(", %d entry colormap", fb->fb_type.fb_cmsize); 475 476 /* Initialize the default color map. */ 477 j = 0; 478 for (i = 0; i < 256; i++) { 479 sc->sc_cmap.cm_map[i][0] = rasops_cmap[j]; 480 j++; 481 sc->sc_cmap.cm_map[i][1] = rasops_cmap[j]; 482 j++; 483 sc->sc_cmap.cm_map[i][2] = rasops_cmap[j]; 484 j++; 485 } 486 p9100loadcmap(sc, 0, 256); 487 488 /* make sure we are not blanked */ 489 if (isconsole) 490 p9100_set_video(sc, 1); 491 492 if (shutdownhook_establish(p9100_shutdown, sc) == NULL) { 493 panic("%s: could not establish shutdown hook", 494 device_xname(sc->sc_dev)); 495 } 496 497 if (isconsole) { 498 printf(" (console)\n"); 499 #ifdef RASTERCONSOLE 500 /*p9100loadcmap(sc, 255, 1);*/ 501 fbrcons_init(fb); 502 #endif 503 } else 504 printf("\n"); 505 506 #if NWSDISPLAY > 0 507 wsfont_init(); 508 509 vcons_init(&sc->vd, sc, &p9100_defscreendesc, &p9100_accessops); 510 sc->vd.init_screen = p9100_init_screen; 511 512 vcons_init_screen(&sc->vd, &p9100_console_screen, 1, &defattr); 513 p9100_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 514 515 sc->sc_bg = (defattr >> 16) & 0xff; 516 p9100_clearscreen(sc); 517 518 ri = &p9100_console_screen.scr_ri; 519 520 p9100_defscreendesc.nrows = ri->ri_rows; 521 p9100_defscreendesc.ncols = ri->ri_cols; 522 p9100_defscreendesc.textops = &ri->ri_ops; 523 p9100_defscreendesc.capabilities = ri->ri_caps; 524 525 if(isconsole) { 526 wsdisplay_cnattach(&p9100_defscreendesc, ri, 0, 0, defattr); 527 } 528 529 aa.console = isconsole; 530 aa.scrdata = &p9100_screenlist; 531 aa.accessops = &p9100_accessops; 532 aa.accesscookie = &sc->vd; 533 534 config_found(self, &aa, wsemuldisplaydevprint); 535 #endif 536 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 537 printf(": rev %d / %x, %dx%d, depth %d mem %x", 538 (i & 7), ver, fb->fb_type.fb_width, fb->fb_type.fb_height, 539 fb->fb_type.fb_depth, (unsigned int)sc->sc_fb_psize); 540 /* cursor sprite handling */ 541 p9100_init_cursor(sc); 542 543 /* attach the fb */ 544 fb_attach(fb, isconsole); 545 546 /* register with power management */ 547 sc->sc_video = 1; 548 sc->sc_powerstate = PWR_RESUME; 549 powerhook_establish(device_xname(sc->sc_dev), p9100_power_hook, sc); 550 551 #if NTCTRL > 0 552 /* register callback for external monitor status change */ 553 tadpole_register_callback(p9100_set_extvga, sc); 554 #endif 555 } 556 557 static void 558 p9100_shutdown(void *arg) 559 { 560 struct p9100_softc *sc = arg; 561 562 #ifdef RASTERCONSOLE 563 sc->sc_cmap.cm_map[0][0] = 0xff; 564 sc->sc_cmap.cm_map[0][1] = 0xff; 565 sc->sc_cmap.cm_map[0][2] = 0xff; 566 sc->sc_cmap.cm_map[1][0] = 0; 567 sc->sc_cmap.cm_map[1][1] = 0; 568 sc->sc_cmap.cm_map[1][2] = 0x00; 569 p9100loadcmap(sc, 0, 2); 570 sc->sc_cmap.cm_map[255][0] = 0; 571 sc->sc_cmap.cm_map[255][1] = 0; 572 sc->sc_cmap.cm_map[255][2] = 0; 573 p9100loadcmap(sc, 255, 1); 574 #endif 575 p9100_set_video(sc, 1); 576 } 577 578 int 579 p9100open(dev_t dev, int flags, int mode, struct lwp *l) 580 { 581 int unit = minor(dev); 582 583 if (device_lookup(&pnozz_cd, unit) == NULL) 584 return (ENXIO); 585 return (0); 586 } 587 588 int 589 p9100ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 590 { 591 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 592 struct fbgattr *fba; 593 int error, v; 594 595 switch (cmd) { 596 597 case FBIOGTYPE: 598 *(struct fbtype *)data = sc->sc_fb.fb_type; 599 break; 600 601 case FBIOGATTR: 602 fba = (struct fbgattr *)data; 603 fba->real_type = sc->sc_fb.fb_type.fb_type; 604 fba->owner = 0; /* XXX ??? */ 605 fba->fbtype = sc->sc_fb.fb_type; 606 fba->sattr.flags = 0; 607 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 608 fba->sattr.dev_specific[0] = -1; 609 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 610 fba->emu_types[1] = -1; 611 break; 612 613 case FBIOGETCMAP: 614 #define p ((struct fbcmap *)data) 615 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 616 617 case FBIOPUTCMAP: 618 /* copy to software map */ 619 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 620 if (error) 621 return (error); 622 /* now blast them into the chip */ 623 /* XXX should use retrace interrupt */ 624 p9100loadcmap(sc, p->index, p->count); 625 #undef p 626 break; 627 628 case FBIOGVIDEO: 629 *(int *)data = p9100_get_video(sc); 630 break; 631 632 case FBIOSVIDEO: 633 p9100_set_video(sc, *(int *)data); 634 break; 635 636 /* these are for both FBIOSCURSOR and FBIOGCURSOR */ 637 #define p ((struct fbcursor *)data) 638 #define pc (&sc->sc_cursor) 639 640 case FBIOGCURSOR: 641 p->set = FB_CUR_SETALL; /* close enough, anyway */ 642 p->enable = pc->pc_enable; 643 p->pos = pc->pc_pos; 644 p->hot = pc->pc_hot; 645 p->size = pc->pc_size; 646 647 if (p->image != NULL) { 648 error = copyout(pc->pc_bits, p->image, 0x200); 649 if (error) 650 return error; 651 error = copyout(&pc->pc_bits[0x80], p->mask, 0x200); 652 if (error) 653 return error; 654 } 655 656 p->cmap.index = 0; 657 p->cmap.count = 3; 658 if (p->cmap.red != NULL) { 659 copyout(pc->red, p->cmap.red, 3); 660 copyout(pc->green, p->cmap.green, 3); 661 copyout(pc->blue, p->cmap.blue, 3); 662 } 663 break; 664 665 case FBIOSCURSOR: 666 { 667 int count; 668 uint32_t image[0x80], mask[0x80]; 669 uint8_t red[3], green[3], blue[3]; 670 671 v = p->set; 672 if (v & FB_CUR_SETCMAP) { 673 error = copyin(p->cmap.red, red, 3); 674 error |= copyin(p->cmap.green, green, 3); 675 error |= copyin(p->cmap.blue, blue, 3); 676 if (error) 677 return error; 678 } 679 if (v & FB_CUR_SETSHAPE) { 680 if (p->size.x > 64 || p->size.y > 64) 681 return EINVAL; 682 memset(&mask, 0, 0x200); 683 memset(&image, 0, 0x200); 684 count = p->size.y * 8; 685 error = copyin(p->image, image, count); 686 if (error) 687 return error; 688 error = copyin(p->mask, mask, count); 689 if (error) 690 return error; 691 } 692 693 /* parameters are OK; do it */ 694 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 695 if (v & FB_CUR_SETCUR) 696 pc->pc_enable = p->enable; 697 if (v & FB_CUR_SETPOS) 698 pc->pc_pos = p->pos; 699 if (v & FB_CUR_SETHOT) 700 pc->pc_hot = p->hot; 701 p9100_set_fbcursor(sc); 702 } 703 704 if (v & FB_CUR_SETCMAP) { 705 memcpy(pc->red, red, 3); 706 memcpy(pc->green, green, 3); 707 memcpy(pc->blue, blue, 3); 708 p9100_setcursorcmap(sc); 709 } 710 711 if (v & FB_CUR_SETSHAPE) { 712 memcpy(pc->pc_bits, image, 0x200); 713 memcpy(&pc->pc_bits[0x80], mask, 0x200); 714 p9100_loadcursor(sc); 715 } 716 } 717 break; 718 719 #undef p 720 #undef cc 721 722 case FBIOGCURPOS: 723 *(struct fbcurpos *)data = sc->sc_cursor.pc_pos; 724 break; 725 726 case FBIOSCURPOS: 727 sc->sc_cursor.pc_pos = *(struct fbcurpos *)data; 728 p9100_set_fbcursor(sc); 729 break; 730 731 case FBIOGCURMAX: 732 /* max cursor size is 64x64 */ 733 ((struct fbcurpos *)data)->x = 64; 734 ((struct fbcurpos *)data)->y = 64; 735 break; 736 737 default: 738 return (ENOTTY); 739 } 740 return (0); 741 } 742 743 static uint32_t 744 p9100_ctl_read_4(struct p9100_softc *sc, bus_size_t off) 745 { 746 747 PNOZZ_LATCH(sc, off); 748 return bus_space_read_4(sc->sc_bustag, sc->sc_ctl_memh, off); 749 } 750 751 static void 752 p9100_ctl_write_4(struct p9100_softc *sc, bus_size_t off, uint32_t v) 753 { 754 755 PNOZZ_LATCH(sc, off); 756 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, v); 757 } 758 759 /* initialize the drawing engine */ 760 static void 761 p9100_init_engine(struct p9100_softc *sc) 762 { 763 /* reset clipping rectangles */ 764 uint32_t rmax = ((sc->sc_width & 0x3fff) << 16) | 765 (sc->sc_height & 0x3fff); 766 767 sc->sc_last_offset = 0xffffffff; 768 769 p9100_ctl_write_4(sc, WINDOW_OFFSET, 0); 770 p9100_ctl_write_4(sc, WINDOW_MIN, 0); 771 p9100_ctl_write_4(sc, WINDOW_MAX, rmax); 772 p9100_ctl_write_4(sc, BYTE_CLIP_MIN, 0); 773 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, rmax); 774 p9100_ctl_write_4(sc, DRAW_MODE, 0); 775 p9100_ctl_write_4(sc, PLANE_MASK, 0xffffffff); 776 p9100_ctl_write_4(sc, PATTERN0, 0xffffffff); 777 p9100_ctl_write_4(sc, PATTERN1, 0xffffffff); 778 p9100_ctl_write_4(sc, PATTERN2, 0xffffffff); 779 p9100_ctl_write_4(sc, PATTERN3, 0xffffffff); 780 781 } 782 783 /* we only need these in the wsdisplay case */ 784 #if NWSDISPLAY > 0 785 786 /* wait until the engine is idle */ 787 static void 788 p9100_sync(struct p9100_softc *sc) 789 { 790 while((p9100_ctl_read_4(sc, ENGINE_STATUS) & 791 (ENGINE_BUSY | BLITTER_BUSY)) != 0); 792 } 793 794 static void 795 p9100_set_color_reg(struct p9100_softc *sc, int reg, int32_t col) 796 { 797 uint32_t out; 798 799 switch(sc->sc_depth) 800 { 801 case 1: /* 8 bit */ 802 out = (col << 8) | col; 803 out |= out << 16; 804 break; 805 case 2: /* 16 bit */ 806 out = col | (col << 16); 807 break; 808 default: 809 out = col; 810 } 811 p9100_ctl_write_4(sc, reg, out); 812 } 813 814 /* screen-to-screen blit */ 815 static void 816 p9100_bitblt(void *cookie, int xs, int ys, int xd, int yd, int wi, 817 int he, uint32_t rop) 818 { 819 struct p9100_softc *sc = cookie; 820 uint32_t src, dst, srcw, dstw; 821 822 sc->sc_last_offset = 0xffffffff; 823 824 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 825 dst = ((xd & 0x3fff) << 16) | (yd & 0x3fff); 826 srcw = (((xs + wi - 1) & 0x3fff) << 16) | ((ys + he - 1) & 0x3fff); 827 dstw = (((xd + wi - 1) & 0x3fff) << 16) | ((yd + he - 1) & 0x3fff); 828 829 p9100_sync(sc); 830 831 p9100_ctl_write_4(sc, RASTER_OP, rop); 832 833 p9100_ctl_write_4(sc, ABS_XY0, src << sc->sc_depthshift); 834 p9100_ctl_write_4(sc, ABS_XY1, srcw << sc->sc_depthshift); 835 p9100_ctl_write_4(sc, ABS_XY2, dst << sc->sc_depthshift); 836 p9100_ctl_write_4(sc, ABS_XY3, dstw << sc->sc_depthshift); 837 838 sc->sc_junk = p9100_ctl_read_4(sc, COMMAND_BLIT); 839 } 840 841 /* solid rectangle fill */ 842 static void 843 p9100_rectfill(void *cookie, int xs, int ys, int wi, int he, uint32_t col) 844 { 845 struct p9100_softc *sc = cookie; 846 uint32_t src, srcw; 847 848 sc->sc_last_offset = 0xffffffff; 849 850 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 851 srcw = (((xs + wi) & 0x3fff) << 16) | ((ys + he) & 0x3fff); 852 p9100_sync(sc); 853 p9100_set_color_reg(sc, FOREGROUND_COLOR, col); 854 p9100_set_color_reg(sc, BACKGROUND_COLOR, col); 855 p9100_ctl_write_4(sc, RASTER_OP, ROP_PAT); 856 p9100_ctl_write_4(sc, COORD_INDEX, 0); 857 p9100_ctl_write_4(sc, RECT_RTW_XY, src); 858 p9100_ctl_write_4(sc, RECT_RTW_XY, srcw); 859 sc->sc_junk = p9100_ctl_read_4(sc, COMMAND_QUAD); 860 } 861 862 /* setup for mono->colour expansion */ 863 static void 864 p9100_setup_mono(struct p9100_softc *sc, int x, int y, int wi, int he, 865 uint32_t fg, uint32_t bg) 866 { 867 868 sc->sc_last_offset = 0xffffffff; 869 870 p9100_sync(sc); 871 /* 872 * this doesn't make any sense to me either, but for some reason the 873 * chip applies the foreground colour to 0 pixels 874 */ 875 876 p9100_set_color_reg(sc,FOREGROUND_COLOR,bg); 877 p9100_set_color_reg(sc,BACKGROUND_COLOR,fg); 878 879 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 880 p9100_ctl_write_4(sc, ABS_X0, x); 881 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 882 p9100_ctl_write_4(sc, ABS_X2, (x + wi)); 883 p9100_ctl_write_4(sc, ABS_Y3, he); 884 /* now feed the data into the chip */ 885 sc->sc_mono_width = wi; 886 } 887 888 /* write monochrome data to the screen through the blitter */ 889 static void 890 p9100_feed_line(struct p9100_softc *sc, int count, uint8_t *data) 891 { 892 int i; 893 uint32_t latch = 0, bork; 894 int shift = 24; 895 int to_go = sc->sc_mono_width; 896 897 PNOZZ_LATCH(sc, PIXEL_1); 898 899 for (i = 0; i < count; i++) { 900 bork = data[i]; 901 latch |= (bork << shift); 902 if (shift == 0) { 903 /* check how many bits are significant */ 904 if (to_go > 31) { 905 bus_space_write_4(sc->sc_bustag, 906 sc->sc_ctl_memh, 907 (PIXEL_1 + (31 << 2)), latch); 908 to_go -= 32; 909 } else 910 { 911 bus_space_write_4(sc->sc_bustag, 912 sc->sc_ctl_memh, 913 (PIXEL_1 + ((to_go - 1) << 2)), latch); 914 to_go = 0; 915 } 916 latch = 0; 917 shift = 24; 918 } else 919 shift -= 8; 920 } 921 if (shift != 24) 922 p9100_ctl_write_4(sc, (PIXEL_1 + ((to_go - 1) << 2)), latch); 923 } 924 925 static void 926 p9100_clearscreen(struct p9100_softc *sc) 927 { 928 929 p9100_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, sc->sc_bg); 930 } 931 #endif /* NWSDISPLAY > 0 */ 932 933 static uint8_t 934 p9100_ramdac_read(struct p9100_softc *sc, bus_size_t off) 935 { 936 937 sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG); 938 return ((bus_space_read_4(sc->sc_bustag, 939 sc->sc_ctl_memh, off) >> 16) & 0xff); 940 } 941 942 static void 943 p9100_ramdac_write(struct p9100_softc *sc, bus_size_t off, uint8_t v) 944 { 945 946 sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG); 947 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, 948 ((uint32_t)v) << 16); 949 } 950 951 static uint8_t 952 p9100_ramdac_read_ctl(struct p9100_softc *sc, int off) 953 { 954 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 955 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 956 return p9100_ramdac_read(sc, DAC_INDX_DATA); 957 } 958 959 #if NTCTRL > 0 960 static void 961 p9100_ramdac_write_ctl(struct p9100_softc *sc, int off, uint8_t val) 962 { 963 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 964 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 965 p9100_ramdac_write(sc, DAC_INDX_DATA, val); 966 } 967 #endif /* NTCTRL > 0 */ 968 969 /* 970 * Undo the effect of an FBIOSVIDEO that turns the video off. 971 */ 972 static void 973 p9100unblank(device_t dev) 974 { 975 struct p9100_softc *sc = device_private(dev); 976 977 p9100_set_video((struct p9100_softc *)dev, 1); 978 979 /* 980 * Check if we're in terminal mode. If not force the console screen 981 * to front so we can see ddb, panic messages and so on 982 */ 983 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) { 984 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 985 if (sc->vd.active != &p9100_console_screen) { 986 SCREEN_INVISIBLE(sc->vd.active); 987 sc->vd.active = &p9100_console_screen; 988 SCREEN_VISIBLE(&p9100_console_screen); 989 } 990 p9100_init_engine(sc); 991 p9100_set_depth(sc, 8); 992 vcons_redraw_screen(&p9100_console_screen); 993 } 994 } 995 996 static void 997 p9100_set_video(struct p9100_softc *sc, int enable) 998 { 999 u_int32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1); 1000 1001 if (enable) 1002 v |= VIDEO_ENABLED; 1003 else 1004 v &= ~VIDEO_ENABLED; 1005 p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v); 1006 #if NTCTRL > 0 1007 /* Turn On/Off the TFT if we know how. 1008 */ 1009 tadpole_set_video(enable); 1010 #endif 1011 } 1012 1013 static int 1014 p9100_get_video(struct p9100_softc *sc) 1015 { 1016 return (p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1) & VIDEO_ENABLED) != 0; 1017 } 1018 1019 static void 1020 p9100_power_hook(int why, void *cookie) 1021 { 1022 struct p9100_softc *sc = cookie; 1023 1024 if (why == sc->sc_powerstate) 1025 return; 1026 1027 switch(why) 1028 { 1029 case PWR_SUSPEND: 1030 case PWR_STANDBY: 1031 sc->sc_video = p9100_get_video(sc); 1032 p9100_set_video(sc, 0); 1033 sc->sc_powerstate = why; 1034 break; 1035 case PWR_RESUME: 1036 p9100_set_video(sc, sc->sc_video); 1037 sc->sc_powerstate = why; 1038 break; 1039 } 1040 } 1041 1042 /* 1043 * Load a subset of the current (new) colormap into the IBM RAMDAC. 1044 */ 1045 static void 1046 p9100loadcmap(struct p9100_softc *sc, int start, int ncolors) 1047 { 1048 int i; 1049 sc->sc_last_offset = 0xffffffff; 1050 1051 p9100_ramdac_write(sc, DAC_CMAP_WRIDX, start); 1052 1053 for (i=0;i<ncolors;i++) { 1054 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1055 sc->sc_cmap.cm_map[i + start][0]); 1056 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1057 sc->sc_cmap.cm_map[i + start][1]); 1058 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1059 sc->sc_cmap.cm_map[i + start][2]); 1060 } 1061 } 1062 1063 /* 1064 * Return the address that would map the given device at the given 1065 * offset, allowing for the given protection, or return -1 for error. 1066 */ 1067 static paddr_t 1068 p9100mmap(dev_t dev, off_t off, int prot) 1069 { 1070 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 1071 1072 if (off & PGOFSET) 1073 panic("p9100mmap"); 1074 if (off < 0) 1075 return (-1); 1076 1077 #ifdef PNOZZ_EMUL_CG3 1078 #define CG3_MMAP_OFFSET 0x04000000 1079 /* Make Xsun think we are a CG3 (SUN3COLOR) 1080 */ 1081 if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) { 1082 off -= CG3_MMAP_OFFSET; 1083 return (bus_space_mmap(sc->sc_bustag, 1084 sc->sc_fb_paddr, 1085 off, 1086 prot, 1087 BUS_SPACE_MAP_LINEAR)); 1088 } 1089 #endif 1090 1091 if (off >= sc->sc_fb_psize + sc->sc_ctl_psize/* + sc->sc_cmd_psize*/) 1092 return (-1); 1093 1094 if (off < sc->sc_fb_psize) { 1095 return (bus_space_mmap(sc->sc_bustag, 1096 sc->sc_fb_paddr, 1097 off, 1098 prot, 1099 BUS_SPACE_MAP_LINEAR)); 1100 } 1101 1102 off -= sc->sc_fb_psize; 1103 if (off < sc->sc_ctl_psize) { 1104 return (bus_space_mmap(sc->sc_bustag, 1105 sc->sc_ctl_paddr, 1106 off, 1107 prot, 1108 BUS_SPACE_MAP_LINEAR)); 1109 } 1110 #if 0 1111 off -= sc->sc_ctl_psize; 1112 1113 return (bus_space_mmap(sc->sc_bustag, 1114 sc->sc_cmd_paddr, 1115 off, 1116 prot, 1117 BUS_SPACE_MAP_LINEAR)); 1118 #endif 1119 return EINVAL; 1120 } 1121 1122 /* wscons stuff */ 1123 #if NWSDISPLAY > 0 1124 1125 static void 1126 p9100_cursor(void *cookie, int on, int row, int col) 1127 { 1128 struct rasops_info *ri = cookie; 1129 struct vcons_screen *scr = ri->ri_hw; 1130 struct p9100_softc *sc = scr->scr_cookie; 1131 int x, y, wi,he; 1132 1133 wi = ri->ri_font->fontwidth; 1134 he = ri->ri_font->fontheight; 1135 1136 if (ri->ri_flg & RI_CURSOR) { 1137 x = ri->ri_ccol * wi + ri->ri_xorigin; 1138 y = ri->ri_crow * he + ri->ri_yorigin; 1139 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1140 ri->ri_flg &= ~RI_CURSOR; 1141 } 1142 1143 ri->ri_crow = row; 1144 ri->ri_ccol = col; 1145 1146 if (on) 1147 { 1148 x = ri->ri_ccol * wi + ri->ri_xorigin; 1149 y = ri->ri_crow * he + ri->ri_yorigin; 1150 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1151 ri->ri_flg |= RI_CURSOR; 1152 } 1153 } 1154 1155 #if 0 1156 static int 1157 p9100_mapchar(void *cookie, int uni, u_int *index) 1158 { 1159 return 0; 1160 } 1161 #endif 1162 1163 static void 1164 p9100_putchar(void *cookie, int row, int col, u_int c, long attr) 1165 { 1166 struct rasops_info *ri = cookie; 1167 struct vcons_screen *scr = ri->ri_hw; 1168 struct p9100_softc *sc = scr->scr_cookie; 1169 1170 int fg, bg, uc, i; 1171 uint8_t *data; 1172 int x, y, wi,he; 1173 1174 wi = ri->ri_font->fontwidth; 1175 he = ri->ri_font->fontheight; 1176 1177 if (!CHAR_IN_FONT(c, ri->ri_font)) 1178 return; 1179 1180 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xff]; 1181 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xff]; 1182 x = ri->ri_xorigin + col * wi; 1183 y = ri->ri_yorigin + row * he; 1184 1185 if (c == 0x20) { 1186 p9100_rectfill(sc, x, y, wi, he, bg); 1187 } else { 1188 uc = c-ri->ri_font->firstchar; 1189 data = (uint8_t *)ri->ri_font->data + uc * 1190 ri->ri_fontscale; 1191 1192 p9100_setup_mono(sc, x, y, wi, 1, fg, bg); 1193 for (i = 0; i < he; i++) { 1194 p9100_feed_line(sc, ri->ri_font->stride, 1195 data); 1196 data += ri->ri_font->stride; 1197 } 1198 } 1199 } 1200 1201 /* 1202 * wsdisplay_accessops 1203 */ 1204 1205 int 1206 p9100_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 1207 struct lwp *l) 1208 { 1209 struct vcons_data *vd = v; 1210 struct p9100_softc *sc = vd->cookie; 1211 struct wsdisplay_fbinfo *wdf; 1212 struct vcons_screen *ms = vd->active; 1213 1214 switch (cmd) { 1215 case WSDISPLAYIO_GTYPE: 1216 *(u_int *)data = WSDISPLAY_TYPE_SB_P9100; 1217 return 0; 1218 1219 case FBIOGVIDEO: 1220 case WSDISPLAYIO_GVIDEO: 1221 *(int *)data = p9100_get_video(sc); 1222 return 0; 1223 1224 case WSDISPLAYIO_SVIDEO: 1225 case FBIOSVIDEO: 1226 p9100_set_video(sc, *(int *)data); 1227 return 0; 1228 1229 case WSDISPLAYIO_GINFO: 1230 wdf = (void *)data; 1231 wdf->height = ms->scr_ri.ri_height; 1232 wdf->width = ms->scr_ri.ri_width; 1233 wdf->depth = ms->scr_ri.ri_depth; 1234 wdf->cmsize = 256; 1235 return 0; 1236 1237 case WSDISPLAYIO_GETCMAP: 1238 return p9100_getcmap(sc, (struct wsdisplay_cmap *)data); 1239 1240 case WSDISPLAYIO_PUTCMAP: 1241 return p9100_putcmap(sc, (struct wsdisplay_cmap *)data); 1242 1243 case WSDISPLAYIO_SMODE: 1244 { 1245 int new_mode = *(int*)data; 1246 if (new_mode != sc->sc_mode) 1247 { 1248 sc->sc_mode = new_mode; 1249 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1250 { 1251 p9100_init_engine(sc); 1252 p9100_set_depth(sc, 8); 1253 p9100loadcmap(sc, 0, 256); 1254 p9100_clearscreen(sc); 1255 vcons_redraw_screen(ms); 1256 } 1257 } 1258 } 1259 } 1260 return EPASSTHROUGH; 1261 } 1262 1263 static paddr_t 1264 p9100_mmap(void *v, void *vs, off_t offset, int prot) 1265 { 1266 struct vcons_data *vd = v; 1267 struct p9100_softc *sc = vd->cookie; 1268 paddr_t pa; 1269 1270 /* 'regular' framebuffer mmap()ing */ 1271 if (offset < sc->sc_fb_psize) { 1272 pa = bus_space_mmap(sc->sc_bustag, sc->sc_fb_paddr + offset, 0, 1273 prot, BUS_SPACE_MAP_LINEAR); 1274 return pa; 1275 } 1276 1277 if ((offset >= sc->sc_fb_paddr) && (offset < (sc->sc_fb_paddr + 1278 sc->sc_fb_psize))) { 1279 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1280 BUS_SPACE_MAP_LINEAR); 1281 return pa; 1282 } 1283 1284 if ((offset >= sc->sc_ctl_paddr) && (offset < (sc->sc_ctl_paddr + 1285 sc->sc_ctl_psize))) { 1286 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1287 BUS_SPACE_MAP_LINEAR); 1288 return pa; 1289 } 1290 1291 return -1; 1292 } 1293 1294 static void 1295 p9100_init_screen(void *cookie, struct vcons_screen *scr, 1296 int existing, long *defattr) 1297 { 1298 struct p9100_softc *sc = cookie; 1299 struct rasops_info *ri = &scr->scr_ri; 1300 1301 ri->ri_depth = sc->sc_depth << 3; 1302 ri->ri_width = sc->sc_width; 1303 ri->ri_height = sc->sc_height; 1304 ri->ri_stride = sc->sc_stride; 1305 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 1306 1307 ri->ri_bits = bus_space_vaddr(sc->sc_bustag, sc->sc_fb_memh); 1308 1309 DPRINTF("addr: %08lx\n",(ulong)ri->ri_bits); 1310 1311 rasops_init(ri, sc->sc_height/8, sc->sc_width/8); 1312 ri->ri_caps = WSSCREEN_WSCOLORS; 1313 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 1314 sc->sc_width / ri->ri_font->fontwidth); 1315 1316 /* enable acceleration */ 1317 ri->ri_ops.cursor = p9100_cursor; 1318 ri->ri_ops.copyrows = p9100_copyrows; 1319 ri->ri_ops.eraserows = p9100_eraserows; 1320 ri->ri_ops.copycols = p9100_copycols; 1321 ri->ri_ops.erasecols = p9100_erasecols; 1322 ri->ri_ops.putchar = p9100_putchar; 1323 ri->ri_ops.allocattr = p9100_allocattr; 1324 } 1325 1326 static int 1327 p9100_putcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1328 { 1329 u_int index = cm->index; 1330 u_int count = cm->count; 1331 int i, error; 1332 u_char rbuf[256], gbuf[256], bbuf[256]; 1333 u_char *r, *g, *b; 1334 1335 if (cm->index >= 256 || cm->count > 256 || 1336 (cm->index + cm->count) > 256) 1337 return EINVAL; 1338 error = copyin(cm->red, &rbuf[index], count); 1339 if (error) 1340 return error; 1341 error = copyin(cm->green, &gbuf[index], count); 1342 if (error) 1343 return error; 1344 error = copyin(cm->blue, &bbuf[index], count); 1345 if (error) 1346 return error; 1347 1348 r = &rbuf[index]; 1349 g = &gbuf[index]; 1350 b = &bbuf[index]; 1351 1352 for (i = 0; i < count; i++) { 1353 sc->sc_cmap.cm_map[index][0] = *r; 1354 sc->sc_cmap.cm_map[index][1] = *g; 1355 sc->sc_cmap.cm_map[index][2] = *b; 1356 index++; 1357 r++, g++, b++; 1358 } 1359 p9100loadcmap(sc, 0, 256); 1360 return 0; 1361 } 1362 1363 static int 1364 p9100_getcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1365 { 1366 u_int index = cm->index; 1367 u_int count = cm->count; 1368 int error, i; 1369 uint8_t red[256], green[256], blue[256]; 1370 1371 if (index >= 255 || count > 256 || index + count > 256) 1372 return EINVAL; 1373 1374 i = index; 1375 while (i < (index + count)) { 1376 red[i] = sc->sc_cmap.cm_map[i][0]; 1377 green[i] = sc->sc_cmap.cm_map[i][1]; 1378 blue[i] = sc->sc_cmap.cm_map[i][2]; 1379 i++; 1380 } 1381 error = copyout(&red[index], cm->red, count); 1382 if (error) 1383 return error; 1384 error = copyout(&green[index], cm->green, count); 1385 if (error) 1386 return error; 1387 error = copyout(&blue[index], cm->blue, count); 1388 if (error) 1389 return error; 1390 1391 return 0; 1392 } 1393 1394 static void 1395 p9100_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1396 { 1397 struct rasops_info *ri = cookie; 1398 struct vcons_screen *scr = ri->ri_hw; 1399 int32_t xs, xd, y, width, height; 1400 1401 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1402 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1403 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1404 width = ri->ri_font->fontwidth * ncols; 1405 height = ri->ri_font->fontheight; 1406 p9100_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, ROP_SRC); 1407 } 1408 1409 static void 1410 p9100_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1411 { 1412 struct rasops_info *ri = cookie; 1413 struct vcons_screen *scr = ri->ri_hw; 1414 int32_t x, y, width, height, bg; 1415 1416 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1417 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1418 width = ri->ri_font->fontwidth * ncols; 1419 height = ri->ri_font->fontheight; 1420 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1421 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1422 } 1423 1424 static void 1425 p9100_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1426 { 1427 struct rasops_info *ri = cookie; 1428 struct vcons_screen *scr = ri->ri_hw; 1429 int32_t x, ys, yd, width, height; 1430 1431 x = ri->ri_xorigin; 1432 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1433 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1434 width = ri->ri_emuwidth; 1435 height = ri->ri_font->fontheight * nrows; 1436 p9100_bitblt(scr->scr_cookie, x, ys, x, yd, width, height, ROP_SRC); 1437 } 1438 1439 static void 1440 p9100_eraserows(void *cookie, int row, int nrows, long fillattr) 1441 { 1442 struct rasops_info *ri = cookie; 1443 struct vcons_screen *scr = ri->ri_hw; 1444 int32_t x, y, width, height, bg; 1445 1446 if ((row == 0) && (nrows == ri->ri_rows)) { 1447 x = y = 0; 1448 width = ri->ri_width; 1449 height = ri->ri_height; 1450 } else { 1451 x = ri->ri_xorigin; 1452 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1453 width = ri->ri_emuwidth; 1454 height = ri->ri_font->fontheight * nrows; 1455 } 1456 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1457 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1458 } 1459 1460 1461 static int 1462 p9100_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 1463 { 1464 if ((fg == 0) && (bg == 0)) 1465 { 1466 fg = WS_DEFAULT_FG; 1467 bg = WS_DEFAULT_BG; 1468 } 1469 1470 *attrp = (fg & 0xff) << 24 | (bg & 0xff) << 16 | (flags & 0xff); 1471 1472 if (flags & WSATTR_REVERSE) { 1473 *attrp = (bg & 0xff) << 24 | (fg & 0xff) << 16 | 1474 (flags & 0xff) << 8; 1475 } else 1476 *attrp = (fg & 0xff) << 24 | (bg & 0xff) << 16 | 1477 (flags & 0xff) << 8; 1478 1479 return 0; 1480 } 1481 1482 #if 0 1483 static int 1484 p9100_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1485 { 1486 1487 return 0; 1488 } 1489 #endif 1490 1491 #endif /* NWSDISPLAY > 0 */ 1492 1493 #if 0 1494 static int 1495 p9100_intr(void *arg) 1496 { 1497 /*p9100_softc *sc=arg;*/ 1498 DPRINTF("."); 1499 return 1; 1500 } 1501 #endif 1502 1503 static void 1504 p9100_init_cursor(struct p9100_softc *sc) 1505 { 1506 1507 memset(&sc->sc_cursor, 0, sizeof(struct pnozz_cursor)); 1508 sc->sc_cursor.pc_size.x = 64; 1509 sc->sc_cursor.pc_size.y = 64; 1510 1511 } 1512 1513 static void 1514 p9100_set_fbcursor(struct p9100_softc *sc) 1515 { 1516 #ifdef PNOZZ_PARANOID 1517 int s; 1518 1519 s = splhigh(); /* just in case... */ 1520 #endif 1521 sc->sc_last_offset = 0xffffffff; 1522 1523 /* set position and hotspot */ 1524 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1525 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1526 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_CTL); 1527 if (sc->sc_cursor.pc_enable) { 1528 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_X11 | 1529 DAC_CURSOR_64); 1530 } else 1531 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_OFF); 1532 /* next two registers - x low, high, y low, high */ 1533 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.x & 0xff); 1534 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.x >> 8) & 1535 0xff); 1536 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.y & 0xff); 1537 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.y >> 8) & 1538 0xff); 1539 /* hotspot */ 1540 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.x & 0xff); 1541 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.y & 0xff); 1542 1543 #ifdef PNOZZ_PARANOID 1544 splx(s); 1545 #endif 1546 1547 } 1548 1549 static void 1550 p9100_setcursorcmap(struct p9100_softc *sc) 1551 { 1552 int i; 1553 1554 #ifdef PNOZZ_PARANOID 1555 int s; 1556 s = splhigh(); /* just in case... */ 1557 #endif 1558 sc->sc_last_offset = 0xffffffff; 1559 1560 /* set cursor colours */ 1561 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1562 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1563 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_COL_1); 1564 1565 for (i = 0; i < 3; i++) { 1566 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.red[i]); 1567 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.green[i]); 1568 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.blue[i]); 1569 } 1570 1571 #ifdef PNOZZ_PARANOID 1572 splx(s); 1573 #endif 1574 } 1575 1576 static void 1577 p9100_loadcursor(struct p9100_softc *sc) 1578 { 1579 uint32_t *image, *mask; 1580 uint32_t bit, bbit, im, ma; 1581 int i, j, k; 1582 uint8_t latch1, latch2; 1583 1584 #ifdef PNOZZ_PARANOID 1585 int s; 1586 s = splhigh(); /* just in case... */ 1587 #endif 1588 sc->sc_last_offset = 0xffffffff; 1589 1590 /* set cursor shape */ 1591 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1592 p9100_ramdac_write(sc, DAC_INDX_HI, 1); 1593 p9100_ramdac_write(sc, DAC_INDX_LO, 0); 1594 1595 image = sc->sc_cursor.pc_bits; 1596 mask = &sc->sc_cursor.pc_bits[0x80]; 1597 1598 for (i = 0; i < 0x80; i++) { 1599 bit = 0x80000000; 1600 im = image[i]; 1601 ma = mask[i]; 1602 for (k = 0; k < 4; k++) { 1603 bbit = 0x1; 1604 latch1 = 0; 1605 for (j = 0; j < 4; j++) { 1606 if (im & bit) 1607 latch1 |= bbit; 1608 bbit <<= 1; 1609 if (ma & bit) 1610 latch1 |= bbit; 1611 bbit <<= 1; 1612 bit >>= 1; 1613 } 1614 bbit = 0x1; 1615 latch2 = 0; 1616 for (j = 0; j < 4; j++) { 1617 if (im & bit) 1618 latch2 |= bbit; 1619 bbit <<= 1; 1620 if (ma & bit) 1621 latch2 |= bbit; 1622 bbit <<= 1; 1623 bit >>= 1; 1624 } 1625 p9100_ramdac_write(sc, DAC_INDX_DATA, latch1); 1626 p9100_ramdac_write(sc, DAC_INDX_DATA, latch2); 1627 } 1628 } 1629 #ifdef PNOZZ_DEBUG_CURSOR 1630 printf("image:\n"); 1631 for (i=0;i<0x80;i+=2) 1632 printf("%08x %08x\n", image[i], image[i+1]); 1633 printf("mask:\n"); 1634 for (i=0;i<0x80;i+=2) 1635 printf("%08x %08x\n", mask[i], mask[i+1]); 1636 #endif 1637 #ifdef PNOZZ_PARANOID 1638 splx(s); 1639 #endif 1640 } 1641 1642 #if NTCTRL > 0 1643 static void 1644 p9100_set_extvga(void *cookie, int status) 1645 { 1646 struct p9100_softc *sc = cookie; 1647 #ifdef PNOZZ_PARANOID 1648 int s; 1649 1650 s = splhigh(); 1651 #endif 1652 1653 #ifdef PNOZZ_DEBUG 1654 printf("%s: external VGA %s\n", device_xname(sc->sc_dev), 1655 status ? "on" : "off"); 1656 #endif 1657 1658 sc->sc_last_offset = 0xffffffff; 1659 1660 if (status) { 1661 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1662 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) & 1663 ~DAC_POWER_IPWR_DISABLE); 1664 } else { 1665 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1666 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) | 1667 DAC_POWER_IPWR_DISABLE); 1668 } 1669 #ifdef PNOZZ_PARANOID 1670 splx(s); 1671 #endif 1672 } 1673 #endif /* NTCTRL > 0 */ 1674 1675 static int 1676 upper_bit(uint32_t b) 1677 { 1678 uint32_t mask=0x80000000; 1679 int cnt = 31; 1680 if (b == 0) 1681 return -1; 1682 while ((mask != 0) && ((b & mask) == 0)) { 1683 mask = mask >> 1; 1684 cnt--; 1685 } 1686 return cnt; 1687 } 1688 1689 static int 1690 p9100_set_depth(struct p9100_softc *sc, int depth) 1691 { 1692 int new_sls; 1693 uint32_t bits, scr, memctl, mem; 1694 int s0, s1, s2, s3, ps, crtcline; 1695 uint8_t pf, mc3, es; 1696 1697 switch (depth) { 1698 case 8: 1699 sc->sc_depthshift = 0; 1700 ps = 2; 1701 pf = 3; 1702 mc3 = 0; 1703 es = 0; /* no swapping */ 1704 memctl = 3; 1705 break; 1706 case 16: 1707 sc->sc_depthshift = 1; 1708 ps = 3; 1709 pf = 4; 1710 mc3 = 0; 1711 es = 2; /* swap bytes in 16bit words */ 1712 memctl = 2; 1713 break; 1714 case 24: 1715 /* boo */ 1716 printf("We don't DO 24bit pixels dammit!\n"); 1717 return 0; 1718 case 32: 1719 sc->sc_depthshift = 2; 1720 ps = 5; 1721 pf = 6; 1722 mc3 = 0; 1723 es = 6; /* swap both half-words and bytes */ 1724 memctl = 1; /* 0 */ 1725 break; 1726 default: 1727 aprint_error("%s: bogus colour depth (%d)\n", 1728 __func__, depth); 1729 return FALSE; 1730 } 1731 /* 1732 * this could be done a lot shorter and faster but then nobody would 1733 * understand what the hell we're doing here without getting a major 1734 * headache. Scanline size is encoded as 4 shift values, 3 of them 3 bits 1735 * wide, 16 << n for n>0, one 2 bits, 512 << n for n>0. n==0 means 0 1736 */ 1737 new_sls = sc->sc_width << sc->sc_depthshift; 1738 sc->sc_stride = new_sls; 1739 bits = new_sls; 1740 s3 = upper_bit(bits); 1741 if (s3 > 9) { 1742 bits &= ~(1 << s3); 1743 s3 -= 9; 1744 } else 1745 s3 = 0; 1746 s2 = upper_bit(bits); 1747 if (s2 > 0) { 1748 bits &= ~(1 << s2); 1749 s2 -= 4; 1750 } else 1751 s2 = 0; 1752 s1 = upper_bit(bits); 1753 if (s1 > 0) { 1754 bits &= ~(1 << s1); 1755 s1 -= 4; 1756 } else 1757 s1 = 0; 1758 s0 = upper_bit(bits); 1759 if (s0 > 0) { 1760 bits &= ~(1 << s0); 1761 s0 -= 4; 1762 } else 1763 s0 = 0; 1764 1765 1766 DPRINTF("sls: %x sh: %d %d %d %d leftover: %x\n", new_sls, s0, s1, 1767 s2, s3, bits); 1768 1769 /* 1770 * now let's put these values into the System Config Register. No need to 1771 * read it here since we (hopefully) just saved the content 1772 */ 1773 scr = p9100_ctl_read_4(sc, SYS_CONF); 1774 scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) | 1775 (s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT); 1776 1777 DPRINTF("new scr: %x DAC %x %x\n", scr, pf, mc3); 1778 1779 mem = p9100_ctl_read_4(sc, VID_MEM_CONFIG); 1780 1781 DPRINTF("old memctl: %08x\n", mem); 1782 1783 /* set shift and crtc clock */ 1784 mem &= ~(0x0000fc00); 1785 mem |= (memctl << 10) | (memctl << 13); 1786 p9100_ctl_write_4(sc, VID_MEM_CONFIG, mem); 1787 1788 DPRINTF("new memctl: %08x\n", mem); 1789 1790 /* whack the engine... */ 1791 p9100_ctl_write_4(sc, SYS_CONF, scr); 1792 1793 /* ok, whack the DAC */ 1794 p9100_ramdac_write_ctl(sc, DAC_MISC_1, 0x11); 1795 p9100_ramdac_write_ctl(sc, DAC_MISC_2, 0x45); 1796 p9100_ramdac_write_ctl(sc, DAC_MISC_3, mc3); 1797 /* 1798 * despite the 3GX manual saying otherwise we don't need to mess with 1799 * any clock dividers here 1800 */ 1801 p9100_ramdac_write_ctl(sc, DAC_MISC_CLK, 1); 1802 p9100_ramdac_write_ctl(sc, 3, 0); 1803 p9100_ramdac_write_ctl(sc, 4, 0); 1804 1805 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 0); 1806 p9100_ramdac_write_ctl(sc, DAC_OPERATION, 0); 1807 p9100_ramdac_write_ctl(sc, DAC_PALETTE_CTRL, 0); 1808 1809 p9100_ramdac_write_ctl(sc, DAC_PIXEL_FMT, pf); 1810 1811 /* TODO: distinguish between 15 and 16 bit */ 1812 p9100_ramdac_write_ctl(sc, DAC_8BIT_CTRL, 0); 1813 /* direct colour, linear, 565 */ 1814 p9100_ramdac_write_ctl(sc, DAC_16BIT_CTRL, 0xc6); 1815 /* direct colour */ 1816 p9100_ramdac_write_ctl(sc, DAC_32BIT_CTRL, 3); 1817 1818 /* From the 3GX manual. Needs magic number reduction */ 1819 p9100_ramdac_write_ctl(sc, 0x10, 2); 1820 p9100_ramdac_write_ctl(sc, 0x11, 0); 1821 p9100_ramdac_write_ctl(sc, 0x14, 5); 1822 p9100_ramdac_write_ctl(sc, 0x08, 1); 1823 p9100_ramdac_write_ctl(sc, 0x15, 5); 1824 p9100_ramdac_write_ctl(sc, 0x16, 0x63); 1825 1826 /* whack the CRTC */ 1827 /* we always transfer 64bit in one go */ 1828 crtcline = sc->sc_stride >> 3; 1829 1830 DPRINTF("crtcline: %d\n", crtcline); 1831 1832 p9100_ctl_write_4(sc, VID_HTOTAL, (24 << sc->sc_depthshift) + crtcline); 1833 p9100_ctl_write_4(sc, VID_HSRE, 8 << sc->sc_depthshift); 1834 p9100_ctl_write_4(sc, VID_HBRE, 18 << sc->sc_depthshift); 1835 p9100_ctl_write_4(sc, VID_HBFE, (18 << sc->sc_depthshift) + crtcline); 1836 1837 #ifdef PNOZZ_DEBUG 1838 { 1839 uint32_t sscr; 1840 sscr = p9100_ctl_read_4(sc, SYS_CONF); 1841 printf("scr: %x\n", sscr); 1842 } 1843 #endif 1844 return TRUE; 1845 } 1846
Indexes created Thu Oct 23 22:10:10 GMT 2025