p9100.c revision 1.46
1 /* $NetBSD: p9100.c,v 1.46 2009/06/03 16:25:22 macallan Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2005, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * color display (p9100) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: p9100.c,v 1.46 2009/06/03 16:25:22 macallan Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/buf.h> 46 #include <sys/device.h> 47 #include <sys/ioctl.h> 48 #include <sys/malloc.h> 49 #include <sys/mman.h> 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 53 #include <sys/bus.h> 54 #include <machine/autoconf.h> 55 56 #include <dev/sun/fbio.h> 57 #include <dev/sun/fbvar.h> 58 #include <dev/sun/btreg.h> 59 #include <dev/sun/btvar.h> 60 61 #include <dev/sbus/p9100reg.h> 62 63 #include <dev/sbus/sbusvar.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/wscons/wsconsio.h> 67 #include <dev/wsfont/wsfont.h> 68 #include <dev/rasops/rasops.h> 69 70 #include <dev/wscons/wsdisplay_vconsvar.h> 71 72 #include "opt_wsemul.h" 73 #include "rasops_glue.h" 74 #include "opt_pnozz.h" 75 76 #include "tctrl.h" 77 #if NTCTRL > 0 78 #include <machine/tctrl.h> 79 #include <sparc/dev/tctrlvar.h> /*XXX*/ 80 #endif 81 82 #ifdef PNOZZ_DEBUG 83 #define DPRINTF aprint_normal 84 #else 85 #define DPRINTF while (0) aprint_normal 86 #endif 87 88 struct pnozz_cursor { 89 short pc_enable; /* cursor is enabled */ 90 struct fbcurpos pc_pos; /* position */ 91 struct fbcurpos pc_hot; /* hot-spot */ 92 struct fbcurpos pc_size; /* size of mask & image fields */ 93 uint32_t pc_bits[0x100]; /* space for mask & image bits */ 94 unsigned char red[3], green[3]; 95 unsigned char blue[3]; /* cursor palette */ 96 }; 97 98 /* per-display variables */ 99 struct p9100_softc { 100 device_t sc_dev; /* base device */ 101 struct sbusdev sc_sd; /* sbus device */ 102 struct fbdevice sc_fb; /* frame buffer device */ 103 104 bus_space_tag_t sc_bustag; 105 106 bus_addr_t sc_ctl_paddr; /* phys address description */ 107 bus_size_t sc_ctl_psize; /* for device mmap() */ 108 bus_space_handle_t sc_ctl_memh; /* bus space handle */ 109 110 bus_addr_t sc_fb_paddr; /* phys address description */ 111 bus_size_t sc_fb_psize; /* for device mmap() */ 112 bus_space_handle_t sc_fb_memh; /* bus space handle */ 113 114 volatile uint32_t sc_junk; 115 uint32_t sc_mono_width; /* for setup_mono */ 116 117 uint32_t sc_width; 118 uint32_t sc_height; /* panel width / height */ 119 uint32_t sc_stride; 120 uint32_t sc_depth; 121 int sc_depthshift; /* blitter works on bytes not pixels */ 122 123 union bt_cmap sc_cmap; /* Brooktree color map */ 124 125 struct pnozz_cursor sc_cursor; 126 127 int sc_mode; 128 int sc_video, sc_powerstate; 129 uint32_t sc_bg; 130 volatile uint32_t sc_last_offset; 131 struct vcons_data vd; 132 uint8_t sc_dac_power; 133 }; 134 135 136 static struct vcons_screen p9100_console_screen; 137 138 extern const u_char rasops_cmap[768]; 139 140 struct wsscreen_descr p9100_defscreendesc = { 141 "default", 142 0, 0, 143 NULL, 144 8, 16, 145 WSSCREEN_WSCOLORS, 146 }; 147 148 const struct wsscreen_descr *_p9100_scrlist[] = { 149 &p9100_defscreendesc, 150 /* XXX other formats, graphics screen? */ 151 }; 152 153 struct wsscreen_list p9100_screenlist = { 154 sizeof(_p9100_scrlist) / sizeof(struct wsscreen_descr *), 155 _p9100_scrlist 156 }; 157 158 /* autoconfiguration driver */ 159 static int p9100_sbus_match(device_t, cfdata_t, void *); 160 static void p9100_sbus_attach(device_t, device_t, void *); 161 162 static void p9100unblank(device_t); 163 164 CFATTACH_DECL_NEW(pnozz, sizeof(struct p9100_softc), 165 p9100_sbus_match, p9100_sbus_attach, NULL, NULL); 166 167 extern struct cfdriver pnozz_cd; 168 169 static dev_type_open(p9100open); 170 static dev_type_ioctl(p9100ioctl); 171 static dev_type_mmap(p9100mmap); 172 173 const struct cdevsw pnozz_cdevsw = { 174 p9100open, nullclose, noread, nowrite, p9100ioctl, 175 nostop, notty, nopoll, p9100mmap, nokqfilter, 176 }; 177 178 /* frame buffer generic driver */ 179 static struct fbdriver p9100fbdriver = { 180 p9100unblank, p9100open, nullclose, p9100ioctl, nopoll, 181 p9100mmap, nokqfilter 182 }; 183 184 static void p9100loadcmap(struct p9100_softc *, int, int); 185 static void p9100_set_video(struct p9100_softc *, int); 186 static int p9100_get_video(struct p9100_softc *); 187 static uint32_t p9100_ctl_read_4(struct p9100_softc *, bus_size_t); 188 static void p9100_ctl_write_4(struct p9100_softc *, bus_size_t, uint32_t); 189 static uint8_t p9100_ramdac_read(struct p9100_softc *, bus_size_t); 190 static void p9100_ramdac_write(struct p9100_softc *, bus_size_t, uint8_t); 191 192 static uint8_t p9100_ramdac_read_ctl(struct p9100_softc *, int); 193 static void p9100_ramdac_write_ctl(struct p9100_softc *, int, uint8_t); 194 195 static void p9100_init_engine(struct p9100_softc *); 196 static int p9100_set_depth(struct p9100_softc *, int); 197 198 #if NWSDISPLAY > 0 199 static void p9100_sync(struct p9100_softc *); 200 static void p9100_bitblt(void *, int, int, int, int, int, int, uint32_t); 201 static void p9100_rectfill(void *, int, int, int, int, uint32_t); 202 static void p9100_clearscreen(struct p9100_softc *); 203 204 static void p9100_setup_mono(struct p9100_softc *, int, int, int, int, 205 uint32_t, uint32_t); 206 static void p9100_feed_line(struct p9100_softc *, int, uint8_t *); 207 static void p9100_set_color_reg(struct p9100_softc *, int, int32_t); 208 209 static void p9100_copycols(void *, int, int, int, int); 210 static void p9100_erasecols(void *, int, int, int, long); 211 static void p9100_copyrows(void *, int, int, int); 212 static void p9100_eraserows(void *, int, int, long); 213 /*static int p9100_mapchar(void *, int, u_int *);*/ 214 static void p9100_putchar(void *, int, int, u_int, long); 215 static void p9100_cursor(void *, int, int, int); 216 static int p9100_allocattr(void *, int, int, int, long *); 217 218 static int p9100_putcmap(struct p9100_softc *, struct wsdisplay_cmap *); 219 static int p9100_getcmap(struct p9100_softc *, struct wsdisplay_cmap *); 220 static int p9100_ioctl(void *, void *, u_long, void *, int, struct lwp *); 221 static paddr_t p9100_mmap(void *, void *, off_t, int); 222 223 /*static int p9100_load_font(void *, void *, struct wsdisplay_font *);*/ 224 225 static void p9100_init_screen(void *, struct vcons_screen *, int, 226 long *); 227 #endif 228 229 static void p9100_init_cursor(struct p9100_softc *); 230 231 static void p9100_set_fbcursor(struct p9100_softc *); 232 static void p9100_setcursorcmap(struct p9100_softc *); 233 static void p9100_loadcursor(struct p9100_softc *); 234 235 #if 0 236 static int p9100_intr(void *); 237 #endif 238 239 /* power management stuff */ 240 static bool p9100_suspend(device_t PMF_FN_PROTO); 241 static bool p9100_resume(device_t PMF_FN_PROTO); 242 243 #if NTCTRL > 0 244 static void p9100_set_extvga(void *, int); 245 #endif 246 247 #if NWSDISPLAY > 0 248 struct wsdisplay_accessops p9100_accessops = { 249 p9100_ioctl, 250 p9100_mmap, 251 NULL, /* vcons_alloc_screen */ 252 NULL, /* vcons_free_screen */ 253 NULL, /* vcons_show_screen */ 254 NULL, /* load_font */ 255 NULL, /* polls */ 256 NULL, /* scroll */ 257 }; 258 #endif 259 260 #define PNOZZ_LATCH(sc, off) if(sc->sc_last_offset == (off & 0xffffff80)) { \ 261 sc->sc_junk = bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, \ 262 off); \ 263 sc->sc_last_offset = off & 0xffffff80; } 264 265 /* 266 * Match a p9100. 267 */ 268 static int 269 p9100_sbus_match(device_t parent, cfdata_t cf, void *aux) 270 { 271 struct sbus_attach_args *sa = aux; 272 273 if (strcmp("p9100", sa->sa_name) == 0) 274 return 100; 275 return 0; 276 } 277 278 279 /* 280 * Attach a display. We need to notice if it is the console, too. 281 */ 282 static void 283 p9100_sbus_attach(device_t parent, device_t self, void *args) 284 { 285 struct p9100_softc *sc = device_private(self); 286 struct sbus_attach_args *sa = args; 287 struct fbdevice *fb = &sc->sc_fb; 288 int isconsole; 289 int node = sa->sa_node; 290 int i, j; 291 uint8_t ver; 292 293 #if NWSDISPLAY > 0 294 struct wsemuldisplaydev_attach_args aa; 295 struct rasops_info *ri; 296 unsigned long defattr; 297 #endif 298 299 sc->sc_last_offset = 0xffffffff; 300 sc->sc_dev = self; 301 302 /* 303 * When the ROM has mapped in a p9100 display, the address 304 * maps only the video RAM, so in any case we have to map the 305 * registers ourselves. 306 */ 307 308 if (sa->sa_npromvaddrs != 0) 309 fb->fb_pixels = (void *)sa->sa_promvaddrs[0]; 310 311 /* Remember cookies for p9100_mmap() */ 312 sc->sc_bustag = sa->sa_bustag; 313 314 sc->sc_ctl_paddr = sbus_bus_addr(sa->sa_bustag, 315 sa->sa_reg[0].oa_space, sa->sa_reg[0].oa_base); 316 sc->sc_ctl_psize = 0x8000;/*(bus_size_t)sa->sa_reg[0].oa_size;*/ 317 318 sc->sc_fb_paddr = sbus_bus_addr(sa->sa_bustag, 319 sa->sa_reg[2].oa_space, sa->sa_reg[2].oa_base); 320 sc->sc_fb_psize = (bus_size_t)sa->sa_reg[2].oa_size; 321 322 if (sbus_bus_map(sc->sc_bustag, 323 sa->sa_reg[0].oa_space, 324 sa->sa_reg[0].oa_base, 325 /* 326 * XXX for some reason the SBus resources don't cover 327 * all registers, so we just map what we need 328 */ 329 0x8000, 330 0, &sc->sc_ctl_memh) != 0) { 331 printf("%s: cannot map control registers\n", 332 self->dv_xname); 333 return; 334 } 335 336 /* 337 * we need to map the framebuffer even though we never write to it, 338 * thanks to some weirdness in the SPARCbook's SBus glue for the 339 * P9100 - all register accesses need to be 'latched in' whenever we 340 * go to another 0x80 aligned 'page' by reading the framebuffer at the 341 * same offset 342 */ 343 if (fb->fb_pixels == NULL) { 344 if (sbus_bus_map(sc->sc_bustag, 345 sa->sa_reg[2].oa_space, 346 sa->sa_reg[2].oa_base, 347 sc->sc_fb_psize, 348 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE, 349 &sc->sc_fb_memh) != 0) { 350 printf("%s: cannot map framebuffer\n", 351 self->dv_xname); 352 return; 353 } 354 fb->fb_pixels = (char *)sc->sc_fb_memh; 355 } else { 356 sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels; 357 } 358 sc->sc_width = prom_getpropint(node, "width", 800); 359 sc->sc_height = prom_getpropint(node, "height", 600); 360 sc->sc_depth = prom_getpropint(node, "depth", 8) >> 3; 361 362 sc->sc_stride = prom_getpropint(node, "linebytes", 363 sc->sc_width * sc->sc_depth); 364 365 fb->fb_driver = &p9100fbdriver; 366 fb->fb_device = sc->sc_dev; 367 fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK; 368 #ifdef PNOZZ_EMUL_CG3 369 fb->fb_type.fb_type = FBTYPE_SUN3COLOR; 370 #else 371 fb->fb_type.fb_type = FBTYPE_P9100; 372 #endif 373 fb->fb_pixels = NULL; 374 375 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 376 377 isconsole = fb_is_console(node); 378 #if 0 379 if (!isconsole) { 380 aprint_normal("\n"); 381 aprint_error_dev(self, "fatal error: PROM didn't configure device\n"); 382 return; 383 } 384 #endif 385 386 fb->fb_type.fb_depth = 8; 387 sc->sc_depth = 1; 388 sc->sc_depthshift = 0; 389 390 /* check the RAMDAC */ 391 ver = p9100_ramdac_read_ctl(sc, DAC_VERSION); 392 393 p9100_init_engine(sc); 394 p9100_set_depth(sc, 8); 395 396 fb_setsize_obp(fb, fb->fb_type.fb_depth, sc->sc_width, sc->sc_height, 397 node); 398 399 sbus_establish(&sc->sc_sd, sc->sc_dev); 400 #if 0 401 bus_intr_establish(sc->sc_bustag, sa->sa_pri, IPL_BIO, 402 p9100_intr, sc); 403 #endif 404 405 fb->fb_type.fb_cmsize = prom_getpropint(node, "cmsize", 256); 406 if ((1 << fb->fb_type.fb_depth) != fb->fb_type.fb_cmsize) 407 printf(", %d entry colormap", fb->fb_type.fb_cmsize); 408 409 /* Initialize the default color map. */ 410 j = 0; 411 for (i = 0; i < 256; i++) { 412 sc->sc_cmap.cm_map[i][0] = rasops_cmap[j]; 413 j++; 414 sc->sc_cmap.cm_map[i][1] = rasops_cmap[j]; 415 j++; 416 sc->sc_cmap.cm_map[i][2] = rasops_cmap[j]; 417 j++; 418 } 419 p9100loadcmap(sc, 0, 256); 420 421 /* make sure we are not blanked */ 422 if (isconsole) 423 p9100_set_video(sc, 1); 424 425 /* register with power management */ 426 sc->sc_video = 1; 427 sc->sc_powerstate = PWR_RESUME; 428 if (!pmf_device_register(self, p9100_suspend, p9100_resume)) { 429 panic("%s: could not register with PMF", 430 device_xname(sc->sc_dev)); 431 } 432 433 if (isconsole) { 434 printf(" (console)\n"); 435 #ifdef RASTERCONSOLE 436 /*p9100loadcmap(sc, 255, 1);*/ 437 fbrcons_init(fb); 438 #endif 439 } else 440 printf("\n"); 441 442 #if NWSDISPLAY > 0 443 wsfont_init(); 444 445 vcons_init(&sc->vd, sc, &p9100_defscreendesc, &p9100_accessops); 446 sc->vd.init_screen = p9100_init_screen; 447 448 vcons_init_screen(&sc->vd, &p9100_console_screen, 1, &defattr); 449 p9100_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 450 451 sc->sc_bg = (defattr >> 16) & 0xff; 452 p9100_clearscreen(sc); 453 454 ri = &p9100_console_screen.scr_ri; 455 456 p9100_defscreendesc.nrows = ri->ri_rows; 457 p9100_defscreendesc.ncols = ri->ri_cols; 458 p9100_defscreendesc.textops = &ri->ri_ops; 459 p9100_defscreendesc.capabilities = ri->ri_caps; 460 461 if(isconsole) { 462 wsdisplay_cnattach(&p9100_defscreendesc, ri, 0, 0, defattr); 463 } 464 465 aa.console = isconsole; 466 aa.scrdata = &p9100_screenlist; 467 aa.accessops = &p9100_accessops; 468 aa.accesscookie = &sc->vd; 469 470 config_found(self, &aa, wsemuldisplaydevprint); 471 #endif 472 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 473 printf("%s: rev %d / %x, %dx%d, depth %d mem %x\n", 474 device_xname(self), 475 (i & 7), ver, fb->fb_type.fb_width, fb->fb_type.fb_height, 476 fb->fb_type.fb_depth, (unsigned int)sc->sc_fb_psize); 477 /* cursor sprite handling */ 478 p9100_init_cursor(sc); 479 480 /* attach the fb */ 481 fb_attach(fb, isconsole); 482 483 #if NTCTRL > 0 484 /* register callback for external monitor status change */ 485 tadpole_register_callback(p9100_set_extvga, sc); 486 #endif 487 } 488 489 int 490 p9100open(dev_t dev, int flags, int mode, struct lwp *l) 491 { 492 int unit = minor(dev); 493 494 if (device_lookup(&pnozz_cd, unit) == NULL) 495 return (ENXIO); 496 return (0); 497 } 498 499 int 500 p9100ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 501 { 502 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 503 struct fbgattr *fba; 504 int error, v; 505 506 switch (cmd) { 507 508 case FBIOGTYPE: 509 *(struct fbtype *)data = sc->sc_fb.fb_type; 510 break; 511 512 case FBIOGATTR: 513 fba = (struct fbgattr *)data; 514 fba->real_type = sc->sc_fb.fb_type.fb_type; 515 fba->owner = 0; /* XXX ??? */ 516 fba->fbtype = sc->sc_fb.fb_type; 517 fba->sattr.flags = 0; 518 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 519 fba->sattr.dev_specific[0] = -1; 520 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 521 fba->emu_types[1] = -1; 522 break; 523 524 case FBIOGETCMAP: 525 #define p ((struct fbcmap *)data) 526 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 527 528 case FBIOPUTCMAP: 529 /* copy to software map */ 530 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 531 if (error) 532 return (error); 533 /* now blast them into the chip */ 534 /* XXX should use retrace interrupt */ 535 p9100loadcmap(sc, p->index, p->count); 536 #undef p 537 break; 538 539 case FBIOGVIDEO: 540 *(int *)data = p9100_get_video(sc); 541 break; 542 543 case FBIOSVIDEO: 544 p9100_set_video(sc, *(int *)data); 545 break; 546 547 /* these are for both FBIOSCURSOR and FBIOGCURSOR */ 548 #define p ((struct fbcursor *)data) 549 #define pc (&sc->sc_cursor) 550 551 case FBIOGCURSOR: 552 p->set = FB_CUR_SETALL; /* close enough, anyway */ 553 p->enable = pc->pc_enable; 554 p->pos = pc->pc_pos; 555 p->hot = pc->pc_hot; 556 p->size = pc->pc_size; 557 558 if (p->image != NULL) { 559 error = copyout(pc->pc_bits, p->image, 0x200); 560 if (error) 561 return error; 562 error = copyout(&pc->pc_bits[0x80], p->mask, 0x200); 563 if (error) 564 return error; 565 } 566 567 p->cmap.index = 0; 568 p->cmap.count = 3; 569 if (p->cmap.red != NULL) { 570 copyout(pc->red, p->cmap.red, 3); 571 copyout(pc->green, p->cmap.green, 3); 572 copyout(pc->blue, p->cmap.blue, 3); 573 } 574 break; 575 576 case FBIOSCURSOR: 577 { 578 int count; 579 uint32_t image[0x80], mask[0x80]; 580 uint8_t red[3], green[3], blue[3]; 581 582 v = p->set; 583 if (v & FB_CUR_SETCMAP) { 584 error = copyin(p->cmap.red, red, 3); 585 error |= copyin(p->cmap.green, green, 3); 586 error |= copyin(p->cmap.blue, blue, 3); 587 if (error) 588 return error; 589 } 590 if (v & FB_CUR_SETSHAPE) { 591 if (p->size.x > 64 || p->size.y > 64) 592 return EINVAL; 593 memset(&mask, 0, 0x200); 594 memset(&image, 0, 0x200); 595 count = p->size.y * 8; 596 error = copyin(p->image, image, count); 597 if (error) 598 return error; 599 error = copyin(p->mask, mask, count); 600 if (error) 601 return error; 602 } 603 604 /* parameters are OK; do it */ 605 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 606 if (v & FB_CUR_SETCUR) 607 pc->pc_enable = p->enable; 608 if (v & FB_CUR_SETPOS) 609 pc->pc_pos = p->pos; 610 if (v & FB_CUR_SETHOT) 611 pc->pc_hot = p->hot; 612 p9100_set_fbcursor(sc); 613 } 614 615 if (v & FB_CUR_SETCMAP) { 616 memcpy(pc->red, red, 3); 617 memcpy(pc->green, green, 3); 618 memcpy(pc->blue, blue, 3); 619 p9100_setcursorcmap(sc); 620 } 621 622 if (v & FB_CUR_SETSHAPE) { 623 memcpy(pc->pc_bits, image, 0x200); 624 memcpy(&pc->pc_bits[0x80], mask, 0x200); 625 p9100_loadcursor(sc); 626 } 627 } 628 break; 629 630 #undef p 631 #undef cc 632 633 case FBIOGCURPOS: 634 *(struct fbcurpos *)data = sc->sc_cursor.pc_pos; 635 break; 636 637 case FBIOSCURPOS: 638 sc->sc_cursor.pc_pos = *(struct fbcurpos *)data; 639 p9100_set_fbcursor(sc); 640 break; 641 642 case FBIOGCURMAX: 643 /* max cursor size is 64x64 */ 644 ((struct fbcurpos *)data)->x = 64; 645 ((struct fbcurpos *)data)->y = 64; 646 break; 647 648 default: 649 return (ENOTTY); 650 } 651 return (0); 652 } 653 654 static uint32_t 655 p9100_ctl_read_4(struct p9100_softc *sc, bus_size_t off) 656 { 657 658 PNOZZ_LATCH(sc, off); 659 return bus_space_read_4(sc->sc_bustag, sc->sc_ctl_memh, off); 660 } 661 662 static void 663 p9100_ctl_write_4(struct p9100_softc *sc, bus_size_t off, uint32_t v) 664 { 665 666 PNOZZ_LATCH(sc, off); 667 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, v); 668 } 669 670 /* initialize the drawing engine */ 671 static void 672 p9100_init_engine(struct p9100_softc *sc) 673 { 674 /* reset clipping rectangles */ 675 uint32_t rmax = ((sc->sc_width & 0x3fff) << 16) | 676 (sc->sc_height & 0x3fff); 677 678 sc->sc_last_offset = 0xffffffff; 679 680 p9100_ctl_write_4(sc, WINDOW_OFFSET, 0); 681 p9100_ctl_write_4(sc, WINDOW_MIN, 0); 682 p9100_ctl_write_4(sc, WINDOW_MAX, rmax); 683 p9100_ctl_write_4(sc, BYTE_CLIP_MIN, 0); 684 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, rmax); 685 p9100_ctl_write_4(sc, DRAW_MODE, 0); 686 p9100_ctl_write_4(sc, PLANE_MASK, 0xffffffff); 687 p9100_ctl_write_4(sc, PATTERN0, 0xffffffff); 688 p9100_ctl_write_4(sc, PATTERN1, 0xffffffff); 689 p9100_ctl_write_4(sc, PATTERN2, 0xffffffff); 690 p9100_ctl_write_4(sc, PATTERN3, 0xffffffff); 691 692 } 693 694 /* we only need these in the wsdisplay case */ 695 #if NWSDISPLAY > 0 696 697 /* wait until the engine is idle */ 698 static void 699 p9100_sync(struct p9100_softc *sc) 700 { 701 while((p9100_ctl_read_4(sc, ENGINE_STATUS) & 702 (ENGINE_BUSY | BLITTER_BUSY)) != 0); 703 } 704 705 static void 706 p9100_set_color_reg(struct p9100_softc *sc, int reg, int32_t col) 707 { 708 uint32_t out; 709 710 switch(sc->sc_depth) 711 { 712 case 1: /* 8 bit */ 713 out = (col << 8) | col; 714 out |= out << 16; 715 break; 716 case 2: /* 16 bit */ 717 out = col | (col << 16); 718 break; 719 default: 720 out = col; 721 } 722 p9100_ctl_write_4(sc, reg, out); 723 } 724 725 /* screen-to-screen blit */ 726 static void 727 p9100_bitblt(void *cookie, int xs, int ys, int xd, int yd, int wi, 728 int he, uint32_t rop) 729 { 730 struct p9100_softc *sc = cookie; 731 uint32_t src, dst, srcw, dstw; 732 733 sc->sc_last_offset = 0xffffffff; 734 735 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 736 dst = ((xd & 0x3fff) << 16) | (yd & 0x3fff); 737 srcw = (((xs + wi - 1) & 0x3fff) << 16) | ((ys + he - 1) & 0x3fff); 738 dstw = (((xd + wi - 1) & 0x3fff) << 16) | ((yd + he - 1) & 0x3fff); 739 740 p9100_sync(sc); 741 742 p9100_ctl_write_4(sc, RASTER_OP, rop); 743 744 p9100_ctl_write_4(sc, ABS_XY0, src << sc->sc_depthshift); 745 p9100_ctl_write_4(sc, ABS_XY1, srcw << sc->sc_depthshift); 746 p9100_ctl_write_4(sc, ABS_XY2, dst << sc->sc_depthshift); 747 p9100_ctl_write_4(sc, ABS_XY3, dstw << sc->sc_depthshift); 748 749 sc->sc_junk = p9100_ctl_read_4(sc, COMMAND_BLIT); 750 } 751 752 /* solid rectangle fill */ 753 static void 754 p9100_rectfill(void *cookie, int xs, int ys, int wi, int he, uint32_t col) 755 { 756 struct p9100_softc *sc = cookie; 757 uint32_t src, srcw; 758 759 sc->sc_last_offset = 0xffffffff; 760 761 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 762 srcw = (((xs + wi) & 0x3fff) << 16) | ((ys + he) & 0x3fff); 763 p9100_sync(sc); 764 p9100_set_color_reg(sc, FOREGROUND_COLOR, col); 765 p9100_set_color_reg(sc, BACKGROUND_COLOR, col); 766 p9100_ctl_write_4(sc, RASTER_OP, ROP_PAT); 767 p9100_ctl_write_4(sc, COORD_INDEX, 0); 768 p9100_ctl_write_4(sc, RECT_RTW_XY, src); 769 p9100_ctl_write_4(sc, RECT_RTW_XY, srcw); 770 sc->sc_junk = p9100_ctl_read_4(sc, COMMAND_QUAD); 771 } 772 773 /* setup for mono->colour expansion */ 774 static void 775 p9100_setup_mono(struct p9100_softc *sc, int x, int y, int wi, int he, 776 uint32_t fg, uint32_t bg) 777 { 778 779 sc->sc_last_offset = 0xffffffff; 780 781 p9100_sync(sc); 782 /* 783 * this doesn't make any sense to me either, but for some reason the 784 * chip applies the foreground colour to 0 pixels 785 */ 786 787 p9100_set_color_reg(sc,FOREGROUND_COLOR,bg); 788 p9100_set_color_reg(sc,BACKGROUND_COLOR,fg); 789 790 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 791 p9100_ctl_write_4(sc, ABS_X0, x); 792 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 793 p9100_ctl_write_4(sc, ABS_X2, (x + wi)); 794 p9100_ctl_write_4(sc, ABS_Y3, he); 795 /* now feed the data into the chip */ 796 sc->sc_mono_width = wi; 797 } 798 799 /* write monochrome data to the screen through the blitter */ 800 static void 801 p9100_feed_line(struct p9100_softc *sc, int count, uint8_t *data) 802 { 803 int i; 804 uint32_t latch = 0, bork; 805 int shift = 24; 806 int to_go = sc->sc_mono_width; 807 808 PNOZZ_LATCH(sc, PIXEL_1); 809 810 for (i = 0; i < count; i++) { 811 bork = data[i]; 812 latch |= (bork << shift); 813 if (shift == 0) { 814 /* check how many bits are significant */ 815 if (to_go > 31) { 816 bus_space_write_4(sc->sc_bustag, 817 sc->sc_ctl_memh, 818 (PIXEL_1 + (31 << 2)), latch); 819 to_go -= 32; 820 } else 821 { 822 bus_space_write_4(sc->sc_bustag, 823 sc->sc_ctl_memh, 824 (PIXEL_1 + ((to_go - 1) << 2)), latch); 825 to_go = 0; 826 } 827 latch = 0; 828 shift = 24; 829 } else 830 shift -= 8; 831 } 832 if (shift != 24) 833 p9100_ctl_write_4(sc, (PIXEL_1 + ((to_go - 1) << 2)), latch); 834 } 835 836 static void 837 p9100_clearscreen(struct p9100_softc *sc) 838 { 839 840 p9100_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, sc->sc_bg); 841 } 842 #endif /* NWSDISPLAY > 0 */ 843 844 static uint8_t 845 p9100_ramdac_read(struct p9100_softc *sc, bus_size_t off) 846 { 847 848 sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG); 849 return ((bus_space_read_4(sc->sc_bustag, 850 sc->sc_ctl_memh, off) >> 16) & 0xff); 851 } 852 853 static void 854 p9100_ramdac_write(struct p9100_softc *sc, bus_size_t off, uint8_t v) 855 { 856 857 sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG); 858 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, 859 ((uint32_t)v) << 16); 860 } 861 862 static uint8_t 863 p9100_ramdac_read_ctl(struct p9100_softc *sc, int off) 864 { 865 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 866 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 867 return p9100_ramdac_read(sc, DAC_INDX_DATA); 868 } 869 870 static void 871 p9100_ramdac_write_ctl(struct p9100_softc *sc, int off, uint8_t val) 872 { 873 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 874 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 875 p9100_ramdac_write(sc, DAC_INDX_DATA, val); 876 } 877 878 /* 879 * Undo the effect of an FBIOSVIDEO that turns the video off. 880 */ 881 static void 882 p9100unblank(device_t dev) 883 { 884 struct p9100_softc *sc = device_private(dev); 885 886 p9100_set_video(sc, 1); 887 888 /* 889 * Check if we're in terminal mode. If not force the console screen 890 * to front so we can see ddb, panic messages and so on 891 */ 892 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) { 893 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 894 if (sc->vd.active != &p9100_console_screen) { 895 SCREEN_INVISIBLE(sc->vd.active); 896 sc->vd.active = &p9100_console_screen; 897 SCREEN_VISIBLE(&p9100_console_screen); 898 } 899 p9100_init_engine(sc); 900 p9100_set_depth(sc, 8); 901 vcons_redraw_screen(&p9100_console_screen); 902 } 903 } 904 905 static void 906 p9100_set_video(struct p9100_softc *sc, int enable) 907 { 908 u_int32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1); 909 910 if (enable) 911 v |= VIDEO_ENABLED; 912 else 913 v &= ~VIDEO_ENABLED; 914 p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v); 915 #if NTCTRL > 0 916 /* Turn On/Off the TFT if we know how. 917 */ 918 tadpole_set_video(enable); 919 #endif 920 } 921 922 static int 923 p9100_get_video(struct p9100_softc *sc) 924 { 925 return (p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1) & VIDEO_ENABLED) != 0; 926 } 927 928 static bool 929 p9100_suspend(device_t dev PMF_FN_ARGS) 930 { 931 struct p9100_softc *sc = device_private(dev); 932 933 if (sc->sc_powerstate == PWR_SUSPEND) 934 return TRUE; 935 936 sc->sc_video = p9100_get_video(sc); 937 sc->sc_dac_power = p9100_ramdac_read_ctl(sc, DAC_POWER_MGT); 938 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 939 DAC_POWER_SCLK_DISABLE | 940 DAC_POWER_DDOT_DISABLE | 941 DAC_POWER_SYNC_DISABLE | 942 DAC_POWER_ICLK_DISABLE | 943 DAC_POWER_IPWR_DISABLE); 944 p9100_set_video(sc, 0); 945 sc->sc_powerstate = PWR_SUSPEND; 946 return TRUE; 947 } 948 949 static bool 950 p9100_resume(device_t dev PMF_FN_ARGS) 951 { 952 struct p9100_softc *sc = device_private(dev); 953 954 if (sc->sc_powerstate == PWR_RESUME) 955 return TRUE; 956 957 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, sc->sc_dac_power); 958 p9100_set_video(sc, sc->sc_video); 959 960 sc->sc_powerstate = PWR_RESUME; 961 return TRUE; 962 } 963 964 /* 965 * Load a subset of the current (new) colormap into the IBM RAMDAC. 966 */ 967 static void 968 p9100loadcmap(struct p9100_softc *sc, int start, int ncolors) 969 { 970 int i; 971 sc->sc_last_offset = 0xffffffff; 972 973 p9100_ramdac_write(sc, DAC_CMAP_WRIDX, start); 974 975 for (i=0;i<ncolors;i++) { 976 p9100_ramdac_write(sc, DAC_CMAP_DATA, 977 sc->sc_cmap.cm_map[i + start][0]); 978 p9100_ramdac_write(sc, DAC_CMAP_DATA, 979 sc->sc_cmap.cm_map[i + start][1]); 980 p9100_ramdac_write(sc, DAC_CMAP_DATA, 981 sc->sc_cmap.cm_map[i + start][2]); 982 } 983 } 984 985 /* 986 * Return the address that would map the given device at the given 987 * offset, allowing for the given protection, or return -1 for error. 988 */ 989 static paddr_t 990 p9100mmap(dev_t dev, off_t off, int prot) 991 { 992 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 993 994 if (off & PGOFSET) 995 panic("p9100mmap"); 996 if (off < 0) 997 return (-1); 998 999 #ifdef PNOZZ_EMUL_CG3 1000 #define CG3_MMAP_OFFSET 0x04000000 1001 /* Make Xsun think we are a CG3 (SUN3COLOR) 1002 */ 1003 if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) { 1004 off -= CG3_MMAP_OFFSET; 1005 return (bus_space_mmap(sc->sc_bustag, 1006 sc->sc_fb_paddr, 1007 off, 1008 prot, 1009 BUS_SPACE_MAP_LINEAR)); 1010 } 1011 #endif 1012 1013 if (off >= sc->sc_fb_psize + sc->sc_ctl_psize/* + sc->sc_cmd_psize*/) 1014 return (-1); 1015 1016 if (off < sc->sc_fb_psize) { 1017 return (bus_space_mmap(sc->sc_bustag, 1018 sc->sc_fb_paddr, 1019 off, 1020 prot, 1021 BUS_SPACE_MAP_LINEAR)); 1022 } 1023 1024 off -= sc->sc_fb_psize; 1025 if (off < sc->sc_ctl_psize) { 1026 return (bus_space_mmap(sc->sc_bustag, 1027 sc->sc_ctl_paddr, 1028 off, 1029 prot, 1030 BUS_SPACE_MAP_LINEAR)); 1031 } 1032 1033 return EINVAL; 1034 } 1035 1036 /* wscons stuff */ 1037 #if NWSDISPLAY > 0 1038 1039 static void 1040 p9100_cursor(void *cookie, int on, int row, int col) 1041 { 1042 struct rasops_info *ri = cookie; 1043 struct vcons_screen *scr = ri->ri_hw; 1044 struct p9100_softc *sc = scr->scr_cookie; 1045 int x, y, wi,he; 1046 1047 wi = ri->ri_font->fontwidth; 1048 he = ri->ri_font->fontheight; 1049 1050 if (ri->ri_flg & RI_CURSOR) { 1051 x = ri->ri_ccol * wi + ri->ri_xorigin; 1052 y = ri->ri_crow * he + ri->ri_yorigin; 1053 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1054 ri->ri_flg &= ~RI_CURSOR; 1055 } 1056 1057 ri->ri_crow = row; 1058 ri->ri_ccol = col; 1059 1060 if (on) 1061 { 1062 x = ri->ri_ccol * wi + ri->ri_xorigin; 1063 y = ri->ri_crow * he + ri->ri_yorigin; 1064 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1065 ri->ri_flg |= RI_CURSOR; 1066 } 1067 } 1068 1069 #if 0 1070 static int 1071 p9100_mapchar(void *cookie, int uni, u_int *index) 1072 { 1073 return 0; 1074 } 1075 #endif 1076 1077 static void 1078 p9100_putchar(void *cookie, int row, int col, u_int c, long attr) 1079 { 1080 struct rasops_info *ri = cookie; 1081 struct vcons_screen *scr = ri->ri_hw; 1082 struct p9100_softc *sc = scr->scr_cookie; 1083 1084 int fg, bg, uc, i; 1085 uint8_t *data; 1086 int x, y, wi,he; 1087 1088 wi = ri->ri_font->fontwidth; 1089 he = ri->ri_font->fontheight; 1090 1091 if (!CHAR_IN_FONT(c, ri->ri_font)) 1092 return; 1093 1094 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xff]; 1095 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xff]; 1096 x = ri->ri_xorigin + col * wi; 1097 y = ri->ri_yorigin + row * he; 1098 1099 if (c == 0x20) { 1100 p9100_rectfill(sc, x, y, wi, he, bg); 1101 } else { 1102 uc = c-ri->ri_font->firstchar; 1103 data = (uint8_t *)ri->ri_font->data + uc * 1104 ri->ri_fontscale; 1105 1106 p9100_setup_mono(sc, x, y, wi, 1, fg, bg); 1107 for (i = 0; i < he; i++) { 1108 p9100_feed_line(sc, ri->ri_font->stride, 1109 data); 1110 data += ri->ri_font->stride; 1111 } 1112 } 1113 } 1114 1115 /* 1116 * wsdisplay_accessops 1117 */ 1118 1119 int 1120 p9100_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 1121 struct lwp *l) 1122 { 1123 struct vcons_data *vd = v; 1124 struct p9100_softc *sc = vd->cookie; 1125 struct wsdisplay_fbinfo *wdf; 1126 struct vcons_screen *ms = vd->active; 1127 1128 switch (cmd) { 1129 case WSDISPLAYIO_GTYPE: 1130 *(u_int *)data = WSDISPLAY_TYPE_SB_P9100; 1131 return 0; 1132 1133 case FBIOGVIDEO: 1134 case WSDISPLAYIO_GVIDEO: 1135 *(int *)data = p9100_get_video(sc); 1136 return 0; 1137 1138 case WSDISPLAYIO_SVIDEO: 1139 case FBIOSVIDEO: 1140 p9100_set_video(sc, *(int *)data); 1141 return 0; 1142 1143 case WSDISPLAYIO_GINFO: 1144 wdf = (void *)data; 1145 wdf->height = ms->scr_ri.ri_height; 1146 wdf->width = ms->scr_ri.ri_width; 1147 wdf->depth = ms->scr_ri.ri_depth; 1148 wdf->cmsize = 256; 1149 return 0; 1150 1151 case WSDISPLAYIO_GETCMAP: 1152 return p9100_getcmap(sc, (struct wsdisplay_cmap *)data); 1153 1154 case WSDISPLAYIO_PUTCMAP: 1155 return p9100_putcmap(sc, (struct wsdisplay_cmap *)data); 1156 1157 case WSDISPLAYIO_SMODE: 1158 { 1159 int new_mode = *(int*)data; 1160 if (new_mode != sc->sc_mode) 1161 { 1162 sc->sc_mode = new_mode; 1163 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1164 { 1165 p9100_init_engine(sc); 1166 p9100_set_depth(sc, 8); 1167 p9100loadcmap(sc, 0, 256); 1168 p9100_clearscreen(sc); 1169 vcons_redraw_screen(ms); 1170 } 1171 } 1172 } 1173 } 1174 return EPASSTHROUGH; 1175 } 1176 1177 static paddr_t 1178 p9100_mmap(void *v, void *vs, off_t offset, int prot) 1179 { 1180 struct vcons_data *vd = v; 1181 struct p9100_softc *sc = vd->cookie; 1182 paddr_t pa; 1183 1184 /* 'regular' framebuffer mmap()ing */ 1185 if (offset < sc->sc_fb_psize) { 1186 pa = bus_space_mmap(sc->sc_bustag, sc->sc_fb_paddr + offset, 0, 1187 prot, BUS_SPACE_MAP_LINEAR); 1188 return pa; 1189 } 1190 1191 if ((offset >= sc->sc_fb_paddr) && (offset < (sc->sc_fb_paddr + 1192 sc->sc_fb_psize))) { 1193 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1194 BUS_SPACE_MAP_LINEAR); 1195 return pa; 1196 } 1197 1198 if ((offset >= sc->sc_ctl_paddr) && (offset < (sc->sc_ctl_paddr + 1199 sc->sc_ctl_psize))) { 1200 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1201 BUS_SPACE_MAP_LINEAR); 1202 return pa; 1203 } 1204 1205 return -1; 1206 } 1207 1208 static void 1209 p9100_init_screen(void *cookie, struct vcons_screen *scr, 1210 int existing, long *defattr) 1211 { 1212 struct p9100_softc *sc = cookie; 1213 struct rasops_info *ri = &scr->scr_ri; 1214 1215 ri->ri_depth = sc->sc_depth << 3; 1216 ri->ri_width = sc->sc_width; 1217 ri->ri_height = sc->sc_height; 1218 ri->ri_stride = sc->sc_stride; 1219 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 1220 1221 ri->ri_bits = bus_space_vaddr(sc->sc_bustag, sc->sc_fb_memh); 1222 1223 DPRINTF("addr: %08lx\n",(ulong)ri->ri_bits); 1224 1225 rasops_init(ri, sc->sc_height/8, sc->sc_width/8); 1226 ri->ri_caps = WSSCREEN_WSCOLORS; 1227 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 1228 sc->sc_width / ri->ri_font->fontwidth); 1229 1230 /* enable acceleration */ 1231 ri->ri_ops.cursor = p9100_cursor; 1232 ri->ri_ops.copyrows = p9100_copyrows; 1233 ri->ri_ops.eraserows = p9100_eraserows; 1234 ri->ri_ops.copycols = p9100_copycols; 1235 ri->ri_ops.erasecols = p9100_erasecols; 1236 ri->ri_ops.putchar = p9100_putchar; 1237 ri->ri_ops.allocattr = p9100_allocattr; 1238 } 1239 1240 static int 1241 p9100_putcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1242 { 1243 u_int index = cm->index; 1244 u_int count = cm->count; 1245 int i, error; 1246 u_char rbuf[256], gbuf[256], bbuf[256]; 1247 u_char *r, *g, *b; 1248 1249 if (cm->index >= 256 || cm->count > 256 || 1250 (cm->index + cm->count) > 256) 1251 return EINVAL; 1252 error = copyin(cm->red, &rbuf[index], count); 1253 if (error) 1254 return error; 1255 error = copyin(cm->green, &gbuf[index], count); 1256 if (error) 1257 return error; 1258 error = copyin(cm->blue, &bbuf[index], count); 1259 if (error) 1260 return error; 1261 1262 r = &rbuf[index]; 1263 g = &gbuf[index]; 1264 b = &bbuf[index]; 1265 1266 for (i = 0; i < count; i++) { 1267 sc->sc_cmap.cm_map[index][0] = *r; 1268 sc->sc_cmap.cm_map[index][1] = *g; 1269 sc->sc_cmap.cm_map[index][2] = *b; 1270 index++; 1271 r++, g++, b++; 1272 } 1273 p9100loadcmap(sc, 0, 256); 1274 return 0; 1275 } 1276 1277 static int 1278 p9100_getcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1279 { 1280 u_int index = cm->index; 1281 u_int count = cm->count; 1282 int error, i; 1283 uint8_t red[256], green[256], blue[256]; 1284 1285 if (index >= 255 || count > 256 || index + count > 256) 1286 return EINVAL; 1287 1288 i = index; 1289 while (i < (index + count)) { 1290 red[i] = sc->sc_cmap.cm_map[i][0]; 1291 green[i] = sc->sc_cmap.cm_map[i][1]; 1292 blue[i] = sc->sc_cmap.cm_map[i][2]; 1293 i++; 1294 } 1295 error = copyout(&red[index], cm->red, count); 1296 if (error) 1297 return error; 1298 error = copyout(&green[index], cm->green, count); 1299 if (error) 1300 return error; 1301 error = copyout(&blue[index], cm->blue, count); 1302 if (error) 1303 return error; 1304 1305 return 0; 1306 } 1307 1308 static void 1309 p9100_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1310 { 1311 struct rasops_info *ri = cookie; 1312 struct vcons_screen *scr = ri->ri_hw; 1313 int32_t xs, xd, y, width, height; 1314 1315 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1316 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1317 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1318 width = ri->ri_font->fontwidth * ncols; 1319 height = ri->ri_font->fontheight; 1320 p9100_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, ROP_SRC); 1321 } 1322 1323 static void 1324 p9100_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1325 { 1326 struct rasops_info *ri = cookie; 1327 struct vcons_screen *scr = ri->ri_hw; 1328 int32_t x, y, width, height, bg; 1329 1330 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1331 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1332 width = ri->ri_font->fontwidth * ncols; 1333 height = ri->ri_font->fontheight; 1334 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1335 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1336 } 1337 1338 static void 1339 p9100_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1340 { 1341 struct rasops_info *ri = cookie; 1342 struct vcons_screen *scr = ri->ri_hw; 1343 int32_t x, ys, yd, width, height; 1344 1345 x = ri->ri_xorigin; 1346 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1347 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1348 width = ri->ri_emuwidth; 1349 height = ri->ri_font->fontheight * nrows; 1350 p9100_bitblt(scr->scr_cookie, x, ys, x, yd, width, height, ROP_SRC); 1351 } 1352 1353 static void 1354 p9100_eraserows(void *cookie, int row, int nrows, long fillattr) 1355 { 1356 struct rasops_info *ri = cookie; 1357 struct vcons_screen *scr = ri->ri_hw; 1358 int32_t x, y, width, height, bg; 1359 1360 if ((row == 0) && (nrows == ri->ri_rows)) { 1361 x = y = 0; 1362 width = ri->ri_width; 1363 height = ri->ri_height; 1364 } else { 1365 x = ri->ri_xorigin; 1366 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1367 width = ri->ri_emuwidth; 1368 height = ri->ri_font->fontheight * nrows; 1369 } 1370 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1371 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1372 } 1373 1374 1375 static int 1376 p9100_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 1377 { 1378 if ((fg == 0) && (bg == 0)) 1379 { 1380 fg = WS_DEFAULT_FG; 1381 bg = WS_DEFAULT_BG; 1382 } 1383 1384 *attrp = (fg & 0xff) << 24 | (bg & 0xff) << 16 | (flags & 0xff); 1385 1386 if (flags & WSATTR_REVERSE) { 1387 *attrp = (bg & 0xff) << 24 | (fg & 0xff) << 16 | 1388 (flags & 0xff) << 8; 1389 } else 1390 *attrp = (fg & 0xff) << 24 | (bg & 0xff) << 16 | 1391 (flags & 0xff) << 8; 1392 1393 return 0; 1394 } 1395 1396 #if 0 1397 static int 1398 p9100_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1399 { 1400 1401 return 0; 1402 } 1403 #endif 1404 1405 #endif /* NWSDISPLAY > 0 */ 1406 1407 #if 0 1408 static int 1409 p9100_intr(void *arg) 1410 { 1411 /*p9100_softc *sc=arg;*/ 1412 DPRINTF("."); 1413 return 1; 1414 } 1415 #endif 1416 1417 static void 1418 p9100_init_cursor(struct p9100_softc *sc) 1419 { 1420 1421 memset(&sc->sc_cursor, 0, sizeof(struct pnozz_cursor)); 1422 sc->sc_cursor.pc_size.x = 64; 1423 sc->sc_cursor.pc_size.y = 64; 1424 1425 } 1426 1427 static void 1428 p9100_set_fbcursor(struct p9100_softc *sc) 1429 { 1430 #ifdef PNOZZ_PARANOID 1431 int s; 1432 1433 s = splhigh(); /* just in case... */ 1434 #endif 1435 sc->sc_last_offset = 0xffffffff; 1436 1437 /* set position and hotspot */ 1438 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1439 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1440 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_CTL); 1441 if (sc->sc_cursor.pc_enable) { 1442 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_X11 | 1443 DAC_CURSOR_64); 1444 } else 1445 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_OFF); 1446 /* next two registers - x low, high, y low, high */ 1447 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.x & 0xff); 1448 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.x >> 8) & 1449 0xff); 1450 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.y & 0xff); 1451 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.y >> 8) & 1452 0xff); 1453 /* hotspot */ 1454 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.x & 0xff); 1455 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.y & 0xff); 1456 1457 #ifdef PNOZZ_PARANOID 1458 splx(s); 1459 #endif 1460 1461 } 1462 1463 static void 1464 p9100_setcursorcmap(struct p9100_softc *sc) 1465 { 1466 int i; 1467 1468 #ifdef PNOZZ_PARANOID 1469 int s; 1470 s = splhigh(); /* just in case... */ 1471 #endif 1472 sc->sc_last_offset = 0xffffffff; 1473 1474 /* set cursor colours */ 1475 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1476 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1477 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_COL_1); 1478 1479 for (i = 0; i < 3; i++) { 1480 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.red[i]); 1481 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.green[i]); 1482 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.blue[i]); 1483 } 1484 1485 #ifdef PNOZZ_PARANOID 1486 splx(s); 1487 #endif 1488 } 1489 1490 static void 1491 p9100_loadcursor(struct p9100_softc *sc) 1492 { 1493 uint32_t *image, *mask; 1494 uint32_t bit, bbit, im, ma; 1495 int i, j, k; 1496 uint8_t latch1, latch2; 1497 1498 #ifdef PNOZZ_PARANOID 1499 int s; 1500 s = splhigh(); /* just in case... */ 1501 #endif 1502 sc->sc_last_offset = 0xffffffff; 1503 1504 /* set cursor shape */ 1505 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1506 p9100_ramdac_write(sc, DAC_INDX_HI, 1); 1507 p9100_ramdac_write(sc, DAC_INDX_LO, 0); 1508 1509 image = sc->sc_cursor.pc_bits; 1510 mask = &sc->sc_cursor.pc_bits[0x80]; 1511 1512 for (i = 0; i < 0x80; i++) { 1513 bit = 0x80000000; 1514 im = image[i]; 1515 ma = mask[i]; 1516 for (k = 0; k < 4; k++) { 1517 bbit = 0x1; 1518 latch1 = 0; 1519 for (j = 0; j < 4; j++) { 1520 if (im & bit) 1521 latch1 |= bbit; 1522 bbit <<= 1; 1523 if (ma & bit) 1524 latch1 |= bbit; 1525 bbit <<= 1; 1526 bit >>= 1; 1527 } 1528 bbit = 0x1; 1529 latch2 = 0; 1530 for (j = 0; j < 4; j++) { 1531 if (im & bit) 1532 latch2 |= bbit; 1533 bbit <<= 1; 1534 if (ma & bit) 1535 latch2 |= bbit; 1536 bbit <<= 1; 1537 bit >>= 1; 1538 } 1539 p9100_ramdac_write(sc, DAC_INDX_DATA, latch1); 1540 p9100_ramdac_write(sc, DAC_INDX_DATA, latch2); 1541 } 1542 } 1543 #ifdef PNOZZ_DEBUG_CURSOR 1544 printf("image:\n"); 1545 for (i=0;i<0x80;i+=2) 1546 printf("%08x %08x\n", image[i], image[i+1]); 1547 printf("mask:\n"); 1548 for (i=0;i<0x80;i+=2) 1549 printf("%08x %08x\n", mask[i], mask[i+1]); 1550 #endif 1551 #ifdef PNOZZ_PARANOID 1552 splx(s); 1553 #endif 1554 } 1555 1556 #if NTCTRL > 0 1557 static void 1558 p9100_set_extvga(void *cookie, int status) 1559 { 1560 struct p9100_softc *sc = cookie; 1561 #ifdef PNOZZ_PARANOID 1562 int s; 1563 1564 s = splhigh(); 1565 #endif 1566 1567 #ifdef PNOZZ_DEBUG 1568 printf("%s: external VGA %s\n", device_xname(sc->sc_dev), 1569 status ? "on" : "off"); 1570 #endif 1571 1572 sc->sc_last_offset = 0xffffffff; 1573 1574 if (status) { 1575 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1576 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) & 1577 ~DAC_POWER_IPWR_DISABLE); 1578 } else { 1579 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1580 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) | 1581 DAC_POWER_IPWR_DISABLE); 1582 } 1583 #ifdef PNOZZ_PARANOID 1584 splx(s); 1585 #endif 1586 } 1587 #endif /* NTCTRL > 0 */ 1588 1589 static int 1590 upper_bit(uint32_t b) 1591 { 1592 uint32_t mask=0x80000000; 1593 int cnt = 31; 1594 if (b == 0) 1595 return -1; 1596 while ((mask != 0) && ((b & mask) == 0)) { 1597 mask = mask >> 1; 1598 cnt--; 1599 } 1600 return cnt; 1601 } 1602 1603 static int 1604 p9100_set_depth(struct p9100_softc *sc, int depth) 1605 { 1606 int new_sls; 1607 uint32_t bits, scr, memctl, mem; 1608 int s0, s1, s2, s3, ps, crtcline; 1609 uint8_t pf, mc3, es; 1610 1611 switch (depth) { 1612 case 8: 1613 sc->sc_depthshift = 0; 1614 ps = 2; 1615 pf = 3; 1616 mc3 = 0; 1617 es = 0; /* no swapping */ 1618 memctl = 3; 1619 break; 1620 case 16: 1621 sc->sc_depthshift = 1; 1622 ps = 3; 1623 pf = 4; 1624 mc3 = 0; 1625 es = 2; /* swap bytes in 16bit words */ 1626 memctl = 2; 1627 break; 1628 case 24: 1629 /* boo */ 1630 printf("We don't DO 24bit pixels dammit!\n"); 1631 return 0; 1632 case 32: 1633 sc->sc_depthshift = 2; 1634 ps = 5; 1635 pf = 6; 1636 mc3 = 0; 1637 es = 6; /* swap both half-words and bytes */ 1638 memctl = 1; /* 0 */ 1639 break; 1640 default: 1641 aprint_error("%s: bogus colour depth (%d)\n", 1642 __func__, depth); 1643 return FALSE; 1644 } 1645 /* 1646 * this could be done a lot shorter and faster but then nobody would 1647 * understand what the hell we're doing here without getting a major 1648 * headache. Scanline size is encoded as 4 shift values, 3 of them 3 bits 1649 * wide, 16 << n for n>0, one 2 bits, 512 << n for n>0. n==0 means 0 1650 */ 1651 new_sls = sc->sc_width << sc->sc_depthshift; 1652 sc->sc_stride = new_sls; 1653 bits = new_sls; 1654 s3 = upper_bit(bits); 1655 if (s3 > 9) { 1656 bits &= ~(1 << s3); 1657 s3 -= 9; 1658 } else 1659 s3 = 0; 1660 s2 = upper_bit(bits); 1661 if (s2 > 0) { 1662 bits &= ~(1 << s2); 1663 s2 -= 4; 1664 } else 1665 s2 = 0; 1666 s1 = upper_bit(bits); 1667 if (s1 > 0) { 1668 bits &= ~(1 << s1); 1669 s1 -= 4; 1670 } else 1671 s1 = 0; 1672 s0 = upper_bit(bits); 1673 if (s0 > 0) { 1674 bits &= ~(1 << s0); 1675 s0 -= 4; 1676 } else 1677 s0 = 0; 1678 1679 1680 DPRINTF("sls: %x sh: %d %d %d %d leftover: %x\n", new_sls, s0, s1, 1681 s2, s3, bits); 1682 1683 /* 1684 * now let's put these values into the System Config Register. No need to 1685 * read it here since we (hopefully) just saved the content 1686 */ 1687 scr = p9100_ctl_read_4(sc, SYS_CONF); 1688 scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) | 1689 (s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT); 1690 1691 DPRINTF("new scr: %x DAC %x %x\n", scr, pf, mc3); 1692 1693 mem = p9100_ctl_read_4(sc, VID_MEM_CONFIG); 1694 1695 DPRINTF("old memctl: %08x\n", mem); 1696 1697 /* set shift and crtc clock */ 1698 mem &= ~(0x0000fc00); 1699 mem |= (memctl << 10) | (memctl << 13); 1700 p9100_ctl_write_4(sc, VID_MEM_CONFIG, mem); 1701 1702 DPRINTF("new memctl: %08x\n", mem); 1703 1704 /* whack the engine... */ 1705 p9100_ctl_write_4(sc, SYS_CONF, scr); 1706 1707 /* ok, whack the DAC */ 1708 p9100_ramdac_write_ctl(sc, DAC_MISC_1, 0x11); 1709 p9100_ramdac_write_ctl(sc, DAC_MISC_2, 0x45); 1710 p9100_ramdac_write_ctl(sc, DAC_MISC_3, mc3); 1711 /* 1712 * despite the 3GX manual saying otherwise we don't need to mess with 1713 * any clock dividers here 1714 */ 1715 p9100_ramdac_write_ctl(sc, DAC_MISC_CLK, 1); 1716 p9100_ramdac_write_ctl(sc, 3, 0); 1717 p9100_ramdac_write_ctl(sc, 4, 0); 1718 1719 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 0); 1720 p9100_ramdac_write_ctl(sc, DAC_OPERATION, 0); 1721 p9100_ramdac_write_ctl(sc, DAC_PALETTE_CTRL, 0); 1722 1723 p9100_ramdac_write_ctl(sc, DAC_PIXEL_FMT, pf); 1724 1725 /* TODO: distinguish between 15 and 16 bit */ 1726 p9100_ramdac_write_ctl(sc, DAC_8BIT_CTRL, 0); 1727 /* direct colour, linear, 565 */ 1728 p9100_ramdac_write_ctl(sc, DAC_16BIT_CTRL, 0xc6); 1729 /* direct colour */ 1730 p9100_ramdac_write_ctl(sc, DAC_32BIT_CTRL, 3); 1731 1732 /* From the 3GX manual. Needs magic number reduction */ 1733 p9100_ramdac_write_ctl(sc, 0x10, 2); 1734 p9100_ramdac_write_ctl(sc, 0x11, 0); 1735 p9100_ramdac_write_ctl(sc, 0x14, 5); 1736 p9100_ramdac_write_ctl(sc, 0x08, 1); 1737 p9100_ramdac_write_ctl(sc, 0x15, 5); 1738 p9100_ramdac_write_ctl(sc, 0x16, 0x63); 1739 1740 /* whack the CRTC */ 1741 /* we always transfer 64bit in one go */ 1742 crtcline = sc->sc_stride >> 3; 1743 1744 DPRINTF("crtcline: %d\n", crtcline); 1745 1746 p9100_ctl_write_4(sc, VID_HTOTAL, (24 << sc->sc_depthshift) + crtcline); 1747 p9100_ctl_write_4(sc, VID_HSRE, 8 << sc->sc_depthshift); 1748 p9100_ctl_write_4(sc, VID_HBRE, 18 << sc->sc_depthshift); 1749 p9100_ctl_write_4(sc, VID_HBFE, (18 << sc->sc_depthshift) + crtcline); 1750 1751 #ifdef PNOZZ_DEBUG 1752 { 1753 uint32_t sscr; 1754 sscr = p9100_ctl_read_4(sc, SYS_CONF); 1755 printf("scr: %x\n", sscr); 1756 } 1757 #endif 1758 return TRUE; 1759 } 1760
Indexes created Sat Oct 25 16:10:12 GMT 2025