p9100.c revision 1.56
1 /* $NetBSD: p9100.c,v 1.56 2012/01/11 16:08:57 macallan Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2005, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * color display (p9100) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: p9100.c,v 1.56 2012/01/11 16:08:57 macallan Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/buf.h> 46 #include <sys/device.h> 47 #include <sys/ioctl.h> 48 #include <sys/malloc.h> 49 #include <sys/mman.h> 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 53 #include <sys/bus.h> 54 #include <machine/autoconf.h> 55 56 #include <dev/sun/fbio.h> 57 #include <dev/sun/fbvar.h> 58 #include <dev/sun/btreg.h> 59 #include <dev/sun/btvar.h> 60 61 #include <dev/sbus/p9100reg.h> 62 63 #include <dev/sbus/sbusvar.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/wscons/wsconsio.h> 67 #include <dev/wsfont/wsfont.h> 68 #include <dev/rasops/rasops.h> 69 70 #include <dev/wscons/wsdisplay_vconsvar.h> 71 72 #include "opt_wsemul.h" 73 #include "rasops_glue.h" 74 #include "opt_pnozz.h" 75 76 #include "ioconf.h" 77 78 #include "tctrl.h" 79 #if NTCTRL > 0 80 #include <machine/tctrl.h> 81 #include <sparc/dev/tctrlvar.h> /*XXX*/ 82 #endif 83 84 #ifdef PNOZZ_DEBUG 85 #define DPRINTF aprint_normal 86 #else 87 #define DPRINTF while (0) aprint_normal 88 #endif 89 90 struct pnozz_cursor { 91 short pc_enable; /* cursor is enabled */ 92 struct fbcurpos pc_pos; /* position */ 93 struct fbcurpos pc_hot; /* hot-spot */ 94 struct fbcurpos pc_size; /* size of mask & image fields */ 95 uint32_t pc_bits[0x100]; /* space for mask & image bits */ 96 unsigned char red[3], green[3]; 97 unsigned char blue[3]; /* cursor palette */ 98 }; 99 100 /* per-display variables */ 101 struct p9100_softc { 102 device_t sc_dev; /* base device */ 103 struct fbdevice sc_fb; /* frame buffer device */ 104 105 bus_space_tag_t sc_bustag; 106 107 bus_addr_t sc_ctl_paddr; /* phys address description */ 108 bus_size_t sc_ctl_psize; /* for device mmap() */ 109 bus_space_handle_t sc_ctl_memh; /* bus space handle */ 110 111 bus_addr_t sc_fb_paddr; /* phys address description */ 112 bus_size_t sc_fb_psize; /* for device mmap() */ 113 #ifdef PNOZZ_USE_LATCH 114 bus_space_handle_t sc_fb_memh; /* bus space handle */ 115 #endif 116 volatile uint32_t sc_junk; 117 uint32_t sc_mono_width; /* for setup_mono */ 118 119 uint32_t sc_width; 120 uint32_t sc_height; /* panel width / height */ 121 uint32_t sc_stride; 122 uint32_t sc_depth; 123 int sc_depthshift; /* blitter works on bytes not pixels */ 124 125 union bt_cmap sc_cmap; /* Brooktree color map */ 126 127 struct pnozz_cursor sc_cursor; 128 129 int sc_mode; 130 int sc_video, sc_powerstate; 131 uint32_t sc_bg; 132 volatile uint32_t sc_last_offset; 133 struct vcons_data vd; 134 uint8_t sc_dac_power; 135 }; 136 137 138 static struct vcons_screen p9100_console_screen; 139 140 extern const u_char rasops_cmap[768]; 141 142 struct wsscreen_descr p9100_defscreendesc = { 143 "default", 144 0, 0, 145 NULL, 146 8, 16, 147 WSSCREEN_WSCOLORS, 148 }; 149 150 const struct wsscreen_descr *_p9100_scrlist[] = { 151 &p9100_defscreendesc, 152 /* XXX other formats, graphics screen? */ 153 }; 154 155 struct wsscreen_list p9100_screenlist = { 156 sizeof(_p9100_scrlist) / sizeof(struct wsscreen_descr *), 157 _p9100_scrlist 158 }; 159 160 /* autoconfiguration driver */ 161 static int p9100_sbus_match(device_t, cfdata_t, void *); 162 static void p9100_sbus_attach(device_t, device_t, void *); 163 164 static void p9100unblank(device_t); 165 166 CFATTACH_DECL_NEW(pnozz, sizeof(struct p9100_softc), 167 p9100_sbus_match, p9100_sbus_attach, NULL, NULL); 168 169 static dev_type_open(p9100open); 170 static dev_type_ioctl(p9100ioctl); 171 static dev_type_mmap(p9100mmap); 172 173 const struct cdevsw pnozz_cdevsw = { 174 p9100open, nullclose, noread, nowrite, p9100ioctl, 175 nostop, notty, nopoll, p9100mmap, nokqfilter, 176 }; 177 178 /* frame buffer generic driver */ 179 static struct fbdriver p9100fbdriver = { 180 p9100unblank, p9100open, nullclose, p9100ioctl, nopoll, 181 p9100mmap, nokqfilter 182 }; 183 184 static void p9100loadcmap(struct p9100_softc *, int, int); 185 static void p9100_set_video(struct p9100_softc *, int); 186 static int p9100_get_video(struct p9100_softc *); 187 static uint32_t p9100_ctl_read_4(struct p9100_softc *, bus_size_t); 188 static void p9100_ctl_write_4(struct p9100_softc *, bus_size_t, uint32_t); 189 static uint8_t p9100_ramdac_read(struct p9100_softc *, bus_size_t); 190 static void p9100_ramdac_write(struct p9100_softc *, bus_size_t, uint8_t); 191 192 static uint8_t p9100_ramdac_read_ctl(struct p9100_softc *, int); 193 static void p9100_ramdac_write_ctl(struct p9100_softc *, int, uint8_t); 194 195 static void p9100_init_engine(struct p9100_softc *); 196 static int p9100_set_depth(struct p9100_softc *, int); 197 198 #if NWSDISPLAY > 0 199 static void p9100_sync(struct p9100_softc *); 200 static void p9100_bitblt(void *, int, int, int, int, int, int, uint32_t); 201 static void p9100_rectfill(void *, int, int, int, int, uint32_t); 202 static void p9100_clearscreen(struct p9100_softc *); 203 204 static void p9100_setup_mono(struct p9100_softc *, int, int, int, int, 205 uint32_t, uint32_t); 206 static void p9100_feed_line(struct p9100_softc *, int, uint8_t *); 207 static void p9100_set_color_reg(struct p9100_softc *, int, int32_t); 208 209 static void p9100_copycols(void *, int, int, int, int); 210 static void p9100_erasecols(void *, int, int, int, long); 211 static void p9100_copyrows(void *, int, int, int); 212 static void p9100_eraserows(void *, int, int, long); 213 /*static int p9100_mapchar(void *, int, u_int *);*/ 214 static void p9100_putchar(void *, int, int, u_int, long); 215 static void p9100_cursor(void *, int, int, int); 216 static int p9100_allocattr(void *, int, int, int, long *); 217 218 static int p9100_putcmap(struct p9100_softc *, struct wsdisplay_cmap *); 219 static int p9100_getcmap(struct p9100_softc *, struct wsdisplay_cmap *); 220 static int p9100_ioctl(void *, void *, u_long, void *, int, struct lwp *); 221 static paddr_t p9100_mmap(void *, void *, off_t, int); 222 223 /*static int p9100_load_font(void *, void *, struct wsdisplay_font *);*/ 224 225 static void p9100_init_screen(void *, struct vcons_screen *, int, 226 long *); 227 #endif 228 229 static void p9100_init_cursor(struct p9100_softc *); 230 231 static void p9100_set_fbcursor(struct p9100_softc *); 232 static void p9100_setcursorcmap(struct p9100_softc *); 233 static void p9100_loadcursor(struct p9100_softc *); 234 235 #if 0 236 static int p9100_intr(void *); 237 #endif 238 239 /* power management stuff */ 240 static bool p9100_suspend(device_t, const pmf_qual_t *); 241 static bool p9100_resume(device_t, const pmf_qual_t *); 242 243 #if NTCTRL > 0 244 static void p9100_set_extvga(void *, int); 245 #endif 246 247 #if NWSDISPLAY > 0 248 struct wsdisplay_accessops p9100_accessops = { 249 p9100_ioctl, 250 p9100_mmap, 251 NULL, /* vcons_alloc_screen */ 252 NULL, /* vcons_free_screen */ 253 NULL, /* vcons_show_screen */ 254 NULL, /* load_font */ 255 NULL, /* polls */ 256 NULL, /* scroll */ 257 }; 258 #endif 259 260 #ifdef PNOZZ_USE_LATCH 261 #define PNOZZ_LATCH(sc, off) if(sc->sc_last_offset != (off & 0xffffff80)) { \ 262 sc->sc_junk = bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, \ 263 off); \ 264 sc->sc_last_offset = off & 0xffffff80; } 265 #else 266 #define PNOZZ_LATCH(a, b) 267 #endif 268 269 /* 270 * Match a p9100. 271 */ 272 static int 273 p9100_sbus_match(device_t parent, cfdata_t cf, void *aux) 274 { 275 struct sbus_attach_args *sa = aux; 276 277 if (strcmp("p9100", sa->sa_name) == 0) 278 return 100; 279 return 0; 280 } 281 282 283 /* 284 * Attach a display. We need to notice if it is the console, too. 285 */ 286 static void 287 p9100_sbus_attach(device_t parent, device_t self, void *args) 288 { 289 struct p9100_softc *sc = device_private(self); 290 struct sbus_attach_args *sa = args; 291 struct fbdevice *fb = &sc->sc_fb; 292 int isconsole; 293 int node = sa->sa_node; 294 int i, j; 295 uint8_t ver; 296 297 #if NWSDISPLAY > 0 298 struct wsemuldisplaydev_attach_args aa; 299 struct rasops_info *ri; 300 unsigned long defattr; 301 #endif 302 303 sc->sc_last_offset = 0xffffffff; 304 sc->sc_dev = self; 305 306 /* 307 * When the ROM has mapped in a p9100 display, the address 308 * maps only the video RAM, so in any case we have to map the 309 * registers ourselves. 310 */ 311 312 if (sa->sa_npromvaddrs != 0) 313 fb->fb_pixels = (void *)sa->sa_promvaddrs[0]; 314 315 /* Remember cookies for p9100_mmap() */ 316 sc->sc_bustag = sa->sa_bustag; 317 318 sc->sc_ctl_paddr = sbus_bus_addr(sa->sa_bustag, 319 sa->sa_reg[0].oa_space, sa->sa_reg[0].oa_base); 320 sc->sc_ctl_psize = 0x8000;/*(bus_size_t)sa->sa_reg[0].oa_size;*/ 321 322 sc->sc_fb_paddr = sbus_bus_addr(sa->sa_bustag, 323 sa->sa_reg[2].oa_space, sa->sa_reg[2].oa_base); 324 sc->sc_fb_psize = (bus_size_t)sa->sa_reg[2].oa_size; 325 326 if (sbus_bus_map(sc->sc_bustag, 327 sa->sa_reg[0].oa_space, 328 sa->sa_reg[0].oa_base, 329 /* 330 * XXX for some reason the SBus resources don't cover 331 * all registers, so we just map what we need 332 */ 333 0x8000, 334 0, &sc->sc_ctl_memh) != 0) { 335 printf("%s: cannot map control registers\n", 336 self->dv_xname); 337 return; 338 } 339 340 /* 341 * we need to map the framebuffer even though we never write to it, 342 * thanks to some weirdness in the SPARCbook's SBus glue for the 343 * P9100 - all register accesses need to be 'latched in' whenever we 344 * go to another 0x80 aligned 'page' by reading the framebuffer at the 345 * same offset 346 * XXX apparently the latter isn't true - my SP3GX works fine without 347 */ 348 #ifdef PNOZZ_USE_LATCH 349 if (fb->fb_pixels == NULL) { 350 if (sbus_bus_map(sc->sc_bustag, 351 sa->sa_reg[2].oa_space, 352 sa->sa_reg[2].oa_base, 353 sc->sc_fb_psize, 354 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE, 355 &sc->sc_fb_memh) != 0) { 356 printf("%s: cannot map framebuffer\n", 357 self->dv_xname); 358 return; 359 } 360 fb->fb_pixels = (char *)sc->sc_fb_memh; 361 } else { 362 sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels; 363 } 364 #endif 365 sc->sc_width = prom_getpropint(node, "width", 800); 366 sc->sc_height = prom_getpropint(node, "height", 600); 367 sc->sc_depth = prom_getpropint(node, "depth", 8) >> 3; 368 369 sc->sc_stride = prom_getpropint(node, "linebytes", 370 sc->sc_width * sc->sc_depth); 371 372 fb->fb_driver = &p9100fbdriver; 373 fb->fb_device = sc->sc_dev; 374 fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK; 375 #ifdef PNOZZ_EMUL_CG3 376 fb->fb_type.fb_type = FBTYPE_SUN3COLOR; 377 #else 378 fb->fb_type.fb_type = FBTYPE_P9100; 379 #endif 380 fb->fb_pixels = NULL; 381 382 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 383 384 isconsole = fb_is_console(node); 385 #if 0 386 if (!isconsole) { 387 aprint_normal("\n"); 388 aprint_error_dev(self, "fatal error: PROM didn't configure device\n"); 389 return; 390 } 391 #endif 392 393 fb->fb_type.fb_depth = 8; 394 sc->sc_depth = 1; 395 sc->sc_depthshift = 0; 396 397 /* check the RAMDAC */ 398 ver = p9100_ramdac_read_ctl(sc, DAC_VERSION); 399 400 p9100_init_engine(sc); 401 p9100_set_depth(sc, 8); 402 403 fb_setsize_obp(fb, fb->fb_type.fb_depth, sc->sc_width, sc->sc_height, 404 node); 405 406 #if 0 407 bus_intr_establish(sc->sc_bustag, sa->sa_pri, IPL_BIO, 408 p9100_intr, sc); 409 #endif 410 411 fb->fb_type.fb_cmsize = prom_getpropint(node, "cmsize", 256); 412 if ((1 << fb->fb_type.fb_depth) != fb->fb_type.fb_cmsize) 413 printf(", %d entry colormap", fb->fb_type.fb_cmsize); 414 415 /* Initialize the default color map. */ 416 j = 0; 417 for (i = 0; i < 256; i++) { 418 sc->sc_cmap.cm_map[i][0] = rasops_cmap[j]; 419 j++; 420 sc->sc_cmap.cm_map[i][1] = rasops_cmap[j]; 421 j++; 422 sc->sc_cmap.cm_map[i][2] = rasops_cmap[j]; 423 j++; 424 } 425 p9100loadcmap(sc, 0, 256); 426 427 /* make sure we are not blanked */ 428 if (isconsole) 429 p9100_set_video(sc, 1); 430 431 /* register with power management */ 432 sc->sc_video = 1; 433 sc->sc_powerstate = PWR_RESUME; 434 if (!pmf_device_register(self, p9100_suspend, p9100_resume)) { 435 panic("%s: could not register with PMF", 436 device_xname(sc->sc_dev)); 437 } 438 439 if (isconsole) { 440 printf(" (console)\n"); 441 #ifdef RASTERCONSOLE 442 /*p9100loadcmap(sc, 255, 1);*/ 443 fbrcons_init(fb); 444 #endif 445 } else 446 printf("\n"); 447 448 #if NWSDISPLAY > 0 449 wsfont_init(); 450 451 vcons_init(&sc->vd, sc, &p9100_defscreendesc, &p9100_accessops); 452 sc->vd.init_screen = p9100_init_screen; 453 454 vcons_init_screen(&sc->vd, &p9100_console_screen, 1, &defattr); 455 p9100_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 456 457 sc->sc_bg = (defattr >> 16) & 0xff; 458 p9100_clearscreen(sc); 459 460 ri = &p9100_console_screen.scr_ri; 461 462 p9100_defscreendesc.nrows = ri->ri_rows; 463 p9100_defscreendesc.ncols = ri->ri_cols; 464 p9100_defscreendesc.textops = &ri->ri_ops; 465 p9100_defscreendesc.capabilities = ri->ri_caps; 466 467 if(isconsole) { 468 wsdisplay_cnattach(&p9100_defscreendesc, ri, 0, 0, defattr); 469 vcons_replay_msgbuf(&p9100_console_screen); 470 } 471 472 aa.console = isconsole; 473 aa.scrdata = &p9100_screenlist; 474 aa.accessops = &p9100_accessops; 475 aa.accesscookie = &sc->vd; 476 477 config_found(self, &aa, wsemuldisplaydevprint); 478 #endif 479 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 480 printf("%s: rev %d / %x, %dx%d, depth %d mem %x\n", 481 device_xname(self), 482 (i & 7), ver, fb->fb_type.fb_width, fb->fb_type.fb_height, 483 fb->fb_type.fb_depth, (unsigned int)sc->sc_fb_psize); 484 /* cursor sprite handling */ 485 p9100_init_cursor(sc); 486 487 /* attach the fb */ 488 fb_attach(fb, isconsole); 489 490 #if NTCTRL > 0 491 /* register callback for external monitor status change */ 492 tadpole_register_callback(p9100_set_extvga, sc); 493 #endif 494 } 495 496 int 497 p9100open(dev_t dev, int flags, int mode, struct lwp *l) 498 { 499 int unit = minor(dev); 500 501 if (device_lookup(&pnozz_cd, unit) == NULL) 502 return (ENXIO); 503 return (0); 504 } 505 506 int 507 p9100ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 508 { 509 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 510 struct fbgattr *fba; 511 int error, v; 512 513 switch (cmd) { 514 515 case FBIOGTYPE: 516 *(struct fbtype *)data = sc->sc_fb.fb_type; 517 break; 518 519 case FBIOGATTR: 520 fba = (struct fbgattr *)data; 521 fba->real_type = sc->sc_fb.fb_type.fb_type; 522 fba->owner = 0; /* XXX ??? */ 523 fba->fbtype = sc->sc_fb.fb_type; 524 fba->sattr.flags = 0; 525 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 526 fba->sattr.dev_specific[0] = -1; 527 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 528 fba->emu_types[1] = -1; 529 break; 530 531 case FBIOGETCMAP: 532 #define p ((struct fbcmap *)data) 533 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 534 535 case FBIOPUTCMAP: 536 /* copy to software map */ 537 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 538 if (error) 539 return (error); 540 /* now blast them into the chip */ 541 /* XXX should use retrace interrupt */ 542 p9100loadcmap(sc, p->index, p->count); 543 #undef p 544 break; 545 546 case FBIOGVIDEO: 547 *(int *)data = p9100_get_video(sc); 548 break; 549 550 case FBIOSVIDEO: 551 p9100_set_video(sc, *(int *)data); 552 break; 553 554 /* these are for both FBIOSCURSOR and FBIOGCURSOR */ 555 #define p ((struct fbcursor *)data) 556 #define pc (&sc->sc_cursor) 557 558 case FBIOGCURSOR: 559 p->set = FB_CUR_SETALL; /* close enough, anyway */ 560 p->enable = pc->pc_enable; 561 p->pos = pc->pc_pos; 562 p->hot = pc->pc_hot; 563 p->size = pc->pc_size; 564 565 if (p->image != NULL) { 566 error = copyout(pc->pc_bits, p->image, 0x200); 567 if (error) 568 return error; 569 error = copyout(&pc->pc_bits[0x80], p->mask, 0x200); 570 if (error) 571 return error; 572 } 573 574 p->cmap.index = 0; 575 p->cmap.count = 3; 576 if (p->cmap.red != NULL) { 577 copyout(pc->red, p->cmap.red, 3); 578 copyout(pc->green, p->cmap.green, 3); 579 copyout(pc->blue, p->cmap.blue, 3); 580 } 581 break; 582 583 case FBIOSCURSOR: 584 { 585 int count; 586 uint32_t image[0x80], mask[0x80]; 587 uint8_t red[3], green[3], blue[3]; 588 589 v = p->set; 590 if (v & FB_CUR_SETCMAP) { 591 error = copyin(p->cmap.red, red, 3); 592 error |= copyin(p->cmap.green, green, 3); 593 error |= copyin(p->cmap.blue, blue, 3); 594 if (error) 595 return error; 596 } 597 if (v & FB_CUR_SETSHAPE) { 598 if (p->size.x > 64 || p->size.y > 64) 599 return EINVAL; 600 memset(&mask, 0, 0x200); 601 memset(&image, 0, 0x200); 602 count = p->size.y * 8; 603 error = copyin(p->image, image, count); 604 if (error) 605 return error; 606 error = copyin(p->mask, mask, count); 607 if (error) 608 return error; 609 } 610 611 /* parameters are OK; do it */ 612 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 613 if (v & FB_CUR_SETCUR) 614 pc->pc_enable = p->enable; 615 if (v & FB_CUR_SETPOS) 616 pc->pc_pos = p->pos; 617 if (v & FB_CUR_SETHOT) 618 pc->pc_hot = p->hot; 619 p9100_set_fbcursor(sc); 620 } 621 622 if (v & FB_CUR_SETCMAP) { 623 memcpy(pc->red, red, 3); 624 memcpy(pc->green, green, 3); 625 memcpy(pc->blue, blue, 3); 626 p9100_setcursorcmap(sc); 627 } 628 629 if (v & FB_CUR_SETSHAPE) { 630 memcpy(pc->pc_bits, image, 0x200); 631 memcpy(&pc->pc_bits[0x80], mask, 0x200); 632 p9100_loadcursor(sc); 633 } 634 } 635 break; 636 637 #undef p 638 #undef cc 639 640 case FBIOGCURPOS: 641 *(struct fbcurpos *)data = sc->sc_cursor.pc_pos; 642 break; 643 644 case FBIOSCURPOS: 645 sc->sc_cursor.pc_pos = *(struct fbcurpos *)data; 646 p9100_set_fbcursor(sc); 647 break; 648 649 case FBIOGCURMAX: 650 /* max cursor size is 64x64 */ 651 ((struct fbcurpos *)data)->x = 64; 652 ((struct fbcurpos *)data)->y = 64; 653 break; 654 655 default: 656 return (ENOTTY); 657 } 658 return (0); 659 } 660 661 static uint32_t 662 p9100_ctl_read_4(struct p9100_softc *sc, bus_size_t off) 663 { 664 665 PNOZZ_LATCH(sc, off); 666 return bus_space_read_4(sc->sc_bustag, sc->sc_ctl_memh, off); 667 } 668 669 static void 670 p9100_ctl_write_4(struct p9100_softc *sc, bus_size_t off, uint32_t v) 671 { 672 673 PNOZZ_LATCH(sc, off); 674 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, v); 675 } 676 677 /* initialize the drawing engine */ 678 static void 679 p9100_init_engine(struct p9100_softc *sc) 680 { 681 /* reset clipping rectangles */ 682 uint32_t rmax = ((sc->sc_width & 0x3fff) << 16) | 683 (sc->sc_height & 0x3fff); 684 685 sc->sc_last_offset = 0xffffffff; 686 687 p9100_ctl_write_4(sc, WINDOW_OFFSET, 0); 688 p9100_ctl_write_4(sc, WINDOW_MIN, 0); 689 p9100_ctl_write_4(sc, WINDOW_MAX, rmax); 690 p9100_ctl_write_4(sc, BYTE_CLIP_MIN, 0); 691 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, rmax); 692 p9100_ctl_write_4(sc, DRAW_MODE, 0); 693 p9100_ctl_write_4(sc, PLANE_MASK, 0xffffffff); 694 p9100_ctl_write_4(sc, PATTERN0, 0xffffffff); 695 p9100_ctl_write_4(sc, PATTERN1, 0xffffffff); 696 p9100_ctl_write_4(sc, PATTERN2, 0xffffffff); 697 p9100_ctl_write_4(sc, PATTERN3, 0xffffffff); 698 699 } 700 701 /* we only need these in the wsdisplay case */ 702 #if NWSDISPLAY > 0 703 704 /* wait until the engine is idle */ 705 static void 706 p9100_sync(struct p9100_softc *sc) 707 { 708 while((p9100_ctl_read_4(sc, ENGINE_STATUS) & 709 (ENGINE_BUSY | BLITTER_BUSY)) != 0); 710 } 711 712 static void 713 p9100_set_color_reg(struct p9100_softc *sc, int reg, int32_t col) 714 { 715 uint32_t out; 716 717 switch(sc->sc_depth) 718 { 719 case 1: /* 8 bit */ 720 out = (col << 8) | col; 721 out |= out << 16; 722 break; 723 case 2: /* 16 bit */ 724 out = col | (col << 16); 725 break; 726 default: 727 out = col; 728 } 729 p9100_ctl_write_4(sc, reg, out); 730 } 731 732 /* screen-to-screen blit */ 733 static void 734 p9100_bitblt(void *cookie, int xs, int ys, int xd, int yd, int wi, 735 int he, uint32_t rop) 736 { 737 struct p9100_softc *sc = cookie; 738 uint32_t src, dst, srcw, dstw; 739 740 sc->sc_last_offset = 0xffffffff; 741 742 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 743 dst = ((xd & 0x3fff) << 16) | (yd & 0x3fff); 744 srcw = (((xs + wi - 1) & 0x3fff) << 16) | ((ys + he - 1) & 0x3fff); 745 dstw = (((xd + wi - 1) & 0x3fff) << 16) | ((yd + he - 1) & 0x3fff); 746 747 p9100_sync(sc); 748 749 p9100_ctl_write_4(sc, RASTER_OP, rop); 750 751 p9100_ctl_write_4(sc, ABS_XY0, src << sc->sc_depthshift); 752 p9100_ctl_write_4(sc, ABS_XY1, srcw << sc->sc_depthshift); 753 p9100_ctl_write_4(sc, ABS_XY2, dst << sc->sc_depthshift); 754 p9100_ctl_write_4(sc, ABS_XY3, dstw << sc->sc_depthshift); 755 756 sc->sc_junk = p9100_ctl_read_4(sc, COMMAND_BLIT); 757 } 758 759 /* solid rectangle fill */ 760 static void 761 p9100_rectfill(void *cookie, int xs, int ys, int wi, int he, uint32_t col) 762 { 763 struct p9100_softc *sc = cookie; 764 uint32_t src, srcw; 765 766 sc->sc_last_offset = 0xffffffff; 767 768 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 769 srcw = (((xs + wi) & 0x3fff) << 16) | ((ys + he) & 0x3fff); 770 p9100_sync(sc); 771 p9100_set_color_reg(sc, FOREGROUND_COLOR, col); 772 p9100_set_color_reg(sc, BACKGROUND_COLOR, col); 773 p9100_ctl_write_4(sc, RASTER_OP, ROP_PAT); 774 p9100_ctl_write_4(sc, COORD_INDEX, 0); 775 p9100_ctl_write_4(sc, RECT_RTW_XY, src); 776 p9100_ctl_write_4(sc, RECT_RTW_XY, srcw); 777 sc->sc_junk = p9100_ctl_read_4(sc, COMMAND_QUAD); 778 } 779 780 /* setup for mono->colour expansion */ 781 static void 782 p9100_setup_mono(struct p9100_softc *sc, int x, int y, int wi, int he, 783 uint32_t fg, uint32_t bg) 784 { 785 786 sc->sc_last_offset = 0xffffffff; 787 788 p9100_sync(sc); 789 /* 790 * this doesn't make any sense to me either, but for some reason the 791 * chip applies the foreground colour to 0 pixels 792 */ 793 794 p9100_set_color_reg(sc,FOREGROUND_COLOR,bg); 795 p9100_set_color_reg(sc,BACKGROUND_COLOR,fg); 796 797 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 798 p9100_ctl_write_4(sc, ABS_X0, x); 799 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 800 p9100_ctl_write_4(sc, ABS_X2, (x + wi)); 801 p9100_ctl_write_4(sc, ABS_Y3, he); 802 /* now feed the data into the chip */ 803 sc->sc_mono_width = wi; 804 } 805 806 /* write monochrome data to the screen through the blitter */ 807 static void 808 p9100_feed_line(struct p9100_softc *sc, int count, uint8_t *data) 809 { 810 int i; 811 uint32_t latch = 0, bork; 812 int shift = 24; 813 int to_go = sc->sc_mono_width; 814 815 PNOZZ_LATCH(sc, PIXEL_1); 816 817 for (i = 0; i < count; i++) { 818 bork = data[i]; 819 latch |= (bork << shift); 820 if (shift == 0) { 821 /* check how many bits are significant */ 822 if (to_go > 31) { 823 bus_space_write_4(sc->sc_bustag, 824 sc->sc_ctl_memh, 825 (PIXEL_1 + (31 << 2)), latch); 826 to_go -= 32; 827 } else 828 { 829 bus_space_write_4(sc->sc_bustag, 830 sc->sc_ctl_memh, 831 (PIXEL_1 + ((to_go - 1) << 2)), latch); 832 to_go = 0; 833 } 834 latch = 0; 835 shift = 24; 836 } else 837 shift -= 8; 838 } 839 if (shift != 24) 840 p9100_ctl_write_4(sc, (PIXEL_1 + ((to_go - 1) << 2)), latch); 841 } 842 843 static void 844 p9100_clearscreen(struct p9100_softc *sc) 845 { 846 847 p9100_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, sc->sc_bg); 848 } 849 #endif /* NWSDISPLAY > 0 */ 850 851 static uint8_t 852 p9100_ramdac_read(struct p9100_softc *sc, bus_size_t off) 853 { 854 855 sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG); 856 return ((bus_space_read_4(sc->sc_bustag, 857 sc->sc_ctl_memh, off) >> 16) & 0xff); 858 } 859 860 static void 861 p9100_ramdac_write(struct p9100_softc *sc, bus_size_t off, uint8_t v) 862 { 863 864 sc->sc_junk = p9100_ctl_read_4(sc, PWRUP_CNFG); 865 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, 866 ((uint32_t)v) << 16); 867 } 868 869 static uint8_t 870 p9100_ramdac_read_ctl(struct p9100_softc *sc, int off) 871 { 872 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 873 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 874 return p9100_ramdac_read(sc, DAC_INDX_DATA); 875 } 876 877 static void 878 p9100_ramdac_write_ctl(struct p9100_softc *sc, int off, uint8_t val) 879 { 880 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 881 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 882 p9100_ramdac_write(sc, DAC_INDX_DATA, val); 883 } 884 885 /* 886 * Undo the effect of an FBIOSVIDEO that turns the video off. 887 */ 888 static void 889 p9100unblank(device_t dev) 890 { 891 struct p9100_softc *sc = device_private(dev); 892 893 p9100_set_video(sc, 1); 894 895 /* 896 * Check if we're in terminal mode. If not force the console screen 897 * to front so we can see ddb, panic messages and so on 898 */ 899 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) { 900 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 901 if (sc->vd.active != &p9100_console_screen) { 902 SCREEN_INVISIBLE(sc->vd.active); 903 sc->vd.active = &p9100_console_screen; 904 SCREEN_VISIBLE(&p9100_console_screen); 905 } 906 p9100_init_engine(sc); 907 p9100_set_depth(sc, 8); 908 vcons_redraw_screen(&p9100_console_screen); 909 } 910 } 911 912 static void 913 p9100_set_video(struct p9100_softc *sc, int enable) 914 { 915 uint32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1); 916 917 if (enable) 918 v |= VIDEO_ENABLED; 919 else 920 v &= ~VIDEO_ENABLED; 921 p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v); 922 #if NTCTRL > 0 923 /* Turn On/Off the TFT if we know how. 924 */ 925 tadpole_set_video(enable); 926 #endif 927 } 928 929 static int 930 p9100_get_video(struct p9100_softc *sc) 931 { 932 return (p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1) & VIDEO_ENABLED) != 0; 933 } 934 935 static bool 936 p9100_suspend(device_t dev, const pmf_qual_t *qual) 937 { 938 struct p9100_softc *sc = device_private(dev); 939 940 if (sc->sc_powerstate == PWR_SUSPEND) 941 return TRUE; 942 943 sc->sc_video = p9100_get_video(sc); 944 sc->sc_dac_power = p9100_ramdac_read_ctl(sc, DAC_POWER_MGT); 945 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 946 DAC_POWER_SCLK_DISABLE | 947 DAC_POWER_DDOT_DISABLE | 948 DAC_POWER_SYNC_DISABLE | 949 DAC_POWER_ICLK_DISABLE | 950 DAC_POWER_IPWR_DISABLE); 951 p9100_set_video(sc, 0); 952 sc->sc_powerstate = PWR_SUSPEND; 953 return TRUE; 954 } 955 956 static bool 957 p9100_resume(device_t dev, const pmf_qual_t *qual) 958 { 959 struct p9100_softc *sc = device_private(dev); 960 961 if (sc->sc_powerstate == PWR_RESUME) 962 return TRUE; 963 964 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, sc->sc_dac_power); 965 p9100_set_video(sc, sc->sc_video); 966 967 sc->sc_powerstate = PWR_RESUME; 968 return TRUE; 969 } 970 971 /* 972 * Load a subset of the current (new) colormap into the IBM RAMDAC. 973 */ 974 static void 975 p9100loadcmap(struct p9100_softc *sc, int start, int ncolors) 976 { 977 int i; 978 sc->sc_last_offset = 0xffffffff; 979 980 p9100_ramdac_write(sc, DAC_CMAP_WRIDX, start); 981 982 for (i=0;i<ncolors;i++) { 983 p9100_ramdac_write(sc, DAC_CMAP_DATA, 984 sc->sc_cmap.cm_map[i + start][0]); 985 p9100_ramdac_write(sc, DAC_CMAP_DATA, 986 sc->sc_cmap.cm_map[i + start][1]); 987 p9100_ramdac_write(sc, DAC_CMAP_DATA, 988 sc->sc_cmap.cm_map[i + start][2]); 989 } 990 } 991 992 /* 993 * Return the address that would map the given device at the given 994 * offset, allowing for the given protection, or return -1 for error. 995 */ 996 static paddr_t 997 p9100mmap(dev_t dev, off_t off, int prot) 998 { 999 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 1000 1001 if (off & PGOFSET) 1002 panic("p9100mmap"); 1003 if (off < 0) 1004 return (-1); 1005 1006 #ifdef PNOZZ_EMUL_CG3 1007 #define CG3_MMAP_OFFSET 0x04000000 1008 /* Make Xsun think we are a CG3 (SUN3COLOR) 1009 */ 1010 if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) { 1011 off -= CG3_MMAP_OFFSET; 1012 return (bus_space_mmap(sc->sc_bustag, 1013 sc->sc_fb_paddr, 1014 off, 1015 prot, 1016 BUS_SPACE_MAP_LINEAR)); 1017 } 1018 #endif 1019 1020 if (off >= sc->sc_fb_psize + sc->sc_ctl_psize/* + sc->sc_cmd_psize*/) 1021 return (-1); 1022 1023 if (off < sc->sc_fb_psize) { 1024 return (bus_space_mmap(sc->sc_bustag, 1025 sc->sc_fb_paddr, 1026 off, 1027 prot, 1028 BUS_SPACE_MAP_LINEAR)); 1029 } 1030 1031 off -= sc->sc_fb_psize; 1032 if (off < sc->sc_ctl_psize) { 1033 return (bus_space_mmap(sc->sc_bustag, 1034 sc->sc_ctl_paddr, 1035 off, 1036 prot, 1037 BUS_SPACE_MAP_LINEAR)); 1038 } 1039 1040 return EINVAL; 1041 } 1042 1043 /* wscons stuff */ 1044 #if NWSDISPLAY > 0 1045 1046 static void 1047 p9100_cursor(void *cookie, int on, int row, int col) 1048 { 1049 struct rasops_info *ri = cookie; 1050 struct vcons_screen *scr = ri->ri_hw; 1051 struct p9100_softc *sc = scr->scr_cookie; 1052 int x, y, wi,he; 1053 1054 wi = ri->ri_font->fontwidth; 1055 he = ri->ri_font->fontheight; 1056 1057 if (ri->ri_flg & RI_CURSOR) { 1058 x = ri->ri_ccol * wi + ri->ri_xorigin; 1059 y = ri->ri_crow * he + ri->ri_yorigin; 1060 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1061 ri->ri_flg &= ~RI_CURSOR; 1062 } 1063 1064 ri->ri_crow = row; 1065 ri->ri_ccol = col; 1066 1067 if (on) 1068 { 1069 x = ri->ri_ccol * wi + ri->ri_xorigin; 1070 y = ri->ri_crow * he + ri->ri_yorigin; 1071 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1072 ri->ri_flg |= RI_CURSOR; 1073 } 1074 } 1075 1076 #if 0 1077 static int 1078 p9100_mapchar(void *cookie, int uni, u_int *index) 1079 { 1080 return 0; 1081 } 1082 #endif 1083 1084 static void 1085 p9100_putchar(void *cookie, int row, int col, u_int c, long attr) 1086 { 1087 struct rasops_info *ri = cookie; 1088 struct wsdisplay_font *font = PICK_FONT(ri, c); 1089 struct vcons_screen *scr = ri->ri_hw; 1090 struct p9100_softc *sc = scr->scr_cookie; 1091 1092 int fg, bg, uc, i; 1093 uint8_t *data; 1094 int x, y, wi, he; 1095 1096 wi = font->fontwidth; 1097 he = font->fontheight; 1098 1099 if (!CHAR_IN_FONT(c, font)) 1100 return; 1101 1102 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xff]; 1103 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xff]; 1104 x = ri->ri_xorigin + col * wi; 1105 y = ri->ri_yorigin + row * he; 1106 1107 if (c == 0x20) { 1108 p9100_rectfill(sc, x, y, wi, he, bg); 1109 } else { 1110 uc = c - font->firstchar; 1111 data = (uint8_t *)font->data + uc * 1112 ri->ri_fontscale; 1113 1114 p9100_setup_mono(sc, x, y, wi, 1, fg, bg); 1115 for (i = 0; i < he; i++) { 1116 p9100_feed_line(sc, font->stride, 1117 data); 1118 data += font->stride; 1119 } 1120 } 1121 } 1122 1123 /* 1124 * wsdisplay_accessops 1125 */ 1126 1127 int 1128 p9100_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 1129 struct lwp *l) 1130 { 1131 struct vcons_data *vd = v; 1132 struct p9100_softc *sc = vd->cookie; 1133 struct wsdisplay_fbinfo *wdf; 1134 struct vcons_screen *ms = vd->active; 1135 1136 switch (cmd) { 1137 case WSDISPLAYIO_GTYPE: 1138 *(u_int *)data = WSDISPLAY_TYPE_SB_P9100; 1139 return 0; 1140 1141 case FBIOGVIDEO: 1142 case WSDISPLAYIO_GVIDEO: 1143 *(int *)data = p9100_get_video(sc); 1144 return 0; 1145 1146 case WSDISPLAYIO_SVIDEO: 1147 case FBIOSVIDEO: 1148 p9100_set_video(sc, *(int *)data); 1149 return 0; 1150 1151 case WSDISPLAYIO_GINFO: 1152 wdf = (void *)data; 1153 wdf->height = ms->scr_ri.ri_height; 1154 wdf->width = ms->scr_ri.ri_width; 1155 wdf->depth = ms->scr_ri.ri_depth; 1156 wdf->cmsize = 256; 1157 return 0; 1158 1159 case WSDISPLAYIO_GETCMAP: 1160 return p9100_getcmap(sc, (struct wsdisplay_cmap *)data); 1161 1162 case WSDISPLAYIO_PUTCMAP: 1163 return p9100_putcmap(sc, (struct wsdisplay_cmap *)data); 1164 1165 case WSDISPLAYIO_SMODE: 1166 { 1167 int new_mode = *(int*)data; 1168 if (new_mode != sc->sc_mode) 1169 { 1170 sc->sc_mode = new_mode; 1171 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1172 { 1173 p9100_init_engine(sc); 1174 p9100_set_depth(sc, 8); 1175 p9100loadcmap(sc, 0, 256); 1176 p9100_clearscreen(sc); 1177 vcons_redraw_screen(ms); 1178 } 1179 } 1180 } 1181 } 1182 return EPASSTHROUGH; 1183 } 1184 1185 static paddr_t 1186 p9100_mmap(void *v, void *vs, off_t offset, int prot) 1187 { 1188 struct vcons_data *vd = v; 1189 struct p9100_softc *sc = vd->cookie; 1190 paddr_t pa; 1191 1192 /* 'regular' framebuffer mmap()ing */ 1193 if (offset < sc->sc_fb_psize) { 1194 pa = bus_space_mmap(sc->sc_bustag, sc->sc_fb_paddr + offset, 0, 1195 prot, BUS_SPACE_MAP_LINEAR); 1196 return pa; 1197 } 1198 1199 if ((offset >= sc->sc_fb_paddr) && (offset < (sc->sc_fb_paddr + 1200 sc->sc_fb_psize))) { 1201 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1202 BUS_SPACE_MAP_LINEAR); 1203 return pa; 1204 } 1205 1206 if ((offset >= sc->sc_ctl_paddr) && (offset < (sc->sc_ctl_paddr + 1207 sc->sc_ctl_psize))) { 1208 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1209 BUS_SPACE_MAP_LINEAR); 1210 return pa; 1211 } 1212 1213 return -1; 1214 } 1215 1216 static void 1217 p9100_init_screen(void *cookie, struct vcons_screen *scr, 1218 int existing, long *defattr) 1219 { 1220 struct p9100_softc *sc = cookie; 1221 struct rasops_info *ri = &scr->scr_ri; 1222 1223 ri->ri_depth = sc->sc_depth << 3; 1224 ri->ri_width = sc->sc_width; 1225 ri->ri_height = sc->sc_height; 1226 ri->ri_stride = sc->sc_stride; 1227 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 1228 1229 #ifdef PNOZZ_USE_LATCH 1230 ri->ri_bits = bus_space_vaddr(sc->sc_bustag, sc->sc_fb_memh); 1231 DPRINTF("addr: %08lx\n",(ulong)ri->ri_bits); 1232 #endif 1233 1234 rasops_init(ri, 0, 0); 1235 ri->ri_caps = WSSCREEN_WSCOLORS; 1236 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 1237 sc->sc_width / ri->ri_font->fontwidth); 1238 1239 /* enable acceleration */ 1240 ri->ri_ops.cursor = p9100_cursor; 1241 ri->ri_ops.copyrows = p9100_copyrows; 1242 ri->ri_ops.eraserows = p9100_eraserows; 1243 ri->ri_ops.copycols = p9100_copycols; 1244 ri->ri_ops.erasecols = p9100_erasecols; 1245 ri->ri_ops.putchar = p9100_putchar; 1246 ri->ri_ops.allocattr = p9100_allocattr; 1247 } 1248 1249 static int 1250 p9100_putcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1251 { 1252 u_int index = cm->index; 1253 u_int count = cm->count; 1254 int i, error; 1255 u_char rbuf[256], gbuf[256], bbuf[256]; 1256 u_char *r, *g, *b; 1257 1258 if (cm->index >= 256 || cm->count > 256 || 1259 (cm->index + cm->count) > 256) 1260 return EINVAL; 1261 error = copyin(cm->red, &rbuf[index], count); 1262 if (error) 1263 return error; 1264 error = copyin(cm->green, &gbuf[index], count); 1265 if (error) 1266 return error; 1267 error = copyin(cm->blue, &bbuf[index], count); 1268 if (error) 1269 return error; 1270 1271 r = &rbuf[index]; 1272 g = &gbuf[index]; 1273 b = &bbuf[index]; 1274 1275 for (i = 0; i < count; i++) { 1276 sc->sc_cmap.cm_map[index][0] = *r; 1277 sc->sc_cmap.cm_map[index][1] = *g; 1278 sc->sc_cmap.cm_map[index][2] = *b; 1279 index++; 1280 r++, g++, b++; 1281 } 1282 p9100loadcmap(sc, 0, 256); 1283 return 0; 1284 } 1285 1286 static int 1287 p9100_getcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1288 { 1289 u_int index = cm->index; 1290 u_int count = cm->count; 1291 int error, i; 1292 uint8_t red[256], green[256], blue[256]; 1293 1294 if (index >= 255 || count > 256 || index + count > 256) 1295 return EINVAL; 1296 1297 i = index; 1298 while (i < (index + count)) { 1299 red[i] = sc->sc_cmap.cm_map[i][0]; 1300 green[i] = sc->sc_cmap.cm_map[i][1]; 1301 blue[i] = sc->sc_cmap.cm_map[i][2]; 1302 i++; 1303 } 1304 error = copyout(&red[index], cm->red, count); 1305 if (error) 1306 return error; 1307 error = copyout(&green[index], cm->green, count); 1308 if (error) 1309 return error; 1310 error = copyout(&blue[index], cm->blue, count); 1311 if (error) 1312 return error; 1313 1314 return 0; 1315 } 1316 1317 static void 1318 p9100_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1319 { 1320 struct rasops_info *ri = cookie; 1321 struct vcons_screen *scr = ri->ri_hw; 1322 int32_t xs, xd, y, width, height; 1323 1324 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1325 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1326 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1327 width = ri->ri_font->fontwidth * ncols; 1328 height = ri->ri_font->fontheight; 1329 p9100_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, ROP_SRC); 1330 } 1331 1332 static void 1333 p9100_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1334 { 1335 struct rasops_info *ri = cookie; 1336 struct vcons_screen *scr = ri->ri_hw; 1337 int32_t x, y, width, height, bg; 1338 1339 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1340 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1341 width = ri->ri_font->fontwidth * ncols; 1342 height = ri->ri_font->fontheight; 1343 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1344 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1345 } 1346 1347 static void 1348 p9100_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1349 { 1350 struct rasops_info *ri = cookie; 1351 struct vcons_screen *scr = ri->ri_hw; 1352 int32_t x, ys, yd, width, height; 1353 1354 x = ri->ri_xorigin; 1355 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1356 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1357 width = ri->ri_emuwidth; 1358 height = ri->ri_font->fontheight * nrows; 1359 p9100_bitblt(scr->scr_cookie, x, ys, x, yd, width, height, ROP_SRC); 1360 } 1361 1362 static void 1363 p9100_eraserows(void *cookie, int row, int nrows, long fillattr) 1364 { 1365 struct rasops_info *ri = cookie; 1366 struct vcons_screen *scr = ri->ri_hw; 1367 int32_t x, y, width, height, bg; 1368 1369 if ((row == 0) && (nrows == ri->ri_rows)) { 1370 x = y = 0; 1371 width = ri->ri_width; 1372 height = ri->ri_height; 1373 } else { 1374 x = ri->ri_xorigin; 1375 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1376 width = ri->ri_emuwidth; 1377 height = ri->ri_font->fontheight * nrows; 1378 } 1379 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1380 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1381 } 1382 1383 1384 static int 1385 p9100_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 1386 { 1387 if ((fg == 0) && (bg == 0)) 1388 { 1389 fg = WS_DEFAULT_FG; 1390 bg = WS_DEFAULT_BG; 1391 } 1392 1393 *attrp = (fg & 0xff) << 24 | (bg & 0xff) << 16 | (flags & 0xff); 1394 1395 if (flags & WSATTR_REVERSE) { 1396 *attrp = (bg & 0xff) << 24 | (fg & 0xff) << 16 | 1397 (flags & 0xff) << 8; 1398 } else 1399 *attrp = (fg & 0xff) << 24 | (bg & 0xff) << 16 | 1400 (flags & 0xff) << 8; 1401 1402 return 0; 1403 } 1404 1405 #if 0 1406 static int 1407 p9100_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1408 { 1409 1410 return 0; 1411 } 1412 #endif 1413 1414 #endif /* NWSDISPLAY > 0 */ 1415 1416 #if 0 1417 static int 1418 p9100_intr(void *arg) 1419 { 1420 /*p9100_softc *sc=arg;*/ 1421 DPRINTF("."); 1422 return 1; 1423 } 1424 #endif 1425 1426 static void 1427 p9100_init_cursor(struct p9100_softc *sc) 1428 { 1429 1430 memset(&sc->sc_cursor, 0, sizeof(struct pnozz_cursor)); 1431 sc->sc_cursor.pc_size.x = 64; 1432 sc->sc_cursor.pc_size.y = 64; 1433 1434 } 1435 1436 static void 1437 p9100_set_fbcursor(struct p9100_softc *sc) 1438 { 1439 #ifdef PNOZZ_PARANOID 1440 int s; 1441 1442 s = splhigh(); /* just in case... */ 1443 #endif 1444 sc->sc_last_offset = 0xffffffff; 1445 1446 /* set position and hotspot */ 1447 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1448 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1449 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_CTL); 1450 if (sc->sc_cursor.pc_enable) { 1451 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_X11 | 1452 DAC_CURSOR_64); 1453 } else 1454 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_OFF); 1455 /* next two registers - x low, high, y low, high */ 1456 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.x & 0xff); 1457 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.x >> 8) & 1458 0xff); 1459 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.y & 0xff); 1460 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.y >> 8) & 1461 0xff); 1462 /* hotspot */ 1463 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.x & 0xff); 1464 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.y & 0xff); 1465 1466 #ifdef PNOZZ_PARANOID 1467 splx(s); 1468 #endif 1469 1470 } 1471 1472 static void 1473 p9100_setcursorcmap(struct p9100_softc *sc) 1474 { 1475 int i; 1476 1477 #ifdef PNOZZ_PARANOID 1478 int s; 1479 s = splhigh(); /* just in case... */ 1480 #endif 1481 sc->sc_last_offset = 0xffffffff; 1482 1483 /* set cursor colours */ 1484 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1485 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1486 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_COL_1); 1487 1488 for (i = 0; i < 3; i++) { 1489 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.red[i]); 1490 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.green[i]); 1491 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.blue[i]); 1492 } 1493 1494 #ifdef PNOZZ_PARANOID 1495 splx(s); 1496 #endif 1497 } 1498 1499 static void 1500 p9100_loadcursor(struct p9100_softc *sc) 1501 { 1502 uint32_t *image, *mask; 1503 uint32_t bit, bbit, im, ma; 1504 int i, j, k; 1505 uint8_t latch1, latch2; 1506 1507 #ifdef PNOZZ_PARANOID 1508 int s; 1509 s = splhigh(); /* just in case... */ 1510 #endif 1511 sc->sc_last_offset = 0xffffffff; 1512 1513 /* set cursor shape */ 1514 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1515 p9100_ramdac_write(sc, DAC_INDX_HI, 1); 1516 p9100_ramdac_write(sc, DAC_INDX_LO, 0); 1517 1518 image = sc->sc_cursor.pc_bits; 1519 mask = &sc->sc_cursor.pc_bits[0x80]; 1520 1521 for (i = 0; i < 0x80; i++) { 1522 bit = 0x80000000; 1523 im = image[i]; 1524 ma = mask[i]; 1525 for (k = 0; k < 4; k++) { 1526 bbit = 0x1; 1527 latch1 = 0; 1528 for (j = 0; j < 4; j++) { 1529 if (im & bit) 1530 latch1 |= bbit; 1531 bbit <<= 1; 1532 if (ma & bit) 1533 latch1 |= bbit; 1534 bbit <<= 1; 1535 bit >>= 1; 1536 } 1537 bbit = 0x1; 1538 latch2 = 0; 1539 for (j = 0; j < 4; j++) { 1540 if (im & bit) 1541 latch2 |= bbit; 1542 bbit <<= 1; 1543 if (ma & bit) 1544 latch2 |= bbit; 1545 bbit <<= 1; 1546 bit >>= 1; 1547 } 1548 p9100_ramdac_write(sc, DAC_INDX_DATA, latch1); 1549 p9100_ramdac_write(sc, DAC_INDX_DATA, latch2); 1550 } 1551 } 1552 #ifdef PNOZZ_DEBUG_CURSOR 1553 printf("image:\n"); 1554 for (i=0;i<0x80;i+=2) 1555 printf("%08x %08x\n", image[i], image[i+1]); 1556 printf("mask:\n"); 1557 for (i=0;i<0x80;i+=2) 1558 printf("%08x %08x\n", mask[i], mask[i+1]); 1559 #endif 1560 #ifdef PNOZZ_PARANOID 1561 splx(s); 1562 #endif 1563 } 1564 1565 #if NTCTRL > 0 1566 static void 1567 p9100_set_extvga(void *cookie, int status) 1568 { 1569 struct p9100_softc *sc = cookie; 1570 #ifdef PNOZZ_PARANOID 1571 int s; 1572 1573 s = splhigh(); 1574 #endif 1575 1576 #ifdef PNOZZ_DEBUG 1577 printf("%s: external VGA %s\n", device_xname(sc->sc_dev), 1578 status ? "on" : "off"); 1579 #endif 1580 1581 sc->sc_last_offset = 0xffffffff; 1582 1583 if (status) { 1584 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1585 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) & 1586 ~DAC_POWER_IPWR_DISABLE); 1587 } else { 1588 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1589 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) | 1590 DAC_POWER_IPWR_DISABLE); 1591 } 1592 #ifdef PNOZZ_PARANOID 1593 splx(s); 1594 #endif 1595 } 1596 #endif /* NTCTRL > 0 */ 1597 1598 static int 1599 upper_bit(uint32_t b) 1600 { 1601 uint32_t mask=0x80000000; 1602 int cnt = 31; 1603 if (b == 0) 1604 return -1; 1605 while ((mask != 0) && ((b & mask) == 0)) { 1606 mask = mask >> 1; 1607 cnt--; 1608 } 1609 return cnt; 1610 } 1611 1612 static int 1613 p9100_set_depth(struct p9100_softc *sc, int depth) 1614 { 1615 int new_sls; 1616 uint32_t bits, scr, memctl, mem; 1617 int s0, s1, s2, s3, ps, crtcline; 1618 uint8_t pf, mc3, es; 1619 1620 switch (depth) { 1621 case 8: 1622 sc->sc_depthshift = 0; 1623 ps = 2; 1624 pf = 3; 1625 mc3 = 0; 1626 es = 0; /* no swapping */ 1627 memctl = 3; 1628 break; 1629 case 16: 1630 sc->sc_depthshift = 1; 1631 ps = 3; 1632 pf = 4; 1633 mc3 = 0; 1634 es = 2; /* swap bytes in 16bit words */ 1635 memctl = 2; 1636 break; 1637 case 24: 1638 /* boo */ 1639 printf("We don't DO 24bit pixels dammit!\n"); 1640 return 0; 1641 case 32: 1642 sc->sc_depthshift = 2; 1643 ps = 5; 1644 pf = 6; 1645 mc3 = 0; 1646 es = 6; /* swap both half-words and bytes */ 1647 memctl = 1; /* 0 */ 1648 break; 1649 default: 1650 aprint_error("%s: bogus colour depth (%d)\n", 1651 __func__, depth); 1652 return FALSE; 1653 } 1654 /* 1655 * this could be done a lot shorter and faster but then nobody would 1656 * understand what the hell we're doing here without getting a major 1657 * headache. Scanline size is encoded as 4 shift values, 3 of them 3 bits 1658 * wide, 16 << n for n>0, one 2 bits, 512 << n for n>0. n==0 means 0 1659 */ 1660 new_sls = sc->sc_width << sc->sc_depthshift; 1661 sc->sc_stride = new_sls; 1662 bits = new_sls; 1663 s3 = upper_bit(bits); 1664 if (s3 > 9) { 1665 bits &= ~(1 << s3); 1666 s3 -= 9; 1667 } else 1668 s3 = 0; 1669 s2 = upper_bit(bits); 1670 if (s2 > 0) { 1671 bits &= ~(1 << s2); 1672 s2 -= 4; 1673 } else 1674 s2 = 0; 1675 s1 = upper_bit(bits); 1676 if (s1 > 0) { 1677 bits &= ~(1 << s1); 1678 s1 -= 4; 1679 } else 1680 s1 = 0; 1681 s0 = upper_bit(bits); 1682 if (s0 > 0) { 1683 bits &= ~(1 << s0); 1684 s0 -= 4; 1685 } else 1686 s0 = 0; 1687 1688 1689 DPRINTF("sls: %x sh: %d %d %d %d leftover: %x\n", new_sls, s0, s1, 1690 s2, s3, bits); 1691 1692 /* 1693 * now let's put these values into the System Config Register. No need to 1694 * read it here since we (hopefully) just saved the content 1695 */ 1696 scr = p9100_ctl_read_4(sc, SYS_CONF); 1697 scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) | 1698 (s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT); 1699 1700 DPRINTF("new scr: %x DAC %x %x\n", scr, pf, mc3); 1701 1702 mem = p9100_ctl_read_4(sc, VID_MEM_CONFIG); 1703 1704 DPRINTF("old memctl: %08x\n", mem); 1705 1706 /* set shift and crtc clock */ 1707 mem &= ~(0x0000fc00); 1708 mem |= (memctl << 10) | (memctl << 13); 1709 p9100_ctl_write_4(sc, VID_MEM_CONFIG, mem); 1710 1711 DPRINTF("new memctl: %08x\n", mem); 1712 1713 /* whack the engine... */ 1714 p9100_ctl_write_4(sc, SYS_CONF, scr); 1715 1716 /* ok, whack the DAC */ 1717 p9100_ramdac_write_ctl(sc, DAC_MISC_1, 0x11); 1718 p9100_ramdac_write_ctl(sc, DAC_MISC_2, 0x45); 1719 p9100_ramdac_write_ctl(sc, DAC_MISC_3, mc3); 1720 /* 1721 * despite the 3GX manual saying otherwise we don't need to mess with 1722 * any clock dividers here 1723 */ 1724 p9100_ramdac_write_ctl(sc, DAC_MISC_CLK, 1); 1725 p9100_ramdac_write_ctl(sc, 3, 0); 1726 p9100_ramdac_write_ctl(sc, 4, 0); 1727 1728 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 0); 1729 p9100_ramdac_write_ctl(sc, DAC_OPERATION, 0); 1730 p9100_ramdac_write_ctl(sc, DAC_PALETTE_CTRL, 0); 1731 1732 p9100_ramdac_write_ctl(sc, DAC_PIXEL_FMT, pf); 1733 1734 /* TODO: distinguish between 15 and 16 bit */ 1735 p9100_ramdac_write_ctl(sc, DAC_8BIT_CTRL, 0); 1736 /* direct colour, linear, 565 */ 1737 p9100_ramdac_write_ctl(sc, DAC_16BIT_CTRL, 0xc6); 1738 /* direct colour */ 1739 p9100_ramdac_write_ctl(sc, DAC_32BIT_CTRL, 3); 1740 1741 /* From the 3GX manual. Needs magic number reduction */ 1742 p9100_ramdac_write_ctl(sc, 0x10, 2); 1743 p9100_ramdac_write_ctl(sc, 0x11, 0); 1744 p9100_ramdac_write_ctl(sc, 0x14, 5); 1745 p9100_ramdac_write_ctl(sc, 0x08, 1); 1746 p9100_ramdac_write_ctl(sc, 0x15, 5); 1747 p9100_ramdac_write_ctl(sc, 0x16, 0x63); 1748 1749 /* whack the CRTC */ 1750 /* we always transfer 64bit in one go */ 1751 crtcline = sc->sc_stride >> 3; 1752 1753 DPRINTF("crtcline: %d\n", crtcline); 1754 1755 p9100_ctl_write_4(sc, VID_HTOTAL, (24 << sc->sc_depthshift) + crtcline); 1756 p9100_ctl_write_4(sc, VID_HSRE, 8 << sc->sc_depthshift); 1757 p9100_ctl_write_4(sc, VID_HBRE, 18 << sc->sc_depthshift); 1758 p9100_ctl_write_4(sc, VID_HBFE, (18 << sc->sc_depthshift) + crtcline); 1759 1760 #ifdef PNOZZ_DEBUG 1761 { 1762 uint32_t sscr; 1763 sscr = p9100_ctl_read_4(sc, SYS_CONF); 1764 printf("scr: %x\n", sscr); 1765 } 1766 #endif 1767 return TRUE; 1768 } 1769
Indexes created Wed Oct 22 13:09:56 GMT 2025