p9100.c revision 1.59.2.1
1 /* $NetBSD: p9100.c,v 1.59.2.1 2014/05/18 17:45:46 rmind Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2005, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * color display (p9100) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: p9100.c,v 1.59.2.1 2014/05/18 17:45:46 rmind Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/buf.h> 46 #include <sys/device.h> 47 #include <sys/ioctl.h> 48 #include <sys/malloc.h> 49 #include <sys/mman.h> 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 53 #include <sys/bus.h> 54 #include <machine/autoconf.h> 55 56 #include <dev/sun/fbio.h> 57 #include <dev/sun/fbvar.h> 58 #include <dev/sun/btreg.h> 59 #include <dev/sun/btvar.h> 60 61 #include <dev/sbus/p9100reg.h> 62 63 #include <dev/sbus/sbusvar.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/wscons/wsconsio.h> 67 #include <dev/wsfont/wsfont.h> 68 #include <dev/rasops/rasops.h> 69 70 #include <dev/wscons/wsdisplay_vconsvar.h> 71 #include <dev/wscons/wsdisplay_glyphcachevar.h> 72 73 #include "opt_wsemul.h" 74 #include "rasops_glue.h" 75 #include "opt_pnozz.h" 76 77 #include "ioconf.h" 78 79 #include "tctrl.h" 80 #if NTCTRL > 0 81 #include <machine/tctrl.h> 82 #include <sparc/dev/tctrlvar.h> /*XXX*/ 83 #endif 84 85 #ifdef PNOZZ_DEBUG 86 #define DPRINTF aprint_normal 87 #else 88 #define DPRINTF while (0) aprint_normal 89 #endif 90 91 struct pnozz_cursor { 92 short pc_enable; /* cursor is enabled */ 93 struct fbcurpos pc_pos; /* position */ 94 struct fbcurpos pc_hot; /* hot-spot */ 95 struct fbcurpos pc_size; /* size of mask & image fields */ 96 uint32_t pc_bits[0x100]; /* space for mask & image bits */ 97 unsigned char red[3], green[3]; 98 unsigned char blue[3]; /* cursor palette */ 99 }; 100 101 /* per-display variables */ 102 struct p9100_softc { 103 device_t sc_dev; /* base device */ 104 struct fbdevice sc_fb; /* frame buffer device */ 105 106 bus_space_tag_t sc_bustag; 107 108 bus_addr_t sc_ctl_paddr; /* phys address description */ 109 bus_size_t sc_ctl_psize; /* for device mmap() */ 110 bus_space_handle_t sc_ctl_memh; /* bus space handle */ 111 112 bus_addr_t sc_fb_paddr; /* phys address description */ 113 bus_size_t sc_fb_psize; /* for device mmap() */ 114 #ifdef PNOZZ_USE_LATCH 115 bus_space_handle_t sc_fb_memh; /* bus space handle */ 116 #endif 117 uint32_t sc_mono_width; /* for setup_mono */ 118 119 uint32_t sc_width; 120 uint32_t sc_height; /* panel width / height */ 121 uint32_t sc_stride; 122 uint32_t sc_depth; 123 int sc_depthshift; /* blitter works on bytes not pixels */ 124 125 union bt_cmap sc_cmap; /* Brooktree color map */ 126 127 struct pnozz_cursor sc_cursor; 128 129 int sc_mode; 130 int sc_video, sc_powerstate; 131 uint32_t sc_bg; 132 volatile uint32_t sc_last_offset; 133 struct vcons_data vd; 134 uint8_t sc_dac_power; 135 glyphcache sc_gc; 136 }; 137 138 139 static struct vcons_screen p9100_console_screen; 140 141 extern const u_char rasops_cmap[768]; 142 143 struct wsscreen_descr p9100_defscreendesc = { 144 "default", 145 0, 0, 146 NULL, 147 8, 16, 148 WSSCREEN_WSCOLORS, 149 }; 150 151 const struct wsscreen_descr *_p9100_scrlist[] = { 152 &p9100_defscreendesc, 153 /* XXX other formats, graphics screen? */ 154 }; 155 156 struct wsscreen_list p9100_screenlist = { 157 sizeof(_p9100_scrlist) / sizeof(struct wsscreen_descr *), 158 _p9100_scrlist 159 }; 160 161 /* autoconfiguration driver */ 162 static int p9100_sbus_match(device_t, cfdata_t, void *); 163 static void p9100_sbus_attach(device_t, device_t, void *); 164 165 static void p9100unblank(device_t); 166 167 CFATTACH_DECL_NEW(pnozz, sizeof(struct p9100_softc), 168 p9100_sbus_match, p9100_sbus_attach, NULL, NULL); 169 170 static dev_type_open(p9100open); 171 static dev_type_close(p9100close); 172 static dev_type_ioctl(p9100ioctl); 173 static dev_type_mmap(p9100mmap); 174 175 const struct cdevsw pnozz_cdevsw = { 176 .d_open = p9100open, 177 .d_close = nullclose, 178 .d_read = noread, 179 .d_write = nowrite, 180 .d_ioctl = p9100ioctl, 181 .d_stop = nostop, 182 .d_tty = notty, 183 .d_poll = nopoll, 184 .d_mmap = p9100mmap, 185 .d_kqfilter = nokqfilter, 186 .d_flag = 0 187 }; 188 189 /* frame buffer generic driver */ 190 static struct fbdriver p9100fbdriver = { 191 p9100unblank, p9100open, p9100close, p9100ioctl, nopoll, 192 p9100mmap, nokqfilter 193 }; 194 195 static void p9100loadcmap(struct p9100_softc *, int, int); 196 static void p9100_set_video(struct p9100_softc *, int); 197 static int p9100_get_video(struct p9100_softc *); 198 static uint32_t p9100_ctl_read_4(struct p9100_softc *, bus_size_t); 199 static void p9100_ctl_write_4(struct p9100_softc *, bus_size_t, uint32_t); 200 static uint8_t p9100_ramdac_read(struct p9100_softc *, bus_size_t); 201 static void p9100_ramdac_write(struct p9100_softc *, bus_size_t, uint8_t); 202 203 static uint8_t p9100_ramdac_read_ctl(struct p9100_softc *, int); 204 static void p9100_ramdac_write_ctl(struct p9100_softc *, int, uint8_t); 205 206 static void p9100_init_engine(struct p9100_softc *); 207 static int p9100_set_depth(struct p9100_softc *, int); 208 209 #if NWSDISPLAY > 0 210 static void p9100_sync(struct p9100_softc *); 211 static void p9100_bitblt(void *, int, int, int, int, int, int, int); 212 static void p9100_rectfill(void *, int, int, int, int, uint32_t); 213 static void p9100_clearscreen(struct p9100_softc *); 214 215 static void p9100_setup_mono(struct p9100_softc *, int, int, int, int, 216 uint32_t, uint32_t); 217 static void p9100_feed_line(struct p9100_softc *, int, uint8_t *); 218 static void p9100_set_color_reg(struct p9100_softc *, int, int32_t); 219 220 static void p9100_copycols(void *, int, int, int, int); 221 static void p9100_erasecols(void *, int, int, int, long); 222 static void p9100_copyrows(void *, int, int, int); 223 static void p9100_eraserows(void *, int, int, long); 224 /*static int p9100_mapchar(void *, int, u_int *);*/ 225 static void p9100_putchar(void *, int, int, u_int, long); 226 static void p9100_putchar_aa(void *, int, int, u_int, long); 227 static void p9100_cursor(void *, int, int, int); 228 229 static int p9100_putcmap(struct p9100_softc *, struct wsdisplay_cmap *); 230 static int p9100_getcmap(struct p9100_softc *, struct wsdisplay_cmap *); 231 static int p9100_ioctl(void *, void *, u_long, void *, int, struct lwp *); 232 static paddr_t p9100_mmap(void *, void *, off_t, int); 233 234 /*static int p9100_load_font(void *, void *, struct wsdisplay_font *);*/ 235 236 static void p9100_init_screen(void *, struct vcons_screen *, int, 237 long *); 238 #endif 239 240 static void p9100_init_cursor(struct p9100_softc *); 241 242 static void p9100_set_fbcursor(struct p9100_softc *); 243 static void p9100_setcursorcmap(struct p9100_softc *); 244 static void p9100_loadcursor(struct p9100_softc *); 245 246 #if 0 247 static int p9100_intr(void *); 248 #endif 249 250 /* power management stuff */ 251 static bool p9100_suspend(device_t, const pmf_qual_t *); 252 static bool p9100_resume(device_t, const pmf_qual_t *); 253 254 #if NTCTRL > 0 255 static void p9100_set_extvga(void *, int); 256 #endif 257 258 #if NWSDISPLAY > 0 259 struct wsdisplay_accessops p9100_accessops = { 260 p9100_ioctl, 261 p9100_mmap, 262 NULL, /* vcons_alloc_screen */ 263 NULL, /* vcons_free_screen */ 264 NULL, /* vcons_show_screen */ 265 NULL, /* load_font */ 266 NULL, /* polls */ 267 NULL, /* scroll */ 268 }; 269 #endif 270 271 #ifdef PNOZZ_USE_LATCH 272 #define PNOZZ_LATCH(sc, off) if(sc->sc_last_offset != (off & 0xffffff80)) { \ 273 (void)bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, off); \ 274 sc->sc_last_offset = off & 0xffffff80; } 275 #else 276 #define PNOZZ_LATCH(a, b) 277 #endif 278 279 /* 280 * Match a p9100. 281 */ 282 static int 283 p9100_sbus_match(device_t parent, cfdata_t cf, void *aux) 284 { 285 struct sbus_attach_args *sa = aux; 286 287 if (strcmp("p9100", sa->sa_name) == 0) 288 return 100; 289 return 0; 290 } 291 292 293 /* 294 * Attach a display. We need to notice if it is the console, too. 295 */ 296 static void 297 p9100_sbus_attach(device_t parent, device_t self, void *args) 298 { 299 struct p9100_softc *sc = device_private(self); 300 struct sbus_attach_args *sa = args; 301 struct fbdevice *fb = &sc->sc_fb; 302 int isconsole; 303 int node = sa->sa_node; 304 int i, j; 305 uint8_t ver, cmap[768]; 306 307 #if NWSDISPLAY > 0 308 struct wsemuldisplaydev_attach_args aa; 309 struct rasops_info *ri; 310 unsigned long defattr; 311 #endif 312 313 sc->sc_last_offset = 0xffffffff; 314 sc->sc_dev = self; 315 316 /* 317 * When the ROM has mapped in a p9100 display, the address 318 * maps only the video RAM, so in any case we have to map the 319 * registers ourselves. 320 */ 321 322 if (sa->sa_npromvaddrs != 0) 323 fb->fb_pixels = (void *)sa->sa_promvaddrs[0]; 324 325 /* Remember cookies for p9100_mmap() */ 326 sc->sc_bustag = sa->sa_bustag; 327 328 sc->sc_ctl_paddr = sbus_bus_addr(sa->sa_bustag, 329 sa->sa_reg[0].oa_space, sa->sa_reg[0].oa_base); 330 sc->sc_ctl_psize = 0x8000;/*(bus_size_t)sa->sa_reg[0].oa_size;*/ 331 332 sc->sc_fb_paddr = sbus_bus_addr(sa->sa_bustag, 333 sa->sa_reg[2].oa_space, sa->sa_reg[2].oa_base); 334 sc->sc_fb_psize = (bus_size_t)sa->sa_reg[2].oa_size; 335 336 if (sbus_bus_map(sc->sc_bustag, 337 sa->sa_reg[0].oa_space, 338 sa->sa_reg[0].oa_base, 339 /* 340 * XXX for some reason the SBus resources don't cover 341 * all registers, so we just map what we need 342 */ 343 0x8000, 344 0, &sc->sc_ctl_memh) != 0) { 345 printf("%s: cannot map control registers\n", 346 device_xname(self)); 347 return; 348 } 349 350 /* 351 * we need to map the framebuffer even though we never write to it, 352 * thanks to some weirdness in the SPARCbook's SBus glue for the 353 * P9100 - all register accesses need to be 'latched in' whenever we 354 * go to another 0x80 aligned 'page' by reading the framebuffer at the 355 * same offset 356 * XXX apparently the latter isn't true - my SP3GX works fine without 357 */ 358 #ifdef PNOZZ_USE_LATCH 359 if (fb->fb_pixels == NULL) { 360 if (sbus_bus_map(sc->sc_bustag, 361 sa->sa_reg[2].oa_space, 362 sa->sa_reg[2].oa_base, 363 sc->sc_fb_psize, 364 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE, 365 &sc->sc_fb_memh) != 0) { 366 printf("%s: cannot map framebuffer\n", 367 device_xname(self)); 368 return; 369 } 370 fb->fb_pixels = (char *)sc->sc_fb_memh; 371 } else { 372 sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels; 373 } 374 #endif 375 sc->sc_width = prom_getpropint(node, "width", 800); 376 sc->sc_height = prom_getpropint(node, "height", 600); 377 sc->sc_depth = prom_getpropint(node, "depth", 8) >> 3; 378 379 sc->sc_stride = prom_getpropint(node, "linebytes", 380 sc->sc_width * sc->sc_depth); 381 382 fb->fb_driver = &p9100fbdriver; 383 fb->fb_device = sc->sc_dev; 384 fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK; 385 #ifdef PNOZZ_EMUL_CG3 386 fb->fb_type.fb_type = FBTYPE_SUN3COLOR; 387 #else 388 fb->fb_type.fb_type = FBTYPE_P9100; 389 #endif 390 fb->fb_pixels = NULL; 391 392 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 393 394 isconsole = fb_is_console(node); 395 #if 0 396 if (!isconsole) { 397 aprint_normal("\n"); 398 aprint_error_dev(self, "fatal error: PROM didn't configure device\n"); 399 return; 400 } 401 #endif 402 403 fb->fb_type.fb_depth = 8; 404 sc->sc_depth = 1; 405 sc->sc_depthshift = 0; 406 407 /* check the RAMDAC */ 408 ver = p9100_ramdac_read_ctl(sc, DAC_VERSION); 409 410 p9100_init_engine(sc); 411 p9100_set_depth(sc, 8); 412 413 fb_setsize_obp(fb, fb->fb_type.fb_depth, sc->sc_width, sc->sc_height, 414 node); 415 416 #if 0 417 bus_intr_establish(sc->sc_bustag, sa->sa_pri, IPL_BIO, 418 p9100_intr, sc); 419 #endif 420 421 fb->fb_type.fb_cmsize = prom_getpropint(node, "cmsize", 256); 422 if ((1 << fb->fb_type.fb_depth) != fb->fb_type.fb_cmsize) 423 printf(", %d entry colormap", fb->fb_type.fb_cmsize); 424 425 /* make sure we are not blanked */ 426 if (isconsole) 427 p9100_set_video(sc, 1); 428 429 /* register with power management */ 430 sc->sc_video = 1; 431 sc->sc_powerstate = PWR_RESUME; 432 if (!pmf_device_register(self, p9100_suspend, p9100_resume)) { 433 panic("%s: could not register with PMF", 434 device_xname(sc->sc_dev)); 435 } 436 437 if (isconsole) { 438 printf(" (console)\n"); 439 #ifdef RASTERCONSOLE 440 /*p9100loadcmap(sc, 255, 1);*/ 441 fbrcons_init(fb); 442 #endif 443 } else 444 printf("\n"); 445 446 #if NWSDISPLAY > 0 447 wsfont_init(); 448 449 #ifdef PNOZZ_DEBUG 450 /* make the glyph cache visible */ 451 sc->sc_height -= 100; 452 #endif 453 454 sc->sc_gc.gc_bitblt = p9100_bitblt; 455 sc->sc_gc.gc_blitcookie = sc; 456 sc->sc_gc.gc_rop = ROP_SRC; 457 458 vcons_init(&sc->vd, sc, &p9100_defscreendesc, &p9100_accessops); 459 sc->vd.init_screen = p9100_init_screen; 460 461 vcons_init_screen(&sc->vd, &p9100_console_screen, 1, &defattr); 462 p9100_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 463 464 /* Initialize the default color map. */ 465 rasops_get_cmap(&p9100_console_screen.scr_ri, cmap, 768); 466 467 j = 0; 468 for (i = 0; i < 256; i++) { 469 sc->sc_cmap.cm_map[i][0] = cmap[j]; 470 j++; 471 sc->sc_cmap.cm_map[i][1] = cmap[j]; 472 j++; 473 sc->sc_cmap.cm_map[i][2] = cmap[j]; 474 j++; 475 } 476 p9100loadcmap(sc, 0, 256); 477 478 sc->sc_bg = (defattr >> 16) & 0xff; 479 p9100_clearscreen(sc); 480 481 ri = &p9100_console_screen.scr_ri; 482 483 p9100_defscreendesc.nrows = ri->ri_rows; 484 p9100_defscreendesc.ncols = ri->ri_cols; 485 p9100_defscreendesc.textops = &ri->ri_ops; 486 p9100_defscreendesc.capabilities = ri->ri_caps; 487 488 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 489 (0x200000 / sc->sc_stride) - sc->sc_height - 5, 490 sc->sc_width, 491 ri->ri_font->fontwidth, 492 ri->ri_font->fontheight, 493 defattr); 494 495 if(isconsole) { 496 wsdisplay_cnattach(&p9100_defscreendesc, ri, 0, 0, defattr); 497 vcons_replay_msgbuf(&p9100_console_screen); 498 } 499 500 aa.console = isconsole; 501 aa.scrdata = &p9100_screenlist; 502 aa.accessops = &p9100_accessops; 503 aa.accesscookie = &sc->vd; 504 505 config_found(self, &aa, wsemuldisplaydevprint); 506 #endif 507 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 508 printf("%s: rev %d / %x, %dx%d, depth %d mem %x\n", 509 device_xname(self), 510 (i & 7), ver, fb->fb_type.fb_width, fb->fb_type.fb_height, 511 fb->fb_type.fb_depth, (unsigned int)sc->sc_fb_psize); 512 /* cursor sprite handling */ 513 p9100_init_cursor(sc); 514 515 /* attach the fb */ 516 fb_attach(fb, isconsole); 517 518 #if NTCTRL > 0 519 /* register callback for external monitor status change */ 520 tadpole_register_callback(p9100_set_extvga, sc); 521 #endif 522 } 523 524 int 525 p9100open(dev_t dev, int flags, int mode, struct lwp *l) 526 { 527 int unit = minor(dev); 528 529 if (device_lookup(&pnozz_cd, unit) == NULL) 530 return (ENXIO); 531 return (0); 532 } 533 534 int 535 p9100close(dev_t dev, int flags, int mode, struct lwp *l) 536 { 537 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 538 539 #if NWSDISPLAY > 0 540 p9100_init_engine(sc); 541 p9100_set_depth(sc, 8); 542 p9100loadcmap(sc, 0, 256); 543 p9100_clearscreen(sc); 544 glyphcache_wipe(&sc->sc_gc); 545 vcons_redraw_screen(sc->vd.active); 546 #endif 547 return 0; 548 } 549 550 int 551 p9100ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 552 { 553 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 554 struct fbgattr *fba; 555 int error, v; 556 557 switch (cmd) { 558 559 case FBIOGTYPE: 560 *(struct fbtype *)data = sc->sc_fb.fb_type; 561 break; 562 563 case FBIOGATTR: 564 fba = (struct fbgattr *)data; 565 fba->real_type = sc->sc_fb.fb_type.fb_type; 566 fba->owner = 0; /* XXX ??? */ 567 fba->fbtype = sc->sc_fb.fb_type; 568 fba->sattr.flags = 0; 569 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 570 fba->sattr.dev_specific[0] = -1; 571 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 572 fba->emu_types[1] = -1; 573 break; 574 575 case FBIOGETCMAP: 576 #define p ((struct fbcmap *)data) 577 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 578 579 case FBIOPUTCMAP: 580 /* copy to software map */ 581 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 582 if (error) 583 return (error); 584 /* now blast them into the chip */ 585 /* XXX should use retrace interrupt */ 586 p9100loadcmap(sc, p->index, p->count); 587 #undef p 588 break; 589 590 case FBIOGVIDEO: 591 *(int *)data = p9100_get_video(sc); 592 break; 593 594 case FBIOSVIDEO: 595 p9100_set_video(sc, *(int *)data); 596 break; 597 598 /* these are for both FBIOSCURSOR and FBIOGCURSOR */ 599 #define p ((struct fbcursor *)data) 600 #define pc (&sc->sc_cursor) 601 602 case FBIOGCURSOR: 603 p->set = FB_CUR_SETALL; /* close enough, anyway */ 604 p->enable = pc->pc_enable; 605 p->pos = pc->pc_pos; 606 p->hot = pc->pc_hot; 607 p->size = pc->pc_size; 608 609 if (p->image != NULL) { 610 error = copyout(pc->pc_bits, p->image, 0x200); 611 if (error) 612 return error; 613 error = copyout(&pc->pc_bits[0x80], p->mask, 0x200); 614 if (error) 615 return error; 616 } 617 618 p->cmap.index = 0; 619 p->cmap.count = 3; 620 if (p->cmap.red != NULL) { 621 copyout(pc->red, p->cmap.red, 3); 622 copyout(pc->green, p->cmap.green, 3); 623 copyout(pc->blue, p->cmap.blue, 3); 624 } 625 break; 626 627 case FBIOSCURSOR: 628 { 629 int count; 630 uint32_t image[0x80], mask[0x80]; 631 uint8_t red[3], green[3], blue[3]; 632 633 v = p->set; 634 if (v & FB_CUR_SETCMAP) { 635 error = copyin(p->cmap.red, red, 3); 636 error |= copyin(p->cmap.green, green, 3); 637 error |= copyin(p->cmap.blue, blue, 3); 638 if (error) 639 return error; 640 } 641 if (v & FB_CUR_SETSHAPE) { 642 if (p->size.x > 64 || p->size.y > 64) 643 return EINVAL; 644 memset(&mask, 0, 0x200); 645 memset(&image, 0, 0x200); 646 count = p->size.y * 8; 647 error = copyin(p->image, image, count); 648 if (error) 649 return error; 650 error = copyin(p->mask, mask, count); 651 if (error) 652 return error; 653 } 654 655 /* parameters are OK; do it */ 656 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 657 if (v & FB_CUR_SETCUR) 658 pc->pc_enable = p->enable; 659 if (v & FB_CUR_SETPOS) 660 pc->pc_pos = p->pos; 661 if (v & FB_CUR_SETHOT) 662 pc->pc_hot = p->hot; 663 p9100_set_fbcursor(sc); 664 } 665 666 if (v & FB_CUR_SETCMAP) { 667 memcpy(pc->red, red, 3); 668 memcpy(pc->green, green, 3); 669 memcpy(pc->blue, blue, 3); 670 p9100_setcursorcmap(sc); 671 } 672 673 if (v & FB_CUR_SETSHAPE) { 674 memcpy(pc->pc_bits, image, 0x200); 675 memcpy(&pc->pc_bits[0x80], mask, 0x200); 676 p9100_loadcursor(sc); 677 } 678 } 679 break; 680 681 #undef p 682 #undef cc 683 684 case FBIOGCURPOS: 685 *(struct fbcurpos *)data = sc->sc_cursor.pc_pos; 686 break; 687 688 case FBIOSCURPOS: 689 sc->sc_cursor.pc_pos = *(struct fbcurpos *)data; 690 p9100_set_fbcursor(sc); 691 break; 692 693 case FBIOGCURMAX: 694 /* max cursor size is 64x64 */ 695 ((struct fbcurpos *)data)->x = 64; 696 ((struct fbcurpos *)data)->y = 64; 697 break; 698 699 default: 700 return (ENOTTY); 701 } 702 return (0); 703 } 704 705 static uint32_t 706 p9100_ctl_read_4(struct p9100_softc *sc, bus_size_t off) 707 { 708 709 PNOZZ_LATCH(sc, off); 710 return bus_space_read_4(sc->sc_bustag, sc->sc_ctl_memh, off); 711 } 712 713 static void 714 p9100_ctl_write_4(struct p9100_softc *sc, bus_size_t off, uint32_t v) 715 { 716 717 PNOZZ_LATCH(sc, off); 718 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, v); 719 } 720 721 /* initialize the drawing engine */ 722 static void 723 p9100_init_engine(struct p9100_softc *sc) 724 { 725 /* reset clipping rectangles */ 726 uint32_t rmax = ((sc->sc_width & 0x3fff) << 16) | 727 (sc->sc_height & 0x3fff); 728 729 sc->sc_last_offset = 0xffffffff; 730 731 p9100_ctl_write_4(sc, WINDOW_OFFSET, 0); 732 p9100_ctl_write_4(sc, WINDOW_MIN, 0); 733 p9100_ctl_write_4(sc, WINDOW_MAX, rmax); 734 p9100_ctl_write_4(sc, BYTE_CLIP_MIN, 0); 735 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 736 p9100_ctl_write_4(sc, DRAW_MODE, 0); 737 p9100_ctl_write_4(sc, PLANE_MASK, 0xffffffff); 738 p9100_ctl_write_4(sc, PATTERN0, 0xffffffff); 739 p9100_ctl_write_4(sc, PATTERN1, 0xffffffff); 740 p9100_ctl_write_4(sc, PATTERN2, 0xffffffff); 741 p9100_ctl_write_4(sc, PATTERN3, 0xffffffff); 742 743 } 744 745 /* we only need these in the wsdisplay case */ 746 #if NWSDISPLAY > 0 747 748 /* wait until the engine is idle */ 749 static void 750 p9100_sync(struct p9100_softc *sc) 751 { 752 while((p9100_ctl_read_4(sc, ENGINE_STATUS) & 753 (ENGINE_BUSY | BLITTER_BUSY)) != 0); 754 } 755 756 static void 757 p9100_set_color_reg(struct p9100_softc *sc, int reg, int32_t col) 758 { 759 uint32_t out; 760 761 switch(sc->sc_depth) 762 { 763 case 1: /* 8 bit */ 764 out = (col << 8) | col; 765 out |= out << 16; 766 break; 767 case 2: /* 16 bit */ 768 out = col | (col << 16); 769 break; 770 default: 771 out = col; 772 } 773 p9100_ctl_write_4(sc, reg, out); 774 } 775 776 /* screen-to-screen blit */ 777 static void 778 p9100_bitblt(void *cookie, int xs, int ys, int xd, int yd, int wi, 779 int he, int rop) 780 { 781 struct p9100_softc *sc = cookie; 782 uint32_t src, dst, srcw, dstw; 783 784 sc->sc_last_offset = 0xffffffff; 785 786 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 787 dst = ((xd & 0x3fff) << 16) | (yd & 0x3fff); 788 srcw = (((xs + wi - 1) & 0x3fff) << 16) | ((ys + he - 1) & 0x3fff); 789 dstw = (((xd + wi - 1) & 0x3fff) << 16) | ((yd + he - 1) & 0x3fff); 790 791 p9100_sync(sc); 792 793 p9100_ctl_write_4(sc, RASTER_OP, rop); 794 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 795 796 p9100_ctl_write_4(sc, ABS_XY0, src << sc->sc_depthshift); 797 p9100_ctl_write_4(sc, ABS_XY1, srcw << sc->sc_depthshift); 798 p9100_ctl_write_4(sc, ABS_XY2, dst << sc->sc_depthshift); 799 p9100_ctl_write_4(sc, ABS_XY3, dstw << sc->sc_depthshift); 800 801 (void)p9100_ctl_read_4(sc, COMMAND_BLIT); 802 } 803 804 /* solid rectangle fill */ 805 static void 806 p9100_rectfill(void *cookie, int xs, int ys, int wi, int he, uint32_t col) 807 { 808 struct p9100_softc *sc = cookie; 809 uint32_t src, srcw; 810 811 sc->sc_last_offset = 0xffffffff; 812 813 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 814 srcw = (((xs + wi) & 0x3fff) << 16) | ((ys + he) & 0x3fff); 815 p9100_sync(sc); 816 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 817 p9100_set_color_reg(sc, FOREGROUND_COLOR, col); 818 p9100_set_color_reg(sc, BACKGROUND_COLOR, col); 819 p9100_ctl_write_4(sc, RASTER_OP, ROP_PAT); 820 p9100_ctl_write_4(sc, COORD_INDEX, 0); 821 p9100_ctl_write_4(sc, RECT_RTW_XY, src); 822 p9100_ctl_write_4(sc, RECT_RTW_XY, srcw); 823 (void)p9100_ctl_read_4(sc, COMMAND_QUAD); 824 } 825 826 /* setup for mono->colour expansion */ 827 static void 828 p9100_setup_mono(struct p9100_softc *sc, int x, int y, int wi, int he, 829 uint32_t fg, uint32_t bg) 830 { 831 832 sc->sc_last_offset = 0xffffffff; 833 834 p9100_sync(sc); 835 /* 836 * this doesn't make any sense to me either, but for some reason the 837 * chip applies the foreground colour to 0 pixels 838 */ 839 840 p9100_set_color_reg(sc,FOREGROUND_COLOR,bg); 841 p9100_set_color_reg(sc,BACKGROUND_COLOR,fg); 842 843 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 844 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 845 p9100_ctl_write_4(sc, ABS_X0, x); 846 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 847 p9100_ctl_write_4(sc, ABS_X2, (x + wi)); 848 p9100_ctl_write_4(sc, ABS_Y3, he); 849 /* now feed the data into the chip */ 850 sc->sc_mono_width = wi; 851 } 852 853 /* write monochrome data to the screen through the blitter */ 854 static void 855 p9100_feed_line(struct p9100_softc *sc, int count, uint8_t *data) 856 { 857 int i; 858 uint32_t latch = 0, bork; 859 int shift = 24; 860 int to_go = sc->sc_mono_width; 861 862 PNOZZ_LATCH(sc, PIXEL_1); 863 864 for (i = 0; i < count; i++) { 865 bork = data[i]; 866 latch |= (bork << shift); 867 if (shift == 0) { 868 /* check how many bits are significant */ 869 if (to_go > 31) { 870 bus_space_write_4(sc->sc_bustag, 871 sc->sc_ctl_memh, 872 (PIXEL_1 + (31 << 2)), latch); 873 to_go -= 32; 874 } else 875 { 876 bus_space_write_4(sc->sc_bustag, 877 sc->sc_ctl_memh, 878 (PIXEL_1 + ((to_go - 1) << 2)), latch); 879 to_go = 0; 880 } 881 latch = 0; 882 shift = 24; 883 } else 884 shift -= 8; 885 } 886 if (shift != 24) 887 p9100_ctl_write_4(sc, (PIXEL_1 + ((to_go - 1) << 2)), latch); 888 } 889 890 static void 891 p9100_clearscreen(struct p9100_softc *sc) 892 { 893 894 p9100_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, sc->sc_bg); 895 } 896 #endif /* NWSDISPLAY > 0 */ 897 898 static uint8_t 899 p9100_ramdac_read(struct p9100_softc *sc, bus_size_t off) 900 { 901 902 (void)p9100_ctl_read_4(sc, PWRUP_CNFG); 903 return ((bus_space_read_4(sc->sc_bustag, 904 sc->sc_ctl_memh, off) >> 16) & 0xff); 905 } 906 907 static void 908 p9100_ramdac_write(struct p9100_softc *sc, bus_size_t off, uint8_t v) 909 { 910 911 (void)p9100_ctl_read_4(sc, PWRUP_CNFG); 912 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, 913 ((uint32_t)v) << 16); 914 } 915 916 static uint8_t 917 p9100_ramdac_read_ctl(struct p9100_softc *sc, int off) 918 { 919 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 920 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 921 return p9100_ramdac_read(sc, DAC_INDX_DATA); 922 } 923 924 static void 925 p9100_ramdac_write_ctl(struct p9100_softc *sc, int off, uint8_t val) 926 { 927 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 928 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 929 p9100_ramdac_write(sc, DAC_INDX_DATA, val); 930 } 931 932 /* 933 * Undo the effect of an FBIOSVIDEO that turns the video off. 934 */ 935 static void 936 p9100unblank(device_t dev) 937 { 938 struct p9100_softc *sc = device_private(dev); 939 940 p9100_set_video(sc, 1); 941 942 /* 943 * Check if we're in terminal mode. If not force the console screen 944 * to front so we can see ddb, panic messages and so on 945 */ 946 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) { 947 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 948 if (sc->vd.active != &p9100_console_screen) { 949 SCREEN_INVISIBLE(sc->vd.active); 950 sc->vd.active = &p9100_console_screen; 951 SCREEN_VISIBLE(&p9100_console_screen); 952 } 953 p9100_init_engine(sc); 954 p9100_set_depth(sc, 8); 955 vcons_redraw_screen(&p9100_console_screen); 956 } 957 } 958 959 static void 960 p9100_set_video(struct p9100_softc *sc, int enable) 961 { 962 uint32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1); 963 964 if (enable) 965 v |= VIDEO_ENABLED; 966 else 967 v &= ~VIDEO_ENABLED; 968 p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v); 969 #if NTCTRL > 0 970 /* Turn On/Off the TFT if we know how. 971 */ 972 tadpole_set_video(enable); 973 #endif 974 } 975 976 static int 977 p9100_get_video(struct p9100_softc *sc) 978 { 979 return (p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1) & VIDEO_ENABLED) != 0; 980 } 981 982 static bool 983 p9100_suspend(device_t dev, const pmf_qual_t *qual) 984 { 985 struct p9100_softc *sc = device_private(dev); 986 987 if (sc->sc_powerstate == PWR_SUSPEND) 988 return TRUE; 989 990 sc->sc_video = p9100_get_video(sc); 991 sc->sc_dac_power = p9100_ramdac_read_ctl(sc, DAC_POWER_MGT); 992 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 993 DAC_POWER_SCLK_DISABLE | 994 DAC_POWER_DDOT_DISABLE | 995 DAC_POWER_SYNC_DISABLE | 996 DAC_POWER_ICLK_DISABLE | 997 DAC_POWER_IPWR_DISABLE); 998 p9100_set_video(sc, 0); 999 sc->sc_powerstate = PWR_SUSPEND; 1000 return TRUE; 1001 } 1002 1003 static bool 1004 p9100_resume(device_t dev, const pmf_qual_t *qual) 1005 { 1006 struct p9100_softc *sc = device_private(dev); 1007 1008 if (sc->sc_powerstate == PWR_RESUME) 1009 return TRUE; 1010 1011 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, sc->sc_dac_power); 1012 p9100_set_video(sc, sc->sc_video); 1013 1014 sc->sc_powerstate = PWR_RESUME; 1015 return TRUE; 1016 } 1017 1018 /* 1019 * Load a subset of the current (new) colormap into the IBM RAMDAC. 1020 */ 1021 static void 1022 p9100loadcmap(struct p9100_softc *sc, int start, int ncolors) 1023 { 1024 int i; 1025 sc->sc_last_offset = 0xffffffff; 1026 1027 p9100_ramdac_write(sc, DAC_CMAP_WRIDX, start); 1028 1029 for (i=0;i<ncolors;i++) { 1030 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1031 sc->sc_cmap.cm_map[i + start][0]); 1032 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1033 sc->sc_cmap.cm_map[i + start][1]); 1034 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1035 sc->sc_cmap.cm_map[i + start][2]); 1036 } 1037 } 1038 1039 /* 1040 * Return the address that would map the given device at the given 1041 * offset, allowing for the given protection, or return -1 for error. 1042 */ 1043 static paddr_t 1044 p9100mmap(dev_t dev, off_t off, int prot) 1045 { 1046 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 1047 1048 if (off & PGOFSET) 1049 panic("p9100mmap"); 1050 if (off < 0) 1051 return (-1); 1052 1053 #ifdef PNOZZ_EMUL_CG3 1054 #define CG3_MMAP_OFFSET 0x04000000 1055 /* Make Xsun think we are a CG3 (SUN3COLOR) 1056 */ 1057 if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) { 1058 off -= CG3_MMAP_OFFSET; 1059 return (bus_space_mmap(sc->sc_bustag, 1060 sc->sc_fb_paddr, 1061 off, 1062 prot, 1063 BUS_SPACE_MAP_LINEAR)); 1064 } 1065 #endif 1066 1067 if (off >= sc->sc_fb_psize + sc->sc_ctl_psize/* + sc->sc_cmd_psize*/) 1068 return (-1); 1069 1070 if (off < sc->sc_fb_psize) { 1071 return (bus_space_mmap(sc->sc_bustag, 1072 sc->sc_fb_paddr, 1073 off, 1074 prot, 1075 BUS_SPACE_MAP_LINEAR)); 1076 } 1077 1078 off -= sc->sc_fb_psize; 1079 if (off < sc->sc_ctl_psize) { 1080 return (bus_space_mmap(sc->sc_bustag, 1081 sc->sc_ctl_paddr, 1082 off, 1083 prot, 1084 BUS_SPACE_MAP_LINEAR)); 1085 } 1086 1087 return EINVAL; 1088 } 1089 1090 /* wscons stuff */ 1091 #if NWSDISPLAY > 0 1092 1093 static void 1094 p9100_cursor(void *cookie, int on, int row, int col) 1095 { 1096 struct rasops_info *ri = cookie; 1097 struct vcons_screen *scr = ri->ri_hw; 1098 struct p9100_softc *sc = scr->scr_cookie; 1099 int x, y, wi,he; 1100 1101 wi = ri->ri_font->fontwidth; 1102 he = ri->ri_font->fontheight; 1103 1104 if (ri->ri_flg & RI_CURSOR) { 1105 x = ri->ri_ccol * wi + ri->ri_xorigin; 1106 y = ri->ri_crow * he + ri->ri_yorigin; 1107 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1108 ri->ri_flg &= ~RI_CURSOR; 1109 } 1110 1111 ri->ri_crow = row; 1112 ri->ri_ccol = col; 1113 1114 if (on) 1115 { 1116 x = ri->ri_ccol * wi + ri->ri_xorigin; 1117 y = ri->ri_crow * he + ri->ri_yorigin; 1118 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1119 ri->ri_flg |= RI_CURSOR; 1120 } 1121 } 1122 1123 #if 0 1124 static int 1125 p9100_mapchar(void *cookie, int uni, u_int *index) 1126 { 1127 return 0; 1128 } 1129 #endif 1130 1131 static void 1132 p9100_putchar(void *cookie, int row, int col, u_int c, long attr) 1133 { 1134 struct rasops_info *ri = cookie; 1135 struct wsdisplay_font *font = PICK_FONT(ri, c); 1136 struct vcons_screen *scr = ri->ri_hw; 1137 struct p9100_softc *sc = scr->scr_cookie; 1138 1139 int fg, bg, i; 1140 uint8_t *data; 1141 int x, y, wi, he; 1142 1143 wi = font->fontwidth; 1144 he = font->fontheight; 1145 1146 if (!CHAR_IN_FONT(c, font)) 1147 return; 1148 1149 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xff]; 1150 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xff]; 1151 x = ri->ri_xorigin + col * wi; 1152 y = ri->ri_yorigin + row * he; 1153 1154 if (c == 0x20) { 1155 p9100_rectfill(sc, x, y, wi, he, bg); 1156 } else { 1157 data = WSFONT_GLYPH(c, font); 1158 1159 p9100_setup_mono(sc, x, y, wi, 1, fg, bg); 1160 for (i = 0; i < he; i++) { 1161 p9100_feed_line(sc, font->stride, 1162 data); 1163 data += font->stride; 1164 } 1165 } 1166 } 1167 1168 static void 1169 p9100_putchar_aa(void *cookie, int row, int col, u_int c, long attr) 1170 { 1171 struct rasops_info *ri = cookie; 1172 struct wsdisplay_font *font = PICK_FONT(ri, c); 1173 struct vcons_screen *scr = ri->ri_hw; 1174 struct p9100_softc *sc = scr->scr_cookie; 1175 uint32_t bg, latch = 0, bg8, fg8, pixel; 1176 int i, j, x, y, wi, he, r, g, b, aval, rwi; 1177 int r1, g1, b1, r0, g0, b0, fgo, bgo; 1178 uint8_t *data8; 1179 int rv; 1180 1181 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1182 return; 1183 1184 if (!CHAR_IN_FONT(c, font)) 1185 return; 1186 1187 wi = font->fontwidth; 1188 rwi = (wi + 3) & ~3; 1189 he = font->fontheight; 1190 1191 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1192 x = ri->ri_xorigin + col * wi; 1193 y = ri->ri_yorigin + row * he; 1194 1195 if (c == 0x20) { 1196 p9100_rectfill(sc, x, y, wi, he, bg); 1197 return; 1198 } 1199 1200 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1201 if (rv == GC_OK) 1202 return; 1203 1204 data8 = WSFONT_GLYPH(c, font); 1205 1206 p9100_sync(sc); 1207 1208 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 1209 p9100_ctl_write_4(sc, ABS_X0, x); 1210 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 1211 p9100_ctl_write_4(sc, ABS_X2, (x + rwi)); 1212 p9100_ctl_write_4(sc, ABS_Y3, 1); 1213 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, ((x + wi - 1) << 16) | 0x3fff); 1214 1215 /* 1216 * we need the RGB colours here, so get offsets into rasops_cmap 1217 */ 1218 fgo = ((attr >> 24) & 0xf) * 3; 1219 bgo = ((attr >> 16) & 0xf) * 3; 1220 1221 r0 = rasops_cmap[bgo]; 1222 r1 = rasops_cmap[fgo]; 1223 g0 = rasops_cmap[bgo + 1]; 1224 g1 = rasops_cmap[fgo + 1]; 1225 b0 = rasops_cmap[bgo + 2]; 1226 b1 = rasops_cmap[fgo + 2]; 1227 #define R3G3B2(r, g, b) ((r & 0xe0) | ((g >> 3) & 0x1c) | (b >> 6)) 1228 bg8 = R3G3B2(r0, g0, b0); 1229 fg8 = R3G3B2(r1, g1, b1); 1230 1231 //r128fb_wait(sc, 16); 1232 1233 for (i = 0; i < he; i++) { 1234 for (j = 0; j < wi; j++) { 1235 aval = *data8; 1236 if (aval == 0) { 1237 pixel = bg8; 1238 } else if (aval == 255) { 1239 pixel = fg8; 1240 } else { 1241 r = aval * r1 + (255 - aval) * r0; 1242 g = aval * g1 + (255 - aval) * g0; 1243 b = aval * b1 + (255 - aval) * b0; 1244 pixel = ((r & 0xe000) >> 8) | 1245 ((g & 0xe000) >> 11) | 1246 ((b & 0xc000) >> 14); 1247 } 1248 latch = (latch << 8) | pixel; 1249 /* write in 32bit chunks */ 1250 if ((j & 3) == 3) { 1251 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, 1252 COMMAND_PIXEL8, latch); 1253 latch = 0; 1254 } 1255 data8++; 1256 } 1257 /* if we have pixels left in latch write them out */ 1258 if ((j & 3) != 0) { 1259 latch = latch << ((4 - (j & 3)) << 3); 1260 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, 1261 COMMAND_PIXEL8, latch); 1262 } 1263 } 1264 if (rv == GC_ADD) { 1265 glyphcache_add(&sc->sc_gc, c, x, y); 1266 } 1267 } 1268 1269 /* 1270 * wsdisplay_accessops 1271 */ 1272 1273 int 1274 p9100_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 1275 struct lwp *l) 1276 { 1277 struct vcons_data *vd = v; 1278 struct p9100_softc *sc = vd->cookie; 1279 struct wsdisplay_fbinfo *wdf; 1280 struct vcons_screen *ms = vd->active; 1281 1282 switch (cmd) { 1283 case WSDISPLAYIO_GTYPE: 1284 *(u_int *)data = WSDISPLAY_TYPE_SB_P9100; 1285 return 0; 1286 1287 case FBIOGVIDEO: 1288 case WSDISPLAYIO_GVIDEO: 1289 *(int *)data = p9100_get_video(sc); 1290 return 0; 1291 1292 case WSDISPLAYIO_SVIDEO: 1293 case FBIOSVIDEO: 1294 p9100_set_video(sc, *(int *)data); 1295 return 0; 1296 1297 case WSDISPLAYIO_GINFO: 1298 wdf = (void *)data; 1299 wdf->height = ms->scr_ri.ri_height; 1300 wdf->width = ms->scr_ri.ri_width; 1301 wdf->depth = ms->scr_ri.ri_depth; 1302 wdf->cmsize = 256; 1303 return 0; 1304 1305 case WSDISPLAYIO_GETCMAP: 1306 return p9100_getcmap(sc, (struct wsdisplay_cmap *)data); 1307 1308 case WSDISPLAYIO_PUTCMAP: 1309 return p9100_putcmap(sc, (struct wsdisplay_cmap *)data); 1310 1311 case WSDISPLAYIO_SMODE: 1312 { 1313 int new_mode = *(int*)data; 1314 if (new_mode != sc->sc_mode) 1315 { 1316 sc->sc_mode = new_mode; 1317 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1318 { 1319 p9100_init_engine(sc); 1320 p9100_set_depth(sc, 8); 1321 p9100loadcmap(sc, 0, 256); 1322 p9100_clearscreen(sc); 1323 glyphcache_wipe(&sc->sc_gc); 1324 vcons_redraw_screen(ms); 1325 } 1326 } 1327 } 1328 } 1329 return EPASSTHROUGH; 1330 } 1331 1332 static paddr_t 1333 p9100_mmap(void *v, void *vs, off_t offset, int prot) 1334 { 1335 struct vcons_data *vd = v; 1336 struct p9100_softc *sc = vd->cookie; 1337 paddr_t pa; 1338 1339 /* 'regular' framebuffer mmap()ing */ 1340 if (offset < sc->sc_fb_psize) { 1341 pa = bus_space_mmap(sc->sc_bustag, sc->sc_fb_paddr + offset, 0, 1342 prot, BUS_SPACE_MAP_LINEAR); 1343 return pa; 1344 } 1345 1346 if ((offset >= sc->sc_fb_paddr) && (offset < (sc->sc_fb_paddr + 1347 sc->sc_fb_psize))) { 1348 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1349 BUS_SPACE_MAP_LINEAR); 1350 return pa; 1351 } 1352 1353 if ((offset >= sc->sc_ctl_paddr) && (offset < (sc->sc_ctl_paddr + 1354 sc->sc_ctl_psize))) { 1355 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1356 BUS_SPACE_MAP_LINEAR); 1357 return pa; 1358 } 1359 1360 return -1; 1361 } 1362 1363 static void 1364 p9100_init_screen(void *cookie, struct vcons_screen *scr, 1365 int existing, long *defattr) 1366 { 1367 struct p9100_softc *sc = cookie; 1368 struct rasops_info *ri = &scr->scr_ri; 1369 1370 ri->ri_depth = sc->sc_depth << 3; 1371 ri->ri_width = sc->sc_width; 1372 ri->ri_height = sc->sc_height; 1373 ri->ri_stride = sc->sc_stride; 1374 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 1375 if (ri->ri_depth == 8) 1376 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 1377 1378 #ifdef PNOZZ_USE_LATCH 1379 ri->ri_bits = bus_space_vaddr(sc->sc_bustag, sc->sc_fb_memh); 1380 DPRINTF("addr: %08lx\n",(ulong)ri->ri_bits); 1381 #endif 1382 1383 rasops_init(ri, 0, 0); 1384 ri->ri_caps = WSSCREEN_WSCOLORS; 1385 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 1386 sc->sc_width / ri->ri_font->fontwidth); 1387 1388 /* enable acceleration */ 1389 ri->ri_ops.cursor = p9100_cursor; 1390 ri->ri_ops.copyrows = p9100_copyrows; 1391 ri->ri_ops.eraserows = p9100_eraserows; 1392 ri->ri_ops.copycols = p9100_copycols; 1393 ri->ri_ops.erasecols = p9100_erasecols; 1394 if (FONT_IS_ALPHA(ri->ri_font)) { 1395 ri->ri_ops.putchar = p9100_putchar_aa; 1396 } else 1397 ri->ri_ops.putchar = p9100_putchar; 1398 } 1399 1400 static int 1401 p9100_putcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1402 { 1403 u_int index = cm->index; 1404 u_int count = cm->count; 1405 int i, error; 1406 u_char rbuf[256], gbuf[256], bbuf[256]; 1407 u_char *r, *g, *b; 1408 1409 if (cm->index >= 256 || cm->count > 256 || 1410 (cm->index + cm->count) > 256) 1411 return EINVAL; 1412 error = copyin(cm->red, &rbuf[index], count); 1413 if (error) 1414 return error; 1415 error = copyin(cm->green, &gbuf[index], count); 1416 if (error) 1417 return error; 1418 error = copyin(cm->blue, &bbuf[index], count); 1419 if (error) 1420 return error; 1421 1422 r = &rbuf[index]; 1423 g = &gbuf[index]; 1424 b = &bbuf[index]; 1425 1426 for (i = 0; i < count; i++) { 1427 sc->sc_cmap.cm_map[index][0] = *r; 1428 sc->sc_cmap.cm_map[index][1] = *g; 1429 sc->sc_cmap.cm_map[index][2] = *b; 1430 index++; 1431 r++, g++, b++; 1432 } 1433 p9100loadcmap(sc, 0, 256); 1434 return 0; 1435 } 1436 1437 static int 1438 p9100_getcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1439 { 1440 u_int index = cm->index; 1441 u_int count = cm->count; 1442 int error, i; 1443 uint8_t red[256], green[256], blue[256]; 1444 1445 if (index >= 255 || count > 256 || index + count > 256) 1446 return EINVAL; 1447 1448 i = index; 1449 while (i < (index + count)) { 1450 red[i] = sc->sc_cmap.cm_map[i][0]; 1451 green[i] = sc->sc_cmap.cm_map[i][1]; 1452 blue[i] = sc->sc_cmap.cm_map[i][2]; 1453 i++; 1454 } 1455 error = copyout(&red[index], cm->red, count); 1456 if (error) 1457 return error; 1458 error = copyout(&green[index], cm->green, count); 1459 if (error) 1460 return error; 1461 error = copyout(&blue[index], cm->blue, count); 1462 if (error) 1463 return error; 1464 1465 return 0; 1466 } 1467 1468 static void 1469 p9100_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1470 { 1471 struct rasops_info *ri = cookie; 1472 struct vcons_screen *scr = ri->ri_hw; 1473 int32_t xs, xd, y, width, height; 1474 1475 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1476 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1477 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1478 width = ri->ri_font->fontwidth * ncols; 1479 height = ri->ri_font->fontheight; 1480 p9100_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, ROP_SRC); 1481 } 1482 1483 static void 1484 p9100_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1485 { 1486 struct rasops_info *ri = cookie; 1487 struct vcons_screen *scr = ri->ri_hw; 1488 int32_t x, y, width, height, bg; 1489 1490 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1491 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1492 width = ri->ri_font->fontwidth * ncols; 1493 height = ri->ri_font->fontheight; 1494 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1495 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1496 } 1497 1498 static void 1499 p9100_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1500 { 1501 struct rasops_info *ri = cookie; 1502 struct vcons_screen *scr = ri->ri_hw; 1503 int32_t x, ys, yd, width, height; 1504 1505 x = ri->ri_xorigin; 1506 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1507 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1508 width = ri->ri_emuwidth; 1509 height = ri->ri_font->fontheight * nrows; 1510 p9100_bitblt(scr->scr_cookie, x, ys, x, yd, width, height, ROP_SRC); 1511 } 1512 1513 static void 1514 p9100_eraserows(void *cookie, int row, int nrows, long fillattr) 1515 { 1516 struct rasops_info *ri = cookie; 1517 struct vcons_screen *scr = ri->ri_hw; 1518 int32_t x, y, width, height, bg; 1519 1520 if ((row == 0) && (nrows == ri->ri_rows)) { 1521 x = y = 0; 1522 width = ri->ri_width; 1523 height = ri->ri_height; 1524 } else { 1525 x = ri->ri_xorigin; 1526 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1527 width = ri->ri_emuwidth; 1528 height = ri->ri_font->fontheight * nrows; 1529 } 1530 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1531 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1532 } 1533 1534 #if 0 1535 static int 1536 p9100_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1537 { 1538 1539 return 0; 1540 } 1541 #endif 1542 1543 #endif /* NWSDISPLAY > 0 */ 1544 1545 #if 0 1546 static int 1547 p9100_intr(void *arg) 1548 { 1549 /*p9100_softc *sc=arg;*/ 1550 DPRINTF("."); 1551 return 1; 1552 } 1553 #endif 1554 1555 static void 1556 p9100_init_cursor(struct p9100_softc *sc) 1557 { 1558 1559 memset(&sc->sc_cursor, 0, sizeof(struct pnozz_cursor)); 1560 sc->sc_cursor.pc_size.x = 64; 1561 sc->sc_cursor.pc_size.y = 64; 1562 1563 } 1564 1565 static void 1566 p9100_set_fbcursor(struct p9100_softc *sc) 1567 { 1568 #ifdef PNOZZ_PARANOID 1569 int s; 1570 1571 s = splhigh(); /* just in case... */ 1572 #endif 1573 sc->sc_last_offset = 0xffffffff; 1574 1575 /* set position and hotspot */ 1576 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1577 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1578 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_CTL); 1579 if (sc->sc_cursor.pc_enable) { 1580 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_X11 | 1581 DAC_CURSOR_64); 1582 } else 1583 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_OFF); 1584 /* next two registers - x low, high, y low, high */ 1585 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.x & 0xff); 1586 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.x >> 8) & 1587 0xff); 1588 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.y & 0xff); 1589 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.y >> 8) & 1590 0xff); 1591 /* hotspot */ 1592 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.x & 0xff); 1593 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.y & 0xff); 1594 1595 #ifdef PNOZZ_PARANOID 1596 splx(s); 1597 #endif 1598 1599 } 1600 1601 static void 1602 p9100_setcursorcmap(struct p9100_softc *sc) 1603 { 1604 int i; 1605 1606 #ifdef PNOZZ_PARANOID 1607 int s; 1608 s = splhigh(); /* just in case... */ 1609 #endif 1610 sc->sc_last_offset = 0xffffffff; 1611 1612 /* set cursor colours */ 1613 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1614 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1615 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_COL_1); 1616 1617 for (i = 0; i < 3; i++) { 1618 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.red[i]); 1619 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.green[i]); 1620 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.blue[i]); 1621 } 1622 1623 #ifdef PNOZZ_PARANOID 1624 splx(s); 1625 #endif 1626 } 1627 1628 static void 1629 p9100_loadcursor(struct p9100_softc *sc) 1630 { 1631 uint32_t *image, *mask; 1632 uint32_t bit, bbit, im, ma; 1633 int i, j, k; 1634 uint8_t latch1, latch2; 1635 1636 #ifdef PNOZZ_PARANOID 1637 int s; 1638 s = splhigh(); /* just in case... */ 1639 #endif 1640 sc->sc_last_offset = 0xffffffff; 1641 1642 /* set cursor shape */ 1643 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1644 p9100_ramdac_write(sc, DAC_INDX_HI, 1); 1645 p9100_ramdac_write(sc, DAC_INDX_LO, 0); 1646 1647 image = sc->sc_cursor.pc_bits; 1648 mask = &sc->sc_cursor.pc_bits[0x80]; 1649 1650 for (i = 0; i < 0x80; i++) { 1651 bit = 0x80000000; 1652 im = image[i]; 1653 ma = mask[i]; 1654 for (k = 0; k < 4; k++) { 1655 bbit = 0x1; 1656 latch1 = 0; 1657 for (j = 0; j < 4; j++) { 1658 if (im & bit) 1659 latch1 |= bbit; 1660 bbit <<= 1; 1661 if (ma & bit) 1662 latch1 |= bbit; 1663 bbit <<= 1; 1664 bit >>= 1; 1665 } 1666 bbit = 0x1; 1667 latch2 = 0; 1668 for (j = 0; j < 4; j++) { 1669 if (im & bit) 1670 latch2 |= bbit; 1671 bbit <<= 1; 1672 if (ma & bit) 1673 latch2 |= bbit; 1674 bbit <<= 1; 1675 bit >>= 1; 1676 } 1677 p9100_ramdac_write(sc, DAC_INDX_DATA, latch1); 1678 p9100_ramdac_write(sc, DAC_INDX_DATA, latch2); 1679 } 1680 } 1681 #ifdef PNOZZ_DEBUG_CURSOR 1682 printf("image:\n"); 1683 for (i=0;i<0x80;i+=2) 1684 printf("%08x %08x\n", image[i], image[i+1]); 1685 printf("mask:\n"); 1686 for (i=0;i<0x80;i+=2) 1687 printf("%08x %08x\n", mask[i], mask[i+1]); 1688 #endif 1689 #ifdef PNOZZ_PARANOID 1690 splx(s); 1691 #endif 1692 } 1693 1694 #if NTCTRL > 0 1695 static void 1696 p9100_set_extvga(void *cookie, int status) 1697 { 1698 struct p9100_softc *sc = cookie; 1699 #ifdef PNOZZ_PARANOID 1700 int s; 1701 1702 s = splhigh(); 1703 #endif 1704 1705 #ifdef PNOZZ_DEBUG 1706 printf("%s: external VGA %s\n", device_xname(sc->sc_dev), 1707 status ? "on" : "off"); 1708 #endif 1709 1710 sc->sc_last_offset = 0xffffffff; 1711 1712 if (status) { 1713 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1714 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) & 1715 ~DAC_POWER_IPWR_DISABLE); 1716 } else { 1717 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1718 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) | 1719 DAC_POWER_IPWR_DISABLE); 1720 } 1721 #ifdef PNOZZ_PARANOID 1722 splx(s); 1723 #endif 1724 } 1725 #endif /* NTCTRL > 0 */ 1726 1727 static int 1728 upper_bit(uint32_t b) 1729 { 1730 uint32_t mask=0x80000000; 1731 int cnt = 31; 1732 if (b == 0) 1733 return -1; 1734 while ((mask != 0) && ((b & mask) == 0)) { 1735 mask = mask >> 1; 1736 cnt--; 1737 } 1738 return cnt; 1739 } 1740 1741 static int 1742 p9100_set_depth(struct p9100_softc *sc, int depth) 1743 { 1744 int new_sls; 1745 uint32_t bits, scr, memctl, mem; 1746 int s0, s1, s2, s3, ps, crtcline; 1747 uint8_t pf, mc3, es; 1748 1749 switch (depth) { 1750 case 8: 1751 sc->sc_depthshift = 0; 1752 ps = 2; 1753 pf = 3; 1754 mc3 = 0; 1755 es = 0; /* no swapping */ 1756 memctl = 3; 1757 break; 1758 case 16: 1759 sc->sc_depthshift = 1; 1760 ps = 3; 1761 pf = 4; 1762 mc3 = 0; 1763 es = 2; /* swap bytes in 16bit words */ 1764 memctl = 2; 1765 break; 1766 case 24: 1767 /* boo */ 1768 printf("We don't DO 24bit pixels dammit!\n"); 1769 return 0; 1770 case 32: 1771 sc->sc_depthshift = 2; 1772 ps = 5; 1773 pf = 6; 1774 mc3 = 0; 1775 es = 6; /* swap both half-words and bytes */ 1776 memctl = 1; /* 0 */ 1777 break; 1778 default: 1779 aprint_error("%s: bogus colour depth (%d)\n", 1780 __func__, depth); 1781 return FALSE; 1782 } 1783 /* 1784 * this could be done a lot shorter and faster but then nobody would 1785 * understand what the hell we're doing here without getting a major 1786 * headache. Scanline size is encoded as 4 shift values, 3 of them 3 bits 1787 * wide, 16 << n for n>0, one 2 bits, 512 << n for n>0. n==0 means 0 1788 */ 1789 new_sls = sc->sc_width << sc->sc_depthshift; 1790 sc->sc_stride = new_sls; 1791 bits = new_sls; 1792 s3 = upper_bit(bits); 1793 if (s3 > 9) { 1794 bits &= ~(1 << s3); 1795 s3 -= 9; 1796 } else 1797 s3 = 0; 1798 s2 = upper_bit(bits); 1799 if (s2 > 0) { 1800 bits &= ~(1 << s2); 1801 s2 -= 4; 1802 } else 1803 s2 = 0; 1804 s1 = upper_bit(bits); 1805 if (s1 > 0) { 1806 bits &= ~(1 << s1); 1807 s1 -= 4; 1808 } else 1809 s1 = 0; 1810 s0 = upper_bit(bits); 1811 if (s0 > 0) { 1812 bits &= ~(1 << s0); 1813 s0 -= 4; 1814 } else 1815 s0 = 0; 1816 1817 1818 DPRINTF("sls: %x sh: %d %d %d %d leftover: %x\n", new_sls, s0, s1, 1819 s2, s3, bits); 1820 1821 /* 1822 * now let's put these values into the System Config Register. No need to 1823 * read it here since we (hopefully) just saved the content 1824 */ 1825 scr = p9100_ctl_read_4(sc, SYS_CONF); 1826 scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) | 1827 (s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT); 1828 1829 DPRINTF("new scr: %x DAC %x %x\n", scr, pf, mc3); 1830 1831 mem = p9100_ctl_read_4(sc, VID_MEM_CONFIG); 1832 1833 DPRINTF("old memctl: %08x\n", mem); 1834 1835 /* set shift and crtc clock */ 1836 mem &= ~(0x0000fc00); 1837 mem |= (memctl << 10) | (memctl << 13); 1838 p9100_ctl_write_4(sc, VID_MEM_CONFIG, mem); 1839 1840 DPRINTF("new memctl: %08x\n", mem); 1841 1842 /* whack the engine... */ 1843 p9100_ctl_write_4(sc, SYS_CONF, scr); 1844 1845 /* ok, whack the DAC */ 1846 p9100_ramdac_write_ctl(sc, DAC_MISC_1, 0x11); 1847 p9100_ramdac_write_ctl(sc, DAC_MISC_2, 0x45); 1848 p9100_ramdac_write_ctl(sc, DAC_MISC_3, mc3); 1849 /* 1850 * despite the 3GX manual saying otherwise we don't need to mess with 1851 * any clock dividers here 1852 */ 1853 p9100_ramdac_write_ctl(sc, DAC_MISC_CLK, 1); 1854 p9100_ramdac_write_ctl(sc, 3, 0); 1855 p9100_ramdac_write_ctl(sc, 4, 0); 1856 1857 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 0); 1858 p9100_ramdac_write_ctl(sc, DAC_OPERATION, 0); 1859 p9100_ramdac_write_ctl(sc, DAC_PALETTE_CTRL, 0); 1860 1861 p9100_ramdac_write_ctl(sc, DAC_PIXEL_FMT, pf); 1862 1863 /* TODO: distinguish between 15 and 16 bit */ 1864 p9100_ramdac_write_ctl(sc, DAC_8BIT_CTRL, 0); 1865 /* direct colour, linear, 565 */ 1866 p9100_ramdac_write_ctl(sc, DAC_16BIT_CTRL, 0xc6); 1867 /* direct colour */ 1868 p9100_ramdac_write_ctl(sc, DAC_32BIT_CTRL, 3); 1869 1870 /* From the 3GX manual. Needs magic number reduction */ 1871 p9100_ramdac_write_ctl(sc, 0x10, 2); 1872 p9100_ramdac_write_ctl(sc, 0x11, 0); 1873 p9100_ramdac_write_ctl(sc, 0x14, 5); 1874 p9100_ramdac_write_ctl(sc, 0x08, 1); 1875 p9100_ramdac_write_ctl(sc, 0x15, 5); 1876 p9100_ramdac_write_ctl(sc, 0x16, 0x63); 1877 1878 /* whack the CRTC */ 1879 /* we always transfer 64bit in one go */ 1880 crtcline = sc->sc_stride >> 3; 1881 1882 DPRINTF("crtcline: %d\n", crtcline); 1883 1884 p9100_ctl_write_4(sc, VID_HTOTAL, (24 << sc->sc_depthshift) + crtcline); 1885 p9100_ctl_write_4(sc, VID_HSRE, 8 << sc->sc_depthshift); 1886 p9100_ctl_write_4(sc, VID_HBRE, 18 << sc->sc_depthshift); 1887 p9100_ctl_write_4(sc, VID_HBFE, (18 << sc->sc_depthshift) + crtcline); 1888 1889 #ifdef PNOZZ_DEBUG 1890 { 1891 uint32_t sscr; 1892 sscr = p9100_ctl_read_4(sc, SYS_CONF); 1893 printf("scr: %x\n", sscr); 1894 } 1895 #endif 1896 return TRUE; 1897 } 1898
Indexes created Mon Oct 27 15:09:58 GMT 2025