p9100.c revision 1.64
1 /* $NetBSD: p9100.c,v 1.64 2021/04/24 23:36:58 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2005, 2006 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * color display (p9100) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: p9100.c,v 1.64 2021/04/24 23:36:58 thorpej Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/buf.h> 46 #include <sys/device.h> 47 #include <sys/ioctl.h> 48 #include <sys/malloc.h> 49 #include <sys/mman.h> 50 #include <sys/tty.h> 51 #include <sys/conf.h> 52 53 #include <sys/bus.h> 54 #include <machine/autoconf.h> 55 56 #include <dev/sun/fbio.h> 57 #include <dev/sun/fbvar.h> 58 #include <dev/sun/btreg.h> 59 #include <dev/sun/btvar.h> 60 61 #include <dev/sbus/p9100reg.h> 62 63 #include <dev/sbus/sbusvar.h> 64 65 #include <dev/wscons/wsdisplayvar.h> 66 #include <dev/wscons/wsconsio.h> 67 #include <dev/wsfont/wsfont.h> 68 #include <dev/rasops/rasops.h> 69 70 #include <dev/wscons/wsdisplay_vconsvar.h> 71 #include <dev/wscons/wsdisplay_glyphcachevar.h> 72 73 #include "opt_wsemul.h" 74 #include "rasops_glue.h" 75 #include "opt_pnozz.h" 76 77 #include "ioconf.h" 78 79 #include "tctrl.h" 80 #if NTCTRL > 0 81 #include <machine/tctrl.h> 82 #include <sparc/dev/tctrlvar.h> /*XXX*/ 83 #endif 84 85 #ifdef PNOZZ_DEBUG 86 #define DPRINTF aprint_normal 87 #else 88 #define DPRINTF while (0) aprint_normal 89 #endif 90 91 struct pnozz_cursor { 92 short pc_enable; /* cursor is enabled */ 93 struct fbcurpos pc_pos; /* position */ 94 struct fbcurpos pc_hot; /* hot-spot */ 95 struct fbcurpos pc_size; /* size of mask & image fields */ 96 uint32_t pc_bits[0x100]; /* space for mask & image bits */ 97 unsigned char red[3], green[3]; 98 unsigned char blue[3]; /* cursor palette */ 99 }; 100 101 /* per-display variables */ 102 struct p9100_softc { 103 device_t sc_dev; /* base device */ 104 struct fbdevice sc_fb; /* frame buffer device */ 105 106 bus_space_tag_t sc_bustag; 107 108 bus_addr_t sc_ctl_paddr; /* phys address description */ 109 bus_size_t sc_ctl_psize; /* for device mmap() */ 110 bus_space_handle_t sc_ctl_memh; /* bus space handle */ 111 112 bus_addr_t sc_fb_paddr; /* phys address description */ 113 bus_size_t sc_fb_psize; /* for device mmap() */ 114 #ifdef PNOZZ_USE_LATCH 115 bus_space_handle_t sc_fb_memh; /* bus space handle */ 116 #endif 117 uint32_t sc_mono_width; /* for setup_mono */ 118 119 uint32_t sc_width; 120 uint32_t sc_height; /* panel width / height */ 121 uint32_t sc_stride; 122 uint32_t sc_depth; 123 int sc_depthshift; /* blitter works on bytes not pixels */ 124 125 union bt_cmap sc_cmap; /* Brooktree color map */ 126 127 struct pnozz_cursor sc_cursor; 128 129 int sc_mode; 130 int sc_video, sc_powerstate; 131 uint32_t sc_bg; 132 volatile uint32_t sc_last_offset; 133 struct vcons_data vd; 134 uint8_t sc_dac_power; 135 glyphcache sc_gc; 136 }; 137 138 139 static struct vcons_screen p9100_console_screen; 140 141 extern const u_char rasops_cmap[768]; 142 143 struct wsscreen_descr p9100_defscreendesc = { 144 "default", 145 0, 0, 146 NULL, 147 8, 16, 148 WSSCREEN_WSCOLORS, 149 }; 150 151 const struct wsscreen_descr *_p9100_scrlist[] = { 152 &p9100_defscreendesc, 153 /* XXX other formats, graphics screen? */ 154 }; 155 156 struct wsscreen_list p9100_screenlist = { 157 sizeof(_p9100_scrlist) / sizeof(struct wsscreen_descr *), 158 _p9100_scrlist 159 }; 160 161 /* autoconfiguration driver */ 162 static int p9100_sbus_match(device_t, cfdata_t, void *); 163 static void p9100_sbus_attach(device_t, device_t, void *); 164 165 static void p9100unblank(device_t); 166 167 CFATTACH_DECL_NEW(pnozz, sizeof(struct p9100_softc), 168 p9100_sbus_match, p9100_sbus_attach, NULL, NULL); 169 170 static dev_type_open(p9100open); 171 static dev_type_close(p9100close); 172 static dev_type_ioctl(p9100ioctl); 173 static dev_type_mmap(p9100mmap); 174 175 const struct cdevsw pnozz_cdevsw = { 176 .d_open = p9100open, 177 .d_close = nullclose, 178 .d_read = noread, 179 .d_write = nowrite, 180 .d_ioctl = p9100ioctl, 181 .d_stop = nostop, 182 .d_tty = notty, 183 .d_poll = nopoll, 184 .d_mmap = p9100mmap, 185 .d_kqfilter = nokqfilter, 186 .d_discard = nodiscard, 187 .d_flag = 0 188 }; 189 190 /* frame buffer generic driver */ 191 static struct fbdriver p9100fbdriver = { 192 p9100unblank, p9100open, p9100close, p9100ioctl, nopoll, 193 p9100mmap, nokqfilter 194 }; 195 196 static void p9100loadcmap(struct p9100_softc *, int, int); 197 static void p9100_set_video(struct p9100_softc *, int); 198 static int p9100_get_video(struct p9100_softc *); 199 static uint32_t p9100_ctl_read_4(struct p9100_softc *, bus_size_t); 200 static void p9100_ctl_write_4(struct p9100_softc *, bus_size_t, uint32_t); 201 static uint8_t p9100_ramdac_read(struct p9100_softc *, bus_size_t); 202 static void p9100_ramdac_write(struct p9100_softc *, bus_size_t, uint8_t); 203 204 static uint8_t p9100_ramdac_read_ctl(struct p9100_softc *, int); 205 static void p9100_ramdac_write_ctl(struct p9100_softc *, int, uint8_t); 206 207 static void p9100_init_engine(struct p9100_softc *); 208 static int p9100_set_depth(struct p9100_softc *, int); 209 210 static void p9100_sync(struct p9100_softc *); 211 static void p9100_bitblt(void *, int, int, int, int, int, int, int); 212 static void p9100_rectfill(void *, int, int, int, int, uint32_t); 213 static void p9100_clearscreen(struct p9100_softc *); 214 215 static void p9100_setup_mono(struct p9100_softc *, int, int, int, int, 216 uint32_t, uint32_t); 217 static void p9100_feed_line(struct p9100_softc *, int, uint8_t *); 218 static void p9100_set_color_reg(struct p9100_softc *, int, int32_t); 219 220 static void p9100_copycols(void *, int, int, int, int); 221 static void p9100_erasecols(void *, int, int, int, long); 222 static void p9100_copyrows(void *, int, int, int); 223 static void p9100_eraserows(void *, int, int, long); 224 /*static int p9100_mapchar(void *, int, u_int *);*/ 225 static void p9100_putchar(void *, int, int, u_int, long); 226 static void p9100_putchar_aa(void *, int, int, u_int, long); 227 static void p9100_cursor(void *, int, int, int); 228 229 static int p9100_putcmap(struct p9100_softc *, struct wsdisplay_cmap *); 230 static int p9100_getcmap(struct p9100_softc *, struct wsdisplay_cmap *); 231 static int p9100_ioctl(void *, void *, u_long, void *, int, struct lwp *); 232 static paddr_t p9100_mmap(void *, void *, off_t, int); 233 234 /*static int p9100_load_font(void *, void *, struct wsdisplay_font *);*/ 235 236 static void p9100_init_screen(void *, struct vcons_screen *, int, 237 long *); 238 239 static void p9100_init_cursor(struct p9100_softc *); 240 241 static void p9100_set_fbcursor(struct p9100_softc *); 242 static void p9100_setcursorcmap(struct p9100_softc *); 243 static void p9100_loadcursor(struct p9100_softc *); 244 245 #if 0 246 static int p9100_intr(void *); 247 #endif 248 249 /* power management stuff */ 250 static bool p9100_suspend(device_t, const pmf_qual_t *); 251 static bool p9100_resume(device_t, const pmf_qual_t *); 252 253 #if NTCTRL > 0 254 static void p9100_set_extvga(void *, int); 255 #endif 256 257 struct wsdisplay_accessops p9100_accessops = { 258 p9100_ioctl, 259 p9100_mmap, 260 NULL, /* vcons_alloc_screen */ 261 NULL, /* vcons_free_screen */ 262 NULL, /* vcons_show_screen */ 263 NULL, /* load_font */ 264 NULL, /* polls */ 265 NULL, /* scroll */ 266 }; 267 268 #ifdef PNOZZ_USE_LATCH 269 #define PNOZZ_LATCH(sc, off) if(sc->sc_last_offset != (off & 0xffffff80)) { \ 270 (void)bus_space_read_4(sc->sc_bustag, sc->sc_fb_memh, off); \ 271 sc->sc_last_offset = off & 0xffffff80; } 272 #else 273 #define PNOZZ_LATCH(a, b) 274 #endif 275 276 /* 277 * Match a p9100. 278 */ 279 static int 280 p9100_sbus_match(device_t parent, cfdata_t cf, void *aux) 281 { 282 struct sbus_attach_args *sa = aux; 283 284 if (strcmp("p9100", sa->sa_name) == 0) 285 return 100; 286 return 0; 287 } 288 289 290 /* 291 * Attach a display. We need to notice if it is the console, too. 292 */ 293 static void 294 p9100_sbus_attach(device_t parent, device_t self, void *args) 295 { 296 struct p9100_softc *sc = device_private(self); 297 struct sbus_attach_args *sa = args; 298 struct fbdevice *fb = &sc->sc_fb; 299 int isconsole; 300 int node = sa->sa_node; 301 int i, j; 302 uint8_t ver, cmap[768]; 303 304 struct wsemuldisplaydev_attach_args aa; 305 struct rasops_info *ri; 306 unsigned long defattr; 307 308 sc->sc_last_offset = 0xffffffff; 309 sc->sc_dev = self; 310 311 /* 312 * When the ROM has mapped in a p9100 display, the address 313 * maps only the video RAM, so in any case we have to map the 314 * registers ourselves. 315 */ 316 317 if (sa->sa_npromvaddrs != 0) 318 fb->fb_pixels = (void *)sa->sa_promvaddrs[0]; 319 320 /* Remember cookies for p9100_mmap() */ 321 sc->sc_bustag = sa->sa_bustag; 322 323 sc->sc_ctl_paddr = sbus_bus_addr(sa->sa_bustag, 324 sa->sa_reg[0].oa_space, sa->sa_reg[0].oa_base); 325 sc->sc_ctl_psize = 0x8000;/*(bus_size_t)sa->sa_reg[0].oa_size;*/ 326 327 sc->sc_fb_paddr = sbus_bus_addr(sa->sa_bustag, 328 sa->sa_reg[2].oa_space, sa->sa_reg[2].oa_base); 329 sc->sc_fb_psize = (bus_size_t)sa->sa_reg[2].oa_size; 330 331 if (sbus_bus_map(sc->sc_bustag, 332 sa->sa_reg[0].oa_space, 333 sa->sa_reg[0].oa_base, 334 /* 335 * XXX for some reason the SBus resources don't cover 336 * all registers, so we just map what we need 337 */ 338 0x8000, 339 0, &sc->sc_ctl_memh) != 0) { 340 printf("%s: cannot map control registers\n", 341 device_xname(self)); 342 return; 343 } 344 345 /* 346 * we need to map the framebuffer even though we never write to it, 347 * thanks to some weirdness in the SPARCbook's SBus glue for the 348 * P9100 - all register accesses need to be 'latched in' whenever we 349 * go to another 0x80 aligned 'page' by reading the framebuffer at the 350 * same offset 351 * XXX apparently the latter isn't true - my SB3GX works fine without 352 */ 353 #ifdef PNOZZ_USE_LATCH 354 if (fb->fb_pixels == NULL) { 355 if (sbus_bus_map(sc->sc_bustag, 356 sa->sa_reg[2].oa_space, 357 sa->sa_reg[2].oa_base, 358 sc->sc_fb_psize, 359 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE, 360 &sc->sc_fb_memh) != 0) { 361 printf("%s: cannot map framebuffer\n", 362 device_xname(self)); 363 return; 364 } 365 fb->fb_pixels = (char *)sc->sc_fb_memh; 366 } else { 367 sc->sc_fb_memh = (bus_space_handle_t) fb->fb_pixels; 368 } 369 #endif 370 sc->sc_width = prom_getpropint(node, "width", 800); 371 sc->sc_height = prom_getpropint(node, "height", 600); 372 sc->sc_depth = prom_getpropint(node, "depth", 8) >> 3; 373 374 sc->sc_stride = prom_getpropint(node, "linebytes", 375 sc->sc_width * sc->sc_depth); 376 377 fb->fb_driver = &p9100fbdriver; 378 fb->fb_device = sc->sc_dev; 379 fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK; 380 #ifdef PNOZZ_EMUL_CG3 381 fb->fb_type.fb_type = FBTYPE_SUN3COLOR; 382 #else 383 fb->fb_type.fb_type = FBTYPE_P9100; 384 #endif 385 fb->fb_pixels = NULL; 386 387 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 388 389 isconsole = fb_is_console(node); 390 #if 0 391 if (!isconsole) { 392 aprint_normal("\n"); 393 aprint_error_dev(self, "fatal error: PROM didn't configure device\n"); 394 return; 395 } 396 #endif 397 398 fb->fb_type.fb_depth = 8; 399 sc->sc_depth = 1; 400 sc->sc_depthshift = 0; 401 402 /* check the RAMDAC */ 403 ver = p9100_ramdac_read_ctl(sc, DAC_VERSION); 404 405 p9100_init_engine(sc); 406 p9100_set_depth(sc, 8); 407 408 fb_setsize_obp(fb, fb->fb_type.fb_depth, sc->sc_width, sc->sc_height, 409 node); 410 411 #if 0 412 bus_intr_establish(sc->sc_bustag, sa->sa_pri, IPL_BIO, 413 p9100_intr, sc); 414 #endif 415 416 fb->fb_type.fb_cmsize = prom_getpropint(node, "cmsize", 256); 417 if ((1 << fb->fb_type.fb_depth) != fb->fb_type.fb_cmsize) 418 printf(", %d entry colormap", fb->fb_type.fb_cmsize); 419 420 /* make sure we are not blanked */ 421 if (isconsole) { 422 p9100_set_video(sc, 1); 423 delay(1000); 424 /* hopefully make my oldish PLL lock */ 425 p9100_set_video(sc, 0); 426 delay(1000000); 427 p9100_set_video(sc, 1); 428 } 429 430 /* register with power management */ 431 sc->sc_video = 1; 432 sc->sc_powerstate = PWR_RESUME; 433 if (!pmf_device_register(self, p9100_suspend, p9100_resume)) { 434 panic("%s: could not register with PMF", 435 device_xname(sc->sc_dev)); 436 } 437 438 if (isconsole) { 439 printf(" (console)\n"); 440 } else 441 printf("\n"); 442 443 wsfont_init(); 444 445 #ifdef PNOZZ_DEBUG 446 /* make the glyph cache visible */ 447 sc->sc_height -= 100; 448 #endif 449 450 sc->sc_gc.gc_bitblt = p9100_bitblt; 451 sc->sc_gc.gc_blitcookie = sc; 452 sc->sc_gc.gc_rop = ROP_SRC; 453 454 vcons_init(&sc->vd, sc, &p9100_defscreendesc, &p9100_accessops); 455 sc->vd.init_screen = p9100_init_screen; 456 457 vcons_init_screen(&sc->vd, &p9100_console_screen, 1, &defattr); 458 p9100_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 459 460 /* Initialize the default color map. */ 461 rasops_get_cmap(&p9100_console_screen.scr_ri, cmap, 768); 462 463 j = 0; 464 for (i = 0; i < 256; i++) { 465 sc->sc_cmap.cm_map[i][0] = cmap[j]; 466 j++; 467 sc->sc_cmap.cm_map[i][1] = cmap[j]; 468 j++; 469 sc->sc_cmap.cm_map[i][2] = cmap[j]; 470 j++; 471 } 472 p9100loadcmap(sc, 0, 256); 473 474 sc->sc_bg = (defattr >> 16) & 0xff; 475 p9100_clearscreen(sc); 476 477 ri = &p9100_console_screen.scr_ri; 478 479 p9100_defscreendesc.nrows = ri->ri_rows; 480 p9100_defscreendesc.ncols = ri->ri_cols; 481 p9100_defscreendesc.textops = &ri->ri_ops; 482 p9100_defscreendesc.capabilities = ri->ri_caps; 483 484 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 485 (0x200000 / sc->sc_stride) - sc->sc_height - 5, 486 sc->sc_width, 487 ri->ri_font->fontwidth, 488 ri->ri_font->fontheight, 489 defattr); 490 491 if(isconsole) { 492 wsdisplay_cnattach(&p9100_defscreendesc, ri, 0, 0, defattr); 493 vcons_replay_msgbuf(&p9100_console_screen); 494 } 495 496 aa.console = isconsole; 497 aa.scrdata = &p9100_screenlist; 498 aa.accessops = &p9100_accessops; 499 aa.accesscookie = &sc->vd; 500 501 config_found(self, &aa, wsemuldisplaydevprint, CFARG_EOL); 502 503 fb->fb_type.fb_size = fb->fb_type.fb_height * fb->fb_linebytes; 504 printf("%s: rev %d / %x, %dx%d, depth %d mem %x\n", 505 device_xname(self), 506 (i & 7), ver, fb->fb_type.fb_width, fb->fb_type.fb_height, 507 fb->fb_type.fb_depth, (unsigned int)sc->sc_fb_psize); 508 /* cursor sprite handling */ 509 p9100_init_cursor(sc); 510 511 /* attach the fb */ 512 fb_attach(fb, isconsole); 513 514 #if NTCTRL > 0 515 /* register callback for external monitor status change */ 516 if (0) tadpole_register_callback(p9100_set_extvga, sc); 517 #endif 518 } 519 520 int 521 p9100open(dev_t dev, int flags, int mode, struct lwp *l) 522 { 523 int unit = minor(dev); 524 525 if (device_lookup(&pnozz_cd, unit) == NULL) 526 return (ENXIO); 527 return (0); 528 } 529 530 int 531 p9100close(dev_t dev, int flags, int mode, struct lwp *l) 532 { 533 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 534 535 p9100_init_engine(sc); 536 p9100_set_depth(sc, 8); 537 p9100loadcmap(sc, 0, 256); 538 p9100_clearscreen(sc); 539 glyphcache_wipe(&sc->sc_gc); 540 vcons_redraw_screen(sc->vd.active); 541 542 return 0; 543 } 544 545 int 546 p9100ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 547 { 548 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 549 struct fbgattr *fba; 550 int error, v; 551 552 switch (cmd) { 553 554 case FBIOGTYPE: 555 *(struct fbtype *)data = sc->sc_fb.fb_type; 556 break; 557 558 case FBIOGATTR: 559 fba = (struct fbgattr *)data; 560 fba->real_type = sc->sc_fb.fb_type.fb_type; 561 fba->owner = 0; /* XXX ??? */ 562 fba->fbtype = sc->sc_fb.fb_type; 563 fba->sattr.flags = 0; 564 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 565 fba->sattr.dev_specific[0] = -1; 566 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 567 fba->emu_types[1] = -1; 568 break; 569 570 case FBIOGETCMAP: 571 #define p ((struct fbcmap *)data) 572 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 573 574 case FBIOPUTCMAP: 575 /* copy to software map */ 576 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 577 if (error) 578 return (error); 579 /* now blast them into the chip */ 580 /* XXX should use retrace interrupt */ 581 p9100loadcmap(sc, p->index, p->count); 582 #undef p 583 break; 584 585 case FBIOGVIDEO: 586 *(int *)data = p9100_get_video(sc); 587 break; 588 589 case FBIOSVIDEO: 590 p9100_set_video(sc, *(int *)data); 591 break; 592 593 /* these are for both FBIOSCURSOR and FBIOGCURSOR */ 594 #define p ((struct fbcursor *)data) 595 #define pc (&sc->sc_cursor) 596 597 case FBIOGCURSOR: 598 p->set = FB_CUR_SETALL; /* close enough, anyway */ 599 p->enable = pc->pc_enable; 600 p->pos = pc->pc_pos; 601 p->hot = pc->pc_hot; 602 p->size = pc->pc_size; 603 604 if (p->image != NULL) { 605 error = copyout(pc->pc_bits, p->image, 0x200); 606 if (error) 607 return error; 608 error = copyout(&pc->pc_bits[0x80], p->mask, 0x200); 609 if (error) 610 return error; 611 } 612 613 p->cmap.index = 0; 614 p->cmap.count = 3; 615 if (p->cmap.red != NULL) { 616 copyout(pc->red, p->cmap.red, 3); 617 copyout(pc->green, p->cmap.green, 3); 618 copyout(pc->blue, p->cmap.blue, 3); 619 } 620 break; 621 622 case FBIOSCURSOR: 623 { 624 int count; 625 uint32_t image[0x80], mask[0x80]; 626 uint8_t red[3], green[3], blue[3]; 627 628 v = p->set; 629 if (v & FB_CUR_SETCMAP) { 630 error = copyin(p->cmap.red, red, 3); 631 error |= copyin(p->cmap.green, green, 3); 632 error |= copyin(p->cmap.blue, blue, 3); 633 if (error) 634 return error; 635 } 636 if (v & FB_CUR_SETSHAPE) { 637 if (p->size.x > 64 || p->size.y > 64) 638 return EINVAL; 639 memset(&mask, 0, 0x200); 640 memset(&image, 0, 0x200); 641 count = p->size.y * 8; 642 error = copyin(p->image, image, count); 643 if (error) 644 return error; 645 error = copyin(p->mask, mask, count); 646 if (error) 647 return error; 648 } 649 650 /* parameters are OK; do it */ 651 if (v & (FB_CUR_SETCUR | FB_CUR_SETPOS | FB_CUR_SETHOT)) { 652 if (v & FB_CUR_SETCUR) 653 pc->pc_enable = p->enable; 654 if (v & FB_CUR_SETPOS) 655 pc->pc_pos = p->pos; 656 if (v & FB_CUR_SETHOT) 657 pc->pc_hot = p->hot; 658 p9100_set_fbcursor(sc); 659 } 660 661 if (v & FB_CUR_SETCMAP) { 662 memcpy(pc->red, red, 3); 663 memcpy(pc->green, green, 3); 664 memcpy(pc->blue, blue, 3); 665 p9100_setcursorcmap(sc); 666 } 667 668 if (v & FB_CUR_SETSHAPE) { 669 memcpy(pc->pc_bits, image, 0x200); 670 memcpy(&pc->pc_bits[0x80], mask, 0x200); 671 p9100_loadcursor(sc); 672 } 673 } 674 break; 675 676 #undef p 677 #undef cc 678 679 case FBIOGCURPOS: 680 *(struct fbcurpos *)data = sc->sc_cursor.pc_pos; 681 break; 682 683 case FBIOSCURPOS: 684 sc->sc_cursor.pc_pos = *(struct fbcurpos *)data; 685 p9100_set_fbcursor(sc); 686 break; 687 688 case FBIOGCURMAX: 689 /* max cursor size is 64x64 */ 690 ((struct fbcurpos *)data)->x = 64; 691 ((struct fbcurpos *)data)->y = 64; 692 break; 693 694 default: 695 return (ENOTTY); 696 } 697 return (0); 698 } 699 700 static uint32_t 701 p9100_ctl_read_4(struct p9100_softc *sc, bus_size_t off) 702 { 703 704 PNOZZ_LATCH(sc, off); 705 return bus_space_read_4(sc->sc_bustag, sc->sc_ctl_memh, off); 706 } 707 708 static void 709 p9100_ctl_write_4(struct p9100_softc *sc, bus_size_t off, uint32_t v) 710 { 711 712 PNOZZ_LATCH(sc, off); 713 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, v); 714 } 715 716 /* initialize the drawing engine */ 717 static void 718 p9100_init_engine(struct p9100_softc *sc) 719 { 720 /* reset clipping rectangles */ 721 uint32_t rmax = ((sc->sc_width & 0x3fff) << 16) | 722 (sc->sc_height & 0x3fff); 723 724 sc->sc_last_offset = 0xffffffff; 725 726 p9100_ctl_write_4(sc, WINDOW_OFFSET, 0); 727 p9100_ctl_write_4(sc, WINDOW_MIN, 0); 728 p9100_ctl_write_4(sc, WINDOW_MAX, rmax); 729 p9100_ctl_write_4(sc, BYTE_CLIP_MIN, 0); 730 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 731 p9100_ctl_write_4(sc, DRAW_MODE, 0); 732 p9100_ctl_write_4(sc, PLANE_MASK, 0xffffffff); 733 p9100_ctl_write_4(sc, PATTERN0, 0xffffffff); 734 p9100_ctl_write_4(sc, PATTERN1, 0xffffffff); 735 p9100_ctl_write_4(sc, PATTERN2, 0xffffffff); 736 p9100_ctl_write_4(sc, PATTERN3, 0xffffffff); 737 738 } 739 740 /* wait until the engine is idle */ 741 static void 742 p9100_sync(struct p9100_softc *sc) 743 { 744 while((p9100_ctl_read_4(sc, ENGINE_STATUS) & 745 (ENGINE_BUSY | BLITTER_BUSY)) != 0); 746 } 747 748 static void 749 p9100_set_color_reg(struct p9100_softc *sc, int reg, int32_t col) 750 { 751 uint32_t out; 752 753 switch(sc->sc_depth) 754 { 755 case 1: /* 8 bit */ 756 out = (col << 8) | col; 757 out |= out << 16; 758 break; 759 case 2: /* 16 bit */ 760 out = col | (col << 16); 761 break; 762 default: 763 out = col; 764 } 765 p9100_ctl_write_4(sc, reg, out); 766 } 767 768 /* screen-to-screen blit */ 769 static void 770 p9100_bitblt(void *cookie, int xs, int ys, int xd, int yd, int wi, 771 int he, int rop) 772 { 773 struct p9100_softc *sc = cookie; 774 uint32_t src, dst, srcw, dstw; 775 776 sc->sc_last_offset = 0xffffffff; 777 778 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 779 dst = ((xd & 0x3fff) << 16) | (yd & 0x3fff); 780 srcw = (((xs + wi - 1) & 0x3fff) << 16) | ((ys + he - 1) & 0x3fff); 781 dstw = (((xd + wi - 1) & 0x3fff) << 16) | ((yd + he - 1) & 0x3fff); 782 783 p9100_sync(sc); 784 785 p9100_ctl_write_4(sc, RASTER_OP, rop); 786 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 787 788 p9100_ctl_write_4(sc, ABS_XY0, src << sc->sc_depthshift); 789 p9100_ctl_write_4(sc, ABS_XY1, srcw << sc->sc_depthshift); 790 p9100_ctl_write_4(sc, ABS_XY2, dst << sc->sc_depthshift); 791 p9100_ctl_write_4(sc, ABS_XY3, dstw << sc->sc_depthshift); 792 793 (void)p9100_ctl_read_4(sc, COMMAND_BLIT); 794 } 795 796 /* solid rectangle fill */ 797 static void 798 p9100_rectfill(void *cookie, int xs, int ys, int wi, int he, uint32_t col) 799 { 800 struct p9100_softc *sc = cookie; 801 uint32_t src, srcw; 802 803 sc->sc_last_offset = 0xffffffff; 804 805 src = ((xs & 0x3fff) << 16) | (ys & 0x3fff); 806 srcw = (((xs + wi) & 0x3fff) << 16) | ((ys + he) & 0x3fff); 807 p9100_sync(sc); 808 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 809 p9100_set_color_reg(sc, FOREGROUND_COLOR, col); 810 p9100_set_color_reg(sc, BACKGROUND_COLOR, col); 811 p9100_ctl_write_4(sc, RASTER_OP, ROP_PAT); 812 p9100_ctl_write_4(sc, COORD_INDEX, 0); 813 p9100_ctl_write_4(sc, RECT_RTW_XY, src); 814 p9100_ctl_write_4(sc, RECT_RTW_XY, srcw); 815 (void)p9100_ctl_read_4(sc, COMMAND_QUAD); 816 } 817 818 /* setup for mono->colour expansion */ 819 static void 820 p9100_setup_mono(struct p9100_softc *sc, int x, int y, int wi, int he, 821 uint32_t fg, uint32_t bg) 822 { 823 824 sc->sc_last_offset = 0xffffffff; 825 826 p9100_sync(sc); 827 /* 828 * this doesn't make any sense to me either, but for some reason the 829 * chip applies the foreground colour to 0 pixels 830 */ 831 832 p9100_set_color_reg(sc,FOREGROUND_COLOR,bg); 833 p9100_set_color_reg(sc,BACKGROUND_COLOR,fg); 834 835 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, 0x3fff3fff); 836 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 837 p9100_ctl_write_4(sc, ABS_X0, x); 838 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 839 p9100_ctl_write_4(sc, ABS_X2, (x + wi)); 840 p9100_ctl_write_4(sc, ABS_Y3, he); 841 /* now feed the data into the chip */ 842 sc->sc_mono_width = wi; 843 } 844 845 /* write monochrome data to the screen through the blitter */ 846 static void 847 p9100_feed_line(struct p9100_softc *sc, int count, uint8_t *data) 848 { 849 int i; 850 uint32_t latch = 0, bork; 851 int shift = 24; 852 int to_go = sc->sc_mono_width; 853 854 PNOZZ_LATCH(sc, PIXEL_1); 855 856 for (i = 0; i < count; i++) { 857 bork = data[i]; 858 latch |= (bork << shift); 859 if (shift == 0) { 860 /* check how many bits are significant */ 861 if (to_go > 31) { 862 bus_space_write_4(sc->sc_bustag, 863 sc->sc_ctl_memh, 864 (PIXEL_1 + (31 << 2)), latch); 865 to_go -= 32; 866 } else 867 { 868 bus_space_write_4(sc->sc_bustag, 869 sc->sc_ctl_memh, 870 (PIXEL_1 + ((to_go - 1) << 2)), latch); 871 to_go = 0; 872 } 873 latch = 0; 874 shift = 24; 875 } else 876 shift -= 8; 877 } 878 if (shift != 24) 879 p9100_ctl_write_4(sc, (PIXEL_1 + ((to_go - 1) << 2)), latch); 880 } 881 882 static void 883 p9100_clearscreen(struct p9100_softc *sc) 884 { 885 886 p9100_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, sc->sc_bg); 887 } 888 889 static uint8_t 890 p9100_ramdac_read(struct p9100_softc *sc, bus_size_t off) 891 { 892 893 (void)p9100_ctl_read_4(sc, PWRUP_CNFG); 894 return ((bus_space_read_4(sc->sc_bustag, 895 sc->sc_ctl_memh, off) >> 16) & 0xff); 896 } 897 898 static void 899 p9100_ramdac_write(struct p9100_softc *sc, bus_size_t off, uint8_t v) 900 { 901 902 (void)p9100_ctl_read_4(sc, PWRUP_CNFG); 903 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, off, 904 ((uint32_t)v) << 16); 905 } 906 907 static uint8_t 908 p9100_ramdac_read_ctl(struct p9100_softc *sc, int off) 909 { 910 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 911 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 912 return p9100_ramdac_read(sc, DAC_INDX_DATA); 913 } 914 915 static void 916 p9100_ramdac_write_ctl(struct p9100_softc *sc, int off, uint8_t val) 917 { 918 p9100_ramdac_write(sc, DAC_INDX_LO, off & 0xff); 919 p9100_ramdac_write(sc, DAC_INDX_HI, (off & 0xff00) >> 8); 920 p9100_ramdac_write(sc, DAC_INDX_DATA, val); 921 } 922 923 /* 924 * Undo the effect of an FBIOSVIDEO that turns the video off. 925 */ 926 static void 927 p9100unblank(device_t dev) 928 { 929 struct p9100_softc *sc = device_private(dev); 930 931 p9100_set_video(sc, 1); 932 933 /* 934 * Check if we're in terminal mode. If not force the console screen 935 * to front so we can see ddb, panic messages and so on 936 */ 937 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) { 938 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 939 if (sc->vd.active != &p9100_console_screen) { 940 SCREEN_INVISIBLE(sc->vd.active); 941 sc->vd.active = &p9100_console_screen; 942 SCREEN_VISIBLE(&p9100_console_screen); 943 } 944 p9100_init_engine(sc); 945 p9100_set_depth(sc, 8); 946 vcons_redraw_screen(&p9100_console_screen); 947 } 948 } 949 950 static void 951 p9100_set_video(struct p9100_softc *sc, int enable) 952 { 953 uint32_t v = p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1); 954 955 if (enable) 956 v |= VIDEO_ENABLED; 957 else 958 v &= ~VIDEO_ENABLED; 959 p9100_ctl_write_4(sc, SCRN_RPNT_CTL_1, v); 960 #if NTCTRL > 0 961 /* Turn On/Off the TFT if we know how. 962 */ 963 tadpole_set_video(enable); 964 #endif 965 } 966 967 static int 968 p9100_get_video(struct p9100_softc *sc) 969 { 970 return (p9100_ctl_read_4(sc, SCRN_RPNT_CTL_1) & VIDEO_ENABLED) != 0; 971 } 972 973 static bool 974 p9100_suspend(device_t dev, const pmf_qual_t *qual) 975 { 976 struct p9100_softc *sc = device_private(dev); 977 978 if (sc->sc_powerstate == PWR_SUSPEND) 979 return TRUE; 980 981 sc->sc_video = p9100_get_video(sc); 982 sc->sc_dac_power = p9100_ramdac_read_ctl(sc, DAC_POWER_MGT); 983 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 984 DAC_POWER_SCLK_DISABLE | 985 DAC_POWER_DDOT_DISABLE | 986 DAC_POWER_SYNC_DISABLE | 987 DAC_POWER_ICLK_DISABLE | 988 DAC_POWER_IPWR_DISABLE); 989 p9100_set_video(sc, 0); 990 sc->sc_powerstate = PWR_SUSPEND; 991 return TRUE; 992 } 993 994 static bool 995 p9100_resume(device_t dev, const pmf_qual_t *qual) 996 { 997 struct p9100_softc *sc = device_private(dev); 998 999 if (sc->sc_powerstate == PWR_RESUME) 1000 return TRUE; 1001 1002 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, sc->sc_dac_power); 1003 p9100_set_video(sc, sc->sc_video); 1004 1005 sc->sc_powerstate = PWR_RESUME; 1006 return TRUE; 1007 } 1008 1009 /* 1010 * Load a subset of the current (new) colormap into the IBM RAMDAC. 1011 */ 1012 static void 1013 p9100loadcmap(struct p9100_softc *sc, int start, int ncolors) 1014 { 1015 int i; 1016 sc->sc_last_offset = 0xffffffff; 1017 1018 p9100_ramdac_write(sc, DAC_CMAP_WRIDX, start); 1019 1020 for (i=0;i<ncolors;i++) { 1021 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1022 sc->sc_cmap.cm_map[i + start][0]); 1023 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1024 sc->sc_cmap.cm_map[i + start][1]); 1025 p9100_ramdac_write(sc, DAC_CMAP_DATA, 1026 sc->sc_cmap.cm_map[i + start][2]); 1027 } 1028 } 1029 1030 /* 1031 * Return the address that would map the given device at the given 1032 * offset, allowing for the given protection, or return -1 for error. 1033 */ 1034 static paddr_t 1035 p9100mmap(dev_t dev, off_t off, int prot) 1036 { 1037 struct p9100_softc *sc = device_lookup_private(&pnozz_cd, minor(dev)); 1038 1039 if (off & PGOFSET) 1040 panic("p9100mmap"); 1041 if (off < 0) 1042 return (-1); 1043 1044 #ifdef PNOZZ_EMUL_CG3 1045 #define CG3_MMAP_OFFSET 0x04000000 1046 /* Make Xsun think we are a CG3 (SUN3COLOR) 1047 */ 1048 if (off >= CG3_MMAP_OFFSET && off < CG3_MMAP_OFFSET + sc->sc_fb_psize) { 1049 off -= CG3_MMAP_OFFSET; 1050 return (bus_space_mmap(sc->sc_bustag, 1051 sc->sc_fb_paddr, 1052 off, 1053 prot, 1054 BUS_SPACE_MAP_LINEAR)); 1055 } 1056 #endif 1057 1058 if (off >= sc->sc_fb_psize + sc->sc_ctl_psize/* + sc->sc_cmd_psize*/) 1059 return (-1); 1060 1061 if (off < sc->sc_fb_psize) { 1062 return (bus_space_mmap(sc->sc_bustag, 1063 sc->sc_fb_paddr, 1064 off, 1065 prot, 1066 BUS_SPACE_MAP_LINEAR)); 1067 } 1068 1069 off -= sc->sc_fb_psize; 1070 if (off < sc->sc_ctl_psize) { 1071 return (bus_space_mmap(sc->sc_bustag, 1072 sc->sc_ctl_paddr, 1073 off, 1074 prot, 1075 BUS_SPACE_MAP_LINEAR)); 1076 } 1077 1078 return EINVAL; 1079 } 1080 1081 /* wscons stuff */ 1082 1083 static void 1084 p9100_cursor(void *cookie, int on, int row, int col) 1085 { 1086 struct rasops_info *ri = cookie; 1087 struct vcons_screen *scr = ri->ri_hw; 1088 struct p9100_softc *sc = scr->scr_cookie; 1089 int x, y, wi,he; 1090 1091 wi = ri->ri_font->fontwidth; 1092 he = ri->ri_font->fontheight; 1093 1094 if (ri->ri_flg & RI_CURSOR) { 1095 x = ri->ri_ccol * wi + ri->ri_xorigin; 1096 y = ri->ri_crow * he + ri->ri_yorigin; 1097 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1098 ri->ri_flg &= ~RI_CURSOR; 1099 } 1100 1101 ri->ri_crow = row; 1102 ri->ri_ccol = col; 1103 1104 if (on) 1105 { 1106 x = ri->ri_ccol * wi + ri->ri_xorigin; 1107 y = ri->ri_crow * he + ri->ri_yorigin; 1108 p9100_bitblt(sc, x, y, x, y, wi, he, ROP_SRC ^ 0xff); 1109 ri->ri_flg |= RI_CURSOR; 1110 } 1111 } 1112 1113 #if 0 1114 static int 1115 p9100_mapchar(void *cookie, int uni, u_int *index) 1116 { 1117 return 0; 1118 } 1119 #endif 1120 1121 static void 1122 p9100_putchar(void *cookie, int row, int col, u_int c, long attr) 1123 { 1124 struct rasops_info *ri = cookie; 1125 struct wsdisplay_font *font = PICK_FONT(ri, c); 1126 struct vcons_screen *scr = ri->ri_hw; 1127 struct p9100_softc *sc = scr->scr_cookie; 1128 1129 int fg, bg, i; 1130 uint8_t *data; 1131 int x, y, wi, he; 1132 1133 wi = font->fontwidth; 1134 he = font->fontheight; 1135 1136 if (!CHAR_IN_FONT(c, font)) 1137 return; 1138 1139 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xff]; 1140 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xff]; 1141 x = ri->ri_xorigin + col * wi; 1142 y = ri->ri_yorigin + row * he; 1143 1144 if (c == 0x20) { 1145 p9100_rectfill(sc, x, y, wi, he, bg); 1146 } else { 1147 data = WSFONT_GLYPH(c, font); 1148 1149 p9100_setup_mono(sc, x, y, wi, 1, fg, bg); 1150 for (i = 0; i < he; i++) { 1151 p9100_feed_line(sc, font->stride, 1152 data); 1153 data += font->stride; 1154 } 1155 } 1156 } 1157 1158 static void 1159 p9100_putchar_aa(void *cookie, int row, int col, u_int c, long attr) 1160 { 1161 struct rasops_info *ri = cookie; 1162 struct wsdisplay_font *font = PICK_FONT(ri, c); 1163 struct vcons_screen *scr = ri->ri_hw; 1164 struct p9100_softc *sc = scr->scr_cookie; 1165 uint32_t bg, latch = 0, bg8, fg8, pixel; 1166 int i, j, x, y, wi, he, r, g, b, aval, rwi; 1167 int r1, g1, b1, r0, g0, b0, fgo, bgo; 1168 uint8_t *data8; 1169 int rv; 1170 1171 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1172 return; 1173 1174 if (!CHAR_IN_FONT(c, font)) 1175 return; 1176 1177 wi = font->fontwidth; 1178 rwi = (wi + 3) & ~3; 1179 he = font->fontheight; 1180 1181 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1182 x = ri->ri_xorigin + col * wi; 1183 y = ri->ri_yorigin + row * he; 1184 1185 if (c == 0x20) { 1186 p9100_rectfill(sc, x, y, wi, he, bg); 1187 return; 1188 } 1189 1190 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1191 if (rv == GC_OK) 1192 return; 1193 1194 data8 = WSFONT_GLYPH(c, font); 1195 1196 p9100_sync(sc); 1197 1198 p9100_ctl_write_4(sc, RASTER_OP, ROP_SRC); 1199 p9100_ctl_write_4(sc, ABS_X0, x); 1200 p9100_ctl_write_4(sc, ABS_XY1, (x << 16) | (y & 0xFFFFL)); 1201 p9100_ctl_write_4(sc, ABS_X2, (x + rwi)); 1202 p9100_ctl_write_4(sc, ABS_Y3, 1); 1203 p9100_ctl_write_4(sc, BYTE_CLIP_MAX, ((x + wi - 1) << 16) | 0x3fff); 1204 1205 /* 1206 * we need the RGB colours here, so get offsets into rasops_cmap 1207 */ 1208 fgo = ((attr >> 24) & 0xf) * 3; 1209 bgo = ((attr >> 16) & 0xf) * 3; 1210 1211 r0 = rasops_cmap[bgo]; 1212 r1 = rasops_cmap[fgo]; 1213 g0 = rasops_cmap[bgo + 1]; 1214 g1 = rasops_cmap[fgo + 1]; 1215 b0 = rasops_cmap[bgo + 2]; 1216 b1 = rasops_cmap[fgo + 2]; 1217 #define R3G3B2(r, g, b) ((r & 0xe0) | ((g >> 3) & 0x1c) | (b >> 6)) 1218 bg8 = R3G3B2(r0, g0, b0); 1219 fg8 = R3G3B2(r1, g1, b1); 1220 1221 //r128fb_wait(sc, 16); 1222 1223 for (i = 0; i < he; i++) { 1224 for (j = 0; j < wi; j++) { 1225 aval = *data8; 1226 if (aval == 0) { 1227 pixel = bg8; 1228 } else if (aval == 255) { 1229 pixel = fg8; 1230 } else { 1231 r = aval * r1 + (255 - aval) * r0; 1232 g = aval * g1 + (255 - aval) * g0; 1233 b = aval * b1 + (255 - aval) * b0; 1234 pixel = ((r & 0xe000) >> 8) | 1235 ((g & 0xe000) >> 11) | 1236 ((b & 0xc000) >> 14); 1237 } 1238 latch = (latch << 8) | pixel; 1239 /* write in 32bit chunks */ 1240 if ((j & 3) == 3) { 1241 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, 1242 COMMAND_PIXEL8, latch); 1243 latch = 0; 1244 } 1245 data8++; 1246 } 1247 /* if we have pixels left in latch write them out */ 1248 if ((j & 3) != 0) { 1249 latch = latch << ((4 - (j & 3)) << 3); 1250 bus_space_write_4(sc->sc_bustag, sc->sc_ctl_memh, 1251 COMMAND_PIXEL8, latch); 1252 } 1253 } 1254 if (rv == GC_ADD) { 1255 glyphcache_add(&sc->sc_gc, c, x, y); 1256 } 1257 } 1258 1259 /* 1260 * wsdisplay_accessops 1261 */ 1262 1263 int 1264 p9100_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 1265 struct lwp *l) 1266 { 1267 struct vcons_data *vd = v; 1268 struct p9100_softc *sc = vd->cookie; 1269 struct wsdisplay_fbinfo *wdf; 1270 struct vcons_screen *ms = vd->active; 1271 1272 switch (cmd) { 1273 case WSDISPLAYIO_GTYPE: 1274 *(u_int *)data = WSDISPLAY_TYPE_SB_P9100; 1275 return 0; 1276 1277 case FBIOGVIDEO: 1278 case WSDISPLAYIO_GVIDEO: 1279 *(int *)data = p9100_get_video(sc); 1280 return 0; 1281 1282 case WSDISPLAYIO_SVIDEO: 1283 case FBIOSVIDEO: 1284 p9100_set_video(sc, *(int *)data); 1285 return 0; 1286 1287 case WSDISPLAYIO_GINFO: 1288 wdf = (void *)data; 1289 wdf->height = ms->scr_ri.ri_height; 1290 wdf->width = ms->scr_ri.ri_width; 1291 wdf->depth = ms->scr_ri.ri_depth; 1292 wdf->cmsize = 256; 1293 return 0; 1294 1295 case WSDISPLAYIO_GETCMAP: 1296 return p9100_getcmap(sc, (struct wsdisplay_cmap *)data); 1297 1298 case WSDISPLAYIO_PUTCMAP: 1299 return p9100_putcmap(sc, (struct wsdisplay_cmap *)data); 1300 1301 case WSDISPLAYIO_SMODE: 1302 { 1303 int new_mode = *(int*)data; 1304 if (new_mode != sc->sc_mode) 1305 { 1306 sc->sc_mode = new_mode; 1307 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1308 { 1309 p9100_init_engine(sc); 1310 p9100_set_depth(sc, 8); 1311 p9100loadcmap(sc, 0, 256); 1312 p9100_clearscreen(sc); 1313 glyphcache_wipe(&sc->sc_gc); 1314 vcons_redraw_screen(ms); 1315 } 1316 } 1317 } 1318 } 1319 return EPASSTHROUGH; 1320 } 1321 1322 static paddr_t 1323 p9100_mmap(void *v, void *vs, off_t offset, int prot) 1324 { 1325 struct vcons_data *vd = v; 1326 struct p9100_softc *sc = vd->cookie; 1327 paddr_t pa; 1328 1329 /* 'regular' framebuffer mmap()ing */ 1330 if (offset < sc->sc_fb_psize) { 1331 pa = bus_space_mmap(sc->sc_bustag, sc->sc_fb_paddr + offset, 0, 1332 prot, BUS_SPACE_MAP_LINEAR); 1333 return pa; 1334 } 1335 1336 if ((offset >= sc->sc_fb_paddr) && (offset < (sc->sc_fb_paddr + 1337 sc->sc_fb_psize))) { 1338 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1339 BUS_SPACE_MAP_LINEAR); 1340 return pa; 1341 } 1342 1343 if ((offset >= sc->sc_ctl_paddr) && (offset < (sc->sc_ctl_paddr + 1344 sc->sc_ctl_psize))) { 1345 pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot, 1346 BUS_SPACE_MAP_LINEAR); 1347 return pa; 1348 } 1349 1350 return -1; 1351 } 1352 1353 static void 1354 p9100_init_screen(void *cookie, struct vcons_screen *scr, 1355 int existing, long *defattr) 1356 { 1357 struct p9100_softc *sc = cookie; 1358 struct rasops_info *ri = &scr->scr_ri; 1359 1360 ri->ri_depth = sc->sc_depth << 3; 1361 ri->ri_width = sc->sc_width; 1362 ri->ri_height = sc->sc_height; 1363 ri->ri_stride = sc->sc_stride; 1364 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 1365 if (ri->ri_depth == 8) 1366 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 1367 1368 #ifdef PNOZZ_USE_LATCH 1369 ri->ri_bits = bus_space_vaddr(sc->sc_bustag, sc->sc_fb_memh); 1370 DPRINTF("addr: %08lx\n",(ulong)ri->ri_bits); 1371 #endif 1372 1373 rasops_init(ri, 0, 0); 1374 ri->ri_caps = WSSCREEN_WSCOLORS; 1375 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 1376 sc->sc_width / ri->ri_font->fontwidth); 1377 1378 /* enable acceleration */ 1379 ri->ri_ops.cursor = p9100_cursor; 1380 ri->ri_ops.copyrows = p9100_copyrows; 1381 ri->ri_ops.eraserows = p9100_eraserows; 1382 ri->ri_ops.copycols = p9100_copycols; 1383 ri->ri_ops.erasecols = p9100_erasecols; 1384 if (FONT_IS_ALPHA(ri->ri_font)) { 1385 ri->ri_ops.putchar = p9100_putchar_aa; 1386 } else 1387 ri->ri_ops.putchar = p9100_putchar; 1388 } 1389 1390 static int 1391 p9100_putcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1392 { 1393 u_int index = cm->index; 1394 u_int count = cm->count; 1395 int i, error; 1396 u_char rbuf[256], gbuf[256], bbuf[256]; 1397 u_char *r, *g, *b; 1398 1399 if (cm->index >= 256 || cm->count > 256 || 1400 (cm->index + cm->count) > 256) 1401 return EINVAL; 1402 error = copyin(cm->red, &rbuf[index], count); 1403 if (error) 1404 return error; 1405 error = copyin(cm->green, &gbuf[index], count); 1406 if (error) 1407 return error; 1408 error = copyin(cm->blue, &bbuf[index], count); 1409 if (error) 1410 return error; 1411 1412 r = &rbuf[index]; 1413 g = &gbuf[index]; 1414 b = &bbuf[index]; 1415 1416 for (i = 0; i < count; i++) { 1417 sc->sc_cmap.cm_map[index][0] = *r; 1418 sc->sc_cmap.cm_map[index][1] = *g; 1419 sc->sc_cmap.cm_map[index][2] = *b; 1420 index++; 1421 r++, g++, b++; 1422 } 1423 p9100loadcmap(sc, 0, 256); 1424 return 0; 1425 } 1426 1427 static int 1428 p9100_getcmap(struct p9100_softc *sc, struct wsdisplay_cmap *cm) 1429 { 1430 u_int index = cm->index; 1431 u_int count = cm->count; 1432 int error, i; 1433 uint8_t red[256], green[256], blue[256]; 1434 1435 if (index >= 255 || count > 256 || index + count > 256) 1436 return EINVAL; 1437 1438 i = index; 1439 while (i < (index + count)) { 1440 red[i] = sc->sc_cmap.cm_map[i][0]; 1441 green[i] = sc->sc_cmap.cm_map[i][1]; 1442 blue[i] = sc->sc_cmap.cm_map[i][2]; 1443 i++; 1444 } 1445 error = copyout(&red[index], cm->red, count); 1446 if (error) 1447 return error; 1448 error = copyout(&green[index], cm->green, count); 1449 if (error) 1450 return error; 1451 error = copyout(&blue[index], cm->blue, count); 1452 if (error) 1453 return error; 1454 1455 return 0; 1456 } 1457 1458 static void 1459 p9100_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1460 { 1461 struct rasops_info *ri = cookie; 1462 struct vcons_screen *scr = ri->ri_hw; 1463 int32_t xs, xd, y, width, height; 1464 1465 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1466 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1467 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1468 width = ri->ri_font->fontwidth * ncols; 1469 height = ri->ri_font->fontheight; 1470 p9100_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, ROP_SRC); 1471 } 1472 1473 static void 1474 p9100_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1475 { 1476 struct rasops_info *ri = cookie; 1477 struct vcons_screen *scr = ri->ri_hw; 1478 int32_t x, y, width, height, bg; 1479 1480 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1481 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1482 width = ri->ri_font->fontwidth * ncols; 1483 height = ri->ri_font->fontheight; 1484 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1485 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1486 } 1487 1488 static void 1489 p9100_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1490 { 1491 struct rasops_info *ri = cookie; 1492 struct vcons_screen *scr = ri->ri_hw; 1493 int32_t x, ys, yd, width, height; 1494 1495 x = ri->ri_xorigin; 1496 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1497 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1498 width = ri->ri_emuwidth; 1499 height = ri->ri_font->fontheight * nrows; 1500 p9100_bitblt(scr->scr_cookie, x, ys, x, yd, width, height, ROP_SRC); 1501 } 1502 1503 static void 1504 p9100_eraserows(void *cookie, int row, int nrows, long fillattr) 1505 { 1506 struct rasops_info *ri = cookie; 1507 struct vcons_screen *scr = ri->ri_hw; 1508 int32_t x, y, width, height, bg; 1509 1510 if ((row == 0) && (nrows == ri->ri_rows)) { 1511 x = y = 0; 1512 width = ri->ri_width; 1513 height = ri->ri_height; 1514 } else { 1515 x = ri->ri_xorigin; 1516 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1517 width = ri->ri_emuwidth; 1518 height = ri->ri_font->fontheight * nrows; 1519 } 1520 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1521 p9100_rectfill(scr->scr_cookie, x, y, width, height, bg); 1522 } 1523 1524 #if 0 1525 static int 1526 p9100_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1527 { 1528 1529 return 0; 1530 } 1531 #endif 1532 1533 #if 0 1534 static int 1535 p9100_intr(void *arg) 1536 { 1537 /*p9100_softc *sc=arg;*/ 1538 DPRINTF("."); 1539 return 1; 1540 } 1541 #endif 1542 1543 static void 1544 p9100_init_cursor(struct p9100_softc *sc) 1545 { 1546 1547 memset(&sc->sc_cursor, 0, sizeof(struct pnozz_cursor)); 1548 sc->sc_cursor.pc_size.x = 64; 1549 sc->sc_cursor.pc_size.y = 64; 1550 1551 } 1552 1553 static void 1554 p9100_set_fbcursor(struct p9100_softc *sc) 1555 { 1556 #ifdef PNOZZ_PARANOID 1557 int s; 1558 1559 s = splhigh(); /* just in case... */ 1560 #endif 1561 sc->sc_last_offset = 0xffffffff; 1562 1563 /* set position and hotspot */ 1564 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1565 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1566 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_CTL); 1567 if (sc->sc_cursor.pc_enable) { 1568 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_X11 | 1569 DAC_CURSOR_64); 1570 } else 1571 p9100_ramdac_write(sc, DAC_INDX_DATA, DAC_CURSOR_OFF); 1572 /* next two registers - x low, high, y low, high */ 1573 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.x & 0xff); 1574 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.x >> 8) & 1575 0xff); 1576 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_pos.y & 0xff); 1577 p9100_ramdac_write(sc, DAC_INDX_DATA, (sc->sc_cursor.pc_pos.y >> 8) & 1578 0xff); 1579 /* hotspot */ 1580 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.x & 0xff); 1581 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.pc_hot.y & 0xff); 1582 1583 #ifdef PNOZZ_PARANOID 1584 splx(s); 1585 #endif 1586 1587 } 1588 1589 static void 1590 p9100_setcursorcmap(struct p9100_softc *sc) 1591 { 1592 int i; 1593 1594 #ifdef PNOZZ_PARANOID 1595 int s; 1596 s = splhigh(); /* just in case... */ 1597 #endif 1598 sc->sc_last_offset = 0xffffffff; 1599 1600 /* set cursor colours */ 1601 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1602 p9100_ramdac_write(sc, DAC_INDX_HI, 0); 1603 p9100_ramdac_write(sc, DAC_INDX_LO, DAC_CURSOR_COL_1); 1604 1605 for (i = 0; i < 3; i++) { 1606 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.red[i]); 1607 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.green[i]); 1608 p9100_ramdac_write(sc, DAC_INDX_DATA, sc->sc_cursor.blue[i]); 1609 } 1610 1611 #ifdef PNOZZ_PARANOID 1612 splx(s); 1613 #endif 1614 } 1615 1616 static void 1617 p9100_loadcursor(struct p9100_softc *sc) 1618 { 1619 uint32_t *image, *mask; 1620 uint32_t bit, bbit, im, ma; 1621 int i, j, k; 1622 uint8_t latch1, latch2; 1623 1624 #ifdef PNOZZ_PARANOID 1625 int s; 1626 s = splhigh(); /* just in case... */ 1627 #endif 1628 sc->sc_last_offset = 0xffffffff; 1629 1630 /* set cursor shape */ 1631 p9100_ramdac_write(sc, DAC_INDX_CTL, DAC_INDX_AUTOINCR); 1632 p9100_ramdac_write(sc, DAC_INDX_HI, 1); 1633 p9100_ramdac_write(sc, DAC_INDX_LO, 0); 1634 1635 image = sc->sc_cursor.pc_bits; 1636 mask = &sc->sc_cursor.pc_bits[0x80]; 1637 1638 for (i = 0; i < 0x80; i++) { 1639 bit = 0x80000000; 1640 im = image[i]; 1641 ma = mask[i]; 1642 for (k = 0; k < 4; k++) { 1643 bbit = 0x1; 1644 latch1 = 0; 1645 for (j = 0; j < 4; j++) { 1646 if (im & bit) 1647 latch1 |= bbit; 1648 bbit <<= 1; 1649 if (ma & bit) 1650 latch1 |= bbit; 1651 bbit <<= 1; 1652 bit >>= 1; 1653 } 1654 bbit = 0x1; 1655 latch2 = 0; 1656 for (j = 0; j < 4; j++) { 1657 if (im & bit) 1658 latch2 |= bbit; 1659 bbit <<= 1; 1660 if (ma & bit) 1661 latch2 |= bbit; 1662 bbit <<= 1; 1663 bit >>= 1; 1664 } 1665 p9100_ramdac_write(sc, DAC_INDX_DATA, latch1); 1666 p9100_ramdac_write(sc, DAC_INDX_DATA, latch2); 1667 } 1668 } 1669 #ifdef PNOZZ_DEBUG_CURSOR 1670 printf("image:\n"); 1671 for (i=0;i<0x80;i+=2) 1672 printf("%08x %08x\n", image[i], image[i+1]); 1673 printf("mask:\n"); 1674 for (i=0;i<0x80;i+=2) 1675 printf("%08x %08x\n", mask[i], mask[i+1]); 1676 #endif 1677 #ifdef PNOZZ_PARANOID 1678 splx(s); 1679 #endif 1680 } 1681 1682 #if NTCTRL > 0 1683 static void 1684 p9100_set_extvga(void *cookie, int status) 1685 { 1686 struct p9100_softc *sc = cookie; 1687 #ifdef PNOZZ_PARANOID 1688 int s; 1689 1690 s = splhigh(); 1691 #endif 1692 1693 #ifdef PNOZZ_DEBUG 1694 printf("%s: external VGA %s\n", device_xname(sc->sc_dev), 1695 status ? "on" : "off"); 1696 #endif 1697 1698 sc->sc_last_offset = 0xffffffff; 1699 1700 if (status) { 1701 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1702 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) & 1703 ~DAC_POWER_IPWR_DISABLE); 1704 } else { 1705 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 1706 p9100_ramdac_read_ctl(sc, DAC_POWER_MGT) | 1707 DAC_POWER_IPWR_DISABLE); 1708 } 1709 #ifdef PNOZZ_PARANOID 1710 splx(s); 1711 #endif 1712 } 1713 #endif /* NTCTRL > 0 */ 1714 1715 static int 1716 upper_bit(uint32_t b) 1717 { 1718 uint32_t mask=0x80000000; 1719 int cnt = 31; 1720 if (b == 0) 1721 return -1; 1722 while ((mask != 0) && ((b & mask) == 0)) { 1723 mask = mask >> 1; 1724 cnt--; 1725 } 1726 return cnt; 1727 } 1728 1729 static int 1730 p9100_set_depth(struct p9100_softc *sc, int depth) 1731 { 1732 int new_sls; 1733 uint32_t bits, scr, memctl, mem; 1734 int s0, s1, s2, s3, ps, crtcline; 1735 uint8_t pf, mc3, es; 1736 1737 switch (depth) { 1738 case 8: 1739 sc->sc_depthshift = 0; 1740 ps = 2; 1741 pf = 3; 1742 mc3 = 0; 1743 es = 0; /* no swapping */ 1744 memctl = 3; 1745 break; 1746 case 16: 1747 sc->sc_depthshift = 1; 1748 ps = 3; 1749 pf = 4; 1750 mc3 = 0; 1751 es = 2; /* swap bytes in 16bit words */ 1752 memctl = 2; 1753 break; 1754 case 24: 1755 /* boo */ 1756 printf("We don't DO 24bit pixels dammit!\n"); 1757 return 0; 1758 case 32: 1759 sc->sc_depthshift = 2; 1760 ps = 5; 1761 pf = 6; 1762 mc3 = 0; 1763 es = 6; /* swap both half-words and bytes */ 1764 memctl = 1; /* 0 */ 1765 break; 1766 default: 1767 aprint_error("%s: bogus colour depth (%d)\n", 1768 __func__, depth); 1769 return FALSE; 1770 } 1771 /* 1772 * this could be done a lot shorter and faster but then nobody would 1773 * understand what the hell we're doing here without getting a major 1774 * headache. Scanline size is encoded as 4 shift values, 3 of them 3 bits 1775 * wide, 16 << n for n>0, one 2 bits, 512 << n for n>0. n==0 means 0 1776 */ 1777 new_sls = sc->sc_width << sc->sc_depthshift; 1778 sc->sc_stride = new_sls; 1779 bits = new_sls; 1780 s3 = upper_bit(bits); 1781 if (s3 > 9) { 1782 bits &= ~(1 << s3); 1783 s3 -= 9; 1784 } else 1785 s3 = 0; 1786 s2 = upper_bit(bits); 1787 if (s2 > 0) { 1788 bits &= ~(1 << s2); 1789 s2 -= 4; 1790 } else 1791 s2 = 0; 1792 s1 = upper_bit(bits); 1793 if (s1 > 0) { 1794 bits &= ~(1 << s1); 1795 s1 -= 4; 1796 } else 1797 s1 = 0; 1798 s0 = upper_bit(bits); 1799 if (s0 > 0) { 1800 bits &= ~(1 << s0); 1801 s0 -= 4; 1802 } else 1803 s0 = 0; 1804 1805 1806 DPRINTF("sls: %x sh: %d %d %d %d leftover: %x\n", new_sls, s0, s1, 1807 s2, s3, bits); 1808 1809 /* 1810 * now let's put these values into the System Config Register. No need to 1811 * read it here since we (hopefully) just saved the content 1812 */ 1813 scr = p9100_ctl_read_4(sc, SYS_CONF); 1814 scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) | 1815 (s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT); 1816 1817 DPRINTF("new scr: %x DAC %x %x\n", scr, pf, mc3); 1818 1819 mem = p9100_ctl_read_4(sc, VID_MEM_CONFIG); 1820 1821 DPRINTF("old memctl: %08x\n", mem); 1822 1823 /* set shift and crtc clock */ 1824 mem &= ~(0x0000fc00); 1825 mem |= (memctl << 10) | (memctl << 13); 1826 p9100_ctl_write_4(sc, VID_MEM_CONFIG, mem); 1827 1828 DPRINTF("new memctl: %08x\n", mem); 1829 1830 /* whack the engine... */ 1831 p9100_ctl_write_4(sc, SYS_CONF, scr); 1832 1833 /* ok, whack the DAC */ 1834 p9100_ramdac_write_ctl(sc, DAC_MISC_1, 0x11); 1835 p9100_ramdac_write_ctl(sc, DAC_MISC_2, 0x45); 1836 p9100_ramdac_write_ctl(sc, DAC_MISC_3, mc3); 1837 /* 1838 * despite the 3GX manual saying otherwise we don't need to mess with 1839 * any clock dividers here 1840 */ 1841 p9100_ramdac_write_ctl(sc, DAC_MISC_CLK, 1); 1842 p9100_ramdac_write_ctl(sc, 3, 0); 1843 p9100_ramdac_write_ctl(sc, 4, 0); 1844 1845 p9100_ramdac_write_ctl(sc, DAC_POWER_MGT, 0); 1846 p9100_ramdac_write_ctl(sc, DAC_OPERATION, 0); 1847 p9100_ramdac_write_ctl(sc, DAC_PALETTE_CTRL, 0); 1848 1849 p9100_ramdac_write_ctl(sc, DAC_PIXEL_FMT, pf); 1850 1851 /* TODO: distinguish between 15 and 16 bit */ 1852 p9100_ramdac_write_ctl(sc, DAC_8BIT_CTRL, 0); 1853 /* direct colour, linear, 565 */ 1854 p9100_ramdac_write_ctl(sc, DAC_16BIT_CTRL, 0xc6); 1855 /* direct colour */ 1856 p9100_ramdac_write_ctl(sc, DAC_32BIT_CTRL, 3); 1857 1858 /* From the 3GX manual. Needs magic number reduction */ 1859 p9100_ramdac_write_ctl(sc, 0x10, 2); 1860 p9100_ramdac_write_ctl(sc, 0x11, 0); 1861 p9100_ramdac_write_ctl(sc, 0x14, 5); 1862 p9100_ramdac_write_ctl(sc, 0x08, 1); 1863 p9100_ramdac_write_ctl(sc, 0x15, 5); 1864 p9100_ramdac_write_ctl(sc, 0x16, 0x63); 1865 1866 /* whack the CRTC */ 1867 /* we always transfer 64bit in one go */ 1868 crtcline = sc->sc_stride >> 3; 1869 1870 DPRINTF("crtcline: %d\n", crtcline); 1871 1872 p9100_ctl_write_4(sc, VID_HTOTAL, (24 << sc->sc_depthshift) + crtcline); 1873 p9100_ctl_write_4(sc, VID_HSRE, 8 << sc->sc_depthshift); 1874 p9100_ctl_write_4(sc, VID_HBRE, 18 << sc->sc_depthshift); 1875 p9100_ctl_write_4(sc, VID_HBFE, (18 << sc->sc_depthshift) + crtcline); 1876 1877 #ifdef PNOZZ_DEBUG 1878 { 1879 uint32_t sscr; 1880 sscr = p9100_ctl_read_4(sc, SYS_CONF); 1881 printf("scr: %x\n", sscr); 1882 } 1883 #endif 1884 return TRUE; 1885 } 1886
Indexes created Wed Oct 22 13:09:56 GMT 2025