tcx.c revision 1.33 1 1.33 macallan /* $NetBSD: tcx.c,v 1.33 2009/08/18 20:45:42 macallan Exp $ */
2 1.1 pk
3 1.1 pk /*
4 1.1 pk * Copyright (c) 1996,1998 The NetBSD Foundation, Inc.
5 1.1 pk * All rights reserved.
6 1.1 pk *
7 1.1 pk * This code is derived from software contributed to The NetBSD Foundation
8 1.33 macallan * by Paul Kranenburg and Michael Lorenz.
9 1.1 pk *
10 1.1 pk * Redistribution and use in source and binary forms, with or without
11 1.1 pk * modification, are permitted provided that the following conditions
12 1.1 pk * are met:
13 1.1 pk * 1. Redistributions of source code must retain the above copyright
14 1.1 pk * notice, this list of conditions and the following disclaimer.
15 1.1 pk * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 pk * notice, this list of conditions and the following disclaimer in the
17 1.1 pk * documentation and/or other materials provided with the distribution.
18 1.1 pk *
19 1.1 pk * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 pk * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 pk * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 pk * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 pk * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 pk * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 pk * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 pk * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 pk * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 pk * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 pk * POSSIBILITY OF SUCH DAMAGE.
30 1.1 pk */
31 1.1 pk
32 1.1 pk /*
33 1.1 pk * color display (TCX) driver.
34 1.1 pk *
35 1.1 pk * Does not handle interrupts, even though they can occur.
36 1.1 pk *
37 1.1 pk * XXX should defer colormap updates to vertical retrace interrupts
38 1.1 pk */
39 1.4 lukem
40 1.4 lukem #include <sys/cdefs.h>
41 1.33 macallan __KERNEL_RCSID(0, "$NetBSD: tcx.c,v 1.33 2009/08/18 20:45:42 macallan Exp $");
42 1.7 darrenr
43 1.7 darrenr /*
44 1.7 darrenr * define for cg8 emulation on S24 (24-bit version of tcx) for the SS5;
45 1.7 darrenr * it is bypassed on the 8-bit version (onboard framebuffer for SS4)
46 1.7 darrenr */
47 1.7 darrenr #undef TCX_CG8
48 1.1 pk
49 1.1 pk #include <sys/param.h>
50 1.1 pk #include <sys/systm.h>
51 1.1 pk #include <sys/buf.h>
52 1.1 pk #include <sys/device.h>
53 1.1 pk #include <sys/ioctl.h>
54 1.1 pk #include <sys/malloc.h>
55 1.1 pk #include <sys/mman.h>
56 1.1 pk #include <sys/tty.h>
57 1.1 pk #include <sys/conf.h>
58 1.1 pk
59 1.1 pk #ifdef DEBUG
60 1.1 pk #include <sys/proc.h>
61 1.1 pk #include <sys/syslog.h>
62 1.1 pk #endif
63 1.1 pk
64 1.22 ad #include <sys/bus.h>
65 1.1 pk #include <machine/autoconf.h>
66 1.1 pk
67 1.1 pk #include <dev/sun/fbio.h>
68 1.1 pk #include <dev/sun/fbvar.h>
69 1.1 pk #include <dev/sun/btreg.h>
70 1.1 pk #include <dev/sun/btvar.h>
71 1.2 pk
72 1.2 pk #include <dev/sbus/sbusvar.h>
73 1.2 pk #include <dev/sbus/tcxreg.h>
74 1.1 pk
75 1.32 macallan #include <dev/wscons/wsdisplayvar.h>
76 1.32 macallan #include <dev/wscons/wsconsio.h>
77 1.32 macallan #include <dev/wsfont/wsfont.h>
78 1.32 macallan #include <dev/rasops/rasops.h>
79 1.32 macallan
80 1.32 macallan #include <dev/wscons/wsdisplay_vconsvar.h>
81 1.32 macallan
82 1.32 macallan #include "opt_wsemul.h"
83 1.32 macallan
84 1.1 pk /* per-display variables */
85 1.1 pk struct tcx_softc {
86 1.33 macallan device_t sc_dev; /* base device */
87 1.1 pk struct sbusdev sc_sd; /* sbus device */
88 1.1 pk struct fbdevice sc_fb; /* frame buffer device */
89 1.1 pk bus_space_tag_t sc_bustag;
90 1.8 thorpej struct openprom_addr sc_physadr[TCX_NREG];/* phys addr of h/w */
91 1.1 pk
92 1.32 macallan bus_space_handle_t sc_bt; /* Brooktree registers */
93 1.32 macallan bus_space_handle_t sc_thc; /* THC registers */
94 1.32 macallan uint8_t *sc_fbaddr; /* framebuffer */
95 1.32 macallan uint64_t *sc_rblit; /* blitspace */
96 1.32 macallan uint64_t *sc_rstip; /* stipple space */
97 1.32 macallan
98 1.7 darrenr short sc_8bit; /* true if 8-bit hardware */
99 1.1 pk short sc_blanked; /* true if blanked */
100 1.32 macallan u_char sc_cmap_red[256];
101 1.32 macallan u_char sc_cmap_green[256];
102 1.32 macallan u_char sc_cmap_blue[256];
103 1.32 macallan int sc_mode, sc_bg;
104 1.32 macallan struct vcons_data vd;
105 1.32 macallan };
106 1.32 macallan
107 1.32 macallan static struct vcons_screen tcx_console_screen;
108 1.32 macallan
109 1.32 macallan extern const u_char rasops_cmap[768];
110 1.32 macallan
111 1.32 macallan struct wsscreen_descr tcx_defscreendesc = {
112 1.32 macallan "default",
113 1.32 macallan 0, 0,
114 1.32 macallan NULL,
115 1.32 macallan 8, 16,
116 1.32 macallan WSSCREEN_WSCOLORS,
117 1.32 macallan };
118 1.32 macallan
119 1.32 macallan const struct wsscreen_descr *_tcx_scrlist[] = {
120 1.32 macallan &tcx_defscreendesc,
121 1.32 macallan /* XXX other formats, graphics screen? */
122 1.32 macallan };
123 1.32 macallan
124 1.32 macallan struct wsscreen_list tcx_screenlist = {
125 1.32 macallan sizeof(_tcx_scrlist) / sizeof(struct wsscreen_descr *),
126 1.32 macallan _tcx_scrlist
127 1.1 pk };
128 1.1 pk
129 1.7 darrenr /*
130 1.7 darrenr * The S24 provides the framebuffer RAM mapped in three ways:
131 1.7 darrenr * 26 bits per pixel, in 32-bit words; the low-order 24 bits are
132 1.7 darrenr * blue, green, and red values, and the other two bits select the
133 1.7 darrenr * display modes, per pixel);
134 1.7 darrenr * 24 bits per pixel, in 32-bit words; the high-order byte reads as
135 1.7 darrenr * zero, and is ignored on writes (so the mode bits cannot be altered);
136 1.7 darrenr * 8 bits per pixel, unpadded; writes to this space do not modify the
137 1.7 darrenr * other 18 bits.
138 1.7 darrenr */
139 1.7 darrenr #define TCX_CTL_8_MAPPED 0x00000000 /* 8 bits, uses color map */
140 1.7 darrenr #define TCX_CTL_24_MAPPED 0x01000000 /* 24 bits, uses color map */
141 1.7 darrenr #define TCX_CTL_24_LEVEL 0x03000000 /* 24 bits, ignores color map */
142 1.7 darrenr #define TCX_CTL_PIXELMASK 0x00FFFFFF /* mask for index/level */
143 1.7 darrenr
144 1.1 pk /* autoconfiguration driver */
145 1.31 cegger static void tcxattach(device_t, device_t, void *);
146 1.31 cegger static int tcxmatch(device_t, cfdata_t, void *);
147 1.31 cegger static void tcx_unblank(device_t);
148 1.1 pk
149 1.33 macallan CFATTACH_DECL_NEW(tcx, sizeof(struct tcx_softc),
150 1.12 thorpej tcxmatch, tcxattach, NULL, NULL);
151 1.1 pk
152 1.1 pk extern struct cfdriver tcx_cd;
153 1.1 pk
154 1.9 gehenna dev_type_open(tcxopen);
155 1.9 gehenna dev_type_close(tcxclose);
156 1.9 gehenna dev_type_ioctl(tcxioctl);
157 1.9 gehenna dev_type_mmap(tcxmmap);
158 1.9 gehenna
159 1.9 gehenna const struct cdevsw tcx_cdevsw = {
160 1.9 gehenna tcxopen, tcxclose, noread, nowrite, tcxioctl,
161 1.13 jdolecek nostop, notty, nopoll, tcxmmap, nokqfilter,
162 1.9 gehenna };
163 1.9 gehenna
164 1.1 pk /* frame buffer generic driver */
165 1.1 pk static struct fbdriver tcx_fbdriver = {
166 1.13 jdolecek tcx_unblank, tcxopen, tcxclose, tcxioctl, nopoll, tcxmmap,
167 1.13 jdolecek nokqfilter
168 1.1 pk };
169 1.1 pk
170 1.17 perry static void tcx_reset(struct tcx_softc *);
171 1.17 perry static void tcx_loadcmap(struct tcx_softc *, int, int);
172 1.1 pk
173 1.32 macallan static int tcx_ioctl(void *, void *, u_long, void *, int, struct lwp *);
174 1.32 macallan static paddr_t tcx_mmap(void *, void *, off_t, int);
175 1.32 macallan
176 1.32 macallan static void tcx_init_screen(void *, struct vcons_screen *, int, long *);
177 1.32 macallan static void tcx_clearscreen(struct tcx_softc *);
178 1.32 macallan static void tcx_copyrows(void *, int, int, int);
179 1.32 macallan static void tcx_eraserows(void *, int, int, long);
180 1.32 macallan static void tcx_putchar(void *, int, int, u_int, long);
181 1.32 macallan
182 1.32 macallan struct wsdisplay_accessops tcx_accessops = {
183 1.32 macallan tcx_ioctl,
184 1.32 macallan tcx_mmap,
185 1.32 macallan NULL, /* vcons_alloc_screen */
186 1.32 macallan NULL, /* vcons_free_screen */
187 1.32 macallan NULL, /* vcons_show_screen */
188 1.32 macallan NULL, /* load_font */
189 1.32 macallan NULL, /* polls */
190 1.32 macallan NULL, /* scroll */
191 1.32 macallan };
192 1.32 macallan
193 1.1 pk #define OBPNAME "SUNW,tcx"
194 1.7 darrenr
195 1.7 darrenr #ifdef TCX_CG8
196 1.7 darrenr /*
197 1.7 darrenr * For CG8 emulation, we map the 32-bit-deep framebuffer at an offset of
198 1.7 darrenr * 256K; the cg8 space begins with a mono overlay plane and an overlay
199 1.7 darrenr * enable plane (128K bytes each, 1 bit per pixel), immediately followed
200 1.7 darrenr * by the color planes, 32 bits per pixel. We also map just the 32-bit
201 1.7 darrenr * framebuffer at 0x04000000 (TCX_USER_RAM_COMPAT), for compatibility
202 1.7 darrenr * with the cg8 driver.
203 1.7 darrenr */
204 1.7 darrenr #define TCX_CG8OVERLAY (256 * 1024)
205 1.7 darrenr #define TCX_SIZE_DFB32 (1152 * 900 * 4) /* max size of the framebuffer */
206 1.7 darrenr #endif
207 1.7 darrenr
208 1.1 pk /*
209 1.1 pk * Match a tcx.
210 1.1 pk */
211 1.1 pk int
212 1.31 cegger tcxmatch(device_t parent, cfdata_t cf, void *aux)
213 1.1 pk {
214 1.1 pk struct sbus_attach_args *sa = aux;
215 1.1 pk
216 1.1 pk return (strcmp(sa->sa_name, OBPNAME) == 0);
217 1.1 pk }
218 1.1 pk
219 1.1 pk /*
220 1.1 pk * Attach a display.
221 1.1 pk */
222 1.1 pk void
223 1.31 cegger tcxattach(device_t parent, device_t self, void *args)
224 1.1 pk {
225 1.25 drochner struct tcx_softc *sc = device_private(self);
226 1.1 pk struct sbus_attach_args *sa = args;
227 1.32 macallan struct wsemuldisplaydev_attach_args aa;
228 1.32 macallan struct rasops_info *ri;
229 1.32 macallan unsigned long defattr;
230 1.1 pk int node, ramsize;
231 1.1 pk struct fbdevice *fb = &sc->sc_fb;
232 1.1 pk bus_space_handle_t bh;
233 1.32 macallan int isconsole, i, j;
234 1.32 macallan uint32_t confreg;
235 1.1 pk
236 1.33 macallan sc->sc_dev = self;
237 1.1 pk sc->sc_bustag = sa->sa_bustag;
238 1.1 pk node = sa->sa_node;
239 1.1 pk
240 1.1 pk fb->fb_driver = &tcx_fbdriver;
241 1.33 macallan fb->fb_device = sc->sc_dev;
242 1.1 pk /* Mask out invalid flags from the user. */
243 1.33 macallan fb->fb_flags = device_cfdata(sc->sc_dev)->cf_flags & FB_USERMASK;
244 1.7 darrenr /*
245 1.7 darrenr * The onboard framebuffer on the SS4 supports only 8-bit mode;
246 1.7 darrenr * it can be distinguished from the S24 card for the SS5 by the
247 1.7 darrenr * presence of the "tcx-8-bit" attribute on the SS4 version.
248 1.7 darrenr */
249 1.7 darrenr sc->sc_8bit = node_has_property(node, "tcx-8-bit");
250 1.32 macallan fb->fb_type.fb_depth = 8;
251 1.32 macallan fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node);
252 1.32 macallan
253 1.7 darrenr if (sc->sc_8bit) {
254 1.32 macallan printf(" {8bit only TCX)");
255 1.32 macallan ramsize = 1024 * 1024;
256 1.32 macallan /* XXX - fix THC and TEC offsets */
257 1.32 macallan sc->sc_physadr[TCX_REG_TEC].oa_base += 0x1000;
258 1.32 macallan sc->sc_physadr[TCX_REG_THC].oa_base += 0x1000;
259 1.7 darrenr } else {
260 1.32 macallan printf(" (S24)\n");
261 1.32 macallan ramsize = 4 * 1024 * 1024;
262 1.7 darrenr }
263 1.32 macallan
264 1.1 pk fb->fb_type.fb_cmsize = 256;
265 1.1 pk fb->fb_type.fb_size = ramsize;
266 1.1 pk printf(": %s, %d x %d", OBPNAME,
267 1.1 pk fb->fb_type.fb_width,
268 1.1 pk fb->fb_type.fb_height);
269 1.1 pk
270 1.32 macallan fb->fb_type.fb_type = FBTYPE_SUNTCX;
271 1.1 pk
272 1.1 pk
273 1.1 pk if (sa->sa_nreg != TCX_NREG) {
274 1.1 pk printf("%s: only %d register sets\n",
275 1.23 cegger device_xname(self), sa->sa_nreg);
276 1.1 pk return;
277 1.1 pk }
278 1.29 tsutsui memcpy(sc->sc_physadr, sa->sa_reg,
279 1.8 thorpej sa->sa_nreg * sizeof(struct openprom_addr));
280 1.1 pk
281 1.1 pk /* Map the register banks we care about */
282 1.1 pk if (sbus_bus_map(sa->sa_bustag,
283 1.8 thorpej sc->sc_physadr[TCX_REG_THC].oa_space,
284 1.8 thorpej sc->sc_physadr[TCX_REG_THC].oa_base,
285 1.32 macallan 0x1000,
286 1.32 macallan BUS_SPACE_MAP_LINEAR, &sc->sc_thc) != 0) {
287 1.1 pk printf("tcxattach: cannot map thc registers\n");
288 1.1 pk return;
289 1.1 pk }
290 1.1 pk
291 1.1 pk if (sbus_bus_map(sa->sa_bustag,
292 1.8 thorpej sc->sc_physadr[TCX_REG_CMAP].oa_space,
293 1.8 thorpej sc->sc_physadr[TCX_REG_CMAP].oa_base,
294 1.32 macallan 0x1000,
295 1.32 macallan BUS_SPACE_MAP_LINEAR, &sc->sc_bt) != 0) {
296 1.1 pk printf("tcxattach: cannot map bt registers\n");
297 1.1 pk return;
298 1.1 pk }
299 1.1 pk
300 1.32 macallan /* map the 8bit dumb FB for the console */
301 1.32 macallan if (sbus_bus_map(sa->sa_bustag,
302 1.32 macallan sc->sc_physadr[TCX_REG_DFB8].oa_space,
303 1.32 macallan sc->sc_physadr[TCX_REG_DFB8].oa_base,
304 1.32 macallan 1024 * 1024,
305 1.7 darrenr BUS_SPACE_MAP_LINEAR,
306 1.16 pk &bh) != 0) {
307 1.32 macallan printf("tcxattach: cannot map framebuffer\n");
308 1.32 macallan return;
309 1.32 macallan }
310 1.32 macallan sc->sc_fbaddr = bus_space_vaddr(sa->sa_bustag, bh);
311 1.32 macallan
312 1.32 macallan /* RBLIT space */
313 1.32 macallan if (sbus_bus_map(sa->sa_bustag,
314 1.32 macallan sc->sc_physadr[TCX_REG_RBLIT].oa_space,
315 1.32 macallan sc->sc_physadr[TCX_REG_RBLIT].oa_base,
316 1.32 macallan 8 * 1024 * 1024,
317 1.32 macallan BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE,
318 1.32 macallan &bh) != 0) {
319 1.32 macallan printf("tcxattach: cannot map RBLIT space\n");
320 1.32 macallan return;
321 1.32 macallan }
322 1.32 macallan sc->sc_rblit = bus_space_vaddr(sa->sa_bustag, bh);
323 1.32 macallan
324 1.32 macallan /* RSTIP space */
325 1.32 macallan if (sbus_bus_map(sa->sa_bustag,
326 1.32 macallan sc->sc_physadr[TCX_REG_RSTIP].oa_space,
327 1.32 macallan sc->sc_physadr[TCX_REG_RSTIP].oa_base,
328 1.32 macallan 8 * 1024 * 1024,
329 1.32 macallan BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_LARGE,
330 1.32 macallan &bh) != 0) {
331 1.32 macallan printf("tcxattach: cannot map RSTIP space\n");
332 1.32 macallan return;
333 1.7 darrenr }
334 1.32 macallan sc->sc_rstip = bus_space_vaddr(sa->sa_bustag, bh);
335 1.7 darrenr
336 1.1 pk isconsole = fb_is_console(node);
337 1.1 pk
338 1.32 macallan confreg = bus_space_read_4(sa->sa_bustag, sc->sc_thc, THC_CONFIG);
339 1.1 pk printf(", id %d, rev %d, sense %d",
340 1.32 macallan (confreg & THC_CFG_FBID) >> THC_CFG_FBID_SHIFT,
341 1.32 macallan (confreg & THC_CFG_REV) >> THC_CFG_REV_SHIFT,
342 1.32 macallan (confreg & THC_CFG_SENSE) >> THC_CFG_SENSE_SHIFT
343 1.1 pk );
344 1.1 pk
345 1.1 pk /* reset cursor & frame buffer controls */
346 1.1 pk tcx_reset(sc);
347 1.1 pk
348 1.1 pk /* Initialize the default color map. */
349 1.32 macallan j = 0;
350 1.32 macallan for (i = 0; i < 256; i++) {
351 1.32 macallan
352 1.32 macallan sc->sc_cmap_red[i] = rasops_cmap[j];
353 1.32 macallan sc->sc_cmap_green[i] = rasops_cmap[j + 1];
354 1.32 macallan sc->sc_cmap_blue[i] = rasops_cmap[j + 2];
355 1.32 macallan j += 3;
356 1.32 macallan }
357 1.1 pk tcx_loadcmap(sc, 0, 256);
358 1.1 pk
359 1.1 pk /* enable video */
360 1.32 macallan confreg = bus_space_read_4(sa->sa_bustag, sc->sc_thc, THC_MISC);
361 1.32 macallan confreg |= THC_MISC_VIDEN;
362 1.32 macallan bus_space_write_4(sa->sa_bustag, sc->sc_thc, THC_MISC, confreg);
363 1.1 pk
364 1.1 pk if (isconsole) {
365 1.1 pk printf(" (console)\n");
366 1.1 pk } else
367 1.1 pk printf("\n");
368 1.1 pk
369 1.33 macallan sbus_establish(&sc->sc_sd, sc->sc_dev);
370 1.1 pk fb_attach(&sc->sc_fb, isconsole);
371 1.32 macallan
372 1.32 macallan sc->sc_mode = WSDISPLAYIO_MODE_EMUL;
373 1.32 macallan wsfont_init();
374 1.32 macallan
375 1.32 macallan vcons_init(&sc->vd, sc, &tcx_defscreendesc, &tcx_accessops);
376 1.32 macallan sc->vd.init_screen = tcx_init_screen;
377 1.32 macallan
378 1.32 macallan vcons_init_screen(&sc->vd, &tcx_console_screen, 1, &defattr);
379 1.32 macallan tcx_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC;
380 1.32 macallan
381 1.32 macallan sc->sc_bg = (defattr >> 16) & 0xff;
382 1.32 macallan tcx_clearscreen(sc);
383 1.32 macallan
384 1.32 macallan ri = &tcx_console_screen.scr_ri;
385 1.32 macallan
386 1.32 macallan tcx_defscreendesc.nrows = ri->ri_rows;
387 1.32 macallan tcx_defscreendesc.ncols = ri->ri_cols;
388 1.32 macallan tcx_defscreendesc.textops = &ri->ri_ops;
389 1.32 macallan tcx_defscreendesc.capabilities = ri->ri_caps;
390 1.32 macallan
391 1.32 macallan if(isconsole) {
392 1.32 macallan wsdisplay_cnattach(&tcx_defscreendesc, ri, 0, 0, defattr);
393 1.32 macallan }
394 1.32 macallan
395 1.32 macallan aa.console = isconsole;
396 1.32 macallan aa.scrdata = &tcx_screenlist;
397 1.32 macallan aa.accessops = &tcx_accessops;
398 1.32 macallan aa.accesscookie = &sc->vd;
399 1.32 macallan
400 1.32 macallan config_found(self, &aa, wsemuldisplaydevprint);
401 1.32 macallan /*
402 1.32 macallan * we need to do this again - something overwrites a handful
403 1.32 macallan * palette registers and we end up with white in reg. 0
404 1.32 macallan */
405 1.32 macallan tcx_loadcmap(sc, 0, 256);
406 1.1 pk }
407 1.1 pk
408 1.7 darrenr #ifdef TCX_CG8
409 1.7 darrenr /*
410 1.7 darrenr * keep track of the number of opens, so we can switch to 24-bit mode
411 1.7 darrenr * when the device is first opened, and return to 8-bit mode on the
412 1.7 darrenr * last close. (stolen from cgfourteen driver...) There can only be
413 1.7 darrenr * one TCX per system, so we only need one flag.
414 1.7 darrenr */
415 1.7 darrenr static int tcx_opens = 0;
416 1.7 darrenr #endif
417 1.7 darrenr
418 1.1 pk int
419 1.27 dsl tcxopen(dev_t dev, int flags, int mode, struct lwp *l)
420 1.1 pk {
421 1.25 drochner #ifdef TCX_CG8
422 1.1 pk int unit = minor(dev);
423 1.7 darrenr struct tcx_softc *sc;
424 1.7 darrenr int i, s, oldopens;
425 1.7 darrenr volatile ulong *cptr;
426 1.7 darrenr struct fbdevice *fb;
427 1.1 pk
428 1.25 drochner sc = device_lookup_private(&tcx_cd, unit);
429 1.25 drochner if (!sc)
430 1.1 pk return (ENXIO);
431 1.7 darrenr if (!sc->sc_8bit) {
432 1.7 darrenr s = splhigh();
433 1.7 darrenr oldopens = tcx_opens++;
434 1.7 darrenr splx(s);
435 1.7 darrenr if (oldopens == 0) {
436 1.7 darrenr /*
437 1.7 darrenr * rewrite the control planes to select 24-bit mode
438 1.7 darrenr * and clear the screen
439 1.7 darrenr */
440 1.7 darrenr fb = &sc->sc_fb;
441 1.7 darrenr i = fb->fb_type.fb_height * fb->fb_type.fb_width;
442 1.7 darrenr cptr = sc->sc_cplane;
443 1.7 darrenr while (--i >= 0)
444 1.7 darrenr *cptr++ = TCX_CTL_24_LEVEL;
445 1.7 darrenr }
446 1.7 darrenr }
447 1.7 darrenr #endif
448 1.1 pk return (0);
449 1.1 pk }
450 1.1 pk
451 1.1 pk int
452 1.27 dsl tcxclose(dev_t dev, int flags, int mode, struct lwp *l)
453 1.1 pk {
454 1.25 drochner struct tcx_softc *sc = device_lookup_private(&tcx_cd, minor(dev));
455 1.7 darrenr #ifdef TCX_CG8
456 1.7 darrenr int i, s, opens;
457 1.7 darrenr volatile ulong *cptr;
458 1.7 darrenr struct fbdevice *fb;
459 1.7 darrenr #endif
460 1.1 pk
461 1.1 pk tcx_reset(sc);
462 1.7 darrenr #ifdef TCX_CG8
463 1.7 darrenr if (!sc->sc_8bit) {
464 1.7 darrenr s = splhigh();
465 1.7 darrenr opens = --tcx_opens;
466 1.7 darrenr if (tcx_opens <= 0)
467 1.7 darrenr opens = tcx_opens = 0;
468 1.7 darrenr splx(s);
469 1.7 darrenr if (opens == 0) {
470 1.7 darrenr /*
471 1.7 darrenr * rewrite the control planes to select 8-bit mode,
472 1.7 darrenr * preserving the contents of the screen.
473 1.7 darrenr * (or we could just bzero the whole thing...)
474 1.7 darrenr */
475 1.7 darrenr fb = &sc->sc_fb;
476 1.7 darrenr i = fb->fb_type.fb_height * fb->fb_type.fb_width;
477 1.7 darrenr cptr = sc->sc_cplane;
478 1.7 darrenr while (--i >= 0)
479 1.7 darrenr *cptr++ &= TCX_CTL_PIXELMASK;
480 1.7 darrenr }
481 1.7 darrenr }
482 1.7 darrenr #endif
483 1.1 pk return (0);
484 1.1 pk }
485 1.1 pk
486 1.1 pk int
487 1.26 dsl tcxioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l)
488 1.1 pk {
489 1.25 drochner struct tcx_softc *sc = device_lookup_private(&tcx_cd, minor(dev));
490 1.32 macallan //int error;
491 1.1 pk
492 1.1 pk switch (cmd) {
493 1.1 pk
494 1.1 pk case FBIOGTYPE:
495 1.1 pk *(struct fbtype *)data = sc->sc_fb.fb_type;
496 1.1 pk break;
497 1.1 pk
498 1.1 pk case FBIOGATTR:
499 1.1 pk #define fba ((struct fbgattr *)data)
500 1.1 pk fba->real_type = sc->sc_fb.fb_type.fb_type;
501 1.1 pk fba->owner = 0; /* XXX ??? */
502 1.1 pk fba->fbtype = sc->sc_fb.fb_type;
503 1.1 pk fba->sattr.flags = 0;
504 1.1 pk fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type;
505 1.1 pk fba->sattr.dev_specific[0] = -1;
506 1.1 pk fba->emu_types[0] = sc->sc_fb.fb_type.fb_type;
507 1.1 pk fba->emu_types[1] = FBTYPE_SUN3COLOR;
508 1.1 pk fba->emu_types[2] = -1;
509 1.1 pk #undef fba
510 1.1 pk break;
511 1.32 macallan #if 0
512 1.1 pk case FBIOGETCMAP:
513 1.1 pk #define p ((struct fbcmap *)data)
514 1.1 pk return (bt_getcmap(p, &sc->sc_cmap, 256, 1));
515 1.1 pk
516 1.1 pk case FBIOPUTCMAP:
517 1.1 pk /* copy to software map */
518 1.7 darrenr #ifdef TCX_CG8
519 1.7 darrenr if (!sc->sc_8bit) {
520 1.7 darrenr /*
521 1.7 darrenr * cg8 has extra bits in high-order byte of the index
522 1.7 darrenr * that bt_putcmap doesn't recognize
523 1.7 darrenr */
524 1.7 darrenr p->index &= 0xffffff;
525 1.7 darrenr }
526 1.7 darrenr #endif
527 1.1 pk error = bt_putcmap(p, &sc->sc_cmap, 256, 1);
528 1.1 pk if (error)
529 1.1 pk return (error);
530 1.1 pk /* now blast them into the chip */
531 1.1 pk /* XXX should use retrace interrupt */
532 1.1 pk tcx_loadcmap(sc, p->index, p->count);
533 1.1 pk #undef p
534 1.1 pk break;
535 1.32 macallan #endif
536 1.1 pk case FBIOGVIDEO:
537 1.1 pk *(int *)data = sc->sc_blanked;
538 1.1 pk break;
539 1.1 pk
540 1.1 pk case FBIOSVIDEO:
541 1.1 pk if (*(int *)data)
542 1.33 macallan tcx_unblank(sc->sc_dev);
543 1.1 pk else if (!sc->sc_blanked) {
544 1.1 pk sc->sc_blanked = 1;
545 1.32 macallan //sc->sc_thc->thc_hcmisc &= ~THC_MISC_VIDEN;
546 1.1 pk /* Put monitor in `power-saving mode' */
547 1.32 macallan //sc->sc_thc->thc_hcmisc |= THC_MISC_VSYNC_DISABLE;
548 1.32 macallan //sc->sc_thc->thc_hcmisc |= THC_MISC_HSYNC_DISABLE;
549 1.1 pk }
550 1.1 pk break;
551 1.1 pk
552 1.1 pk default:
553 1.1 pk #ifdef DEBUG
554 1.1 pk log(LOG_NOTICE, "tcxioctl(0x%lx) (%s[%d])\n", cmd,
555 1.20 jdc l->l_proc->p_comm, l->l_proc->p_pid);
556 1.1 pk #endif
557 1.1 pk return (ENOTTY);
558 1.1 pk }
559 1.1 pk return (0);
560 1.1 pk }
561 1.1 pk
562 1.1 pk /*
563 1.1 pk * Clean up hardware state (e.g., after bootup or after X crashes).
564 1.1 pk */
565 1.1 pk static void
566 1.26 dsl tcx_reset(struct tcx_softc *sc)
567 1.1 pk {
568 1.1 pk
569 1.1 pk /* Enable cursor in Brooktree DAC. */
570 1.32 macallan /* TODO: bus_spacify */
571 1.32 macallan // bt->bt_addr = 0x06 << 24;
572 1.32 macallan // bt->bt_ctrl |= 0x03 << 24;
573 1.1 pk }
574 1.1 pk
575 1.1 pk /*
576 1.1 pk * Load a subset of the current (new) colormap into the color DAC.
577 1.1 pk */
578 1.1 pk static void
579 1.27 dsl tcx_loadcmap(struct tcx_softc *sc, int start, int ncolors)
580 1.1 pk {
581 1.32 macallan int i;
582 1.32 macallan
583 1.32 macallan for (i = 0; i < ncolors; i++) {
584 1.32 macallan bus_space_write_4(sc->sc_bustag, sc->sc_bt, DAC_ADDRESS,
585 1.32 macallan (start + i) << 24);
586 1.32 macallan bus_space_write_4(sc->sc_bustag, sc->sc_bt, DAC_FB_LUT,
587 1.32 macallan sc->sc_cmap_red[i + start] << 24);
588 1.32 macallan bus_space_write_4(sc->sc_bustag, sc->sc_bt, DAC_FB_LUT,
589 1.32 macallan sc->sc_cmap_green[i + start] << 24);
590 1.32 macallan bus_space_write_4(sc->sc_bustag, sc->sc_bt, DAC_FB_LUT,
591 1.32 macallan sc->sc_cmap_blue[i + start] << 24);
592 1.1 pk }
593 1.32 macallan bus_space_write_4(sc->sc_bustag, sc->sc_bt, DAC_ADDRESS, 0);
594 1.1 pk }
595 1.1 pk
596 1.1 pk static void
597 1.31 cegger tcx_unblank(device_t dev)
598 1.1 pk {
599 1.25 drochner struct tcx_softc *sc = device_private(dev);
600 1.1 pk
601 1.1 pk if (sc->sc_blanked) {
602 1.32 macallan
603 1.1 pk sc->sc_blanked = 0;
604 1.32 macallan //sc->sc_thc->thc_hcmisc &= ~THC_MISC_VSYNC_DISABLE;
605 1.32 macallan //sc->sc_thc->thc_hcmisc &= ~THC_MISC_HSYNC_DISABLE;
606 1.32 macallan //sc->sc_thc->thc_hcmisc |= THC_MISC_VIDEN;
607 1.1 pk }
608 1.1 pk }
609 1.1 pk
610 1.1 pk /*
611 1.1 pk * Base addresses at which users can mmap() the various pieces of a tcx.
612 1.1 pk */
613 1.1 pk #define TCX_USER_RAM 0x00000000
614 1.1 pk #define TCX_USER_RAM24 0x01000000
615 1.1 pk #define TCX_USER_RAM_COMPAT 0x04000000 /* cg3 emulation */
616 1.1 pk #define TCX_USER_STIP 0x10000000
617 1.1 pk #define TCX_USER_BLIT 0x20000000
618 1.1 pk #define TCX_USER_RDFB32 0x28000000
619 1.1 pk #define TCX_USER_RSTIP 0x30000000
620 1.1 pk #define TCX_USER_RBLIT 0x38000000
621 1.1 pk #define TCX_USER_TEC 0x70001000
622 1.1 pk #define TCX_USER_BTREGS 0x70002000
623 1.1 pk #define TCX_USER_THC 0x70004000
624 1.1 pk #define TCX_USER_DHC 0x70008000
625 1.1 pk #define TCX_USER_ALT 0x7000a000
626 1.1 pk #define TCX_USER_UART 0x7000c000
627 1.1 pk #define TCX_USER_VRT 0x7000e000
628 1.1 pk #define TCX_USER_ROM 0x70010000
629 1.1 pk
630 1.1 pk struct mmo {
631 1.1 pk u_int mo_uaddr; /* user (virtual) address */
632 1.1 pk u_int mo_size; /* size, or 0 for video ram size */
633 1.1 pk u_int mo_bank; /* register bank number */
634 1.1 pk };
635 1.1 pk
636 1.1 pk /*
637 1.1 pk * Return the address that would map the given device at the given
638 1.1 pk * offset, allowing for the given protection, or return -1 for error.
639 1.1 pk *
640 1.1 pk * XXX needs testing against `demanding' applications (e.g., aviator)
641 1.1 pk */
642 1.1 pk paddr_t
643 1.26 dsl tcxmmap(dev_t dev, off_t off, int prot)
644 1.1 pk {
645 1.25 drochner struct tcx_softc *sc = device_lookup_private(&tcx_cd, minor(dev));
646 1.8 thorpej struct openprom_addr *rr = sc->sc_physadr;
647 1.7 darrenr struct mmo *mo, *mo_end;
648 1.1 pk u_int u, sz;
649 1.1 pk static struct mmo mmo[] = {
650 1.1 pk { TCX_USER_RAM, 0, TCX_REG_DFB8 },
651 1.1 pk { TCX_USER_RAM24, 0, TCX_REG_DFB24 },
652 1.1 pk { TCX_USER_RAM_COMPAT, 0, TCX_REG_DFB8 },
653 1.1 pk
654 1.1 pk { TCX_USER_STIP, 1, TCX_REG_STIP },
655 1.1 pk { TCX_USER_BLIT, 1, TCX_REG_BLIT },
656 1.7 darrenr { TCX_USER_RDFB32, 0, TCX_REG_RDFB32 },
657 1.1 pk { TCX_USER_RSTIP, 1, TCX_REG_RSTIP },
658 1.1 pk { TCX_USER_RBLIT, 1, TCX_REG_RBLIT },
659 1.1 pk { TCX_USER_TEC, 1, TCX_REG_TEC },
660 1.1 pk { TCX_USER_BTREGS, 8192 /* XXX */, TCX_REG_CMAP },
661 1.32 macallan { TCX_USER_THC, 0x1000, TCX_REG_THC },
662 1.1 pk { TCX_USER_DHC, 1, TCX_REG_DHC },
663 1.1 pk { TCX_USER_ALT, 1, TCX_REG_ALT },
664 1.1 pk { TCX_USER_ROM, 65536, TCX_REG_ROM },
665 1.1 pk };
666 1.1 pk #define NMMO (sizeof mmo / sizeof *mmo)
667 1.7 darrenr #ifdef TCX_CG8
668 1.7 darrenr /*
669 1.7 darrenr * alternate mapping for CG8 emulation:
670 1.7 darrenr * map part of the 8-bit-deep framebuffer into the cg8 overlay
671 1.7 darrenr * space, just so there's something there, and map the 32-bit-deep
672 1.7 darrenr * framebuffer where cg8 users expect to find it.
673 1.7 darrenr */
674 1.7 darrenr static struct mmo mmo_cg8[] = {
675 1.7 darrenr { TCX_USER_RAM, TCX_CG8OVERLAY, TCX_REG_DFB8 },
676 1.7 darrenr { TCX_CG8OVERLAY, TCX_SIZE_DFB32, TCX_REG_DFB24 },
677 1.7 darrenr { TCX_USER_RAM_COMPAT, TCX_SIZE_DFB32, TCX_REG_DFB24 }
678 1.7 darrenr };
679 1.7 darrenr #define NMMO_CG8 (sizeof mmo_cg8 / sizeof *mmo_cg8)
680 1.7 darrenr #endif
681 1.1 pk
682 1.1 pk if (off & PGOFSET)
683 1.1 pk panic("tcxmmap");
684 1.1 pk
685 1.1 pk /*
686 1.1 pk * Entries with size 0 map video RAM (i.e., the size in fb data).
687 1.7 darrenr * Entries that map 32-bit deep regions are adjusted for their
688 1.7 darrenr * depth (fb_size gives the size of the 8-bit-deep region).
689 1.1 pk *
690 1.1 pk * Since we work in pages, the fact that the map offset table's
691 1.1 pk * sizes are sometimes bizarre (e.g., 1) is effectively ignored:
692 1.1 pk * one byte is as good as one page.
693 1.1 pk */
694 1.7 darrenr #ifdef TCX_CG8
695 1.7 darrenr if (sc->sc_8bit) {
696 1.7 darrenr mo = mmo;
697 1.7 darrenr mo_end = &mmo[NMMO];
698 1.7 darrenr } else {
699 1.7 darrenr mo = mmo_cg8;
700 1.7 darrenr mo_end = &mmo_cg8[NMMO_CG8];
701 1.7 darrenr }
702 1.7 darrenr #else
703 1.7 darrenr mo = mmo;
704 1.7 darrenr mo_end = &mmo[NMMO];
705 1.7 darrenr #endif
706 1.7 darrenr for (; mo < mo_end; mo++) {
707 1.1 pk if ((u_int)off < mo->mo_uaddr)
708 1.1 pk continue;
709 1.1 pk u = off - mo->mo_uaddr;
710 1.7 darrenr sz = mo->mo_size;
711 1.7 darrenr if (sz == 0) {
712 1.7 darrenr sz = sc->sc_fb.fb_type.fb_size;
713 1.7 darrenr /*
714 1.7 darrenr * check for the 32-bit-deep regions and adjust
715 1.7 darrenr * accordingly
716 1.7 darrenr */
717 1.7 darrenr if (mo->mo_uaddr == TCX_USER_RAM24 ||
718 1.7 darrenr mo->mo_uaddr == TCX_USER_RDFB32) {
719 1.7 darrenr if (sc->sc_8bit) {
720 1.7 darrenr /*
721 1.7 darrenr * not present on 8-bit hardware
722 1.7 darrenr */
723 1.7 darrenr continue;
724 1.7 darrenr }
725 1.7 darrenr sz *= 4;
726 1.7 darrenr }
727 1.7 darrenr }
728 1.1 pk if (u < sz) {
729 1.3 eeh return (bus_space_mmap(sc->sc_bustag,
730 1.8 thorpej BUS_ADDR(rr[mo->mo_bank].oa_space,
731 1.8 thorpej rr[mo->mo_bank].oa_base),
732 1.3 eeh u,
733 1.3 eeh prot,
734 1.3 eeh BUS_SPACE_MAP_LINEAR));
735 1.1 pk }
736 1.1 pk }
737 1.3 eeh return (-1);
738 1.1 pk }
739 1.32 macallan
740 1.32 macallan int
741 1.32 macallan tcx_ioctl(void *v, void *vs, u_long cmd, void *data, int flag,
742 1.32 macallan struct lwp *l)
743 1.32 macallan {
744 1.32 macallan struct vcons_data *vd = v;
745 1.32 macallan struct tcx_softc *sc = vd->cookie;
746 1.32 macallan struct wsdisplay_fbinfo *wdf;
747 1.32 macallan struct vcons_screen *ms = vd->active;
748 1.32 macallan
749 1.32 macallan switch (cmd) {
750 1.32 macallan case WSDISPLAYIO_GTYPE:
751 1.32 macallan *(u_int *)data = WSDISPLAY_TYPE_SUNTCX;
752 1.32 macallan return 0;
753 1.32 macallan
754 1.32 macallan #if 0
755 1.32 macallan case FBIOGVIDEO:
756 1.32 macallan case WSDISPLAYIO_GVIDEO:
757 1.32 macallan *(int *)data = tcx_get_video(sc);
758 1.32 macallan return 0;
759 1.32 macallan
760 1.32 macallan case WSDISPLAYIO_SVIDEO:
761 1.32 macallan case FBIOSVIDEO:
762 1.32 macallan tcx_set_video(sc, *(int *)data);
763 1.32 macallan return 0;
764 1.32 macallan #endif
765 1.32 macallan case WSDISPLAYIO_GINFO:
766 1.32 macallan wdf = (void *)data;
767 1.32 macallan wdf->height = ms->scr_ri.ri_height;
768 1.32 macallan wdf->width = ms->scr_ri.ri_width;
769 1.32 macallan wdf->depth = ms->scr_ri.ri_depth;
770 1.32 macallan wdf->cmsize = 256;
771 1.32 macallan return 0;
772 1.32 macallan #if 0
773 1.32 macallan case WSDISPLAYIO_GETCMAP:
774 1.32 macallan return tcx_getcmap(sc, (struct wsdisplay_cmap *)data);
775 1.32 macallan
776 1.32 macallan case WSDISPLAYIO_PUTCMAP:
777 1.32 macallan return tcx_putcmap(sc, (struct wsdisplay_cmap *)data);
778 1.32 macallan #endif
779 1.32 macallan case WSDISPLAYIO_SMODE:
780 1.32 macallan {
781 1.32 macallan int new_mode = *(int*)data;
782 1.32 macallan if (new_mode != sc->sc_mode)
783 1.32 macallan {
784 1.32 macallan sc->sc_mode = new_mode;
785 1.32 macallan if (new_mode == WSDISPLAYIO_MODE_EMUL)
786 1.32 macallan {
787 1.32 macallan #if 0
788 1.32 macallan tcxloadcmap(sc, 0, 256);
789 1.32 macallan tcx_clearscreen(sc);
790 1.32 macallan #endif
791 1.32 macallan vcons_redraw_screen(ms);
792 1.32 macallan }
793 1.32 macallan }
794 1.32 macallan }
795 1.32 macallan }
796 1.32 macallan return EPASSTHROUGH;
797 1.32 macallan }
798 1.32 macallan
799 1.32 macallan static paddr_t
800 1.32 macallan tcx_mmap(void *v, void *vs, off_t offset, int prot)
801 1.32 macallan {
802 1.32 macallan #if 0
803 1.32 macallan struct vcons_data *vd = v;
804 1.32 macallan struct tcx_softc *sc = vd->cookie;
805 1.32 macallan paddr_t pa;
806 1.32 macallan
807 1.32 macallan /* 'regular' framebuffer mmap()ing */
808 1.32 macallan if (offset < sc->sc_fb_psize) {
809 1.32 macallan pa = bus_space_mmap(sc->sc_bustag, sc->sc_fb_paddr + offset, 0,
810 1.32 macallan prot, BUS_SPACE_MAP_LINEAR);
811 1.32 macallan return pa;
812 1.32 macallan }
813 1.32 macallan
814 1.32 macallan if ((offset >= sc->sc_fb_paddr) && (offset < (sc->sc_fb_paddr +
815 1.32 macallan sc->sc_fb_psize))) {
816 1.32 macallan pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot,
817 1.32 macallan BUS_SPACE_MAP_LINEAR);
818 1.32 macallan return pa;
819 1.32 macallan }
820 1.32 macallan
821 1.32 macallan if ((offset >= sc->sc_ctl_paddr) && (offset < (sc->sc_ctl_paddr +
822 1.32 macallan sc->sc_ctl_psize))) {
823 1.32 macallan pa = bus_space_mmap(sc->sc_bustag, offset, 0, prot,
824 1.32 macallan BUS_SPACE_MAP_LINEAR);
825 1.32 macallan return pa;
826 1.32 macallan }
827 1.32 macallan #endif
828 1.32 macallan return -1;
829 1.32 macallan }
830 1.32 macallan
831 1.32 macallan static void
832 1.32 macallan tcx_init_screen(void *cookie, struct vcons_screen *scr,
833 1.32 macallan int existing, long *defattr)
834 1.32 macallan {
835 1.32 macallan struct tcx_softc *sc = cookie;
836 1.32 macallan struct rasops_info *ri = &scr->scr_ri;
837 1.32 macallan
838 1.32 macallan ri->ri_depth = 8;
839 1.32 macallan ri->ri_width = sc->sc_fb.fb_type.fb_width;
840 1.32 macallan ri->ri_height = sc->sc_fb.fb_type.fb_height;
841 1.32 macallan ri->ri_stride = sc->sc_fb.fb_linebytes;
842 1.32 macallan ri->ri_flg = RI_CENTER | RI_FULLCLEAR;
843 1.32 macallan
844 1.32 macallan ri->ri_bits = sc->sc_fbaddr;
845 1.32 macallan
846 1.32 macallan rasops_init(ri, ri->ri_height/8, ri->ri_width/8);
847 1.32 macallan ri->ri_caps = WSSCREEN_WSCOLORS;
848 1.32 macallan rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight,
849 1.32 macallan ri->ri_width / ri->ri_font->fontwidth);
850 1.32 macallan
851 1.32 macallan /* enable acceleration */
852 1.32 macallan ri->ri_ops.copyrows = tcx_copyrows;
853 1.32 macallan ri->ri_ops.eraserows = tcx_eraserows;
854 1.32 macallan ri->ri_ops.putchar = tcx_putchar;
855 1.32 macallan #if 0
856 1.32 macallan ri->ri_ops.cursor = tcx_cursor;
857 1.32 macallan ri->ri_ops.copycols = tcx_copycols;
858 1.32 macallan ri->ri_ops.erasecols = tcx_erasecols;
859 1.32 macallan #endif
860 1.32 macallan }
861 1.32 macallan
862 1.32 macallan static void
863 1.32 macallan tcx_clearscreen(struct tcx_softc *sc)
864 1.32 macallan {
865 1.32 macallan uint64_t bg = ((uint64_t)sc->sc_bg << 32) | 0xffffffffLL;
866 1.32 macallan int i;
867 1.32 macallan
868 1.32 macallan for (i = 0; i < 1024 * 1024; i += 32)
869 1.32 macallan sc->sc_rstip[i] = bg;
870 1.32 macallan }
871 1.32 macallan
872 1.32 macallan static void
873 1.32 macallan tcx_copyrows(void *cookie, int srcrow, int dstrow, int nrows)
874 1.32 macallan {
875 1.32 macallan struct rasops_info *ri = cookie;
876 1.32 macallan struct vcons_screen *scr = ri->ri_hw;
877 1.32 macallan struct tcx_softc *sc = scr->scr_cookie;
878 1.32 macallan int i, last, first, len, dest, leftover;
879 1.32 macallan
880 1.32 macallan i = ri->ri_width * ri->ri_font->fontheight * nrows;
881 1.32 macallan len = i & 0xffffe0;
882 1.32 macallan leftover = i & 0x1f;
883 1.32 macallan if (srcrow < dstrow) {
884 1.32 macallan /* we must go bottom to top */
885 1.32 macallan first = ri->ri_width *
886 1.32 macallan (ri->ri_font->fontheight * srcrow + ri->ri_yorigin);
887 1.32 macallan last = first + len;
888 1.32 macallan dest = ri->ri_width *
889 1.32 macallan (ri->ri_font->fontheight * dstrow + ri->ri_yorigin) + len;
890 1.32 macallan if (leftover > 0) {
891 1.32 macallan sc->sc_rblit[dest + 32] =
892 1.32 macallan (uint64_t)((leftover - 1) << 24) |
893 1.32 macallan (uint64_t)(i + 32);
894 1.32 macallan }
895 1.32 macallan for (i = last; i >= first; i -= 32) {
896 1.32 macallan sc->sc_rblit[dest] = 0x300000001f000000LL | (uint64_t)i;
897 1.32 macallan dest -= 32;
898 1.32 macallan }
899 1.32 macallan } else {
900 1.32 macallan /* top to bottom */
901 1.32 macallan first = ri->ri_width *
902 1.32 macallan (ri->ri_font->fontheight * srcrow + ri->ri_yorigin);
903 1.32 macallan dest = ri->ri_width *
904 1.32 macallan (ri->ri_font->fontheight * dstrow + ri->ri_yorigin);
905 1.32 macallan last = first + len;
906 1.32 macallan for (i = first; i <= last; i+= 32) {
907 1.32 macallan sc->sc_rblit[dest] = 0x300000001f000000LL | (uint64_t)i;
908 1.32 macallan dest += 32;
909 1.32 macallan }
910 1.32 macallan if (leftover > 0) {
911 1.32 macallan sc->sc_rblit[dest] =
912 1.32 macallan (uint64_t)((leftover - 1) << 24) | (uint64_t)i;
913 1.32 macallan }
914 1.32 macallan }
915 1.32 macallan }
916 1.32 macallan
917 1.32 macallan static void
918 1.32 macallan tcx_eraserows(void *cookie, int start, int nrows, long attr)
919 1.32 macallan {
920 1.32 macallan struct rasops_info *ri = cookie;
921 1.32 macallan struct vcons_screen *scr = ri->ri_hw;
922 1.32 macallan struct tcx_softc *sc = scr->scr_cookie;
923 1.32 macallan uint64_t temp;
924 1.32 macallan int i, last, first, len, leftover;
925 1.32 macallan
926 1.32 macallan i = ri->ri_width * ri->ri_font->fontheight * nrows;
927 1.32 macallan len = i & 0xffffe0;
928 1.32 macallan leftover = i & 0x1f;
929 1.32 macallan first = ri->ri_width *
930 1.32 macallan (ri->ri_font->fontheight * start + ri->ri_yorigin);
931 1.32 macallan last = first + len;
932 1.32 macallan temp = 0x30000000ffffffffLL |
933 1.32 macallan ((uint64_t)ri->ri_devcmap[(attr >> 16) & 0xff] << 32);
934 1.32 macallan
935 1.32 macallan for (i = first; i <= last; i+= 32)
936 1.32 macallan sc->sc_rblit[i] = temp;
937 1.32 macallan
938 1.32 macallan if (leftover > 0) {
939 1.32 macallan temp &= 0xffffffffffffffffLL << (32 - leftover);
940 1.32 macallan sc->sc_rblit[i] = temp;
941 1.32 macallan }
942 1.32 macallan }
943 1.32 macallan /*
944 1.32 macallan * The stipple engine is 100% retarded. All drawing operations have to start
945 1.32 macallan * at 32 pixel boundaries so we'll have to deal with characters being split.
946 1.32 macallan */
947 1.32 macallan
948 1.32 macallan static void
949 1.32 macallan tcx_putchar(void *cookie, int row, int col, u_int c, long attr)
950 1.32 macallan {
951 1.32 macallan struct rasops_info *ri = cookie;
952 1.32 macallan struct vcons_screen *scr = ri->ri_hw;
953 1.32 macallan struct tcx_softc *sc = scr->scr_cookie;
954 1.32 macallan uint64_t bg, fg, temp, mask;
955 1.32 macallan int addr, i, uc, shift;
956 1.32 macallan uint32_t fmask;
957 1.32 macallan uint8_t *cdata;
958 1.32 macallan uint16_t *wdata;
959 1.32 macallan
960 1.32 macallan addr = ri->ri_xorigin +
961 1.32 macallan col * ri->ri_font->fontwidth +
962 1.32 macallan (ri->ri_yorigin + row * ri->ri_font->fontheight) * ri->ri_width;
963 1.32 macallan
964 1.32 macallan /* check if the character is crossing a 32 pixel boundary */
965 1.32 macallan if ((addr & 0xffffe0) ==
966 1.32 macallan ((addr + ri->ri_font->fontwidth - 1) & 0xffffe0)) {
967 1.32 macallan /* phew, not split */
968 1.32 macallan shift = addr & 0x1f;
969 1.32 macallan addr &= 0xffffe0;
970 1.32 macallan fmask = 0xffffffff >> (32 - ri->ri_font->fontwidth);
971 1.32 macallan fmask = fmask << (32 - ri->ri_font->fontwidth - shift);
972 1.32 macallan mask = fmask;
973 1.32 macallan bg = 0x3000000000000000LL |
974 1.32 macallan ((uint64_t)ri->ri_devcmap[(attr >> 16) & 0xff] &
975 1.32 macallan 0xff) << 32;
976 1.32 macallan bg |= mask;
977 1.32 macallan temp = 0x3000000000000000LL |
978 1.32 macallan ((uint64_t)ri->ri_devcmap[(attr >> 24) & 0xff] & 0xff) <<
979 1.32 macallan 32;
980 1.32 macallan uc = c - ri->ri_font->firstchar;
981 1.32 macallan cdata = (uint8_t *)ri->ri_font->data + uc * ri->ri_fontscale;
982 1.32 macallan
983 1.32 macallan if (ri->ri_font->fontwidth < 9) {
984 1.32 macallan /* byte by byte */
985 1.32 macallan for (i = 0; i < ri->ri_font->fontheight; i++) {
986 1.32 macallan sc->sc_rstip[addr] = bg;
987 1.32 macallan if (*cdata != 0) {
988 1.32 macallan if (shift > 24) {
989 1.32 macallan fg = (uint64_t)*cdata >>
990 1.32 macallan (shift - 24);
991 1.32 macallan } else {
992 1.32 macallan fg = (uint64_t)*cdata <<
993 1.32 macallan (24 - shift);
994 1.32 macallan }
995 1.32 macallan sc->sc_rstip[addr] = fg | temp;
996 1.32 macallan }
997 1.32 macallan cdata++;
998 1.32 macallan addr += ri->ri_width;
999 1.32 macallan }
1000 1.32 macallan } else if (ri->ri_font->fontwidth < 17) {
1001 1.32 macallan /* short by short */
1002 1.32 macallan wdata = (uint16_t *)cdata;
1003 1.32 macallan for (i = 0; i < ri->ri_font->fontheight; i++) {
1004 1.32 macallan sc->sc_rstip[addr] = bg;
1005 1.32 macallan if (*wdata != 0) {
1006 1.32 macallan if (shift > 16) {
1007 1.32 macallan fg = temp | (uint64_t)*wdata >>
1008 1.32 macallan (shift - 16);
1009 1.32 macallan } else {
1010 1.32 macallan fg = temp | (uint64_t)*wdata <<
1011 1.32 macallan (16 - shift);
1012 1.32 macallan }
1013 1.32 macallan sc->sc_rstip[addr] = fg;
1014 1.32 macallan }
1015 1.32 macallan wdata++;
1016 1.32 macallan addr += ri->ri_width;
1017 1.32 macallan }
1018 1.32 macallan }
1019 1.32 macallan } else {
1020 1.32 macallan /* and now the split case ( man this hardware is dumb ) */
1021 1.32 macallan uint64_t bgr, maskr, fgr;
1022 1.32 macallan uint32_t bork;
1023 1.32 macallan
1024 1.32 macallan shift = addr & 0x1f;
1025 1.32 macallan addr &= 0xffffe0;
1026 1.32 macallan mask = 0xffffffff >> shift;
1027 1.32 macallan maskr = (uint64_t)(0xffffffffUL <<
1028 1.32 macallan (32 - (ri->ri_font->fontwidth + shift - 32)));
1029 1.32 macallan bg = 0x3000000000000000LL |
1030 1.32 macallan ((uint64_t)ri->ri_devcmap[(attr >> 16) & 0xff] &
1031 1.32 macallan 0xff) << 32;
1032 1.32 macallan bgr = bg | maskr;
1033 1.32 macallan bg |= mask;
1034 1.32 macallan temp = 0x3000000000000000LL |
1035 1.32 macallan ((uint64_t)ri->ri_devcmap[(attr >> 24) & 0xff] & 0xff) <<
1036 1.32 macallan 32;
1037 1.32 macallan
1038 1.32 macallan uc = c - ri->ri_font->firstchar;
1039 1.32 macallan cdata = (uint8_t *)ri->ri_font->data + uc * ri->ri_fontscale;
1040 1.32 macallan
1041 1.32 macallan if (ri->ri_font->fontwidth < 9) {
1042 1.32 macallan /* byte by byte */
1043 1.32 macallan for (i = 0; i < ri->ri_font->fontheight; i++) {
1044 1.32 macallan sc->sc_rstip[addr] = bg;
1045 1.32 macallan sc->sc_rstip[addr + 32] = bgr;
1046 1.32 macallan bork = *cdata;
1047 1.32 macallan if (bork != 0) {
1048 1.32 macallan fg = (uint64_t)bork >> (shift - 24);
1049 1.32 macallan sc->sc_rstip[addr] = fg | temp;
1050 1.32 macallan fgr = (uint64_t)(bork << (52 - shift));
1051 1.32 macallan sc->sc_rstip[addr] = fgr | temp;
1052 1.32 macallan }
1053 1.32 macallan cdata++;
1054 1.32 macallan addr += ri->ri_width;
1055 1.32 macallan }
1056 1.32 macallan } else if (ri->ri_font->fontwidth < 17) {
1057 1.32 macallan /* short by short */
1058 1.32 macallan wdata = (uint16_t *)cdata;
1059 1.32 macallan for (i = 0; i < ri->ri_font->fontheight; i++) {
1060 1.32 macallan sc->sc_rstip[addr] = bg;
1061 1.32 macallan sc->sc_rstip[addr + 32] = bgr;
1062 1.32 macallan bork = *wdata;
1063 1.32 macallan if (bork != 0) {
1064 1.32 macallan fg = (uint64_t)bork >> (shift - 16);
1065 1.32 macallan sc->sc_rstip[addr] = fg | temp;
1066 1.32 macallan fgr = (uint64_t)(bork << (48 - shift));
1067 1.32 macallan sc->sc_rstip[addr + 32] = fgr | temp;
1068 1.32 macallan }
1069 1.32 macallan wdata++;
1070 1.32 macallan addr += ri->ri_width;
1071 1.32 macallan }
1072 1.32 macallan }
1073 1.32 macallan
1074 1.32 macallan }
1075 1.32 macallan }
1076 1.32 macallan
1077