tcx.c revision 1.26
1 /* $NetBSD: tcx.c,v 1.26 2009/03/14 15:36:21 dsl Exp $ */ 2 3 /* 4 * Copyright (c) 1996,1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * color display (TCX) driver. 34 * 35 * Does not handle interrupts, even though they can occur. 36 * 37 * XXX should defer colormap updates to vertical retrace interrupts 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: tcx.c,v 1.26 2009/03/14 15:36:21 dsl Exp $"); 42 43 /* 44 * define for cg8 emulation on S24 (24-bit version of tcx) for the SS5; 45 * it is bypassed on the 8-bit version (onboard framebuffer for SS4) 46 */ 47 #undef TCX_CG8 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/buf.h> 52 #include <sys/device.h> 53 #include <sys/ioctl.h> 54 #include <sys/malloc.h> 55 #include <sys/mman.h> 56 #include <sys/tty.h> 57 #include <sys/conf.h> 58 59 #ifdef DEBUG 60 #include <sys/proc.h> 61 #include <sys/syslog.h> 62 #endif 63 64 #include <sys/bus.h> 65 #include <machine/autoconf.h> 66 67 #include <dev/sun/fbio.h> 68 #include <dev/sun/fbvar.h> 69 #include <dev/sun/btreg.h> 70 #include <dev/sun/btvar.h> 71 72 #include <dev/sbus/sbusvar.h> 73 #include <dev/sbus/tcxreg.h> 74 75 /* per-display variables */ 76 struct tcx_softc { 77 struct device sc_dev; /* base device */ 78 struct sbusdev sc_sd; /* sbus device */ 79 struct fbdevice sc_fb; /* frame buffer device */ 80 bus_space_tag_t sc_bustag; 81 struct openprom_addr sc_physadr[TCX_NREG];/* phys addr of h/w */ 82 83 volatile struct bt_regs *sc_bt; /* Brooktree registers */ 84 volatile struct tcx_thc *sc_thc;/* THC registers */ 85 #ifdef TCX_CG8 86 volatile ulong *sc_cplane; /* framebuffer with control planes */ 87 #endif 88 short sc_8bit; /* true if 8-bit hardware */ 89 short sc_blanked; /* true if blanked */ 90 union bt_cmap sc_cmap; /* Brooktree color map */ 91 }; 92 93 /* 94 * The S24 provides the framebuffer RAM mapped in three ways: 95 * 26 bits per pixel, in 32-bit words; the low-order 24 bits are 96 * blue, green, and red values, and the other two bits select the 97 * display modes, per pixel); 98 * 24 bits per pixel, in 32-bit words; the high-order byte reads as 99 * zero, and is ignored on writes (so the mode bits cannot be altered); 100 * 8 bits per pixel, unpadded; writes to this space do not modify the 101 * other 18 bits. 102 */ 103 #define TCX_CTL_8_MAPPED 0x00000000 /* 8 bits, uses color map */ 104 #define TCX_CTL_24_MAPPED 0x01000000 /* 24 bits, uses color map */ 105 #define TCX_CTL_24_LEVEL 0x03000000 /* 24 bits, ignores color map */ 106 #define TCX_CTL_PIXELMASK 0x00FFFFFF /* mask for index/level */ 107 108 /* autoconfiguration driver */ 109 static void tcxattach(struct device *, struct device *, void *); 110 static int tcxmatch(struct device *, struct cfdata *, void *); 111 static void tcx_unblank(struct device *); 112 113 CFATTACH_DECL(tcx, sizeof(struct tcx_softc), 114 tcxmatch, tcxattach, NULL, NULL); 115 116 extern struct cfdriver tcx_cd; 117 118 dev_type_open(tcxopen); 119 dev_type_close(tcxclose); 120 dev_type_ioctl(tcxioctl); 121 dev_type_mmap(tcxmmap); 122 123 const struct cdevsw tcx_cdevsw = { 124 tcxopen, tcxclose, noread, nowrite, tcxioctl, 125 nostop, notty, nopoll, tcxmmap, nokqfilter, 126 }; 127 128 /* frame buffer generic driver */ 129 static struct fbdriver tcx_fbdriver = { 130 tcx_unblank, tcxopen, tcxclose, tcxioctl, nopoll, tcxmmap, 131 nokqfilter 132 }; 133 134 static void tcx_reset(struct tcx_softc *); 135 static void tcx_loadcmap(struct tcx_softc *, int, int); 136 137 #define OBPNAME "SUNW,tcx" 138 139 #ifdef TCX_CG8 140 /* 141 * For CG8 emulation, we map the 32-bit-deep framebuffer at an offset of 142 * 256K; the cg8 space begins with a mono overlay plane and an overlay 143 * enable plane (128K bytes each, 1 bit per pixel), immediately followed 144 * by the color planes, 32 bits per pixel. We also map just the 32-bit 145 * framebuffer at 0x04000000 (TCX_USER_RAM_COMPAT), for compatibility 146 * with the cg8 driver. 147 */ 148 #define TCX_CG8OVERLAY (256 * 1024) 149 #define TCX_SIZE_DFB32 (1152 * 900 * 4) /* max size of the framebuffer */ 150 #endif 151 152 /* 153 * Match a tcx. 154 */ 155 int 156 tcxmatch(struct device *parent, struct cfdata *cf, void *aux) 157 { 158 struct sbus_attach_args *sa = aux; 159 160 return (strcmp(sa->sa_name, OBPNAME) == 0); 161 } 162 163 /* 164 * Attach a display. 165 */ 166 void 167 tcxattach(parent, self, args) 168 struct device *parent, *self; 169 void *args; 170 { 171 struct tcx_softc *sc = device_private(self); 172 struct sbus_attach_args *sa = args; 173 int node, ramsize; 174 volatile struct bt_regs *bt; 175 struct fbdevice *fb = &sc->sc_fb; 176 bus_space_handle_t bh; 177 int isconsole; 178 179 sc->sc_bustag = sa->sa_bustag; 180 node = sa->sa_node; 181 182 fb->fb_driver = &tcx_fbdriver; 183 fb->fb_device = &sc->sc_dev; 184 /* Mask out invalid flags from the user. */ 185 fb->fb_flags = device_cfdata(&sc->sc_dev)->cf_flags & FB_USERMASK; 186 /* 187 * The onboard framebuffer on the SS4 supports only 8-bit mode; 188 * it can be distinguished from the S24 card for the SS5 by the 189 * presence of the "tcx-8-bit" attribute on the SS4 version. 190 */ 191 sc->sc_8bit = node_has_property(node, "tcx-8-bit"); 192 #ifdef TCX_CG8 193 if (sc->sc_8bit) { 194 #endif 195 /* 196 * cg8 emulation is either not compiled in or not supported 197 * on this hardware. Report values for the 8-bit framebuffer 198 * so cg3 emulation works. (If this hardware supports 199 * 24-bit mode, the 24-bit framebuffer will also be available) 200 */ 201 fb->fb_type.fb_depth = 8; 202 fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node); 203 204 ramsize = fb->fb_type.fb_height * fb->fb_linebytes; 205 #ifdef TCX_CG8 206 } else { 207 /* 208 * for cg8 emulation, unconditionally report the depth as 209 * 32 bits, but use the height and width reported by the 210 * boot prom. cg8 users want to see the full size of 211 * overlay planes plus color planes included in the 212 * reported framebuffer size. 213 */ 214 fb->fb_type.fb_depth = 32; 215 fb_setsize_obp(fb, fb->fb_type.fb_depth, 1152, 900, node); 216 fb->fb_linebytes = 217 (fb->fb_type.fb_width * fb->fb_type.fb_depth) / 8; 218 ramsize = TCX_CG8OVERLAY + 219 (fb->fb_type.fb_height * fb->fb_linebytes); 220 } 221 #endif 222 fb->fb_type.fb_cmsize = 256; 223 fb->fb_type.fb_size = ramsize; 224 printf(": %s, %d x %d", OBPNAME, 225 fb->fb_type.fb_width, 226 fb->fb_type.fb_height); 227 #ifdef TCX_CG8 228 /* 229 * if cg8 emulation is enabled, say so; but if hardware can't 230 * emulate cg8, explain that instead 231 */ 232 printf( (sc->sc_8bit)? 233 " (8-bit only)" : 234 " (emulating cg8)"); 235 #endif 236 237 /* 238 * XXX - should be set to FBTYPE_TCX. 239 * XXX For CG3 emulation to work in current (96/6) X11 servers, 240 * XXX `fbtype' must point to an "unregocnised" entry. 241 */ 242 #ifdef TCX_CG8 243 if (sc->sc_8bit) { 244 fb->fb_type.fb_type = FBTYPE_RESERVED3; 245 } else { 246 fb->fb_type.fb_type = FBTYPE_MEMCOLOR; 247 } 248 #else 249 fb->fb_type.fb_type = FBTYPE_RESERVED3; 250 #endif 251 252 253 if (sa->sa_nreg != TCX_NREG) { 254 printf("%s: only %d register sets\n", 255 device_xname(self), sa->sa_nreg); 256 return; 257 } 258 bcopy(sa->sa_reg, sc->sc_physadr, 259 sa->sa_nreg * sizeof(struct openprom_addr)); 260 261 /* XXX - fix THC and TEC offsets */ 262 sc->sc_physadr[TCX_REG_TEC].oa_base += 0x1000; 263 sc->sc_physadr[TCX_REG_THC].oa_base += 0x1000; 264 265 /* Map the register banks we care about */ 266 if (sbus_bus_map(sa->sa_bustag, 267 sc->sc_physadr[TCX_REG_THC].oa_space, 268 sc->sc_physadr[TCX_REG_THC].oa_base, 269 sizeof (struct tcx_thc), 270 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 271 printf("tcxattach: cannot map thc registers\n"); 272 return; 273 } 274 sc->sc_thc = (volatile struct tcx_thc *) 275 bus_space_vaddr(sa->sa_bustag, bh); 276 277 if (sbus_bus_map(sa->sa_bustag, 278 sc->sc_physadr[TCX_REG_CMAP].oa_space, 279 sc->sc_physadr[TCX_REG_CMAP].oa_base, 280 sizeof (struct bt_regs), 281 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 282 printf("tcxattach: cannot map bt registers\n"); 283 return; 284 } 285 sc->sc_bt = bt = (volatile struct bt_regs *) 286 bus_space_vaddr(sa->sa_bustag, bh); 287 288 #ifdef TCX_CG8 289 if (!sc->sc_8bit) { 290 if (sbus_bus_map(sa->sa_bustag, 291 sc->sc_physadr[TCX_REG_RDFB32].oa_space, 292 sc->sc_physadr[TCX_REG_RDFB32].oa_base, 293 TCX_SIZE_DFB32, 294 BUS_SPACE_MAP_LINEAR, 295 &bh) != 0) { 296 printf("tcxattach: cannot map control planes\n"); 297 return; 298 } 299 sc->sc_cplane = (volatile ulong *)bh; 300 } 301 #endif 302 303 isconsole = fb_is_console(node); 304 305 printf(", id %d, rev %d, sense %d", 306 (sc->sc_thc->thc_config & THC_CFG_FBID) >> THC_CFG_FBID_SHIFT, 307 (sc->sc_thc->thc_config & THC_CFG_REV) >> THC_CFG_REV_SHIFT, 308 (sc->sc_thc->thc_config & THC_CFG_SENSE) >> THC_CFG_SENSE_SHIFT 309 ); 310 311 /* reset cursor & frame buffer controls */ 312 tcx_reset(sc); 313 314 /* Initialize the default color map. */ 315 bt_initcmap(&sc->sc_cmap, 256); 316 tcx_loadcmap(sc, 0, 256); 317 318 /* enable video */ 319 sc->sc_thc->thc_hcmisc |= THC_MISC_VIDEN; 320 321 if (isconsole) { 322 printf(" (console)\n"); 323 } else 324 printf("\n"); 325 326 sbus_establish(&sc->sc_sd, &sc->sc_dev); 327 fb_attach(&sc->sc_fb, isconsole); 328 } 329 330 #ifdef TCX_CG8 331 /* 332 * keep track of the number of opens, so we can switch to 24-bit mode 333 * when the device is first opened, and return to 8-bit mode on the 334 * last close. (stolen from cgfourteen driver...) There can only be 335 * one TCX per system, so we only need one flag. 336 */ 337 static int tcx_opens = 0; 338 #endif 339 340 int 341 tcxopen(dev, flags, mode, l) 342 dev_t dev; 343 int flags, mode; 344 struct lwp *l; 345 { 346 #ifdef TCX_CG8 347 int unit = minor(dev); 348 struct tcx_softc *sc; 349 int i, s, oldopens; 350 volatile ulong *cptr; 351 struct fbdevice *fb; 352 353 sc = device_lookup_private(&tcx_cd, unit); 354 if (!sc) 355 return (ENXIO); 356 if (!sc->sc_8bit) { 357 s = splhigh(); 358 oldopens = tcx_opens++; 359 splx(s); 360 if (oldopens == 0) { 361 /* 362 * rewrite the control planes to select 24-bit mode 363 * and clear the screen 364 */ 365 fb = &sc->sc_fb; 366 i = fb->fb_type.fb_height * fb->fb_type.fb_width; 367 cptr = sc->sc_cplane; 368 while (--i >= 0) 369 *cptr++ = TCX_CTL_24_LEVEL; 370 } 371 } 372 #endif 373 return (0); 374 } 375 376 int 377 tcxclose(dev, flags, mode, l) 378 dev_t dev; 379 int flags, mode; 380 struct lwp *l; 381 { 382 struct tcx_softc *sc = device_lookup_private(&tcx_cd, minor(dev)); 383 #ifdef TCX_CG8 384 int i, s, opens; 385 volatile ulong *cptr; 386 struct fbdevice *fb; 387 #endif 388 389 tcx_reset(sc); 390 #ifdef TCX_CG8 391 if (!sc->sc_8bit) { 392 s = splhigh(); 393 opens = --tcx_opens; 394 if (tcx_opens <= 0) 395 opens = tcx_opens = 0; 396 splx(s); 397 if (opens == 0) { 398 /* 399 * rewrite the control planes to select 8-bit mode, 400 * preserving the contents of the screen. 401 * (or we could just bzero the whole thing...) 402 */ 403 fb = &sc->sc_fb; 404 i = fb->fb_type.fb_height * fb->fb_type.fb_width; 405 cptr = sc->sc_cplane; 406 while (--i >= 0) 407 *cptr++ &= TCX_CTL_PIXELMASK; 408 } 409 } 410 #endif 411 return (0); 412 } 413 414 int 415 tcxioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 416 { 417 struct tcx_softc *sc = device_lookup_private(&tcx_cd, minor(dev)); 418 int error; 419 420 switch (cmd) { 421 422 case FBIOGTYPE: 423 *(struct fbtype *)data = sc->sc_fb.fb_type; 424 break; 425 426 case FBIOGATTR: 427 #define fba ((struct fbgattr *)data) 428 fba->real_type = sc->sc_fb.fb_type.fb_type; 429 fba->owner = 0; /* XXX ??? */ 430 fba->fbtype = sc->sc_fb.fb_type; 431 fba->sattr.flags = 0; 432 fba->sattr.emu_type = sc->sc_fb.fb_type.fb_type; 433 fba->sattr.dev_specific[0] = -1; 434 fba->emu_types[0] = sc->sc_fb.fb_type.fb_type; 435 fba->emu_types[1] = FBTYPE_SUN3COLOR; 436 fba->emu_types[2] = -1; 437 #undef fba 438 break; 439 440 case FBIOGETCMAP: 441 #define p ((struct fbcmap *)data) 442 return (bt_getcmap(p, &sc->sc_cmap, 256, 1)); 443 444 case FBIOPUTCMAP: 445 /* copy to software map */ 446 #ifdef TCX_CG8 447 if (!sc->sc_8bit) { 448 /* 449 * cg8 has extra bits in high-order byte of the index 450 * that bt_putcmap doesn't recognize 451 */ 452 p->index &= 0xffffff; 453 } 454 #endif 455 error = bt_putcmap(p, &sc->sc_cmap, 256, 1); 456 if (error) 457 return (error); 458 /* now blast them into the chip */ 459 /* XXX should use retrace interrupt */ 460 tcx_loadcmap(sc, p->index, p->count); 461 #undef p 462 break; 463 464 case FBIOGVIDEO: 465 *(int *)data = sc->sc_blanked; 466 break; 467 468 case FBIOSVIDEO: 469 if (*(int *)data) 470 tcx_unblank(&sc->sc_dev); 471 else if (!sc->sc_blanked) { 472 sc->sc_blanked = 1; 473 sc->sc_thc->thc_hcmisc &= ~THC_MISC_VIDEN; 474 /* Put monitor in `power-saving mode' */ 475 sc->sc_thc->thc_hcmisc |= THC_MISC_VSYNC_DISABLE; 476 sc->sc_thc->thc_hcmisc |= THC_MISC_HSYNC_DISABLE; 477 } 478 break; 479 480 default: 481 #ifdef DEBUG 482 log(LOG_NOTICE, "tcxioctl(0x%lx) (%s[%d])\n", cmd, 483 l->l_proc->p_comm, l->l_proc->p_pid); 484 #endif 485 return (ENOTTY); 486 } 487 return (0); 488 } 489 490 /* 491 * Clean up hardware state (e.g., after bootup or after X crashes). 492 */ 493 static void 494 tcx_reset(struct tcx_softc *sc) 495 { 496 volatile struct bt_regs *bt; 497 498 /* Enable cursor in Brooktree DAC. */ 499 bt = sc->sc_bt; 500 bt->bt_addr = 0x06 << 24; 501 bt->bt_ctrl |= 0x03 << 24; 502 } 503 504 /* 505 * Load a subset of the current (new) colormap into the color DAC. 506 */ 507 static void 508 tcx_loadcmap(sc, start, ncolors) 509 struct tcx_softc *sc; 510 int start, ncolors; 511 { 512 volatile struct bt_regs *bt; 513 u_int *ip, i; 514 int count; 515 516 ip = &sc->sc_cmap.cm_chip[BT_D4M3(start)]; /* start/4 * 3 */ 517 count = BT_D4M3(start + ncolors - 1) - BT_D4M3(start) + 3; 518 bt = sc->sc_bt; 519 bt->bt_addr = BT_D4M4(start) << 24; 520 while (--count >= 0) { 521 i = *ip++; 522 /* hardware that makes one want to pound boards with hammers */ 523 bt->bt_cmap = i; 524 bt->bt_cmap = i << 8; 525 bt->bt_cmap = i << 16; 526 bt->bt_cmap = i << 24; 527 } 528 } 529 530 static void 531 tcx_unblank(struct device *dev) 532 { 533 struct tcx_softc *sc = device_private(dev); 534 535 if (sc->sc_blanked) { 536 sc->sc_blanked = 0; 537 sc->sc_thc->thc_hcmisc &= ~THC_MISC_VSYNC_DISABLE; 538 sc->sc_thc->thc_hcmisc &= ~THC_MISC_HSYNC_DISABLE; 539 sc->sc_thc->thc_hcmisc |= THC_MISC_VIDEN; 540 } 541 } 542 543 /* 544 * Base addresses at which users can mmap() the various pieces of a tcx. 545 */ 546 #define TCX_USER_RAM 0x00000000 547 #define TCX_USER_RAM24 0x01000000 548 #define TCX_USER_RAM_COMPAT 0x04000000 /* cg3 emulation */ 549 #define TCX_USER_STIP 0x10000000 550 #define TCX_USER_BLIT 0x20000000 551 #define TCX_USER_RDFB32 0x28000000 552 #define TCX_USER_RSTIP 0x30000000 553 #define TCX_USER_RBLIT 0x38000000 554 #define TCX_USER_TEC 0x70001000 555 #define TCX_USER_BTREGS 0x70002000 556 #define TCX_USER_THC 0x70004000 557 #define TCX_USER_DHC 0x70008000 558 #define TCX_USER_ALT 0x7000a000 559 #define TCX_USER_UART 0x7000c000 560 #define TCX_USER_VRT 0x7000e000 561 #define TCX_USER_ROM 0x70010000 562 563 struct mmo { 564 u_int mo_uaddr; /* user (virtual) address */ 565 u_int mo_size; /* size, or 0 for video ram size */ 566 u_int mo_bank; /* register bank number */ 567 }; 568 569 /* 570 * Return the address that would map the given device at the given 571 * offset, allowing for the given protection, or return -1 for error. 572 * 573 * XXX needs testing against `demanding' applications (e.g., aviator) 574 */ 575 paddr_t 576 tcxmmap(dev_t dev, off_t off, int prot) 577 { 578 struct tcx_softc *sc = device_lookup_private(&tcx_cd, minor(dev)); 579 struct openprom_addr *rr = sc->sc_physadr; 580 struct mmo *mo, *mo_end; 581 u_int u, sz; 582 static struct mmo mmo[] = { 583 { TCX_USER_RAM, 0, TCX_REG_DFB8 }, 584 { TCX_USER_RAM24, 0, TCX_REG_DFB24 }, 585 { TCX_USER_RAM_COMPAT, 0, TCX_REG_DFB8 }, 586 587 { TCX_USER_STIP, 1, TCX_REG_STIP }, 588 { TCX_USER_BLIT, 1, TCX_REG_BLIT }, 589 { TCX_USER_RDFB32, 0, TCX_REG_RDFB32 }, 590 { TCX_USER_RSTIP, 1, TCX_REG_RSTIP }, 591 { TCX_USER_RBLIT, 1, TCX_REG_RBLIT }, 592 { TCX_USER_TEC, 1, TCX_REG_TEC }, 593 { TCX_USER_BTREGS, 8192 /* XXX */, TCX_REG_CMAP }, 594 { TCX_USER_THC, sizeof(struct tcx_thc), TCX_REG_THC }, 595 { TCX_USER_DHC, 1, TCX_REG_DHC }, 596 { TCX_USER_ALT, 1, TCX_REG_ALT }, 597 { TCX_USER_ROM, 65536, TCX_REG_ROM }, 598 }; 599 #define NMMO (sizeof mmo / sizeof *mmo) 600 #ifdef TCX_CG8 601 /* 602 * alternate mapping for CG8 emulation: 603 * map part of the 8-bit-deep framebuffer into the cg8 overlay 604 * space, just so there's something there, and map the 32-bit-deep 605 * framebuffer where cg8 users expect to find it. 606 */ 607 static struct mmo mmo_cg8[] = { 608 { TCX_USER_RAM, TCX_CG8OVERLAY, TCX_REG_DFB8 }, 609 { TCX_CG8OVERLAY, TCX_SIZE_DFB32, TCX_REG_DFB24 }, 610 { TCX_USER_RAM_COMPAT, TCX_SIZE_DFB32, TCX_REG_DFB24 } 611 }; 612 #define NMMO_CG8 (sizeof mmo_cg8 / sizeof *mmo_cg8) 613 #endif 614 615 if (off & PGOFSET) 616 panic("tcxmmap"); 617 618 /* 619 * Entries with size 0 map video RAM (i.e., the size in fb data). 620 * Entries that map 32-bit deep regions are adjusted for their 621 * depth (fb_size gives the size of the 8-bit-deep region). 622 * 623 * Since we work in pages, the fact that the map offset table's 624 * sizes are sometimes bizarre (e.g., 1) is effectively ignored: 625 * one byte is as good as one page. 626 */ 627 #ifdef TCX_CG8 628 if (sc->sc_8bit) { 629 mo = mmo; 630 mo_end = &mmo[NMMO]; 631 } else { 632 mo = mmo_cg8; 633 mo_end = &mmo_cg8[NMMO_CG8]; 634 } 635 #else 636 mo = mmo; 637 mo_end = &mmo[NMMO]; 638 #endif 639 for (; mo < mo_end; mo++) { 640 if ((u_int)off < mo->mo_uaddr) 641 continue; 642 u = off - mo->mo_uaddr; 643 sz = mo->mo_size; 644 if (sz == 0) { 645 sz = sc->sc_fb.fb_type.fb_size; 646 /* 647 * check for the 32-bit-deep regions and adjust 648 * accordingly 649 */ 650 if (mo->mo_uaddr == TCX_USER_RAM24 || 651 mo->mo_uaddr == TCX_USER_RDFB32) { 652 if (sc->sc_8bit) { 653 /* 654 * not present on 8-bit hardware 655 */ 656 continue; 657 } 658 sz *= 4; 659 } 660 } 661 if (u < sz) { 662 return (bus_space_mmap(sc->sc_bustag, 663 BUS_ADDR(rr[mo->mo_bank].oa_space, 664 rr[mo->mo_bank].oa_base), 665 u, 666 prot, 667 BUS_SPACE_MAP_LINEAR)); 668 } 669 } 670 return (-1); 671 } 672
Indexes created Wed Sep 24 02:09:48 GMT 2025