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tcxreg.h revision 1.3.70.1 
      1 /*	$NetBSD: tcxreg.h,v 1.3.70.1 2008/06/02 13:23:50 mjf Exp $ */
      2 /*
      3  *  Copyright (c) 1996 The NetBSD Foundation, Inc.
      4  *  All rights reserved.
      5  *
      6  *  This code is derived from software contributed to The NetBSD Foundation
      7  *  by Paul Kranenburg.
      8  *
      9  *  Redistribution and use in source and binary forms, with or without
     10  *  modification, are permitted provided that the following conditions
     11  *  are met:
     12  *  1. Redistributions of source code must retain the above copyright
     13  *     notice, this list of conditions and the following disclaimer.
     14  *  2. Redistributions in binary form must reproduce the above copyright
     15  *     notice, this list of conditions and the following disclaimer in the
     16  *     documentation and/or other materials provided with the distribution.
     17  *
     18  *  THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     19  *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     20  *  TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     21  *  PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     22  *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     23  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     24  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     25  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     26  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     27  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     28  *  POSSIBILITY OF SUCH DAMAGE.
     29  */
     30 
     31 /*
     32  * A TCX is composed of numerous groups of control registers, all with TLAs:
     33  *	DHC - ???
     34  *	TEC - transform engine control?
     35  *	THC - TEC Hardware Configuration
     36  *	ROM - a 128Kbyte ROM with who knows what in it.
     37  *	STIP - ???
     38  *	RSTIP - Raw ???
     39  *	BLIT - ???
     40  *	RBLIT - Raw ???
     41  *	ALT - ???
     42  *	colormap - see below
     43  *	frame buffer memory (video RAM)
     44  *	possible other stuff
     45  *
     46  */
     47 #define TCX_REG_DFB8	0
     48 #define TCX_REG_DFB24	1
     49 #define TCX_REG_STIP	2
     50 #define TCX_REG_BLIT	3
     51 #define TCX_REG_RDFB32	4
     52 #define TCX_REG_RSTIP	5
     53 #define TCX_REG_RBLIT	6
     54 #define TCX_REG_TEC	7
     55 #define TCX_REG_CMAP	8
     56 #define TCX_REG_THC	9
     57 #define TCX_REG_ROM	10
     58 #define TCX_REG_DHC	11
     59 #define TCX_REG_ALT	12
     60 
     61 #define TCX_NREG	13
     62 
     63 
     64 /*
     65  * The layout of the THC.
     66  */
     67 struct tcx_thc {
     68 	u_int	thc_config;
     69 	u_int	thc_xxx1[31];
     70 	u_int	thc_sensebus;
     71 	u_int	thc_xxx2[3];
     72 	u_int	thc_delay;
     73 	u_int	thc_strapping;
     74 	u_int	thc_xxx3[1];
     75 	u_int	thc_linecount;
     76 	u_int	thc_xxx4[478];
     77 	u_int	thc_hcmisc;
     78 	u_int	thc_xxx5[56];
     79 	u_int	thc_cursoraddr;
     80 	u_int	thc_cursorAdata[32];
     81 	u_int	thc_cursorBdata[32];
     82 
     83 };
     84 /* bits in thc_config ??? */
     85 #define THC_CFG_FBID		0xf0000000	/* id mask */
     86 #define THC_CFG_FBID_SHIFT	28
     87 #define THC_CFG_SENSE		0x07000000	/* sense mask */
     88 #define THC_CFG_SENSE_SHIFT	24
     89 #define THC_CFG_REV		0x00f00000	/* revision mask */
     90 #define THC_CFG_REV_SHIFT	20
     91 #define THC_CFG_RST		0x00008000	/* reset */
     92 
     93 /* bits in thc_hcmisc */
     94 #define	THC_MISC_OPENFLG	0x80000000	/* open flag (what's that?) */
     95 #define	THC_MISC_SWERR_EN	0x20000000	/* enable SW error interrupt */
     96 #define	THC_MISC_VSYNC_LEVEL	0x08000000	/* vsync level when disabled */
     97 #define	THC_MISC_HSYNC_LEVEL	0x04000000	/* hsync level when disabled */
     98 #define	THC_MISC_VSYNC_DISABLE	0x02000000	/* vsync disable */
     99 #define	THC_MISC_HSYNC_DISABLE	0x01000000	/* hsync disable */
    100 #define	THC_MISC_XXX1		0x00ffe000	/* unused */
    101 #define	THC_MISC_RESET		0x00001000	/* ??? */
    102 #define	THC_MISC_XXX2		0x00000800	/* unused */
    103 #define	THC_MISC_VIDEN		0x00000400	/* video enable */
    104 #define	THC_MISC_SYNC		0x00000200	/* not sure what ... */
    105 #define	THC_MISC_VSYNC		0x00000100	/* ... these really are */
    106 #define	THC_MISC_SYNCEN		0x00000080	/* sync enable */
    107 #define	THC_MISC_CURSRES	0x00000040	/* cursor resolution */
    108 #define	THC_MISC_INTEN		0x00000020	/* v.retrace intr enable */
    109 #define	THC_MISC_INTR		0x00000010	/* intr pending / ack bit */
    110 #define	THC_MISC_DACWAIT	0x0000000f	/* ??? */
    111 
    112 /*
    113  * Partial description of TEC.
    114  */
    115 struct tcx_tec {
    116 	u_int	tec_config;	/* what's in it? */
    117 	u_int	tec_xxx0[35];
    118 	u_int	tec_delay;	/* */
    119 #define TEC_DELAY_SYNC		0x00000f00
    120 #define TEC_DELAY_WR_F		0x000000c0
    121 #define TEC_DELAY_WR_R		0x00000030
    122 #define TEC_DELAY_SOE_F		0x0000000c
    123 #define TEC_DELAY_SOE_S		0x00000003
    124 	u_int	tec_strapping;	/* */
    125 #define TEC_STRAP_FIFO_LIMIT	0x00f00000
    126 #define TEC_STRAP_CACHE_EN	0x00010000
    127 #define TEC_STRAP_ZERO_OFFSET	0x00008000
    128 #define TEC_STRAP_REFRSH_DIS	0x00004000
    129 #define TEC_STRAP_REF_LOAD	0x00001000
    130 #define TEC_STRAP_REFRSH_PERIOD	0x000003ff
    131 	u_int	tec_hcmisc;	/* */
    132 	u_int	tec_linecount;	/* */
    133 	u_int	tec_hss;	/* */
    134 	u_int	tec_hse;	/* */
    135 	u_int	tec_hds;	/* */
    136 	u_int	tec_hsedvs;	/* */
    137 	u_int	tec_hde;	/* */
    138 	u_int	tec_vss;	/* */
    139 	u_int	tec_vse;	/* */
    140 	u_int	tec_vds;	/* */
    141 	u_int	tec_vde;	/* */
    142 };
    143 
    144