zxreg.h revision 1.7 1 1.7 macallan /* $NetBSD: zxreg.h,v 1.7 2009/04/23 20:46:49 macallan Exp $ */
2 1.1 ad
3 1.1 ad /*
4 1.1 ad * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.1 ad * by Andrew Doran.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad *
19 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
30 1.1 ad */
31 1.1 ad
32 1.1 ad /*
33 1.1 ad * Copyright (C) 1999, 2000 Jakub Jelinek (jakub (at) redhat.com)
34 1.1 ad *
35 1.1 ad * Permission is hereby granted, free of charge, to any person obtaining a copy
36 1.1 ad * of this software and associated documentation files (the "Software"), to deal
37 1.1 ad * in the Software without restriction, including without limitation the rights
38 1.1 ad * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
39 1.1 ad * copies of the Software, and to permit persons to whom the Software is
40 1.1 ad * furnished to do so, subject to the following conditions:
41 1.1 ad *
42 1.1 ad * The above copyright notice and this permission notice shall be included in
43 1.1 ad * all copies or substantial portions of the Software.
44 1.1 ad *
45 1.1 ad * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
46 1.1 ad * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
47 1.1 ad * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
48 1.1 ad * JAKUB JELINEK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
49 1.1 ad * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
50 1.1 ad * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
51 1.1 ad *
52 1.1 ad */
53 1.2 perry
54 1.1 ad #ifndef _DEV_SBUS_ZXREG_H_
55 1.1 ad #define _DEV_SBUS_ZXREG_H_
56 1.1 ad
57 1.1 ad /* Hardware offsets. */
58 1.1 ad #define ZX_OFF_UNK2 0x00000000
59 1.1 ad #define ZX_OFF_LC_SS0_KRN 0x00200000
60 1.1 ad #define ZX_OFF_LC_SS0_USR 0x00201000
61 1.1 ad #define ZX_OFF_LD_SS0 0x00400000
62 1.1 ad #define ZX_OFF_LD_GBL 0x00401000
63 1.1 ad #define ZX_OFF_LX_CROSS 0x00600000
64 1.1 ad #define ZX_OFF_LX_CURSOR 0x00601000
65 1.1 ad #define ZX_OFF_UNK 0x00602000
66 1.1 ad #define ZX_OFF_SS0 0x00800000
67 1.1 ad #define ZX_OFF_LC_SS1_KRN 0x01200000
68 1.1 ad #define ZX_OFF_LC_SS1_USR 0x01201000
69 1.1 ad #define ZX_OFF_LD_SS1 0x01400000
70 1.1 ad #define ZX_OFF_SS1 0x01800000
71 1.1 ad
72 1.7 macallan /* offsets relative to ZX_OFF_LC_SS0_KRN */
73 1.7 macallan /* Leo clock domain */
74 1.7 macallan #define ZX_LC_SS0_LEO_INT_ENABLE 0x00000000
75 1.7 macallan #define ZX_LC_SS0_CLR_BLIT_DONE 0x00000004
76 1.7 macallan #define ZX_LC_SS0_CLR_DEODRAW_SEM 0x00000008
77 1.7 macallan
78 1.7 macallan /* SBus clock domain */
79 1.7 macallan #define ZX_LC_SS0_CHIP_CODE 0x00000800
80 1.7 macallan #define ZX_LC_SS0_SBUS_STATUS 0x00000804
81 1.7 macallan #define ZX_LC_SS0_SBUS_INT_ENABLE 0x00000808
82 1.7 macallan #define ZX_LC_SS0_FIRST_TIMEOUT_CNTR 0x0000080c
83 1.7 macallan #define ZX_LC_SS0_RERUN_CNTR 0x00000810
84 1.7 macallan #define ZX_LC_SS0_CLR_READ_DMA_DONE 0x00000820
85 1.7 macallan #define ZX_LC_SS0_CLR_WRITE_DMA_DONE 0x00000824
86 1.7 macallan #define ZX_LC_SS0_CLR_INVALID_PTE 0x00000828
87 1.7 macallan #define ZX_LC_SS0_CLR_DMA_ERROR_ACK 0x0000082c
88 1.7 macallan #define ZX_LC_SS0_CLR_SLAVE_ILL_ADDR 0x00000830
89 1.7 macallan #define ZX_LC_SS0_CLR_SLAVE_RERUN_TOUT 0x00000834
90 1.7 macallan #define ZX_LC_SS0_LEO_RESET 0x00000840
91 1.7 macallan #define ZX_LC_SS0_CLR_LEO_RESET 0x00000844
92 1.7 macallan #define ZX_LC_SS0_DMA_READ_PAUSE 0x00000848
93 1.7 macallan
94 1.7 macallan /* Leo clock domain */
95 1.7 macallan #define ZX_LC_SS0_LEO_SYSTEM_STATUS 0x00001000
96 1.7 macallan #define ZX_LC_SS0_FB_ADDRESS_SPACE 0x00001004
97 1.7 macallan #define ZX_LC_SS0_STENCIL_MASK 0x00001008
98 1.7 macallan #define ZX_LC_SS0_STENCIL_TRANSPARENT 0x0000100c
99 1.7 macallan #define ZX_LC_SS0_DIRECTION_SIZE 0x00001010
100 1.7 macallan #define ZX_LC_SS0_SOURCE_ADDR 0x00001014
101 1.7 macallan #define ZX_LC_SS0_DEST_COPY_NOSTART 0x00001018
102 1.7 macallan #define ZX_LC_SS0_DEST_COPY_START 0x0000101c
103 1.7 macallan #define ZX_LC_SS0_DEST_FILL_START 0x00001020
104 1.7 macallan
105 1.1 ad /* ROP register */
106 1.1 ad #define ZX_ATTR_PICK_DISABLE 0x00000000
107 1.1 ad #define ZX_ATTR_PICK_2D 0x80000000
108 1.1 ad #define ZX_ATTR_PICK_3D 0xa0000000
109 1.1 ad #define ZX_ATTR_PICK_2D_REND 0xc0000000
110 1.1 ad #define ZX_ATTR_PICK_3D_REND 0xe0000000
111 1.1 ad
112 1.1 ad #define ZX_ATTR_DCE_DISABLE 0x00000000
113 1.1 ad #define ZX_ATTR_DCE_ENABLE 0x10000000
114 1.1 ad
115 1.1 ad #define ZX_ATTR_APE_DISABLE 0x00000000
116 1.1 ad #define ZX_ATTR_APE_ENABLE 0x08000000
117 1.1 ad
118 1.1 ad #define ZX_ATTR_COLOR_VAR 0x00000000
119 1.1 ad #define ZX_ATTR_COLOR_CONST 0x04000000
120 1.1 ad
121 1.1 ad #define ZX_ATTR_AA_DISABLE 0x02000000
122 1.1 ad #define ZX_ATTR_AA_ENABLE 0x01000000
123 1.1 ad
124 1.1 ad #define ZX_ATTR_ABE_BG 0x00000000 /* dst + alpha * (src - bg) */
125 1.1 ad #define ZX_ATTR_ABE_FB 0x00800000 /* dst + alpha * (src - dst) */
126 1.1 ad
127 1.1 ad #define ZX_ATTR_ABE_DISABLE 0x00000000
128 1.1 ad #define ZX_ATTR_ABE_ENABLE 0x00400000
129 1.1 ad
130 1.1 ad #define ZX_ATTR_BLTSRC_A 0x00000000
131 1.1 ad #define ZX_ATTR_BLTSRC_B 0x00200000
132 1.1 ad
133 1.1 ad #define ZX_ROP_ZERO (0x0 << 18)
134 1.1 ad #define ZX_ROP_NEW_AND_OLD (0x8 << 18)
135 1.1 ad #define ZX_ROP_NEW_AND_NOLD (0x4 << 18)
136 1.1 ad #define ZX_ROP_NEW (0xc << 18)
137 1.1 ad #define ZX_ROP_NNEW_AND_OLD (0x2 << 18)
138 1.1 ad #define ZX_ROP_OLD (0xa << 18)
139 1.1 ad #define ZX_ROP_NEW_XOR_OLD (0x6 << 18)
140 1.1 ad #define ZX_ROP_NEW_OR_OLD (0xe << 18)
141 1.1 ad #define ZX_ROP_NNEW_AND_NOLD (0x1 << 18)
142 1.1 ad #define ZX_ROP_NNEW_XOR_NOLD (0x9 << 18)
143 1.1 ad #define ZX_ROP_NOLD (0x5 << 18)
144 1.1 ad #define ZX_ROP_NEW_OR_NOLD (0xd << 18)
145 1.1 ad #define ZX_ROP_NNEW (0x3 << 18)
146 1.1 ad #define ZX_ROP_NNEW_OR_OLD (0xb << 18)
147 1.1 ad #define ZX_ROP_NNEW_OR_NOLD (0x7 << 18)
148 1.1 ad #define ZX_ROP_ONES (0xf << 18)
149 1.1 ad
150 1.1 ad #define ZX_ATTR_HSR_DISABLE 0x00000000
151 1.1 ad #define ZX_ATTR_HSR_ENABLE 0x00020000
152 1.1 ad
153 1.1 ad #define ZX_ATTR_WRITEZ_DISABLE 0x00000000
154 1.1 ad #define ZX_ATTR_WRITEZ_ENABLE 0x00010000
155 1.1 ad
156 1.1 ad #define ZX_ATTR_Z_VAR 0x00000000
157 1.1 ad #define ZX_ATTR_Z_CONST 0x00008000
158 1.1 ad
159 1.1 ad #define ZX_ATTR_WCLIP_DISABLE 0x00000000
160 1.1 ad #define ZX_ATTR_WCLIP_ENABLE 0x00004000
161 1.1 ad
162 1.1 ad #define ZX_ATTR_MONO 0x00000000
163 1.1 ad #define ZX_ATTR_STEREO_LEFT 0x00001000
164 1.1 ad #define ZX_ATTR_STEREO_RIGHT 0x00003000
165 1.1 ad
166 1.1 ad #define ZX_ATTR_WE_DISABLE 0x00000000
167 1.1 ad #define ZX_ATTR_WE_ENABLE 0x00000800
168 1.1 ad
169 1.1 ad #define ZX_ATTR_FCE_DISABLE 0x00000000
170 1.1 ad #define ZX_ATTR_FCE_ENABLE 0x00000400
171 1.1 ad
172 1.1 ad #define ZX_ATTR_RE_DISABLE 0x00000000
173 1.1 ad #define ZX_ATTR_RE_ENABLE 0x00000200
174 1.1 ad
175 1.1 ad #define ZX_ATTR_GE_DISABLE 0x00000000
176 1.1 ad #define ZX_ATTR_GE_ENABLE 0x00000100
177 1.1 ad
178 1.1 ad #define ZX_ATTR_BE_DISABLE 0x00000000
179 1.1 ad #define ZX_ATTR_BE_ENABLE 0x00000080
180 1.1 ad
181 1.1 ad #define ZX_ATTR_RGBE_DISABLE 0x00000000
182 1.1 ad #define ZX_ATTR_RGBE_ENABLE 0x00000380
183 1.1 ad
184 1.1 ad #define ZX_ATTR_OE_DISABLE 0x00000000
185 1.1 ad #define ZX_ATTR_OE_ENABLE 0x00000040
186 1.1 ad
187 1.1 ad #define ZX_ATTR_ZE_DISABLE 0x00000000
188 1.1 ad #define ZX_ATTR_ZE_ENABLE 0x00000020
189 1.1 ad
190 1.1 ad #define ZX_ATTR_FORCE_WID 0x00000010
191 1.1 ad
192 1.1 ad #define ZX_ATTR_FC_PLANE_MASK 0x0000000e
193 1.1 ad
194 1.1 ad #define ZX_ATTR_BUFFER_A 0x00000000
195 1.1 ad #define ZX_ATTR_BUFFER_B 0x00000001
196 1.1 ad
197 1.1 ad /* CSR */
198 1.1 ad #define ZX_CSR_BLT_BUSY 0x20000000
199 1.1 ad
200 1.6 tsutsui /* draw ss0 ss1 */
201 1.6 tsutsui #define zd_csr 0x0e00
202 1.6 tsutsui #define zd_wid 0x0e04
203 1.6 tsutsui #define zd_wmask 0x0e08
204 1.6 tsutsui #define zd_widclip 0x0e0c
205 1.6 tsutsui #define zd_vclipmin 0x0e10
206 1.6 tsutsui #define zd_vclipmax 0x0e14
207 1.6 tsutsui #define zd_pickmin 0x0e18 /* SS1 only */
208 1.6 tsutsui #define zd_pickmax 0x0e1c /* SS1 only */
209 1.6 tsutsui #define zd_fg 0x0e20
210 1.6 tsutsui #define zd_bg 0x0e24
211 1.6 tsutsui #define zd_src 0x0e28 /* Copy/Scroll (SS0 only) */
212 1.6 tsutsui #define zd_dst 0x0e2c /* Copy/Scroll/Fill (SS0 only) */
213 1.6 tsutsui #define zd_extent 0x0e30 /* Copy/Scroll/Fill size (SS0 only) */
214 1.6 tsutsui
215 1.6 tsutsui #define zd_setsem 0x0e40 /* SS1 only */
216 1.6 tsutsui #define zd_clrsem 0x0e44 /* SS1 only */
217 1.6 tsutsui #define zd_clrpick 0x0e48 /* SS1 only */
218 1.6 tsutsui #define zd_clrdat 0x0e4c /* SS1 only */
219 1.6 tsutsui #define zd_alpha 0x0e50 /* SS1 only */
220 1.6 tsutsui
221 1.6 tsutsui #define zd_winbg 0x0e80
222 1.6 tsutsui #define zd_planemask 0x0e84
223 1.6 tsutsui #define zd_rop 0x0e88
224 1.6 tsutsui #define zd_z 0x0e8c
225 1.6 tsutsui #define zd_dczf 0x0e90 /* SS1 only */
226 1.6 tsutsui #define zd_dczb 0x0e94 /* SS1 only */
227 1.6 tsutsui #define zd_dcs 0x0e98 /* SS1 only */
228 1.6 tsutsui #define zd_dczs 0x0e9c /* SS1 only */
229 1.6 tsutsui #define zd_pickfb 0x0ea0 /* SS1 only */
230 1.6 tsutsui #define zd_pickbb 0x0ea4 /* SS1 only */
231 1.6 tsutsui #define zd_dcfc 0x0ea8 /* SS1 only */
232 1.6 tsutsui #define zd_forcecol 0x0eac /* SS1 only */
233 1.6 tsutsui #define zd_door0 0x0eb0 /* SS1 only */
234 1.6 tsutsui #define zd_door1 0x0eb4 /* SS1 only */
235 1.6 tsutsui #define zd_door2 0x0eb8 /* SS1 only */
236 1.6 tsutsui #define zd_door3 0x0ebc /* SS1 only */
237 1.6 tsutsui #define zd_door4 0x0ec0 /* SS1 only */
238 1.6 tsutsui #define zd_door5 0x0ec4 /* SS1 only */
239 1.6 tsutsui #define zd_door6 0x0ec8 /* SS1 only */
240 1.6 tsutsui #define zd_door7 0x0ecc /* SS1 only */
241 1.6 tsutsui #define zd_pick0 0x0ed0 /* SS1 only */
242 1.6 tsutsui #define zd_pick1 0x0ed4 /* SS1 only */
243 1.6 tsutsui #define zd_pick2 0x0ed8 /* SS1 only */
244 1.6 tsutsui #define zd_pick3 0x0edc /* SS1 only */
245 1.6 tsutsui #define zd_pick4 0x0ee0 /* SS1 only */
246 1.6 tsutsui
247 1.6 tsutsui #define zd_misc 0x0ef4 /* SS1 only */
248 1.6 tsutsui
249 1.1 ad #define ZX_SS1_MISC_ENABLE 0x00000001
250 1.1 ad #define ZX_SS1_MISC_STEREO 0x00000002
251 1.1 ad
252 1.1 ad #define ZX_ADDRSPC_OBGR 0x00
253 1.1 ad #define ZX_ADDRSPC_Z 0x01
254 1.1 ad #define ZX_ADDRSPC_W 0x02
255 1.1 ad #define ZX_ADDRSPC_FONT_OBGR 0x04
256 1.1 ad #define ZX_ADDRSPC_FONT_Z 0x05
257 1.1 ad #define ZX_ADDRSPC_FONT_W 0x06
258 1.1 ad #define ZX_ADDRSPC_O 0x08
259 1.1 ad #define ZX_ADDRSPC_B 0x09
260 1.1 ad #define ZX_ADDRSPC_G 0x0a
261 1.1 ad #define ZX_ADDRSPC_R 0x0b
262 1.1 ad
263 1.6 tsutsui /* command */
264 1.6 tsutsui #define zc_csr 0x00
265 1.6 tsutsui #define zc_addrspace 0x04
266 1.6 tsutsui #define zc_fontmsk 0x08
267 1.6 tsutsui #define zc_fontt 0x0c
268 1.6 tsutsui #define zc_extent 0x10
269 1.6 tsutsui #define zc_src 0x14
270 1.6 tsutsui #define zc_dst 0x18
271 1.6 tsutsui #define zc_copy 0x1c
272 1.6 tsutsui #define zc_fill 0x20
273 1.1 ad
274 1.1 ad #define ZX_CROSS_TYPE_CLUT0 0x00001000
275 1.1 ad #define ZX_CROSS_TYPE_CLUT1 0x00001001
276 1.1 ad #define ZX_CROSS_TYPE_CLUT2 0x00001002
277 1.1 ad #define ZX_CROSS_TYPE_WID 0x00001003
278 1.1 ad #define ZX_CROSS_TYPE_UNK 0x00001006
279 1.1 ad #define ZX_CROSS_TYPE_VIDEO 0x00002003
280 1.1 ad #define ZX_CROSS_TYPE_CLUTDATA 0x00004000
281 1.1 ad
282 1.1 ad #define ZX_CROSS_CSR_ENABLE 0x00000008
283 1.1 ad #define ZX_CROSS_CSR_PROGRESS 0x00000004
284 1.1 ad #define ZX_CROSS_CSR_UNK 0x00000002
285 1.1 ad #define ZX_CROSS_CSR_UNK2 0x00000001
286 1.1 ad
287 1.6 tsutsui /* cross */
288 1.6 tsutsui #define zx_type 0x00
289 1.6 tsutsui #define zx_csr 0x04
290 1.6 tsutsui #define zx_value 0x08
291 1.6 tsutsui
292 1.6 tsutsui /* cursor */
293 1.6 tsutsui #define zcu_type 0x10
294 1.6 tsutsui #define zcu_misc 0x14
295 1.6 tsutsui #define zcu_sxy 0x18
296 1.6 tsutsui #define zcu_data 0x1c
297 1.1 ad
298 1.1 ad #endif /* !_DEV_SBUS_ZXREG_H_ */
299