zxreg.h revision 1.3.74.1
1 /* $NetBSD: zxreg.h,v 1.3.74.1 2008/05/16 02:25:02 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (C) 1999, 2000 Jakub Jelinek (jakub (at) redhat.com) 34 * 35 * Permission is hereby granted, free of charge, to any person obtaining a copy 36 * of this software and associated documentation files (the "Software"), to deal 37 * in the Software without restriction, including without limitation the rights 38 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 39 * copies of the Software, and to permit persons to whom the Software is 40 * furnished to do so, subject to the following conditions: 41 * 42 * The above copyright notice and this permission notice shall be included in 43 * all copies or substantial portions of the Software. 44 * 45 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 46 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 47 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 48 * JAKUB JELINEK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 49 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 50 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 51 * 52 */ 53 54 #ifndef _DEV_SBUS_ZXREG_H_ 55 #define _DEV_SBUS_ZXREG_H_ 56 57 /* Hardware offsets. */ 58 #define ZX_OFF_UNK2 0x00000000 59 #define ZX_OFF_LC_SS0_KRN 0x00200000 60 #define ZX_OFF_LC_SS0_USR 0x00201000 61 #define ZX_OFF_LD_SS0 0x00400000 62 #define ZX_OFF_LD_GBL 0x00401000 63 #define ZX_OFF_LX_CROSS 0x00600000 64 #define ZX_OFF_LX_CURSOR 0x00601000 65 #define ZX_OFF_UNK 0x00602000 66 #define ZX_OFF_SS0 0x00800000 67 #define ZX_OFF_LC_SS1_KRN 0x01200000 68 #define ZX_OFF_LC_SS1_USR 0x01201000 69 #define ZX_OFF_LD_SS1 0x01400000 70 #define ZX_OFF_SS1 0x01800000 71 72 /* ROP register */ 73 #define ZX_ATTR_PICK_DISABLE 0x00000000 74 #define ZX_ATTR_PICK_2D 0x80000000 75 #define ZX_ATTR_PICK_3D 0xa0000000 76 #define ZX_ATTR_PICK_2D_REND 0xc0000000 77 #define ZX_ATTR_PICK_3D_REND 0xe0000000 78 79 #define ZX_ATTR_DCE_DISABLE 0x00000000 80 #define ZX_ATTR_DCE_ENABLE 0x10000000 81 82 #define ZX_ATTR_APE_DISABLE 0x00000000 83 #define ZX_ATTR_APE_ENABLE 0x08000000 84 85 #define ZX_ATTR_COLOR_VAR 0x00000000 86 #define ZX_ATTR_COLOR_CONST 0x04000000 87 88 #define ZX_ATTR_AA_DISABLE 0x02000000 89 #define ZX_ATTR_AA_ENABLE 0x01000000 90 91 #define ZX_ATTR_ABE_BG 0x00000000 /* dst + alpha * (src - bg) */ 92 #define ZX_ATTR_ABE_FB 0x00800000 /* dst + alpha * (src - dst) */ 93 94 #define ZX_ATTR_ABE_DISABLE 0x00000000 95 #define ZX_ATTR_ABE_ENABLE 0x00400000 96 97 #define ZX_ATTR_BLTSRC_A 0x00000000 98 #define ZX_ATTR_BLTSRC_B 0x00200000 99 100 #define ZX_ROP_ZERO (0x0 << 18) 101 #define ZX_ROP_NEW_AND_OLD (0x8 << 18) 102 #define ZX_ROP_NEW_AND_NOLD (0x4 << 18) 103 #define ZX_ROP_NEW (0xc << 18) 104 #define ZX_ROP_NNEW_AND_OLD (0x2 << 18) 105 #define ZX_ROP_OLD (0xa << 18) 106 #define ZX_ROP_NEW_XOR_OLD (0x6 << 18) 107 #define ZX_ROP_NEW_OR_OLD (0xe << 18) 108 #define ZX_ROP_NNEW_AND_NOLD (0x1 << 18) 109 #define ZX_ROP_NNEW_XOR_NOLD (0x9 << 18) 110 #define ZX_ROP_NOLD (0x5 << 18) 111 #define ZX_ROP_NEW_OR_NOLD (0xd << 18) 112 #define ZX_ROP_NNEW (0x3 << 18) 113 #define ZX_ROP_NNEW_OR_OLD (0xb << 18) 114 #define ZX_ROP_NNEW_OR_NOLD (0x7 << 18) 115 #define ZX_ROP_ONES (0xf << 18) 116 117 #define ZX_ATTR_HSR_DISABLE 0x00000000 118 #define ZX_ATTR_HSR_ENABLE 0x00020000 119 120 #define ZX_ATTR_WRITEZ_DISABLE 0x00000000 121 #define ZX_ATTR_WRITEZ_ENABLE 0x00010000 122 123 #define ZX_ATTR_Z_VAR 0x00000000 124 #define ZX_ATTR_Z_CONST 0x00008000 125 126 #define ZX_ATTR_WCLIP_DISABLE 0x00000000 127 #define ZX_ATTR_WCLIP_ENABLE 0x00004000 128 129 #define ZX_ATTR_MONO 0x00000000 130 #define ZX_ATTR_STEREO_LEFT 0x00001000 131 #define ZX_ATTR_STEREO_RIGHT 0x00003000 132 133 #define ZX_ATTR_WE_DISABLE 0x00000000 134 #define ZX_ATTR_WE_ENABLE 0x00000800 135 136 #define ZX_ATTR_FCE_DISABLE 0x00000000 137 #define ZX_ATTR_FCE_ENABLE 0x00000400 138 139 #define ZX_ATTR_RE_DISABLE 0x00000000 140 #define ZX_ATTR_RE_ENABLE 0x00000200 141 142 #define ZX_ATTR_GE_DISABLE 0x00000000 143 #define ZX_ATTR_GE_ENABLE 0x00000100 144 145 #define ZX_ATTR_BE_DISABLE 0x00000000 146 #define ZX_ATTR_BE_ENABLE 0x00000080 147 148 #define ZX_ATTR_RGBE_DISABLE 0x00000000 149 #define ZX_ATTR_RGBE_ENABLE 0x00000380 150 151 #define ZX_ATTR_OE_DISABLE 0x00000000 152 #define ZX_ATTR_OE_ENABLE 0x00000040 153 154 #define ZX_ATTR_ZE_DISABLE 0x00000000 155 #define ZX_ATTR_ZE_ENABLE 0x00000020 156 157 #define ZX_ATTR_FORCE_WID 0x00000010 158 159 #define ZX_ATTR_FC_PLANE_MASK 0x0000000e 160 161 #define ZX_ATTR_BUFFER_A 0x00000000 162 #define ZX_ATTR_BUFFER_B 0x00000001 163 164 /* CSR */ 165 #define ZX_CSR_BLT_BUSY 0x20000000 166 167 struct zx_draw { 168 u_int32_t zd_pad0[896]; 169 u_int32_t zd_csr; 170 u_int32_t zd_wid; 171 u_int32_t zd_wmask; 172 u_int32_t zd_widclip; 173 u_int32_t zd_vclipmin; 174 u_int32_t zd_vclipmax; 175 u_int32_t zd_pickmin; /* SS1 only */ 176 u_int32_t zd_pickmax; /* SS1 only */ 177 u_int32_t zd_fg; 178 u_int32_t zd_bg; 179 u_int32_t zd_src; /* Copy/Scroll (SS0 only) */ 180 u_int32_t zd_dst; /* Copy/Scroll/Fill (SS0 only) */ 181 u_int32_t zd_extent; /* Copy/Scroll/Fill size (SS0 only) */ 182 u_int32_t zd_pad1[3]; 183 u_int32_t zd_setsem; /* SS1 only */ 184 u_int32_t zd_clrsem; /* SS1 only */ 185 u_int32_t zd_clrpick; /* SS1 only */ 186 u_int32_t zd_clrdat; /* SS1 only */ 187 u_int32_t zd_alpha; /* SS1 only */ 188 u_int32_t zd_pad2[11]; 189 u_int32_t zd_winbg; 190 u_int32_t zd_planemask; 191 u_int32_t zd_rop; 192 u_int32_t zd_z; 193 u_int32_t zd_dczf; /* SS1 only */ 194 u_int32_t zd_dczb; /* SS1 only */ 195 u_int32_t zd_dcs; /* SS1 only */ 196 u_int32_t zd_dczs; /* SS1 only */ 197 u_int32_t zd_pickfb; /* SS1 only */ 198 u_int32_t zd_pickbb; /* SS1 only */ 199 u_int32_t zd_dcfc; /* SS1 only */ 200 u_int32_t zd_forcecol; /* SS1 only */ 201 u_int32_t zd_door[8]; /* SS1 only */ 202 u_int32_t zd_pick[5]; /* SS1 only */ 203 } __attribute__ ((__packed__)); 204 205 struct zx_draw_ss1 { 206 u_int32_t zd_pad0[957]; 207 u_int32_t zd_misc; 208 } __attribute__ ((__packed__)); 209 #define ZX_SS1_MISC_ENABLE 0x00000001 210 #define ZX_SS1_MISC_STEREO 0x00000002 211 212 #define ZX_ADDRSPC_OBGR 0x00 213 #define ZX_ADDRSPC_Z 0x01 214 #define ZX_ADDRSPC_W 0x02 215 #define ZX_ADDRSPC_FONT_OBGR 0x04 216 #define ZX_ADDRSPC_FONT_Z 0x05 217 #define ZX_ADDRSPC_FONT_W 0x06 218 #define ZX_ADDRSPC_O 0x08 219 #define ZX_ADDRSPC_B 0x09 220 #define ZX_ADDRSPC_G 0x0a 221 #define ZX_ADDRSPC_R 0x0b 222 223 struct zx_command { 224 u_int32_t zc_csr; 225 u_int32_t zc_addrspace; 226 u_int32_t zc_fontmsk; 227 u_int32_t zc_fontt; 228 u_int32_t zc_extent; 229 u_int32_t zc_src; 230 u_int32_t zc_dst; 231 u_int32_t zc_copy; 232 u_int32_t zc_fill; 233 } __attribute__ ((__packed__)); 234 235 #define ZX_CROSS_TYPE_CLUT0 0x00001000 236 #define ZX_CROSS_TYPE_CLUT1 0x00001001 237 #define ZX_CROSS_TYPE_CLUT2 0x00001002 238 #define ZX_CROSS_TYPE_WID 0x00001003 239 #define ZX_CROSS_TYPE_UNK 0x00001006 240 #define ZX_CROSS_TYPE_VIDEO 0x00002003 241 #define ZX_CROSS_TYPE_CLUTDATA 0x00004000 242 243 #define ZX_CROSS_CSR_ENABLE 0x00000008 244 #define ZX_CROSS_CSR_PROGRESS 0x00000004 245 #define ZX_CROSS_CSR_UNK 0x00000002 246 #define ZX_CROSS_CSR_UNK2 0x00000001 247 248 struct zx_cross { 249 u_int32_t zx_type; 250 u_int32_t zx_csr; 251 u_int32_t zx_value; 252 } __attribute__ ((__packed__)); 253 254 struct zx_cursor { 255 u_int32_t zcu_pad0[4]; 256 u_int32_t zcu_type; 257 u_int32_t zcu_misc; 258 u_int32_t zcu_sxy; 259 u_int32_t zcu_data; 260 } __attribute__ ((__packed__)); 261 262 #endif /* !_DEV_SBUS_ZXREG_H_ */ 263
Indexes created Sun Oct 26 20:09:54 GMT 2025