atapiconf.h revision 1.5
1 /* $NetBSD: atapiconf.h,v 1.5 1998/02/13 04:19:16 enami Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_SCSIPI_ATAPICONF_H_ 33 #define _DEV_SCSIPI_ATAPICONF_H_ 34 35 #include <dev/scsipi/scsipiconf.h> 36 37 struct atapi_identify { 38 struct config_s { 39 u_int8_t cmd_drq_rem; 40 #define ATAPI_PACKET_SIZE_MASK 0x03 41 #define ATAPI_PACKET_SIZE_12 0x00 42 #define ATAPI_PACKET_SIZE_16 0x01 43 44 #define ATAPI_DRQ_MASK 0x60 45 #define ATAPI_MICROPROCESSOR_DRQ 0x00 46 #define ATAPI_INTERRUPT_DRQ 0x20 47 #define ATAPI_ACCELERATED_DRQ 0x40 48 49 #define ATAPI_REMOVABLE 0x80 50 51 u_int8_t device_type; 52 #define ATAPI_DEVICE_TYPE_MASK 0x1f 53 #define ATAPI_DEVICE_TYPE_DAD 0x00 /* direct access device */ 54 /* 0x1-0x4 reserved */ 55 #define ATAPI_DEVICE_TYPE_CD 0x05 /* CD-ROM */ 56 /* 0x6 reserved */ 57 #define ATAPI_DEVICE_TYPE_OMD 0x07 /* optical memory device */ 58 /* 0x8-0x1e reserved */ 59 #define ATAPI_DEVICE_TYPE_UNKNOWN 0x1f 60 61 #define ATAPI_GC_PROTOCOL_MASK 0xc0 /* mask of protocol bits */ 62 /* 0x00 and 0x01 are ATA */ 63 #define ATAPI_GC_PROTO_TYPE_ATAPI 0x80 64 #define ATAPI_GC_PROTO_TYPE_RESERVED 0xc0 65 } config; /* general configuration */ 66 67 u_int8_t cylinders[2]; 68 u_int8_t reserved1[2]; 69 u_int8_t heads[2]; 70 u_int8_t unf_bytes_per_track[2]; 71 u_int8_t unf_bytes_per_sector[2]; 72 u_int8_t sectors_per_track[2]; 73 u_int8_t reserved2[6]; 74 char serial_number[20]; 75 u_int8_t buffer_type[2]; 76 u_int8_t buffer_size[2]; 77 u_int8_t ECC_bytes_available[2]; 78 char firmware_revision[8]; 79 char model[40]; 80 u_int8_t sector_count[2]; 81 u_int8_t double_word[2]; /* == 0 for CD-ROMs */ 82 83 struct capabilities_s { 84 u_int8_t vendor; 85 u_int8_t capflags; 86 #define ATAPI_CAP_DMA 0x01 /* DMA supported */ 87 #define ATAPI_CAP_LBA 0x02 /* LBA supported */ 88 #define ATAPI_IORDY_DISABLE 0x04 /* IORDY can be disabled */ 89 #define ATAPI_IORDY 0x08 /* IORDY supported */ 90 } capabilities; 91 92 u_int8_t reserved3[2]; 93 u_int8_t PIO_cycle_timing[2]; 94 u_int8_t DMA_cycle_timing[2]; 95 u_int8_t validity[2]; /* of words 54-58, 64-70 in this table */ 96 97 #define ATAPI_VALID_FIRST 0x0 /* == 1 => words 54-58 are valid */ 98 #define ATAPI_VALID_SECOND 0x1 /* == 1 => words 64-70 are valid */ 99 100 u_int8_t current_chs[6]; /* cylinder/head/sector */ 101 u_int8_t current_capacity[4]; 102 u_int8_t reserved4[2]; 103 u_int8_t user_addressable_sectors[4]; 104 u_int8_t singleword_DMA_mode[2]; 105 106 #define ATAPI_SW_DMA_MODE_AVAIL 0x00ff /* Mode 0 is supported */ 107 #define ATAPI_SW_DMA_MODE_ACTIVE 0xff00 /* which mode is active */ 108 109 u_int8_t multiword_DMA_mode[2]; 110 111 #define ATAPI_MW_DMA_MODE_AVAIL 0x00ff /* Mode 0 is supported */ 112 #define ATAPI_MW_DMA_MODE_ACTIVE 0xff00 /* which mode is active */ 113 114 u_int8_t enhanced_PIO_mode[2]; 115 116 #define ATAPI_ENHANCED_PIO_AVAIL 0x0001 /* PIO Mode 3 is supported */ 117 118 u_int8_t blind_PIO_minimum_cycles[2]; 119 u_int8_t mw_dma_tct[2]; /* multi-word DMA transfer cycle time */ 120 u_int8_t min_PIO_tct_no_flow_control[2]; 121 u_int8_t min_PIO_tct_with_flow_control[2]; 122 u_int8_t reserved5[4]; 123 u_int8_t reserved6[114]; 124 u_int8_t vendor[64]; /* vendor unique */ 125 u_int8_t reserved7[192]; 126 }; 127 128 struct atapibus_attach_args { 129 struct scsipi_link *sa_sc_link; 130 struct atapi_identify *sa_inqbuf; 131 }; 132 133 int wdc_atapi_get_params __P((struct scsipi_link *, u_int8_t, 134 struct atapi_identify *)); 135 void atapi_print_addr __P((struct scsipi_link *)); 136 int atapi_interpret_sense __P((struct scsipi_xfer *)); 137 int atapi_scsipi_cmd __P((struct scsipi_link *, struct scsipi_generic *, 138 int, u_char *, int, int, int, struct buf *, int)); 139 int atapi_mode_select __P((struct scsipi_link *, 140 struct atapi_mode_header *, int, int, int, int)); 141 int atapi_mode_sense __P((struct scsipi_link *, int, 142 struct atapi_mode_header *, int, int, int, int)); 143 144 #endif /* _DEV_SCSIPI_ATAPICONF_H_ */ 145
Indexes created Wed Oct 01 15:09:59 GMT 2025