sdmmc_io.c revision 1.2.2.1
1 /* $NetBSD: sdmmc_io.c,v 1.2.2.1 2010/10/22 07:22:15 uebayasi Exp $ */ 2 /* $OpenBSD: sdmmc_io.c,v 1.10 2007/09/17 01:33:33 krw Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* Routines for SD I/O cards. */ 21 22 #include <sys/cdefs.h> 23 __KERNEL_RCSID(0, "$NetBSD: sdmmc_io.c,v 1.2.2.1 2010/10/22 07:22:15 uebayasi Exp $"); 24 25 #include <sys/param.h> 26 #include <sys/kernel.h> 27 #include <sys/malloc.h> 28 #include <sys/proc.h> 29 #include <sys/systm.h> 30 31 #include <dev/sdmmc/sdmmc_ioreg.h> 32 #include <dev/sdmmc/sdmmcchip.h> 33 #include <dev/sdmmc/sdmmcreg.h> 34 #include <dev/sdmmc/sdmmcvar.h> 35 36 #ifdef SDMMC_DEBUG 37 #define DPRINTF(s) do { printf s; } while (0) 38 #else 39 #define DPRINTF(s) do {} while (0) 40 #endif 41 42 struct sdmmc_intr_handler { 43 struct sdmmc_softc *ih_softc; 44 char *ih_name; 45 int (*ih_fun)(void *); 46 void *ih_arg; 47 TAILQ_ENTRY(sdmmc_intr_handler) entry; 48 }; 49 50 static int sdmmc_io_rw_direct(struct sdmmc_softc *, 51 struct sdmmc_function *, int, u_char *, int); 52 static int sdmmc_io_rw_extended(struct sdmmc_softc *, 53 struct sdmmc_function *, int, u_char *, int, int); 54 #if 0 55 static int sdmmc_io_xchg(struct sdmmc_softc *, struct sdmmc_function *, 56 int, u_char *); 57 #endif 58 static void sdmmc_io_reset(struct sdmmc_softc *); 59 static int sdmmc_io_send_op_cond(struct sdmmc_softc *, uint32_t, 60 uint32_t *); 61 62 /* 63 * Initialize SD I/O card functions (before memory cards). The host 64 * system and controller must support card interrupts in order to use 65 * I/O functions. 66 */ 67 int 68 sdmmc_io_enable(struct sdmmc_softc *sc) 69 { 70 uint32_t host_ocr; 71 uint32_t card_ocr; 72 int error; 73 74 SDMMC_LOCK(sc); 75 76 /* Set host mode to SD "combo" card. */ 77 SET(sc->sc_flags, SMF_SD_MODE|SMF_IO_MODE|SMF_MEM_MODE); 78 79 /* Reset I/O functions. */ 80 sdmmc_io_reset(sc); 81 82 /* 83 * Read the I/O OCR value, determine the number of I/O 84 * functions and whether memory is also present (a "combo 85 * card") by issuing CMD5. SD memory-only and MMC cards 86 * do not respond to CMD5. 87 */ 88 error = sdmmc_io_send_op_cond(sc, 0, &card_ocr); 89 if (error) { 90 /* No SDIO card; switch to SD memory-only mode. */ 91 CLR(sc->sc_flags, SMF_IO_MODE); 92 error = 0; 93 goto out; 94 } 95 96 /* Parse the additional bits in the I/O OCR value. */ 97 if (!ISSET(card_ocr, SD_IO_OCR_MEM_PRESENT)) { 98 /* SDIO card without memory (not a "combo card"). */ 99 DPRINTF(("%s: no memory present\n", SDMMCDEVNAME(sc))); 100 CLR(sc->sc_flags, SMF_MEM_MODE); 101 } 102 sc->sc_function_count = SD_IO_OCR_NUM_FUNCTIONS(card_ocr); 103 if (sc->sc_function_count == 0) { 104 /* Useless SDIO card without any I/O functions. */ 105 DPRINTF(("%s: no I/O functions\n", SDMMCDEVNAME(sc))); 106 CLR(sc->sc_flags, SMF_IO_MODE); 107 error = 0; 108 goto out; 109 } 110 card_ocr &= SD_IO_OCR_MASK; 111 112 /* Set the lowest voltage supported by the card and host. */ 113 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 114 error = sdmmc_set_bus_power(sc, host_ocr, card_ocr); 115 if (error) { 116 aprint_error_dev(sc->sc_dev, 117 "couldn't supply voltage requested by card\n"); 118 goto out; 119 } 120 121 /* Reset I/O functions (again). */ 122 sdmmc_io_reset(sc); 123 124 /* Send the new OCR value until all cards are ready. */ 125 error = sdmmc_io_send_op_cond(sc, host_ocr, NULL); 126 if (error) { 127 aprint_error_dev(sc->sc_dev, "couldn't send I/O OCR\n"); 128 goto out; 129 } 130 131 out: 132 SDMMC_UNLOCK(sc); 133 134 return error; 135 } 136 137 /* 138 * Allocate sdmmc_function structures for SD card I/O function 139 * (including function 0). 140 */ 141 void 142 sdmmc_io_scan(struct sdmmc_softc *sc) 143 { 144 struct sdmmc_function *sf0, *sf; 145 int error; 146 int i; 147 148 SDMMC_LOCK(sc); 149 150 sf0 = sdmmc_function_alloc(sc); 151 sf0->number = 0; 152 error = sdmmc_set_relative_addr(sc, sf0); 153 if (error) { 154 aprint_error_dev(sc->sc_dev, "couldn't set I/O RCA\n"); 155 SET(sf0->flags, SFF_ERROR); 156 goto out; 157 } 158 sc->sc_fn0 = sf0; 159 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf0, sf_list); 160 161 /* Go to Data Transfer Mode, if possible. */ 162 sdmmc_chip_bus_rod(sc->sc_sct, sc->sc_sch, 0); 163 164 /* Verify that the RCA has been set by selecting the card. */ 165 error = sdmmc_select_card(sc, sf0); 166 if (error) { 167 aprint_error_dev(sc->sc_dev, "couldn't select I/O RCA %d\n", 168 sf0->rca); 169 SET(sf0->flags, SFF_ERROR); 170 goto out; 171 } 172 173 for (i = 1; i <= sc->sc_function_count; i++) { 174 sf = sdmmc_function_alloc(sc); 175 sf->number = i; 176 sf->rca = sf0->rca; 177 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 178 } 179 180 out: 181 SDMMC_UNLOCK(sc); 182 } 183 184 /* 185 * Initialize SDIO card functions. 186 */ 187 int 188 sdmmc_io_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 189 { 190 struct sdmmc_function *sf0 = sc->sc_fn0; 191 int error = 0; 192 uint8_t reg; 193 194 SDMMC_LOCK(sc); 195 196 if (sf->number == 0) { 197 sf->width = 1; 198 reg = sdmmc_io_read_1(sf, SD_IO_CCCR_CAPABILITY); 199 if (!(reg & CCCR_CAPS_LSC) || (reg & CCCR_CAPS_4BLS)) { 200 sdmmc_io_write_1(sf, SD_IO_CCCR_BUS_WIDTH, 201 CCCR_BUS_WIDTH_4); 202 sf->width = 4; 203 } 204 205 error = sdmmc_read_cis(sf, &sf->cis); 206 if (error) { 207 aprint_error_dev(sc->sc_dev, "couldn't read CIS\n"); 208 SET(sf->flags, SFF_ERROR); 209 goto out; 210 } 211 212 sdmmc_check_cis_quirks(sf); 213 214 #ifdef SDMMC_DEBUG 215 if (sdmmcdebug) 216 sdmmc_print_cis(sf); 217 #endif 218 219 reg = sdmmc_io_read_1(sf, SD_IO_CCCR_HIGH_SPEED); 220 if (reg & CCCR_HIGH_SPEED_SHS) { 221 reg |= CCCR_HIGH_SPEED_EHS; 222 sdmmc_io_write_1(sf, SD_IO_CCCR_HIGH_SPEED, reg); 223 sf->csd.tran_speed = 50000; /* 50MHz */ 224 225 /* Wait 400KHz x 8 clock */ 226 delay(1); 227 } 228 if (sc->sc_busclk > sf->csd.tran_speed) 229 sc->sc_busclk = sf->csd.tran_speed; 230 error = 231 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 232 if (error) 233 aprint_error_dev(sc->sc_dev, 234 "can't change bus clock\n"); 235 } else { 236 reg = sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x000); 237 sf->interface = FBR_STD_FUNC_IF_CODE(reg); 238 if (sf->interface == 0x0f) 239 sf->interface = 240 sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x001); 241 error = sdmmc_read_cis(sf, &sf->cis); 242 if (error) { 243 aprint_error_dev(sc->sc_dev, "couldn't read CIS\n"); 244 SET(sf->flags, SFF_ERROR); 245 goto out; 246 } 247 248 sdmmc_check_cis_quirks(sf); 249 250 #ifdef SDMMC_DEBUG 251 if (sdmmcdebug) 252 sdmmc_print_cis(sf); 253 #endif 254 } 255 256 out: 257 SDMMC_UNLOCK(sc); 258 259 return error; 260 } 261 262 /* 263 * Indicate whether the function is ready to operate. 264 */ 265 static int 266 sdmmc_io_function_ready(struct sdmmc_function *sf) 267 { 268 struct sdmmc_softc *sc = sf->sc; 269 struct sdmmc_function *sf0 = sc->sc_fn0; 270 uint8_t reg; 271 272 if (sf->number == 0) 273 return 1; /* FN0 is always ready */ 274 275 SDMMC_LOCK(sc); 276 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_IOREADY); 277 SDMMC_UNLOCK(sc); 278 return (reg & (1 << sf->number)) != 0; 279 } 280 281 int 282 sdmmc_io_function_enable(struct sdmmc_function *sf) 283 { 284 struct sdmmc_softc *sc = sf->sc; 285 struct sdmmc_function *sf0 = sc->sc_fn0; 286 uint8_t reg; 287 int retry; 288 289 if (sf->number == 0) 290 return 0; /* FN0 is always enabled */ 291 292 SDMMC_LOCK(sc); 293 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE); 294 SET(reg, (1U << sf->number)); 295 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg); 296 SDMMC_UNLOCK(sc); 297 298 retry = 5; 299 while (!sdmmc_io_function_ready(sf) && retry-- > 0) 300 kpause("pause", false, hz, NULL); 301 return (retry >= 0) ? 0 : ETIMEDOUT; 302 } 303 304 /* 305 * Disable the I/O function. Return zero if the function was 306 * disabled successfully. 307 */ 308 void 309 sdmmc_io_function_disable(struct sdmmc_function *sf) 310 { 311 struct sdmmc_softc *sc = sf->sc; 312 struct sdmmc_function *sf0 = sc->sc_fn0; 313 uint8_t reg; 314 315 if (sf->number == 0) 316 return; /* FN0 is always enabled */ 317 318 SDMMC_LOCK(sc); 319 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE); 320 CLR(reg, (1U << sf->number)); 321 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg); 322 SDMMC_UNLOCK(sc); 323 } 324 325 static int 326 sdmmc_io_rw_direct(struct sdmmc_softc *sc, struct sdmmc_function *sf, 327 int reg, u_char *datap, int arg) 328 { 329 struct sdmmc_command cmd; 330 int error; 331 332 /* Don't lock */ 333 334 /* Make sure the card is selected. */ 335 error = sdmmc_select_card(sc, sf); 336 if (error) 337 return error; 338 339 arg |= ((sf == NULL ? 0 : sf->number) & SD_ARG_CMD52_FUNC_MASK) << 340 SD_ARG_CMD52_FUNC_SHIFT; 341 arg |= (reg & SD_ARG_CMD52_REG_MASK) << 342 SD_ARG_CMD52_REG_SHIFT; 343 arg |= (*datap & SD_ARG_CMD52_DATA_MASK) << 344 SD_ARG_CMD52_DATA_SHIFT; 345 346 memset(&cmd, 0, sizeof cmd); 347 cmd.c_opcode = SD_IO_RW_DIRECT; 348 cmd.c_arg = arg; 349 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R5; 350 351 error = sdmmc_mmc_command(sc, &cmd); 352 *datap = SD_R5_DATA(cmd.c_resp); 353 354 return error; 355 } 356 357 /* 358 * Useful values of `arg' to pass in are either SD_ARG_CMD53_READ or 359 * SD_ARG_CMD53_WRITE. SD_ARG_CMD53_INCREMENT may be ORed into `arg' 360 * to access successive register locations instead of accessing the 361 * same register many times. 362 */ 363 static int 364 sdmmc_io_rw_extended(struct sdmmc_softc *sc, struct sdmmc_function *sf, 365 int reg, u_char *datap, int datalen, int arg) 366 { 367 struct sdmmc_command cmd; 368 int error; 369 370 /* Don't lock */ 371 372 #if 0 373 /* Make sure the card is selected. */ 374 error = sdmmc_select_card(sc, sf); 375 if (error) 376 return error; 377 #endif 378 379 arg |= (((sf == NULL) ? 0 : sf->number) & SD_ARG_CMD53_FUNC_MASK) << 380 SD_ARG_CMD53_FUNC_SHIFT; 381 arg |= (reg & SD_ARG_CMD53_REG_MASK) << 382 SD_ARG_CMD53_REG_SHIFT; 383 arg |= (datalen & SD_ARG_CMD53_LENGTH_MASK) << 384 SD_ARG_CMD53_LENGTH_SHIFT; 385 386 memset(&cmd, 0, sizeof cmd); 387 cmd.c_opcode = SD_IO_RW_EXTENDED; 388 cmd.c_arg = arg; 389 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R5; 390 cmd.c_data = datap; 391 cmd.c_datalen = datalen; 392 cmd.c_blklen = MIN(datalen, 393 sdmmc_chip_host_maxblklen(sc->sc_sct,sc->sc_sch)); 394 if (!ISSET(arg, SD_ARG_CMD53_WRITE)) 395 cmd.c_flags |= SCF_CMD_READ; 396 397 error = sdmmc_mmc_command(sc, &cmd); 398 399 return error; 400 } 401 402 uint8_t 403 sdmmc_io_read_1(struct sdmmc_function *sf, int reg) 404 { 405 uint8_t data = 0; 406 407 /* Don't lock */ 408 409 (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data, 410 SD_ARG_CMD52_READ); 411 return data; 412 } 413 414 void 415 sdmmc_io_write_1(struct sdmmc_function *sf, int reg, uint8_t data) 416 { 417 418 /* Don't lock */ 419 420 (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data, 421 SD_ARG_CMD52_WRITE); 422 } 423 424 uint16_t 425 sdmmc_io_read_2(struct sdmmc_function *sf, int reg) 426 { 427 uint16_t data = 0; 428 429 /* Don't lock */ 430 431 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2, 432 SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 433 return data; 434 } 435 436 void 437 sdmmc_io_write_2(struct sdmmc_function *sf, int reg, uint16_t data) 438 { 439 440 /* Don't lock */ 441 442 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2, 443 SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 444 } 445 446 uint32_t 447 sdmmc_io_read_4(struct sdmmc_function *sf, int reg) 448 { 449 uint32_t data = 0; 450 451 /* Don't lock */ 452 453 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4, 454 SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 455 return data; 456 } 457 458 void 459 sdmmc_io_write_4(struct sdmmc_function *sf, int reg, uint32_t data) 460 { 461 462 /* Don't lock */ 463 464 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4, 465 SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 466 } 467 468 469 int 470 sdmmc_io_read_multi_1(struct sdmmc_function *sf, int reg, u_char *data, 471 int datalen) 472 { 473 int error; 474 475 /* Don't lock */ 476 477 while (datalen > SD_ARG_CMD53_LENGTH_MAX) { 478 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 479 SD_ARG_CMD53_LENGTH_MAX, SD_ARG_CMD53_READ); 480 if (error) 481 goto error; 482 data += SD_ARG_CMD53_LENGTH_MAX; 483 datalen -= SD_ARG_CMD53_LENGTH_MAX; 484 } 485 486 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 487 SD_ARG_CMD53_READ); 488 error: 489 return error; 490 } 491 492 int 493 sdmmc_io_write_multi_1(struct sdmmc_function *sf, int reg, u_char *data, 494 int datalen) 495 { 496 int error; 497 498 /* Don't lock */ 499 500 while (datalen > SD_ARG_CMD53_LENGTH_MAX) { 501 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 502 SD_ARG_CMD53_LENGTH_MAX, SD_ARG_CMD53_WRITE); 503 if (error) 504 goto error; 505 data += SD_ARG_CMD53_LENGTH_MAX; 506 datalen -= SD_ARG_CMD53_LENGTH_MAX; 507 } 508 509 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 510 SD_ARG_CMD53_WRITE); 511 error: 512 return error; 513 } 514 515 #if 0 516 static int 517 sdmmc_io_xchg(struct sdmmc_softc *sc, struct sdmmc_function *sf, 518 int reg, u_char *datap) 519 { 520 521 /* Don't lock */ 522 523 return sdmmc_io_rw_direct(sc, sf, reg, datap, 524 SD_ARG_CMD52_WRITE|SD_ARG_CMD52_EXCHANGE); 525 } 526 #endif 527 528 /* 529 * Reset the I/O functions of the card. 530 */ 531 static void 532 sdmmc_io_reset(struct sdmmc_softc *sc) 533 { 534 535 /* Don't lock */ 536 #if 0 /* XXX command fails */ 537 (void)sdmmc_io_write(sc, NULL, SD_IO_REG_CCCR_CTL, CCCR_CTL_RES); 538 sdmmc_delay(100000); 539 #endif 540 } 541 542 /* 543 * Get or set the card's I/O OCR value (SDIO). 544 */ 545 static int 546 sdmmc_io_send_op_cond(struct sdmmc_softc *sc, u_int32_t ocr, u_int32_t *ocrp) 547 { 548 struct sdmmc_command cmd; 549 int error; 550 int retry; 551 552 DPRINTF(("sdmmc_io_send_op_cond: ocr = %#x\n", ocr)); 553 554 /* Don't lock */ 555 556 /* 557 * If we change the OCR value, retry the command until the OCR 558 * we receive in response has the "CARD BUSY" bit set, meaning 559 * that all cards are ready for identification. 560 */ 561 for (retry = 0; retry < 100; retry++) { 562 memset(&cmd, 0, sizeof cmd); 563 cmd.c_opcode = SD_IO_SEND_OP_COND; 564 cmd.c_arg = ocr; 565 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R4; 566 567 error = sdmmc_mmc_command(sc, &cmd); 568 if (error) 569 break; 570 if (ISSET(MMC_R4(cmd.c_resp), SD_IO_OCR_MEM_READY) || ocr == 0) 571 break; 572 573 error = ETIMEDOUT; 574 sdmmc_delay(10000); 575 } 576 if (error == 0 && ocrp != NULL) 577 *ocrp = MMC_R4(cmd.c_resp); 578 579 DPRINTF(("sdmmc_io_send_op_cond: error = %d\n", error)); 580 581 return error; 582 } 583 584 /* 585 * Card interrupt handling 586 */ 587 588 void 589 sdmmc_intr_enable(struct sdmmc_function *sf) 590 { 591 struct sdmmc_softc *sc = sf->sc; 592 struct sdmmc_function *sf0 = sc->sc_fn0; 593 uint8_t reg; 594 595 SDMMC_LOCK(sc); 596 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN); 597 reg |= 1 << sf->number; 598 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg); 599 SDMMC_UNLOCK(sc); 600 } 601 602 void 603 sdmmc_intr_disable(struct sdmmc_function *sf) 604 { 605 struct sdmmc_softc *sc = sf->sc; 606 struct sdmmc_function *sf0 = sc->sc_fn0; 607 uint8_t reg; 608 609 SDMMC_LOCK(sc); 610 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN); 611 reg &= ~(1 << sf->number); 612 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg); 613 SDMMC_UNLOCK(sc); 614 } 615 616 /* 617 * Establish a handler for the SDIO card interrupt. Because the 618 * interrupt may be shared with different SDIO functions, multiple 619 * handlers can be established. 620 */ 621 void * 622 sdmmc_intr_establish(device_t dev, int (*fun)(void *), void *arg, 623 const char *name) 624 { 625 struct sdmmc_softc *sc = device_private(dev); 626 struct sdmmc_intr_handler *ih; 627 int s; 628 629 if (sc->sc_sct->card_enable_intr == NULL) 630 return NULL; 631 632 ih = malloc(sizeof *ih, M_DEVBUF, M_WAITOK|M_CANFAIL|M_ZERO); 633 if (ih == NULL) 634 return NULL; 635 636 ih->ih_name = malloc(strlen(name) + 1, M_DEVBUF, 637 M_WAITOK|M_CANFAIL|M_ZERO); 638 if (ih->ih_name == NULL) { 639 free(ih, M_DEVBUF); 640 return NULL; 641 } 642 strlcpy(ih->ih_name, name, strlen(name)); 643 ih->ih_softc = sc; 644 ih->ih_fun = fun; 645 ih->ih_arg = arg; 646 647 s = splhigh(); 648 if (TAILQ_EMPTY(&sc->sc_intrq)) { 649 sdmmc_intr_enable(sc->sc_fn0); 650 sdmmc_chip_card_enable_intr(sc->sc_sct, sc->sc_sch, 1); 651 } 652 TAILQ_INSERT_TAIL(&sc->sc_intrq, ih, entry); 653 splx(s); 654 655 return ih; 656 } 657 658 /* 659 * Disestablish the given handler. 660 */ 661 void 662 sdmmc_intr_disestablish(void *cookie) 663 { 664 struct sdmmc_intr_handler *ih = cookie; 665 struct sdmmc_softc *sc = ih->ih_softc; 666 int s; 667 668 if (sc->sc_sct->card_enable_intr == NULL) 669 return; 670 671 s = splhigh(); 672 TAILQ_REMOVE(&sc->sc_intrq, ih, entry); 673 if (TAILQ_EMPTY(&sc->sc_intrq)) { 674 sdmmc_chip_card_enable_intr(sc->sc_sct, sc->sc_sch, 0); 675 sdmmc_intr_disable(sc->sc_fn0); 676 } 677 splx(s); 678 679 free(ih->ih_name, M_DEVBUF); 680 free(ih, M_DEVBUF); 681 } 682 683 /* 684 * Call established SDIO card interrupt handlers. The host controller 685 * must call this function from its own interrupt handler to handle an 686 * SDIO interrupt from the card. 687 */ 688 void 689 sdmmc_card_intr(device_t dev) 690 { 691 struct sdmmc_softc *sc = device_private(dev); 692 693 if (sc->sc_sct->card_enable_intr) { 694 mutex_enter(&sc->sc_intr_task_mtx); 695 if (!sdmmc_task_pending(&sc->sc_intr_task)) 696 sdmmc_add_task(sc, &sc->sc_intr_task); 697 mutex_exit(&sc->sc_intr_task_mtx); 698 } 699 } 700 701 void 702 sdmmc_intr_task(void *arg) 703 { 704 struct sdmmc_softc *sc = (struct sdmmc_softc *)arg; 705 struct sdmmc_intr_handler *ih; 706 int s; 707 708 s = splsdmmc(); 709 TAILQ_FOREACH(ih, &sc->sc_intrq, entry) { 710 splx(s); 711 /* XXX examine return value and do evcount stuff*/ 712 (void)(*ih->ih_fun)(ih->ih_arg); 713 s = splsdmmc(); 714 } 715 sdmmc_chip_card_intr_ack(sc->sc_sct, sc->sc_sch); 716 splx(s); 717 } 718
Indexes created Fri Oct 03 02:09:57 GMT 2025