sdmmc_io.c revision 1.5.4.1
1 /* $NetBSD: sdmmc_io.c,v 1.5.4.1 2011/02/17 12:00:15 bouyer Exp $ */ 2 /* $OpenBSD: sdmmc_io.c,v 1.10 2007/09/17 01:33:33 krw Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* Routines for SD I/O cards. */ 21 22 #include <sys/cdefs.h> 23 __KERNEL_RCSID(0, "$NetBSD: sdmmc_io.c,v 1.5.4.1 2011/02/17 12:00:15 bouyer Exp $"); 24 25 #include <sys/param.h> 26 #include <sys/kernel.h> 27 #include <sys/malloc.h> 28 #include <sys/proc.h> 29 #include <sys/systm.h> 30 31 #include <dev/sdmmc/sdmmc_ioreg.h> 32 #include <dev/sdmmc/sdmmcchip.h> 33 #include <dev/sdmmc/sdmmcreg.h> 34 #include <dev/sdmmc/sdmmcvar.h> 35 36 #ifdef SDMMC_DEBUG 37 #define DPRINTF(s) do { printf s; } while (0) 38 #else 39 #define DPRINTF(s) do {} while (0) 40 #endif 41 42 struct sdmmc_intr_handler { 43 struct sdmmc_softc *ih_softc; 44 char *ih_name; 45 int (*ih_fun)(void *); 46 void *ih_arg; 47 TAILQ_ENTRY(sdmmc_intr_handler) entry; 48 }; 49 50 static int sdmmc_io_rw_direct(struct sdmmc_softc *, 51 struct sdmmc_function *, int, u_char *, int); 52 static int sdmmc_io_rw_extended(struct sdmmc_softc *, 53 struct sdmmc_function *, int, u_char *, int, int); 54 #if 0 55 static int sdmmc_io_xchg(struct sdmmc_softc *, struct sdmmc_function *, 56 int, u_char *); 57 #endif 58 static void sdmmc_io_reset(struct sdmmc_softc *); 59 static int sdmmc_io_send_op_cond(struct sdmmc_softc *, uint32_t, 60 uint32_t *); 61 62 /* 63 * Initialize SD I/O card functions (before memory cards). The host 64 * system and controller must support card interrupts in order to use 65 * I/O functions. 66 */ 67 int 68 sdmmc_io_enable(struct sdmmc_softc *sc) 69 { 70 uint32_t host_ocr; 71 uint32_t card_ocr; 72 int error; 73 74 SDMMC_LOCK(sc); 75 76 /* Set host mode to SD "combo" card. */ 77 SET(sc->sc_flags, SMF_SD_MODE|SMF_IO_MODE|SMF_MEM_MODE); 78 79 /* Reset I/O functions. */ 80 sdmmc_io_reset(sc); 81 82 /* 83 * Read the I/O OCR value, determine the number of I/O 84 * functions and whether memory is also present (a "combo 85 * card") by issuing CMD5. SD memory-only and MMC cards 86 * do not respond to CMD5. 87 */ 88 error = sdmmc_io_send_op_cond(sc, 0, &card_ocr); 89 if (error) { 90 /* No SDIO card; switch to SD memory-only mode. */ 91 CLR(sc->sc_flags, SMF_IO_MODE); 92 error = 0; 93 goto out; 94 } 95 96 /* Parse the additional bits in the I/O OCR value. */ 97 if (!ISSET(card_ocr, SD_IO_OCR_MEM_PRESENT)) { 98 /* SDIO card without memory (not a "combo card"). */ 99 DPRINTF(("%s: no memory present\n", SDMMCDEVNAME(sc))); 100 CLR(sc->sc_flags, SMF_MEM_MODE); 101 } 102 sc->sc_function_count = SD_IO_OCR_NUM_FUNCTIONS(card_ocr); 103 if (sc->sc_function_count == 0) { 104 /* Useless SDIO card without any I/O functions. */ 105 DPRINTF(("%s: no I/O functions\n", SDMMCDEVNAME(sc))); 106 CLR(sc->sc_flags, SMF_IO_MODE); 107 error = 0; 108 goto out; 109 } 110 card_ocr &= SD_IO_OCR_MASK; 111 112 /* Set the lowest voltage supported by the card and host. */ 113 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 114 error = sdmmc_set_bus_power(sc, host_ocr, card_ocr); 115 if (error) { 116 aprint_error_dev(sc->sc_dev, 117 "couldn't supply voltage requested by card\n"); 118 goto out; 119 } 120 121 /* Reset I/O functions (again). */ 122 sdmmc_io_reset(sc); 123 124 /* Send the new OCR value until all cards are ready. */ 125 error = sdmmc_io_send_op_cond(sc, host_ocr, NULL); 126 if (error) { 127 aprint_error_dev(sc->sc_dev, "couldn't send I/O OCR\n"); 128 goto out; 129 } 130 131 out: 132 SDMMC_UNLOCK(sc); 133 134 return error; 135 } 136 137 /* 138 * Allocate sdmmc_function structures for SD card I/O function 139 * (including function 0). 140 */ 141 void 142 sdmmc_io_scan(struct sdmmc_softc *sc) 143 { 144 struct sdmmc_function *sf0, *sf; 145 int error; 146 int i; 147 148 SDMMC_LOCK(sc); 149 150 sf0 = sdmmc_function_alloc(sc); 151 sf0->number = 0; 152 error = sdmmc_set_relative_addr(sc, sf0); 153 if (error) { 154 aprint_error_dev(sc->sc_dev, "couldn't set I/O RCA\n"); 155 SET(sf0->flags, SFF_ERROR); 156 goto out; 157 } 158 sc->sc_fn0 = sf0; 159 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf0, sf_list); 160 161 /* Go to Data Transfer Mode, if possible. */ 162 sdmmc_chip_bus_rod(sc->sc_sct, sc->sc_sch, 0); 163 164 /* Verify that the RCA has been set by selecting the card. */ 165 error = sdmmc_select_card(sc, sf0); 166 if (error) { 167 aprint_error_dev(sc->sc_dev, "couldn't select I/O RCA %d\n", 168 sf0->rca); 169 SET(sf0->flags, SFF_ERROR); 170 goto out; 171 } 172 173 for (i = 1; i <= sc->sc_function_count; i++) { 174 sf = sdmmc_function_alloc(sc); 175 sf->number = i; 176 sf->rca = sf0->rca; 177 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 178 } 179 180 out: 181 SDMMC_UNLOCK(sc); 182 } 183 184 /* 185 * Initialize SDIO card functions. 186 */ 187 int 188 sdmmc_io_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 189 { 190 struct sdmmc_function *sf0 = sc->sc_fn0; 191 int error = 0; 192 uint8_t reg; 193 194 SDMMC_LOCK(sc); 195 196 if (sf->number == 0) { 197 reg = sdmmc_io_read_1(sf, SD_IO_CCCR_CAPABILITY); 198 if (!(reg & CCCR_CAPS_LSC) || (reg & CCCR_CAPS_4BLS)) { 199 sdmmc_io_write_1(sf, SD_IO_CCCR_BUS_WIDTH, 200 CCCR_BUS_WIDTH_4); 201 sf->width = 4; 202 } 203 204 error = sdmmc_read_cis(sf, &sf->cis); 205 if (error) { 206 aprint_error_dev(sc->sc_dev, "couldn't read CIS\n"); 207 SET(sf->flags, SFF_ERROR); 208 goto out; 209 } 210 211 sdmmc_check_cis_quirks(sf); 212 213 #ifdef SDMMC_DEBUG 214 if (sdmmcdebug) 215 sdmmc_print_cis(sf); 216 #endif 217 218 reg = sdmmc_io_read_1(sf, SD_IO_CCCR_HIGH_SPEED); 219 if (reg & CCCR_HIGH_SPEED_SHS) { 220 reg |= CCCR_HIGH_SPEED_EHS; 221 sdmmc_io_write_1(sf, SD_IO_CCCR_HIGH_SPEED, reg); 222 sf->csd.tran_speed = 50000; /* 50MHz */ 223 224 /* Wait 400KHz x 8 clock */ 225 delay(1); 226 } 227 if (sc->sc_busclk > sf->csd.tran_speed) 228 sc->sc_busclk = sf->csd.tran_speed; 229 error = 230 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 231 if (error) 232 aprint_error_dev(sc->sc_dev, 233 "can't change bus clock\n"); 234 } else { 235 reg = sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x000); 236 sf->interface = FBR_STD_FUNC_IF_CODE(reg); 237 if (sf->interface == 0x0f) 238 sf->interface = 239 sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x001); 240 error = sdmmc_read_cis(sf, &sf->cis); 241 if (error) { 242 aprint_error_dev(sc->sc_dev, "couldn't read CIS\n"); 243 SET(sf->flags, SFF_ERROR); 244 goto out; 245 } 246 247 sdmmc_check_cis_quirks(sf); 248 249 #ifdef SDMMC_DEBUG 250 if (sdmmcdebug) 251 sdmmc_print_cis(sf); 252 #endif 253 } 254 255 out: 256 SDMMC_UNLOCK(sc); 257 258 return error; 259 } 260 261 /* 262 * Indicate whether the function is ready to operate. 263 */ 264 static int 265 sdmmc_io_function_ready(struct sdmmc_function *sf) 266 { 267 struct sdmmc_softc *sc = sf->sc; 268 struct sdmmc_function *sf0 = sc->sc_fn0; 269 uint8_t reg; 270 271 if (sf->number == 0) 272 return 1; /* FN0 is always ready */ 273 274 SDMMC_LOCK(sc); 275 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_IOREADY); 276 SDMMC_UNLOCK(sc); 277 return (reg & (1 << sf->number)) != 0; 278 } 279 280 int 281 sdmmc_io_function_enable(struct sdmmc_function *sf) 282 { 283 struct sdmmc_softc *sc = sf->sc; 284 struct sdmmc_function *sf0 = sc->sc_fn0; 285 uint8_t reg; 286 int retry; 287 288 if (sf->number == 0) 289 return 0; /* FN0 is always enabled */ 290 291 SDMMC_LOCK(sc); 292 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE); 293 SET(reg, (1U << sf->number)); 294 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg); 295 SDMMC_UNLOCK(sc); 296 297 retry = 5; 298 while (!sdmmc_io_function_ready(sf) && retry-- > 0) 299 kpause("pause", false, hz, NULL); 300 return (retry >= 0) ? 0 : ETIMEDOUT; 301 } 302 303 /* 304 * Disable the I/O function. Return zero if the function was 305 * disabled successfully. 306 */ 307 void 308 sdmmc_io_function_disable(struct sdmmc_function *sf) 309 { 310 struct sdmmc_softc *sc = sf->sc; 311 struct sdmmc_function *sf0 = sc->sc_fn0; 312 uint8_t reg; 313 314 if (sf->number == 0) 315 return; /* FN0 is always enabled */ 316 317 SDMMC_LOCK(sc); 318 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE); 319 CLR(reg, (1U << sf->number)); 320 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, reg); 321 SDMMC_UNLOCK(sc); 322 } 323 324 static int 325 sdmmc_io_rw_direct(struct sdmmc_softc *sc, struct sdmmc_function *sf, 326 int reg, u_char *datap, int arg) 327 { 328 struct sdmmc_command cmd; 329 int error; 330 331 /* Don't lock */ 332 333 /* Make sure the card is selected. */ 334 error = sdmmc_select_card(sc, sf); 335 if (error) 336 return error; 337 338 arg |= ((sf == NULL ? 0 : sf->number) & SD_ARG_CMD52_FUNC_MASK) << 339 SD_ARG_CMD52_FUNC_SHIFT; 340 arg |= (reg & SD_ARG_CMD52_REG_MASK) << 341 SD_ARG_CMD52_REG_SHIFT; 342 arg |= (*datap & SD_ARG_CMD52_DATA_MASK) << 343 SD_ARG_CMD52_DATA_SHIFT; 344 345 memset(&cmd, 0, sizeof cmd); 346 cmd.c_opcode = SD_IO_RW_DIRECT; 347 cmd.c_arg = arg; 348 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R5; 349 350 error = sdmmc_mmc_command(sc, &cmd); 351 *datap = SD_R5_DATA(cmd.c_resp); 352 353 return error; 354 } 355 356 /* 357 * Useful values of `arg' to pass in are either SD_ARG_CMD53_READ or 358 * SD_ARG_CMD53_WRITE. SD_ARG_CMD53_INCREMENT may be ORed into `arg' 359 * to access successive register locations instead of accessing the 360 * same register many times. 361 */ 362 static int 363 sdmmc_io_rw_extended(struct sdmmc_softc *sc, struct sdmmc_function *sf, 364 int reg, u_char *datap, int datalen, int arg) 365 { 366 struct sdmmc_command cmd; 367 int error; 368 369 /* Don't lock */ 370 371 #if 0 372 /* Make sure the card is selected. */ 373 error = sdmmc_select_card(sc, sf); 374 if (error) 375 return error; 376 #endif 377 378 arg |= (((sf == NULL) ? 0 : sf->number) & SD_ARG_CMD53_FUNC_MASK) << 379 SD_ARG_CMD53_FUNC_SHIFT; 380 arg |= (reg & SD_ARG_CMD53_REG_MASK) << 381 SD_ARG_CMD53_REG_SHIFT; 382 arg |= (datalen & SD_ARG_CMD53_LENGTH_MASK) << 383 SD_ARG_CMD53_LENGTH_SHIFT; 384 385 memset(&cmd, 0, sizeof cmd); 386 cmd.c_opcode = SD_IO_RW_EXTENDED; 387 cmd.c_arg = arg; 388 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R5; 389 cmd.c_data = datap; 390 cmd.c_datalen = datalen; 391 cmd.c_blklen = MIN(datalen, 392 sdmmc_chip_host_maxblklen(sc->sc_sct,sc->sc_sch)); 393 if (!ISSET(arg, SD_ARG_CMD53_WRITE)) 394 cmd.c_flags |= SCF_CMD_READ; 395 396 error = sdmmc_mmc_command(sc, &cmd); 397 398 return error; 399 } 400 401 uint8_t 402 sdmmc_io_read_1(struct sdmmc_function *sf, int reg) 403 { 404 uint8_t data = 0; 405 406 /* Don't lock */ 407 408 (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data, 409 SD_ARG_CMD52_READ); 410 return data; 411 } 412 413 void 414 sdmmc_io_write_1(struct sdmmc_function *sf, int reg, uint8_t data) 415 { 416 417 /* Don't lock */ 418 419 (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data, 420 SD_ARG_CMD52_WRITE); 421 } 422 423 uint16_t 424 sdmmc_io_read_2(struct sdmmc_function *sf, int reg) 425 { 426 uint16_t data = 0; 427 428 /* Don't lock */ 429 430 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2, 431 SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 432 return data; 433 } 434 435 void 436 sdmmc_io_write_2(struct sdmmc_function *sf, int reg, uint16_t data) 437 { 438 439 /* Don't lock */ 440 441 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2, 442 SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 443 } 444 445 uint32_t 446 sdmmc_io_read_4(struct sdmmc_function *sf, int reg) 447 { 448 uint32_t data = 0; 449 450 /* Don't lock */ 451 452 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4, 453 SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 454 return data; 455 } 456 457 void 458 sdmmc_io_write_4(struct sdmmc_function *sf, int reg, uint32_t data) 459 { 460 461 /* Don't lock */ 462 463 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4, 464 SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 465 } 466 467 468 int 469 sdmmc_io_read_multi_1(struct sdmmc_function *sf, int reg, u_char *data, 470 int datalen) 471 { 472 int error; 473 474 /* Don't lock */ 475 476 while (datalen > SD_ARG_CMD53_LENGTH_MAX) { 477 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 478 SD_ARG_CMD53_LENGTH_MAX, SD_ARG_CMD53_READ); 479 if (error) 480 goto error; 481 data += SD_ARG_CMD53_LENGTH_MAX; 482 datalen -= SD_ARG_CMD53_LENGTH_MAX; 483 } 484 485 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 486 SD_ARG_CMD53_READ); 487 error: 488 return error; 489 } 490 491 int 492 sdmmc_io_write_multi_1(struct sdmmc_function *sf, int reg, u_char *data, 493 int datalen) 494 { 495 int error; 496 497 /* Don't lock */ 498 499 while (datalen > SD_ARG_CMD53_LENGTH_MAX) { 500 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 501 SD_ARG_CMD53_LENGTH_MAX, SD_ARG_CMD53_WRITE); 502 if (error) 503 goto error; 504 data += SD_ARG_CMD53_LENGTH_MAX; 505 datalen -= SD_ARG_CMD53_LENGTH_MAX; 506 } 507 508 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 509 SD_ARG_CMD53_WRITE); 510 error: 511 return error; 512 } 513 514 #if 0 515 static int 516 sdmmc_io_xchg(struct sdmmc_softc *sc, struct sdmmc_function *sf, 517 int reg, u_char *datap) 518 { 519 520 /* Don't lock */ 521 522 return sdmmc_io_rw_direct(sc, sf, reg, datap, 523 SD_ARG_CMD52_WRITE|SD_ARG_CMD52_EXCHANGE); 524 } 525 #endif 526 527 /* 528 * Reset the I/O functions of the card. 529 */ 530 static void 531 sdmmc_io_reset(struct sdmmc_softc *sc) 532 { 533 534 /* Don't lock */ 535 #if 0 /* XXX command fails */ 536 (void)sdmmc_io_write(sc, NULL, SD_IO_REG_CCCR_CTL, CCCR_CTL_RES); 537 sdmmc_delay(100000); 538 #endif 539 } 540 541 /* 542 * Get or set the card's I/O OCR value (SDIO). 543 */ 544 static int 545 sdmmc_io_send_op_cond(struct sdmmc_softc *sc, u_int32_t ocr, u_int32_t *ocrp) 546 { 547 struct sdmmc_command cmd; 548 int error; 549 int retry; 550 551 DPRINTF(("sdmmc_io_send_op_cond: ocr = %#x\n", ocr)); 552 553 /* Don't lock */ 554 555 /* 556 * If we change the OCR value, retry the command until the OCR 557 * we receive in response has the "CARD BUSY" bit set, meaning 558 * that all cards are ready for identification. 559 */ 560 for (retry = 0; retry < 100; retry++) { 561 memset(&cmd, 0, sizeof cmd); 562 cmd.c_opcode = SD_IO_SEND_OP_COND; 563 cmd.c_arg = ocr; 564 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R4; 565 566 error = sdmmc_mmc_command(sc, &cmd); 567 if (error) 568 break; 569 if (ISSET(MMC_R4(cmd.c_resp), SD_IO_OCR_MEM_READY) || ocr == 0) 570 break; 571 572 error = ETIMEDOUT; 573 sdmmc_delay(10000); 574 } 575 if (error == 0 && ocrp != NULL) 576 *ocrp = MMC_R4(cmd.c_resp); 577 578 DPRINTF(("sdmmc_io_send_op_cond: error = %d\n", error)); 579 580 return error; 581 } 582 583 /* 584 * Card interrupt handling 585 */ 586 587 void 588 sdmmc_intr_enable(struct sdmmc_function *sf) 589 { 590 struct sdmmc_softc *sc = sf->sc; 591 struct sdmmc_function *sf0 = sc->sc_fn0; 592 uint8_t reg; 593 594 SDMMC_LOCK(sc); 595 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN); 596 reg |= 1 << sf->number; 597 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg); 598 SDMMC_UNLOCK(sc); 599 } 600 601 void 602 sdmmc_intr_disable(struct sdmmc_function *sf) 603 { 604 struct sdmmc_softc *sc = sf->sc; 605 struct sdmmc_function *sf0 = sc->sc_fn0; 606 uint8_t reg; 607 608 SDMMC_LOCK(sc); 609 reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN); 610 reg &= ~(1 << sf->number); 611 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_INTEN, reg); 612 SDMMC_UNLOCK(sc); 613 } 614 615 /* 616 * Establish a handler for the SDIO card interrupt. Because the 617 * interrupt may be shared with different SDIO functions, multiple 618 * handlers can be established. 619 */ 620 void * 621 sdmmc_intr_establish(device_t dev, int (*fun)(void *), void *arg, 622 const char *name) 623 { 624 struct sdmmc_softc *sc = device_private(dev); 625 struct sdmmc_intr_handler *ih; 626 int s; 627 628 if (sc->sc_sct->card_enable_intr == NULL) 629 return NULL; 630 631 ih = malloc(sizeof *ih, M_DEVBUF, M_WAITOK|M_CANFAIL|M_ZERO); 632 if (ih == NULL) 633 return NULL; 634 635 ih->ih_name = malloc(strlen(name) + 1, M_DEVBUF, 636 M_WAITOK|M_CANFAIL|M_ZERO); 637 if (ih->ih_name == NULL) { 638 free(ih, M_DEVBUF); 639 return NULL; 640 } 641 strlcpy(ih->ih_name, name, strlen(name)); 642 ih->ih_softc = sc; 643 ih->ih_fun = fun; 644 ih->ih_arg = arg; 645 646 s = splhigh(); 647 if (TAILQ_EMPTY(&sc->sc_intrq)) { 648 sdmmc_intr_enable(sc->sc_fn0); 649 sdmmc_chip_card_enable_intr(sc->sc_sct, sc->sc_sch, 1); 650 } 651 TAILQ_INSERT_TAIL(&sc->sc_intrq, ih, entry); 652 splx(s); 653 654 return ih; 655 } 656 657 /* 658 * Disestablish the given handler. 659 */ 660 void 661 sdmmc_intr_disestablish(void *cookie) 662 { 663 struct sdmmc_intr_handler *ih = cookie; 664 struct sdmmc_softc *sc = ih->ih_softc; 665 int s; 666 667 if (sc->sc_sct->card_enable_intr == NULL) 668 return; 669 670 s = splhigh(); 671 TAILQ_REMOVE(&sc->sc_intrq, ih, entry); 672 if (TAILQ_EMPTY(&sc->sc_intrq)) { 673 sdmmc_chip_card_enable_intr(sc->sc_sct, sc->sc_sch, 0); 674 sdmmc_intr_disable(sc->sc_fn0); 675 } 676 splx(s); 677 678 free(ih->ih_name, M_DEVBUF); 679 free(ih, M_DEVBUF); 680 } 681 682 /* 683 * Call established SDIO card interrupt handlers. The host controller 684 * must call this function from its own interrupt handler to handle an 685 * SDIO interrupt from the card. 686 */ 687 void 688 sdmmc_card_intr(device_t dev) 689 { 690 struct sdmmc_softc *sc = device_private(dev); 691 692 if (sc->sc_sct->card_enable_intr) { 693 mutex_enter(&sc->sc_intr_task_mtx); 694 if (!sdmmc_task_pending(&sc->sc_intr_task)) 695 sdmmc_add_task(sc, &sc->sc_intr_task); 696 mutex_exit(&sc->sc_intr_task_mtx); 697 } 698 } 699 700 void 701 sdmmc_intr_task(void *arg) 702 { 703 struct sdmmc_softc *sc = (struct sdmmc_softc *)arg; 704 struct sdmmc_intr_handler *ih; 705 int s; 706 707 s = splsdmmc(); 708 TAILQ_FOREACH(ih, &sc->sc_intrq, entry) { 709 splx(s); 710 /* XXX examine return value and do evcount stuff*/ 711 (void)(*ih->ih_fun)(ih->ih_arg); 712 s = splsdmmc(); 713 } 714 sdmmc_chip_card_intr_ack(sc->sc_sct, sc->sc_sch); 715 splx(s); 716 } 717
Indexes created Fri Oct 03 02:09:57 GMT 2025