sdmmc_mem.c revision 1.13
1 /* $NetBSD: sdmmc_mem.c,v 1.13 2010/10/07 12:24:23 kiyohara Exp $ */ 2 /* $OpenBSD: sdmmc_mem.c,v 1.10 2009/01/09 10:55:22 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Copyright (c) 2007-2010 NONAKA Kimihiro <nonaka (at) netbsd.org> 22 * All rights reserved. 23 * 24 * Redistribution and use in source and binary forms, with or without 25 * modification, are permitted provided that the following conditions 26 * are met: 27 * 1. Redistributions of source code must retain the above copyright 28 * notice, this list of conditions and the following disclaimer. 29 * 2. Redistributions in binary form must reproduce the above copyright 30 * notice, this list of conditions and the following disclaimer in the 31 * documentation and/or other materials provided with the distribution. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 34 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 36 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 41 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 42 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 43 * SUCH DAMAGE. 44 */ 45 46 /* Routines for SD/MMC memory cards. */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: sdmmc_mem.c,v 1.13 2010/10/07 12:24:23 kiyohara Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/systm.h> 55 #include <sys/device.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <dev/sdmmc/sdmmcchip.h> 60 #include <dev/sdmmc/sdmmcreg.h> 61 #include <dev/sdmmc/sdmmcvar.h> 62 63 #ifdef SDMMC_DEBUG 64 #define DPRINTF(s) do { printf s; } while (/*CONSTCOND*/0) 65 #else 66 #define DPRINTF(s) do {} while (/*CONSTCOND*/0) 67 #endif 68 69 static int sdmmc_mem_sd_init(struct sdmmc_softc *, struct sdmmc_function *); 70 static int sdmmc_mem_mmc_init(struct sdmmc_softc *, struct sdmmc_function *); 71 static int sdmmc_mem_send_cid(struct sdmmc_softc *, sdmmc_response *); 72 static int sdmmc_mem_send_csd(struct sdmmc_softc *, struct sdmmc_function *, 73 sdmmc_response *); 74 static int sdmmc_mem_send_scr(struct sdmmc_softc *, struct sdmmc_function *, 75 uint32_t scr[2]); 76 static int sdmmc_mem_decode_scr(struct sdmmc_softc *, struct sdmmc_function *); 77 static int sdmmc_mem_send_cxd_data(struct sdmmc_softc *, int, void *, size_t); 78 static int sdmmc_set_bus_width(struct sdmmc_function *, int); 79 static int sdmmc_mem_sd_switch(struct sdmmc_function *, int, int, int, void *); 80 static int sdmmc_mem_mmc_switch(struct sdmmc_function *, uint8_t, uint8_t, 81 uint8_t); 82 static int sdmmc_mem_spi_read_ocr(struct sdmmc_softc *, uint32_t, uint32_t *); 83 static int sdmmc_mem_single_read_block(struct sdmmc_function *, uint32_t, 84 u_char *, size_t); 85 static int sdmmc_mem_single_write_block(struct sdmmc_function *, uint32_t, 86 u_char *, size_t); 87 static int sdmmc_mem_read_block_subr(struct sdmmc_function *, uint32_t, 88 u_char *, size_t); 89 static int sdmmc_mem_write_block_subr(struct sdmmc_function *, uint32_t, 90 u_char *, size_t); 91 92 /* 93 * Initialize SD/MMC memory cards and memory in SDIO "combo" cards. 94 */ 95 int 96 sdmmc_mem_enable(struct sdmmc_softc *sc) 97 { 98 uint32_t host_ocr; 99 uint32_t card_ocr; 100 uint32_t ocr = 0; 101 int error; 102 103 SDMMC_LOCK(sc); 104 105 /* Set host mode to SD "combo" card or SD memory-only. */ 106 SET(sc->sc_flags, SMF_SD_MODE|SMF_MEM_MODE); 107 108 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 109 sdmmc_spi_chip_initialize(sc->sc_spi_sct, sc->sc_sch); 110 111 /* Reset memory (*must* do that before CMD55 or CMD1). */ 112 sdmmc_go_idle_state(sc); 113 114 /* Check SD Ver.2 */ 115 error = sdmmc_mem_send_if_cond(sc, 0x1aa, &card_ocr); 116 if (error == 0 && card_ocr == 0x1aa) 117 SET(ocr, MMC_OCR_HCS); 118 119 /* 120 * Read the SD/MMC memory OCR value by issuing CMD55 followed 121 * by ACMD41 to read the OCR value from memory-only SD cards. 122 * MMC cards will not respond to CMD55 or ACMD41 and this is 123 * how we distinguish them from SD cards. 124 */ 125 mmc_mode: 126 error = sdmmc_mem_send_op_cond(sc, 127 ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? ocr : 0, &card_ocr); 128 if (error) { 129 if (ISSET(sc->sc_flags, SMF_SD_MODE) && 130 !ISSET(sc->sc_flags, SMF_IO_MODE)) { 131 /* Not a SD card, switch to MMC mode. */ 132 DPRINTF(("%s: switch to MMC mode\n", SDMMCDEVNAME(sc))); 133 CLR(sc->sc_flags, SMF_SD_MODE); 134 goto mmc_mode; 135 } 136 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 137 DPRINTF(("%s: couldn't read memory OCR\n", 138 SDMMCDEVNAME(sc))); 139 goto out; 140 } else { 141 /* Not a "combo" card. */ 142 CLR(sc->sc_flags, SMF_MEM_MODE); 143 error = 0; 144 goto out; 145 } 146 } 147 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 148 /* get card OCR */ 149 error = sdmmc_mem_spi_read_ocr(sc, ocr, &card_ocr); 150 if (error) { 151 DPRINTF(("%s: couldn't read SPI memory OCR\n", 152 SDMMCDEVNAME(sc))); 153 goto out; 154 } 155 } 156 157 /* Set the lowest voltage supported by the card and host. */ 158 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 159 error = sdmmc_set_bus_power(sc, host_ocr, card_ocr); 160 if (error) { 161 DPRINTF(("%s: couldn't supply voltage requested by card\n", 162 SDMMCDEVNAME(sc))); 163 goto out; 164 } 165 host_ocr &= card_ocr; 166 host_ocr |= ocr; 167 168 /* Send the new OCR value until all cards are ready. */ 169 error = sdmmc_mem_send_op_cond(sc, host_ocr, NULL); 170 if (error) { 171 DPRINTF(("%s: couldn't send memory OCR\n", SDMMCDEVNAME(sc))); 172 goto out; 173 } 174 175 out: 176 SDMMC_UNLOCK(sc); 177 178 return error; 179 } 180 181 /* 182 * Read the CSD and CID from all cards and assign each card a unique 183 * relative card address (RCA). CMD2 is ignored by SDIO-only cards. 184 */ 185 void 186 sdmmc_mem_scan(struct sdmmc_softc *sc) 187 { 188 sdmmc_response resp; 189 struct sdmmc_function *sf; 190 uint16_t next_rca; 191 int error; 192 int retry; 193 194 SDMMC_LOCK(sc); 195 196 /* 197 * CMD2 is a broadcast command understood by SD cards and MMC 198 * cards. All cards begin to respond to the command, but back 199 * off if another card drives the CMD line to a different level. 200 * Only one card will get its entire response through. That 201 * card remains silent once it has been assigned a RCA. 202 */ 203 for (retry = 0; retry < 100; retry++) { 204 error = sdmmc_mem_send_cid(sc, &resp); 205 if (error) { 206 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) && 207 error == ETIMEDOUT) { 208 /* No more cards there. */ 209 break; 210 } 211 DPRINTF(("%s: couldn't read CID\n", SDMMCDEVNAME(sc))); 212 break; 213 } 214 215 /* In MMC mode, find the next available RCA. */ 216 next_rca = 1; 217 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 218 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) 219 next_rca++; 220 } 221 222 /* Allocate a sdmmc_function structure. */ 223 sf = sdmmc_function_alloc(sc); 224 sf->rca = next_rca; 225 226 /* 227 * Remember the CID returned in the CMD2 response for 228 * later decoding. 229 */ 230 memcpy(sf->raw_cid, resp, sizeof(sf->raw_cid)); 231 232 /* 233 * Silence the card by assigning it a unique RCA, or 234 * querying it for its RCA in the case of SD. 235 */ 236 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 237 if (sdmmc_set_relative_addr(sc, sf) != 0) { 238 aprint_error_dev(sc->sc_dev, 239 "couldn't set mem RCA\n"); 240 sdmmc_function_free(sf); 241 break; 242 } 243 } 244 245 /* 246 * If this is a memory-only card, the card responding 247 * first becomes an alias for SDIO function 0. 248 */ 249 if (sc->sc_fn0 == NULL) 250 sc->sc_fn0 = sf; 251 252 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 253 254 /* only one function in SPI mode */ 255 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 256 break; 257 } 258 259 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 260 /* Go to Data Transfer Mode, if possible. */ 261 sdmmc_chip_bus_rod(sc->sc_sct, sc->sc_sch, 0); 262 263 /* 264 * All cards are either inactive or awaiting further commands. 265 * Read the CSDs and decode the raw CID for each card. 266 */ 267 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) { 268 error = sdmmc_mem_send_csd(sc, sf, &resp); 269 if (error) { 270 SET(sf->flags, SFF_ERROR); 271 continue; 272 } 273 274 if (sdmmc_decode_csd(sc, resp, sf) != 0 || 275 sdmmc_decode_cid(sc, sf->raw_cid, sf) != 0) { 276 SET(sf->flags, SFF_ERROR); 277 continue; 278 } 279 280 #ifdef SDMMC_DEBUG 281 printf("%s: CID: ", SDMMCDEVNAME(sc)); 282 sdmmc_print_cid(&sf->cid); 283 #endif 284 } 285 286 SDMMC_UNLOCK(sc); 287 } 288 289 int 290 sdmmc_decode_csd(struct sdmmc_softc *sc, sdmmc_response resp, 291 struct sdmmc_function *sf) 292 { 293 /* TRAN_SPEED(2:0): transfer rate exponent */ 294 static const int speed_exponent[8] = { 295 100 * 1, /* 100 Kbits/s */ 296 1 * 1000, /* 1 Mbits/s */ 297 10 * 1000, /* 10 Mbits/s */ 298 100 * 1000, /* 100 Mbits/s */ 299 0, 300 0, 301 0, 302 0, 303 }; 304 /* TRAN_SPEED(6:3): time mantissa */ 305 static const int speed_mantissa[16] = { 306 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80, 307 }; 308 struct sdmmc_csd *csd = &sf->csd; 309 int e, m; 310 311 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 312 /* 313 * CSD version 1.0 corresponds to SD system 314 * specification version 1.0 - 1.10. (SanDisk, 3.5.3) 315 */ 316 csd->csdver = SD_CSD_CSDVER(resp); 317 switch (csd->csdver) { 318 case SD_CSD_CSDVER_2_0: 319 DPRINTF(("%s: SD Ver.2.0\n", SDMMCDEVNAME(sc))); 320 SET(sf->flags, SFF_SDHC); 321 csd->capacity = SD_CSD_V2_CAPACITY(resp); 322 csd->read_bl_len = SD_CSD_V2_BL_LEN; 323 csd->ccc = SD_CSD_CCC(resp); 324 break; 325 326 case SD_CSD_CSDVER_1_0: 327 DPRINTF(("%s: SD Ver.1.0\n", SDMMCDEVNAME(sc))); 328 csd->capacity = SD_CSD_CAPACITY(resp); 329 csd->read_bl_len = SD_CSD_READ_BL_LEN(resp); 330 break; 331 332 default: 333 aprint_error_dev(sc->sc_dev, 334 "unknown SD CSD structure version 0x%x\n", 335 csd->csdver); 336 return 1; 337 } 338 339 csd->mmcver = SD_CSD_MMCVER(resp); 340 csd->write_bl_len = SD_CSD_WRITE_BL_LEN(resp); 341 csd->r2w_factor = SD_CSD_R2W_FACTOR(resp); 342 e = SD_CSD_SPEED_EXP(resp); 343 m = SD_CSD_SPEED_MANT(resp); 344 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 345 } else { 346 csd->csdver = MMC_CSD_CSDVER(resp); 347 if (csd->csdver != MMC_CSD_CSDVER_1_0 && 348 csd->csdver != MMC_CSD_CSDVER_2_0) { 349 aprint_error_dev(sc->sc_dev, 350 "unknown MMC CSD structure version 0x%x\n", 351 csd->csdver); 352 return 1; 353 } 354 355 csd->mmcver = MMC_CSD_MMCVER(resp); 356 csd->capacity = MMC_CSD_CAPACITY(resp); 357 csd->read_bl_len = MMC_CSD_READ_BL_LEN(resp); 358 csd->write_bl_len = MMC_CSD_WRITE_BL_LEN(resp); 359 csd->r2w_factor = MMC_CSD_R2W_FACTOR(resp); 360 e = MMC_CSD_TRAN_SPEED_EXP(resp); 361 m = MMC_CSD_TRAN_SPEED_MANT(resp); 362 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 363 } 364 if ((1 << csd->read_bl_len) > SDMMC_SECTOR_SIZE) 365 csd->capacity *= (1 << csd->read_bl_len) / SDMMC_SECTOR_SIZE; 366 367 #ifdef SDMMC_DUMP_CSD 368 sdmmc_print_csd(resp, csd); 369 #endif 370 371 return 0; 372 } 373 374 int 375 sdmmc_decode_cid(struct sdmmc_softc *sc, sdmmc_response resp, 376 struct sdmmc_function *sf) 377 { 378 struct sdmmc_cid *cid = &sf->cid; 379 380 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 381 cid->mid = SD_CID_MID(resp); 382 cid->oid = SD_CID_OID(resp); 383 SD_CID_PNM_CPY(resp, cid->pnm); 384 cid->rev = SD_CID_REV(resp); 385 cid->psn = SD_CID_PSN(resp); 386 cid->mdt = SD_CID_MDT(resp); 387 } else { 388 switch(sf->csd.mmcver) { 389 case MMC_CSD_MMCVER_1_0: 390 case MMC_CSD_MMCVER_1_4: 391 cid->mid = MMC_CID_MID_V1(resp); 392 MMC_CID_PNM_V1_CPY(resp, cid->pnm); 393 cid->rev = MMC_CID_REV_V1(resp); 394 cid->psn = MMC_CID_PSN_V1(resp); 395 cid->mdt = MMC_CID_MDT_V1(resp); 396 break; 397 case MMC_CSD_MMCVER_2_0: 398 case MMC_CSD_MMCVER_3_1: 399 case MMC_CSD_MMCVER_4_0: 400 cid->mid = MMC_CID_MID_V2(resp); 401 cid->oid = MMC_CID_OID_V2(resp); 402 MMC_CID_PNM_V2_CPY(resp, cid->pnm); 403 cid->psn = MMC_CID_PSN_V2(resp); 404 break; 405 default: 406 aprint_error_dev(sc->sc_dev, "unknown MMC version %d\n", 407 sf->csd.mmcver); 408 return 1; 409 } 410 } 411 return 0; 412 } 413 414 void 415 sdmmc_print_cid(struct sdmmc_cid *cid) 416 { 417 418 printf("mid=0x%02x oid=0x%04x pnm=\"%s\" rev=0x%02x psn=0x%08x" 419 " mdt=%03x\n", cid->mid, cid->oid, cid->pnm, cid->rev, cid->psn, 420 cid->mdt); 421 } 422 423 #ifdef SDMMC_DUMP_CSD 424 void 425 sdmmc_print_csd(sdmmc_response resp, struct sdmmc_csd *csd) 426 { 427 428 printf("csdver = %d\n", csd->csdver); 429 printf("mmcver = %d\n", csd->mmcver); 430 printf("capacity = %08x\n", csd->capacity); 431 printf("read_bl_len = %d\n", csd->read_bl_len); 432 printf("write_cl_len = %d\n", csd->write_bl_len); 433 printf("r2w_factor = %d\n", csd->r2w_factor); 434 printf("tran_speed = %d\n", csd->tran_speed); 435 } 436 #endif 437 438 /* 439 * Initialize a SD/MMC memory card. 440 */ 441 int 442 sdmmc_mem_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 443 { 444 int error = 0; 445 446 SDMMC_LOCK(sc); 447 448 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 449 error = sdmmc_select_card(sc, sf); 450 if (error) 451 goto out; 452 } 453 454 if (!ISSET(sf->flags, SFF_SDHC)) { 455 error = sdmmc_mem_set_blocklen(sc, sf); 456 if (error) 457 goto out; 458 } 459 460 if (ISSET(sc->sc_flags, SMF_SD_MODE)) 461 error = sdmmc_mem_sd_init(sc, sf); 462 else 463 error = sdmmc_mem_mmc_init(sc, sf); 464 465 out: 466 SDMMC_UNLOCK(sc); 467 468 return error; 469 } 470 471 /* 472 * Get or set the card's memory OCR value (SD or MMC). 473 */ 474 int 475 sdmmc_mem_send_op_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 476 { 477 struct sdmmc_command cmd; 478 int error; 479 int retry; 480 481 /* Don't lock */ 482 483 /* 484 * If we change the OCR value, retry the command until the OCR 485 * we receive in response has the "CARD BUSY" bit set, meaning 486 * that all cards are ready for identification. 487 */ 488 for (retry = 0; retry < 100; retry++) { 489 memset(&cmd, 0, sizeof(cmd)); 490 cmd.c_arg = !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? 491 ocr : (ocr & MMC_OCR_HCS); 492 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R3 | SCF_RSP_SPI_R1; 493 494 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 495 cmd.c_opcode = SD_APP_OP_COND; 496 error = sdmmc_app_command(sc, NULL, &cmd); 497 } else { 498 cmd.c_opcode = MMC_SEND_OP_COND; 499 error = sdmmc_mmc_command(sc, &cmd); 500 } 501 if (error) 502 break; 503 504 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 505 if (!ISSET(MMC_SPI_R1(cmd.c_resp), R1_SPI_IDLE)) 506 break; 507 } else { 508 if (ISSET(MMC_R3(cmd.c_resp), MMC_OCR_MEM_READY) || 509 ocr == 0) 510 break; 511 } 512 513 error = ETIMEDOUT; 514 sdmmc_delay(10000); 515 } 516 if (error == 0 && 517 ocrp != NULL && 518 !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 519 *ocrp = MMC_R3(cmd.c_resp); 520 DPRINTF(("%s: sdmmc_mem_send_op_cond: error=%d, ocr=%#x\n", 521 SDMMCDEVNAME(sc), error, MMC_R3(cmd.c_resp))); 522 return error; 523 } 524 525 int 526 sdmmc_mem_send_if_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 527 { 528 struct sdmmc_command cmd; 529 int error; 530 531 /* Don't lock */ 532 533 memset(&cmd, 0, sizeof(cmd)); 534 cmd.c_arg = ocr; 535 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R7 | SCF_RSP_SPI_R7; 536 cmd.c_opcode = SD_SEND_IF_COND; 537 538 error = sdmmc_mmc_command(sc, &cmd); 539 if (error == 0 && ocrp != NULL) { 540 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 541 *ocrp = MMC_SPI_R7(cmd.c_resp); 542 } else { 543 *ocrp = MMC_R7(cmd.c_resp); 544 } 545 DPRINTF(("%s: sdmmc_mem_send_if_cond: error=%d, ocr=%#x\n", 546 SDMMCDEVNAME(sc), error, *ocrp)); 547 } 548 return error; 549 } 550 551 /* 552 * Set the read block length appropriately for this card, according to 553 * the card CSD register value. 554 */ 555 int 556 sdmmc_mem_set_blocklen(struct sdmmc_softc *sc, struct sdmmc_function *sf) 557 { 558 struct sdmmc_command cmd; 559 int error; 560 561 /* Don't lock */ 562 563 memset(&cmd, 0, sizeof(cmd)); 564 cmd.c_opcode = MMC_SET_BLOCKLEN; 565 cmd.c_arg = SDMMC_SECTOR_SIZE; 566 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R1; 567 568 error = sdmmc_mmc_command(sc, &cmd); 569 570 DPRINTF(("%s: sdmmc_mem_set_blocklen: read_bl_len=%d sector_size=%d\n", 571 SDMMCDEVNAME(sc), 1 << sf->csd.read_bl_len, SDMMC_SECTOR_SIZE)); 572 573 return error; 574 } 575 576 static int 577 sdmmc_mem_sd_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 578 { 579 struct { 580 int v; 581 int freq; 582 } switch_group0_functions [] = { 583 /* Default/SDR12 */ 584 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 585 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 25000 }, 586 587 /* High-Speed/SDR25 */ 588 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 589 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 50000 }, 590 591 /* SDR50 */ 592 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 100000 }, 593 594 /* SDR104 */ 595 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 208000 }, 596 597 /* DDR50 */ 598 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 50000 }, 599 }; 600 int host_ocr, support_func, best_func, error, g, i; 601 char status[64]; 602 603 error = sdmmc_mem_send_scr(sc, sf, sf->raw_scr); 604 if (error) { 605 aprint_error_dev(sc->sc_dev, "SD_SEND_SCR send failed.\n"); 606 return error; 607 } 608 error = sdmmc_mem_decode_scr(sc, sf); 609 if (error) 610 return error; 611 612 if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE) && 613 ISSET(sf->scr.bus_width, SCR_SD_BUS_WIDTHS_4BIT)) { 614 error = sdmmc_set_bus_width(sf, 4); 615 if (error) { 616 aprint_error_dev(sc->sc_dev, 617 "can't change bus width (%d bit)\n", 4); 618 return error; 619 } 620 sf->width = 4; 621 } else 622 sf->width = 1; 623 624 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 625 ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) { 626 error = sdmmc_mem_sd_switch(sf, 0, 1, 0, status); 627 if (error) { 628 aprint_error_dev(sc->sc_dev, 629 "switch func mode 0 failed\n"); 630 return error; 631 } 632 633 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 634 support_func = SFUNC_STATUS_GROUP(status, 1); 635 best_func = 0; 636 for (i = 0, g = 1; 637 i < __arraycount(switch_group0_functions); i++, g <<= 1) { 638 if (!(switch_group0_functions[i].v & host_ocr)) 639 continue; 640 if (g & support_func) 641 best_func = i; 642 } 643 if (best_func != 0) { 644 error = 645 sdmmc_mem_sd_switch(sf, 1, 1, best_func, status); 646 if (error) { 647 aprint_error_dev(sc->sc_dev, 648 "switch func mode 1 failed:" 649 " group 1 function %d(0x%2x)\n", 650 best_func, support_func); 651 return error; 652 } 653 sf->csd.tran_speed = 654 switch_group0_functions[best_func].freq; 655 656 /* Wait 400KHz x 8 clock */ 657 delay(1); 658 if (sc->sc_busclk > sf->csd.tran_speed) 659 sc->sc_busclk = sf->csd.tran_speed; 660 661 error = sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, 662 sc->sc_busclk); 663 if (error) { 664 aprint_error_dev(sc->sc_dev, 665 "can't change bus clock\n"); 666 return error; 667 } 668 } else 669 if (sc->sc_busclk > sf->csd.tran_speed) 670 sc->sc_busclk = sf->csd.tran_speed; 671 } 672 673 return 0; 674 } 675 676 static int 677 sdmmc_mem_mmc_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 678 { 679 int width, value, hs_timing, error; 680 char ext_csd[512]; 681 682 if (sf->csd.mmcver >= MMC_CSD_MMCVER_4_0) { 683 error = sdmmc_mem_send_cxd_data(sc, 684 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 685 if (error) { 686 aprint_error_dev(sc->sc_dev, "can't read EXT_CSD\n"); 687 return error; 688 } 689 if (ext_csd[EXT_CSD_STRUCTURE] > EXT_CSD_STRUCTURE_VER_1_2) { 690 aprint_error_dev(sc->sc_dev, 691 "unrecognised future version\n"); 692 return error; 693 } 694 hs_timing = 0; 695 switch (ext_csd[EXT_CSD_CARD_TYPE]) { 696 case EXT_CSD_CARD_TYPE_26M: 697 sf->csd.tran_speed = 26000; /* 26MHz */ 698 break; 699 700 case EXT_CSD_CARD_TYPE_52M | EXT_CSD_CARD_TYPE_26M: 701 sf->csd.tran_speed = 52000; /* 52MHz */ 702 hs_timing = 1; 703 704 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 705 EXT_CSD_HS_TIMING, hs_timing); 706 if (error) { 707 aprint_error_dev(sc->sc_dev, 708 "can't change high speed\n"); 709 return error; 710 } 711 break; 712 713 default: 714 aprint_error_dev(sc->sc_dev, 715 "unknwon CARD_TYPE: 0x%x\n", 716 ext_csd[EXT_CSD_CARD_TYPE]); 717 return error; 718 } 719 if (sc->sc_busclk > sf->csd.tran_speed) 720 sc->sc_busclk = sf->csd.tran_speed; 721 error = 722 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 723 if (error) { 724 aprint_error_dev(sc->sc_dev, 725 "can't change bus clock\n"); 726 return error; 727 } 728 if (hs_timing) { 729 error = sdmmc_mem_send_cxd_data(sc, 730 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 731 if (error) { 732 aprint_error_dev(sc->sc_dev, 733 "can't re-read EXT_CSD\n"); 734 return error; 735 } 736 if (ext_csd[EXT_CSD_HS_TIMING] != hs_timing) { 737 aprint_error_dev(sc->sc_dev, 738 "HS_TIMING set failed\n"); 739 return EINVAL; 740 } 741 } 742 743 if (ISSET(sc->sc_caps, SMC_CAPS_8BIT_MODE)) { 744 width = 8; 745 value = EXT_CSD_BUS_WIDTH_8; 746 } else if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE)) { 747 width = 4; 748 value = EXT_CSD_BUS_WIDTH_4; 749 } else { 750 width = 1; 751 value = EXT_CSD_BUS_WIDTH_1; 752 } 753 754 if (width != 1) { 755 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 756 EXT_CSD_BUS_WIDTH, value); 757 if (error == 0) 758 error = sdmmc_chip_bus_width(sc->sc_sct, 759 sc->sc_sch, width); 760 else { 761 DPRINTF(("%s: can't change bus width" 762 " (%d bit)\n", SDMMCDEVNAME(sc), width)); 763 return error; 764 } 765 766 /* XXXX: need bus test? (using by CMD14 & CMD19) */ 767 } 768 sf->width = width; 769 } else { 770 if (sc->sc_busclk > sf->csd.tran_speed) 771 sc->sc_busclk = sf->csd.tran_speed; 772 error = 773 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 774 if (error) { 775 aprint_error_dev(sc->sc_dev, 776 "can't change bus clock\n"); 777 return error; 778 } 779 sf->width = 1; 780 } 781 782 return 0; 783 } 784 785 static int 786 sdmmc_mem_send_cid(struct sdmmc_softc *sc, sdmmc_response *resp) 787 { 788 struct sdmmc_command cmd; 789 int error; 790 791 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 792 memset(&cmd, 0, sizeof cmd); 793 cmd.c_opcode = MMC_ALL_SEND_CID; 794 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R2; 795 796 error = sdmmc_mmc_command(sc, &cmd); 797 } else { 798 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CID, &cmd.c_resp, 799 sizeof(cmd.c_resp)); 800 } 801 802 #ifdef SDMMC_DEBUG 803 sdmmc_dump_data("CID", cmd.c_resp, sizeof(cmd.c_resp)); 804 #endif 805 if (error == 0 && resp != NULL) 806 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 807 return error; 808 } 809 810 static int 811 sdmmc_mem_send_csd(struct sdmmc_softc *sc, struct sdmmc_function *sf, 812 sdmmc_response *resp) 813 { 814 struct sdmmc_command cmd; 815 int error; 816 817 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 818 memset(&cmd, 0, sizeof cmd); 819 cmd.c_opcode = MMC_SEND_CSD; 820 cmd.c_arg = MMC_ARG_RCA(sf->rca); 821 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R2; 822 823 error = sdmmc_mmc_command(sc, &cmd); 824 } else { 825 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CSD, &cmd.c_resp, 826 sizeof(cmd.c_resp)); 827 } 828 829 #ifdef SDMMC_DEBUG 830 sdmmc_dump_data("CSD", cmd.c_resp, sizeof(cmd.c_resp)); 831 #endif 832 if (error == 0 && resp != NULL) 833 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 834 return error; 835 } 836 837 static int 838 sdmmc_mem_send_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf, 839 uint32_t scr[2]) 840 { 841 struct sdmmc_command cmd; 842 bus_dma_segment_t ds[1]; 843 void *ptr = NULL; 844 int datalen = 8; 845 int rseg; 846 int error = 0; 847 848 /* Don't lock */ 849 850 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 851 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, 852 ds, 1, &rseg, BUS_DMA_NOWAIT); 853 if (error) 854 goto out; 855 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 856 BUS_DMA_NOWAIT); 857 if (error) 858 goto dmamem_free; 859 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 860 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 861 if (error) 862 goto dmamem_unmap; 863 864 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 865 BUS_DMASYNC_PREREAD); 866 } else { 867 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 868 if (ptr == NULL) 869 goto out; 870 } 871 872 memset(&cmd, 0, sizeof(cmd)); 873 cmd.c_data = ptr; 874 cmd.c_datalen = datalen; 875 cmd.c_blklen = datalen; 876 cmd.c_arg = 0; 877 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 878 cmd.c_opcode = SD_APP_SEND_SCR; 879 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 880 cmd.c_dmamap = sc->sc_dmap; 881 882 error = sdmmc_app_command(sc, sf, &cmd); 883 if (error == 0) { 884 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 885 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 886 BUS_DMASYNC_POSTREAD); 887 } 888 memcpy(scr, ptr, datalen); 889 } 890 891 out: 892 if (ptr != NULL) { 893 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 894 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 895 dmamem_unmap: 896 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 897 dmamem_free: 898 bus_dmamem_free(sc->sc_dmat, ds, rseg); 899 } else { 900 free(ptr, M_DEVBUF); 901 } 902 } 903 DPRINTF(("%s: sdmem_mem_send_scr: error = %d\n", SDMMCDEVNAME(sc), 904 error)); 905 906 #ifdef SDMMC_DEBUG 907 if (error == 0) 908 sdmmc_dump_data("SCR", scr, 8); 909 #endif 910 return error; 911 } 912 913 static int 914 sdmmc_mem_decode_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf) 915 { 916 sdmmc_response resp; 917 int ver; 918 919 memset(resp, 0, sizeof(resp)); 920 /* 921 * Change the raw-scr received from the DMA stream to resp. 922 */ 923 resp[0] = be32toh(sf->raw_scr[1]); 924 resp[1] = be32toh(sf->raw_scr[0]) >> 8; 925 926 ver = SCR_STRUCTURE(resp); 927 sf->scr.sd_spec = SCR_SD_SPEC(resp); 928 sf->scr.bus_width = SCR_SD_BUS_WIDTHS(resp); 929 930 DPRINTF(("%s: sdmmc_mem_decode_scr: spec=%d, bus width=%d\n", 931 SDMMCDEVNAME(sc), sf->scr.sd_spec, sf->scr.bus_width)); 932 933 if (ver != 0) { 934 DPRINTF(("%s: unknown structure version: %d\n", 935 SDMMCDEVNAME(sc), ver)); 936 return EINVAL; 937 } 938 return 0; 939 } 940 941 static int 942 sdmmc_mem_send_cxd_data(struct sdmmc_softc *sc, int opcode, void *data, 943 size_t datalen) 944 { 945 struct sdmmc_command cmd; 946 bus_dma_segment_t ds[1]; 947 void *ptr = NULL; 948 int rseg; 949 int error = 0; 950 951 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 952 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, ds, 953 1, &rseg, BUS_DMA_NOWAIT); 954 if (error) 955 goto out; 956 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 957 BUS_DMA_NOWAIT); 958 if (error) 959 goto dmamem_free; 960 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 961 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 962 if (error) 963 goto dmamem_unmap; 964 965 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 966 BUS_DMASYNC_PREREAD); 967 } else { 968 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 969 if (ptr == NULL) 970 goto out; 971 } 972 973 memset(&cmd, 0, sizeof(cmd)); 974 cmd.c_data = ptr; 975 cmd.c_datalen = datalen; 976 cmd.c_blklen = datalen; 977 cmd.c_opcode = opcode; 978 cmd.c_arg = 0; 979 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_SPI_R1; 980 if (opcode == MMC_SEND_EXT_CSD) 981 SET(cmd.c_flags, SCF_RSP_R1); 982 else 983 SET(cmd.c_flags, SCF_RSP_R2); 984 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 985 cmd.c_dmamap = sc->sc_dmap; 986 987 error = sdmmc_mmc_command(sc, &cmd); 988 if (error == 0) { 989 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 990 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 991 BUS_DMASYNC_POSTREAD); 992 } 993 memcpy(data, ptr, datalen); 994 } 995 996 out: 997 if (ptr != NULL) { 998 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 999 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1000 dmamem_unmap: 1001 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 1002 dmamem_free: 1003 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1004 } else { 1005 free(ptr, M_DEVBUF); 1006 } 1007 } 1008 return error; 1009 } 1010 1011 static int 1012 sdmmc_set_bus_width(struct sdmmc_function *sf, int width) 1013 { 1014 struct sdmmc_softc *sc = sf->sc; 1015 struct sdmmc_command cmd; 1016 int error; 1017 1018 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1019 return ENODEV; 1020 1021 memset(&cmd, 0, sizeof(cmd)); 1022 cmd.c_opcode = SD_APP_SET_BUS_WIDTH; 1023 cmd.c_flags = SCF_RSP_R1 | SCF_CMD_AC; 1024 1025 switch (width) { 1026 case 1: 1027 cmd.c_arg = SD_ARG_BUS_WIDTH_1; 1028 break; 1029 1030 case 4: 1031 cmd.c_arg = SD_ARG_BUS_WIDTH_4; 1032 break; 1033 1034 default: 1035 return EINVAL; 1036 } 1037 1038 error = sdmmc_app_command(sc, sf, &cmd); 1039 if (error == 0) 1040 error = sdmmc_chip_bus_width(sc->sc_sct, sc->sc_sch, width); 1041 return error; 1042 } 1043 1044 static int 1045 sdmmc_mem_sd_switch(struct sdmmc_function *sf, int mode, int group, 1046 int function, void *status) 1047 { 1048 struct sdmmc_softc *sc = sf->sc; 1049 struct sdmmc_command cmd; 1050 bus_dma_segment_t ds[1]; 1051 void *ptr = NULL; 1052 int gsft, rseg, error = 0; 1053 const int statlen = 64; 1054 1055 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 1056 !ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) 1057 return EINVAL; 1058 1059 if (group <= 0 || group > 6 || 1060 function < 0 || function > 16) 1061 return EINVAL; 1062 1063 gsft = (group - 1) << 2; 1064 1065 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1066 error = bus_dmamem_alloc(sc->sc_dmat, statlen, PAGE_SIZE, 0, ds, 1067 1, &rseg, BUS_DMA_NOWAIT); 1068 if (error) 1069 goto out; 1070 error = bus_dmamem_map(sc->sc_dmat, ds, 1, statlen, &ptr, 1071 BUS_DMA_NOWAIT); 1072 if (error) 1073 goto dmamem_free; 1074 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, statlen, 1075 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 1076 if (error) 1077 goto dmamem_unmap; 1078 1079 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1080 BUS_DMASYNC_PREREAD); 1081 } else { 1082 ptr = malloc(statlen, M_DEVBUF, M_NOWAIT | M_ZERO); 1083 if (ptr == NULL) 1084 goto out; 1085 } 1086 1087 memset(&cmd, 0, sizeof(cmd)); 1088 cmd.c_data = ptr; 1089 cmd.c_datalen = statlen; 1090 cmd.c_blklen = statlen; 1091 cmd.c_opcode = SD_SEND_SWITCH_FUNC; 1092 cmd.c_arg = 1093 (!!mode << 31) | (function << gsft) | (0x00ffffff & ~(0xf << gsft)); 1094 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1095 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 1096 cmd.c_dmamap = sc->sc_dmap; 1097 1098 error = sdmmc_mmc_command(sc, &cmd); 1099 if (error == 0) { 1100 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1101 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1102 BUS_DMASYNC_POSTREAD); 1103 } 1104 memcpy(status, ptr, statlen); 1105 } 1106 1107 out: 1108 if (ptr != NULL) { 1109 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1110 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1111 dmamem_unmap: 1112 bus_dmamem_unmap(sc->sc_dmat, ptr, statlen); 1113 dmamem_free: 1114 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1115 } else { 1116 free(ptr, M_DEVBUF); 1117 } 1118 } 1119 return error; 1120 } 1121 1122 static int 1123 sdmmc_mem_mmc_switch(struct sdmmc_function *sf, uint8_t set, uint8_t index, 1124 uint8_t value) 1125 { 1126 struct sdmmc_softc *sc = sf->sc; 1127 struct sdmmc_command cmd; 1128 1129 memset(&cmd, 0, sizeof(cmd)); 1130 cmd.c_opcode = MMC_SWITCH; 1131 cmd.c_arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 1132 (index << 16) | (value << 8) | set; 1133 cmd.c_flags = SCF_RSP_SPI_R1B | SCF_RSP_R1B | SCF_CMD_AC; 1134 1135 return sdmmc_mmc_command(sc, &cmd); 1136 } 1137 1138 /* 1139 * SPI mode function 1140 */ 1141 static int 1142 sdmmc_mem_spi_read_ocr(struct sdmmc_softc *sc, uint32_t hcs, uint32_t *card_ocr) 1143 { 1144 struct sdmmc_command cmd; 1145 int error; 1146 1147 memset(&cmd, 0, sizeof(cmd)); 1148 cmd.c_opcode = MMC_READ_OCR; 1149 cmd.c_arg = hcs ? MMC_OCR_HCS : 0; 1150 cmd.c_flags = SCF_RSP_SPI_R3; 1151 1152 error = sdmmc_mmc_command(sc, &cmd); 1153 if (error == 0 && card_ocr != NULL) 1154 *card_ocr = cmd.c_resp[1]; 1155 DPRINTF(("%s: sdmmc_mem_spi_read_ocr: error=%d, ocr=%#x\n", 1156 SDMMCDEVNAME(sc), error, cmd.c_resp[1])); 1157 return error; 1158 } 1159 1160 /* 1161 * read/write function 1162 */ 1163 /* read */ 1164 static int 1165 sdmmc_mem_single_read_block(struct sdmmc_function *sf, uint32_t blkno, 1166 u_char *data, size_t datalen) 1167 { 1168 struct sdmmc_softc *sc __unused = sf->sc; 1169 int error = 0; 1170 int i; 1171 1172 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1173 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1174 1175 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1176 error = sdmmc_mem_read_block_subr(sf, blkno + i, 1177 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1178 if (error) 1179 break; 1180 } 1181 return error; 1182 } 1183 1184 static int 1185 sdmmc_mem_read_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1186 u_char *data, size_t datalen) 1187 { 1188 struct sdmmc_softc *sc = sf->sc; 1189 struct sdmmc_command cmd; 1190 int error, bbuf, seg, off, len, num; 1191 1192 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1193 error = sdmmc_select_card(sc, sf); 1194 if (error) 1195 goto out; 1196 } 1197 1198 bbuf = 0; 1199 num = 0; 1200 seg = off = len = 0; 1201 retry: 1202 memset(&cmd, 0, sizeof(cmd)); 1203 cmd.c_data = data; 1204 cmd.c_datalen = datalen; 1205 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1206 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1207 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1208 cmd.c_arg = blkno; 1209 if (!ISSET(sf->flags, SFF_SDHC)) 1210 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1211 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1212 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1213 cmd.c_dmamap = sc->sc_dmap; 1214 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1215 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1216 len &= ~(SDMMC_SECTOR_SIZE - 1); 1217 cmd.c_datalen = len; 1218 cmd.c_dmaseg = seg; 1219 cmd.c_dmaoff = off; 1220 bbuf = 0; 1221 if (len == 0) { 1222 /* Use bounce buffer */ 1223 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1224 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1225 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1226 cmd.c_dmamap = sf->bbuf_dmap; 1227 cmd.c_dmaseg = 0; 1228 cmd.c_dmaoff = 0; 1229 bbuf = 1; 1230 len = SDMMC_SECTOR_SIZE; 1231 } 1232 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1233 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1234 } 1235 } 1236 1237 error = sdmmc_mmc_command(sc, &cmd); 1238 if (error) 1239 goto out; 1240 1241 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1242 if (cmd.c_opcode == MMC_READ_BLOCK_MULTIPLE) { 1243 memset(&cmd, 0, sizeof cmd); 1244 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1245 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1246 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1247 error = sdmmc_mmc_command(sc, &cmd); 1248 if (error) 1249 goto out; 1250 } 1251 } 1252 1253 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1254 do { 1255 memset(&cmd, 0, sizeof(cmd)); 1256 cmd.c_opcode = MMC_SEND_STATUS; 1257 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1258 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1259 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1260 error = sdmmc_mmc_command(sc, &cmd); 1261 if (error) 1262 break; 1263 /* XXX time out */ 1264 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1265 } 1266 1267 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1268 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1269 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1270 1271 if (bbuf) { 1272 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1273 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1274 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1275 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1276 memcpy(data, sf->bbuf, SDMMC_SECTOR_SIZE); 1277 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1278 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1279 } 1280 num += len; 1281 data += len; 1282 datalen -= len; 1283 blkno += (len / SDMMC_SECTOR_SIZE); 1284 1285 while (off + len >= dm_segs[seg].ds_len) { 1286 len -= dm_segs[seg++].ds_len; 1287 off = 0; 1288 } 1289 off += len; 1290 1291 if (seg < sc->sc_dmap->dm_nsegs) 1292 goto retry; 1293 } 1294 1295 out: 1296 return error; 1297 } 1298 1299 int 1300 sdmmc_mem_read_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1301 size_t datalen) 1302 { 1303 struct sdmmc_softc *sc = sf->sc; 1304 int error; 1305 1306 SDMMC_LOCK(sc); 1307 1308 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1309 error = sdmmc_mem_single_read_block(sf, blkno, data, datalen); 1310 goto out; 1311 } 1312 1313 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1314 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1315 goto out; 1316 } 1317 1318 /* DMA transfer */ 1319 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1320 BUS_DMA_NOWAIT|BUS_DMA_READ); 1321 if (error) 1322 goto out; 1323 1324 #ifdef SDMMC_DEBUG 1325 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1326 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1327 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1328 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1329 } 1330 #endif 1331 1332 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1333 BUS_DMASYNC_PREREAD); 1334 1335 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1336 if (error) 1337 goto unload; 1338 1339 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1340 BUS_DMASYNC_POSTREAD); 1341 unload: 1342 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1343 1344 out: 1345 SDMMC_UNLOCK(sc); 1346 1347 return error; 1348 } 1349 1350 /* write */ 1351 static int 1352 sdmmc_mem_single_write_block(struct sdmmc_function *sf, uint32_t blkno, 1353 u_char *data, size_t datalen) 1354 { 1355 struct sdmmc_softc *sc __unused = sf->sc; 1356 int error = 0; 1357 int i; 1358 1359 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1360 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1361 1362 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1363 error = sdmmc_mem_write_block_subr(sf, blkno + i, 1364 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1365 if (error) 1366 break; 1367 } 1368 return error; 1369 } 1370 1371 static int 1372 sdmmc_mem_write_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1373 u_char *data, size_t datalen) 1374 { 1375 struct sdmmc_softc *sc = sf->sc; 1376 struct sdmmc_command cmd; 1377 int error, bbuf, seg, off, len, num; 1378 1379 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1380 error = sdmmc_select_card(sc, sf); 1381 if (error) 1382 goto out; 1383 } 1384 1385 bbuf = 0; 1386 num = 0; 1387 seg = off = len = 0; 1388 retry: 1389 memset(&cmd, 0, sizeof(cmd)); 1390 cmd.c_data = data; 1391 cmd.c_datalen = datalen; 1392 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1393 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1394 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1395 cmd.c_arg = blkno; 1396 if (!ISSET(sf->flags, SFF_SDHC)) 1397 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1398 cmd.c_flags = SCF_CMD_ADTC | SCF_RSP_R1; 1399 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1400 cmd.c_dmamap = sc->sc_dmap; 1401 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1402 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1403 len &= ~(SDMMC_SECTOR_SIZE - 1); 1404 cmd.c_datalen = len; 1405 cmd.c_dmaseg = seg; 1406 cmd.c_dmaoff = off; 1407 bbuf = 0; 1408 if (len == 0) { 1409 /* Use bounce buffer */ 1410 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1411 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1412 memcpy(sf->bbuf, data, SDMMC_SECTOR_SIZE); 1413 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1414 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1415 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 0, 1416 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1417 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1418 cmd.c_dmamap = sf->bbuf_dmap; 1419 cmd.c_dmaseg = 0; 1420 cmd.c_dmaoff = 0; 1421 bbuf = 1; 1422 len = SDMMC_SECTOR_SIZE; 1423 } 1424 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1425 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1426 } 1427 } 1428 1429 error = sdmmc_mmc_command(sc, &cmd); 1430 if (error) 1431 goto out; 1432 1433 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1434 if (cmd.c_opcode == MMC_WRITE_BLOCK_MULTIPLE) { 1435 memset(&cmd, 0, sizeof(cmd)); 1436 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1437 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1438 error = sdmmc_mmc_command(sc, &cmd); 1439 if (error) 1440 goto out; 1441 } 1442 } 1443 1444 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1445 do { 1446 memset(&cmd, 0, sizeof(cmd)); 1447 cmd.c_opcode = MMC_SEND_STATUS; 1448 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1449 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1450 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1451 error = sdmmc_mmc_command(sc, &cmd); 1452 if (error) 1453 break; 1454 /* XXX time out */ 1455 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1456 } 1457 1458 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1459 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1460 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1461 1462 if (bbuf) 1463 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1464 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1465 num += len; 1466 data += len; 1467 datalen -= len; 1468 blkno += (len / SDMMC_SECTOR_SIZE); 1469 1470 while (off + len >= dm_segs[seg].ds_len) { 1471 len -= dm_segs[seg++].ds_len; 1472 off = 0; 1473 } 1474 off += len; 1475 1476 if (seg < sc->sc_dmap->dm_nsegs) 1477 goto retry; 1478 } 1479 1480 out: 1481 return error; 1482 } 1483 1484 int 1485 sdmmc_mem_write_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1486 size_t datalen) 1487 { 1488 struct sdmmc_softc *sc = sf->sc; 1489 int error; 1490 1491 SDMMC_LOCK(sc); 1492 1493 if (sdmmc_chip_write_protect(sc->sc_sct, sc->sc_sch)) { 1494 aprint_normal_dev(sc->sc_dev, "write-protected\n"); 1495 error = EIO; 1496 goto out; 1497 } 1498 1499 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1500 error = sdmmc_mem_single_write_block(sf, blkno, data, datalen); 1501 goto out; 1502 } 1503 1504 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1505 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1506 goto out; 1507 } 1508 1509 /* DMA transfer */ 1510 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1511 BUS_DMA_NOWAIT|BUS_DMA_WRITE); 1512 if (error) 1513 goto out; 1514 1515 #ifdef SDMMC_DEBUG 1516 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1517 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1518 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1519 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1520 } 1521 #endif 1522 1523 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1524 BUS_DMASYNC_PREWRITE); 1525 1526 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1527 if (error) 1528 goto unload; 1529 1530 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1531 BUS_DMASYNC_POSTWRITE); 1532 unload: 1533 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1534 1535 out: 1536 SDMMC_UNLOCK(sc); 1537 1538 return error; 1539 } 1540
Indexes created Mon Sep 22 21:09:42 GMT 2025