sdmmc_mem.c revision 1.15
1 /* $NetBSD: sdmmc_mem.c,v 1.15 2011/02/05 15:45:21 nonaka Exp $ */ 2 /* $OpenBSD: sdmmc_mem.c,v 1.10 2009/01/09 10:55:22 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Copyright (c) 2007-2010 NONAKA Kimihiro <nonaka (at) netbsd.org> 22 * All rights reserved. 23 * 24 * Redistribution and use in source and binary forms, with or without 25 * modification, are permitted provided that the following conditions 26 * are met: 27 * 1. Redistributions of source code must retain the above copyright 28 * notice, this list of conditions and the following disclaimer. 29 * 2. Redistributions in binary form must reproduce the above copyright 30 * notice, this list of conditions and the following disclaimer in the 31 * documentation and/or other materials provided with the distribution. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 34 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 36 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 41 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 42 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 43 * SUCH DAMAGE. 44 */ 45 46 /* Routines for SD/MMC memory cards. */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: sdmmc_mem.c,v 1.15 2011/02/05 15:45:21 nonaka Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/systm.h> 55 #include <sys/device.h> 56 57 #include <dev/sdmmc/sdmmcchip.h> 58 #include <dev/sdmmc/sdmmcreg.h> 59 #include <dev/sdmmc/sdmmcvar.h> 60 61 #ifdef SDMMC_DEBUG 62 #define DPRINTF(s) do { printf s; } while (/*CONSTCOND*/0) 63 #else 64 #define DPRINTF(s) do {} while (/*CONSTCOND*/0) 65 #endif 66 67 static int sdmmc_mem_sd_init(struct sdmmc_softc *, struct sdmmc_function *); 68 static int sdmmc_mem_mmc_init(struct sdmmc_softc *, struct sdmmc_function *); 69 static int sdmmc_mem_send_cid(struct sdmmc_softc *, sdmmc_response *); 70 static int sdmmc_mem_send_csd(struct sdmmc_softc *, struct sdmmc_function *, 71 sdmmc_response *); 72 static int sdmmc_mem_send_scr(struct sdmmc_softc *, struct sdmmc_function *, 73 uint32_t scr[2]); 74 static int sdmmc_mem_decode_scr(struct sdmmc_softc *, struct sdmmc_function *); 75 static int sdmmc_mem_send_cxd_data(struct sdmmc_softc *, int, void *, size_t); 76 static int sdmmc_set_bus_width(struct sdmmc_function *, int); 77 static int sdmmc_mem_sd_switch(struct sdmmc_function *, int, int, int, void *); 78 static int sdmmc_mem_mmc_switch(struct sdmmc_function *, uint8_t, uint8_t, 79 uint8_t); 80 static int sdmmc_mem_spi_read_ocr(struct sdmmc_softc *, uint32_t, uint32_t *); 81 static int sdmmc_mem_single_read_block(struct sdmmc_function *, uint32_t, 82 u_char *, size_t); 83 static int sdmmc_mem_single_write_block(struct sdmmc_function *, uint32_t, 84 u_char *, size_t); 85 static int sdmmc_mem_read_block_subr(struct sdmmc_function *, uint32_t, 86 u_char *, size_t); 87 static int sdmmc_mem_write_block_subr(struct sdmmc_function *, uint32_t, 88 u_char *, size_t); 89 90 /* 91 * Initialize SD/MMC memory cards and memory in SDIO "combo" cards. 92 */ 93 int 94 sdmmc_mem_enable(struct sdmmc_softc *sc) 95 { 96 uint32_t host_ocr; 97 uint32_t card_ocr; 98 uint32_t ocr = 0; 99 int error; 100 101 SDMMC_LOCK(sc); 102 103 /* Set host mode to SD "combo" card or SD memory-only. */ 104 SET(sc->sc_flags, SMF_SD_MODE|SMF_MEM_MODE); 105 106 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 107 sdmmc_spi_chip_initialize(sc->sc_spi_sct, sc->sc_sch); 108 109 /* Reset memory (*must* do that before CMD55 or CMD1). */ 110 sdmmc_go_idle_state(sc); 111 112 /* Check SD Ver.2 */ 113 error = sdmmc_mem_send_if_cond(sc, 0x1aa, &card_ocr); 114 if (error == 0 && card_ocr == 0x1aa) 115 SET(ocr, MMC_OCR_HCS); 116 117 /* 118 * Read the SD/MMC memory OCR value by issuing CMD55 followed 119 * by ACMD41 to read the OCR value from memory-only SD cards. 120 * MMC cards will not respond to CMD55 or ACMD41 and this is 121 * how we distinguish them from SD cards. 122 */ 123 mmc_mode: 124 error = sdmmc_mem_send_op_cond(sc, 125 ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? ocr : 0, &card_ocr); 126 if (error) { 127 if (ISSET(sc->sc_flags, SMF_SD_MODE) && 128 !ISSET(sc->sc_flags, SMF_IO_MODE)) { 129 /* Not a SD card, switch to MMC mode. */ 130 DPRINTF(("%s: switch to MMC mode\n", SDMMCDEVNAME(sc))); 131 CLR(sc->sc_flags, SMF_SD_MODE); 132 goto mmc_mode; 133 } 134 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 135 DPRINTF(("%s: couldn't read memory OCR\n", 136 SDMMCDEVNAME(sc))); 137 goto out; 138 } else { 139 /* Not a "combo" card. */ 140 CLR(sc->sc_flags, SMF_MEM_MODE); 141 error = 0; 142 goto out; 143 } 144 } 145 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 146 /* get card OCR */ 147 error = sdmmc_mem_spi_read_ocr(sc, ocr, &card_ocr); 148 if (error) { 149 DPRINTF(("%s: couldn't read SPI memory OCR\n", 150 SDMMCDEVNAME(sc))); 151 goto out; 152 } 153 } 154 155 /* Set the lowest voltage supported by the card and host. */ 156 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 157 error = sdmmc_set_bus_power(sc, host_ocr, card_ocr); 158 if (error) { 159 DPRINTF(("%s: couldn't supply voltage requested by card\n", 160 SDMMCDEVNAME(sc))); 161 goto out; 162 } 163 host_ocr &= card_ocr; 164 host_ocr |= ocr; 165 166 /* Send the new OCR value until all cards are ready. */ 167 error = sdmmc_mem_send_op_cond(sc, host_ocr, NULL); 168 if (error) { 169 DPRINTF(("%s: couldn't send memory OCR\n", SDMMCDEVNAME(sc))); 170 goto out; 171 } 172 173 out: 174 SDMMC_UNLOCK(sc); 175 176 return error; 177 } 178 179 /* 180 * Read the CSD and CID from all cards and assign each card a unique 181 * relative card address (RCA). CMD2 is ignored by SDIO-only cards. 182 */ 183 void 184 sdmmc_mem_scan(struct sdmmc_softc *sc) 185 { 186 sdmmc_response resp; 187 struct sdmmc_function *sf; 188 uint16_t next_rca; 189 int error; 190 int retry; 191 192 SDMMC_LOCK(sc); 193 194 /* 195 * CMD2 is a broadcast command understood by SD cards and MMC 196 * cards. All cards begin to respond to the command, but back 197 * off if another card drives the CMD line to a different level. 198 * Only one card will get its entire response through. That 199 * card remains silent once it has been assigned a RCA. 200 */ 201 for (retry = 0; retry < 100; retry++) { 202 error = sdmmc_mem_send_cid(sc, &resp); 203 if (error) { 204 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) && 205 error == ETIMEDOUT) { 206 /* No more cards there. */ 207 break; 208 } 209 DPRINTF(("%s: couldn't read CID\n", SDMMCDEVNAME(sc))); 210 break; 211 } 212 213 /* In MMC mode, find the next available RCA. */ 214 next_rca = 1; 215 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 216 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) 217 next_rca++; 218 } 219 220 /* Allocate a sdmmc_function structure. */ 221 sf = sdmmc_function_alloc(sc); 222 sf->rca = next_rca; 223 224 /* 225 * Remember the CID returned in the CMD2 response for 226 * later decoding. 227 */ 228 memcpy(sf->raw_cid, resp, sizeof(sf->raw_cid)); 229 230 /* 231 * Silence the card by assigning it a unique RCA, or 232 * querying it for its RCA in the case of SD. 233 */ 234 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 235 if (sdmmc_set_relative_addr(sc, sf) != 0) { 236 aprint_error_dev(sc->sc_dev, 237 "couldn't set mem RCA\n"); 238 sdmmc_function_free(sf); 239 break; 240 } 241 } 242 243 /* 244 * If this is a memory-only card, the card responding 245 * first becomes an alias for SDIO function 0. 246 */ 247 if (sc->sc_fn0 == NULL) 248 sc->sc_fn0 = sf; 249 250 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 251 252 /* only one function in SPI mode */ 253 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 254 break; 255 } 256 257 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 258 /* Go to Data Transfer Mode, if possible. */ 259 sdmmc_chip_bus_rod(sc->sc_sct, sc->sc_sch, 0); 260 261 /* 262 * All cards are either inactive or awaiting further commands. 263 * Read the CSDs and decode the raw CID for each card. 264 */ 265 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) { 266 error = sdmmc_mem_send_csd(sc, sf, &resp); 267 if (error) { 268 SET(sf->flags, SFF_ERROR); 269 continue; 270 } 271 272 if (sdmmc_decode_csd(sc, resp, sf) != 0 || 273 sdmmc_decode_cid(sc, sf->raw_cid, sf) != 0) { 274 SET(sf->flags, SFF_ERROR); 275 continue; 276 } 277 278 #ifdef SDMMC_DEBUG 279 printf("%s: CID: ", SDMMCDEVNAME(sc)); 280 sdmmc_print_cid(&sf->cid); 281 #endif 282 } 283 284 SDMMC_UNLOCK(sc); 285 } 286 287 int 288 sdmmc_decode_csd(struct sdmmc_softc *sc, sdmmc_response resp, 289 struct sdmmc_function *sf) 290 { 291 /* TRAN_SPEED(2:0): transfer rate exponent */ 292 static const int speed_exponent[8] = { 293 100 * 1, /* 100 Kbits/s */ 294 1 * 1000, /* 1 Mbits/s */ 295 10 * 1000, /* 10 Mbits/s */ 296 100 * 1000, /* 100 Mbits/s */ 297 0, 298 0, 299 0, 300 0, 301 }; 302 /* TRAN_SPEED(6:3): time mantissa */ 303 static const int speed_mantissa[16] = { 304 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80, 305 }; 306 struct sdmmc_csd *csd = &sf->csd; 307 int e, m; 308 309 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 310 /* 311 * CSD version 1.0 corresponds to SD system 312 * specification version 1.0 - 1.10. (SanDisk, 3.5.3) 313 */ 314 csd->csdver = SD_CSD_CSDVER(resp); 315 switch (csd->csdver) { 316 case SD_CSD_CSDVER_2_0: 317 DPRINTF(("%s: SD Ver.2.0\n", SDMMCDEVNAME(sc))); 318 SET(sf->flags, SFF_SDHC); 319 csd->capacity = SD_CSD_V2_CAPACITY(resp); 320 csd->read_bl_len = SD_CSD_V2_BL_LEN; 321 csd->ccc = SD_CSD_CCC(resp); 322 break; 323 324 case SD_CSD_CSDVER_1_0: 325 DPRINTF(("%s: SD Ver.1.0\n", SDMMCDEVNAME(sc))); 326 csd->capacity = SD_CSD_CAPACITY(resp); 327 csd->read_bl_len = SD_CSD_READ_BL_LEN(resp); 328 break; 329 330 default: 331 aprint_error_dev(sc->sc_dev, 332 "unknown SD CSD structure version 0x%x\n", 333 csd->csdver); 334 return 1; 335 } 336 337 csd->mmcver = SD_CSD_MMCVER(resp); 338 csd->write_bl_len = SD_CSD_WRITE_BL_LEN(resp); 339 csd->r2w_factor = SD_CSD_R2W_FACTOR(resp); 340 e = SD_CSD_SPEED_EXP(resp); 341 m = SD_CSD_SPEED_MANT(resp); 342 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 343 } else { 344 csd->csdver = MMC_CSD_CSDVER(resp); 345 if (csd->csdver != MMC_CSD_CSDVER_1_0 && 346 csd->csdver != MMC_CSD_CSDVER_2_0) { 347 aprint_error_dev(sc->sc_dev, 348 "unknown MMC CSD structure version 0x%x\n", 349 csd->csdver); 350 return 1; 351 } 352 353 csd->mmcver = MMC_CSD_MMCVER(resp); 354 csd->capacity = MMC_CSD_CAPACITY(resp); 355 csd->read_bl_len = MMC_CSD_READ_BL_LEN(resp); 356 csd->write_bl_len = MMC_CSD_WRITE_BL_LEN(resp); 357 csd->r2w_factor = MMC_CSD_R2W_FACTOR(resp); 358 e = MMC_CSD_TRAN_SPEED_EXP(resp); 359 m = MMC_CSD_TRAN_SPEED_MANT(resp); 360 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 361 } 362 if ((1 << csd->read_bl_len) > SDMMC_SECTOR_SIZE) 363 csd->capacity *= (1 << csd->read_bl_len) / SDMMC_SECTOR_SIZE; 364 365 #ifdef SDMMC_DUMP_CSD 366 sdmmc_print_csd(resp, csd); 367 #endif 368 369 return 0; 370 } 371 372 int 373 sdmmc_decode_cid(struct sdmmc_softc *sc, sdmmc_response resp, 374 struct sdmmc_function *sf) 375 { 376 struct sdmmc_cid *cid = &sf->cid; 377 378 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 379 cid->mid = SD_CID_MID(resp); 380 cid->oid = SD_CID_OID(resp); 381 SD_CID_PNM_CPY(resp, cid->pnm); 382 cid->rev = SD_CID_REV(resp); 383 cid->psn = SD_CID_PSN(resp); 384 cid->mdt = SD_CID_MDT(resp); 385 } else { 386 switch(sf->csd.mmcver) { 387 case MMC_CSD_MMCVER_1_0: 388 case MMC_CSD_MMCVER_1_4: 389 cid->mid = MMC_CID_MID_V1(resp); 390 MMC_CID_PNM_V1_CPY(resp, cid->pnm); 391 cid->rev = MMC_CID_REV_V1(resp); 392 cid->psn = MMC_CID_PSN_V1(resp); 393 cid->mdt = MMC_CID_MDT_V1(resp); 394 break; 395 case MMC_CSD_MMCVER_2_0: 396 case MMC_CSD_MMCVER_3_1: 397 case MMC_CSD_MMCVER_4_0: 398 cid->mid = MMC_CID_MID_V2(resp); 399 cid->oid = MMC_CID_OID_V2(resp); 400 MMC_CID_PNM_V2_CPY(resp, cid->pnm); 401 cid->psn = MMC_CID_PSN_V2(resp); 402 break; 403 default: 404 aprint_error_dev(sc->sc_dev, "unknown MMC version %d\n", 405 sf->csd.mmcver); 406 return 1; 407 } 408 } 409 return 0; 410 } 411 412 void 413 sdmmc_print_cid(struct sdmmc_cid *cid) 414 { 415 416 printf("mid=0x%02x oid=0x%04x pnm=\"%s\" rev=0x%02x psn=0x%08x" 417 " mdt=%03x\n", cid->mid, cid->oid, cid->pnm, cid->rev, cid->psn, 418 cid->mdt); 419 } 420 421 #ifdef SDMMC_DUMP_CSD 422 void 423 sdmmc_print_csd(sdmmc_response resp, struct sdmmc_csd *csd) 424 { 425 426 printf("csdver = %d\n", csd->csdver); 427 printf("mmcver = %d\n", csd->mmcver); 428 printf("capacity = 0x%08x\n", csd->capacity); 429 printf("read_bl_len = %d\n", csd->read_bl_len); 430 printf("write_cl_len = %d\n", csd->write_bl_len); 431 printf("r2w_factor = %d\n", csd->r2w_factor); 432 printf("tran_speed = %d\n", csd->tran_speed); 433 printf("ccc = 0x%x\n", csd->ccc); 434 } 435 #endif 436 437 /* 438 * Initialize a SD/MMC memory card. 439 */ 440 int 441 sdmmc_mem_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 442 { 443 int error = 0; 444 445 SDMMC_LOCK(sc); 446 447 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 448 error = sdmmc_select_card(sc, sf); 449 if (error) 450 goto out; 451 } 452 453 if (!ISSET(sf->flags, SFF_SDHC)) { 454 error = sdmmc_mem_set_blocklen(sc, sf); 455 if (error) 456 goto out; 457 } 458 459 if (ISSET(sc->sc_flags, SMF_SD_MODE)) 460 error = sdmmc_mem_sd_init(sc, sf); 461 else 462 error = sdmmc_mem_mmc_init(sc, sf); 463 464 out: 465 SDMMC_UNLOCK(sc); 466 467 return error; 468 } 469 470 /* 471 * Get or set the card's memory OCR value (SD or MMC). 472 */ 473 int 474 sdmmc_mem_send_op_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 475 { 476 struct sdmmc_command cmd; 477 int error; 478 int retry; 479 480 /* Don't lock */ 481 482 /* 483 * If we change the OCR value, retry the command until the OCR 484 * we receive in response has the "CARD BUSY" bit set, meaning 485 * that all cards are ready for identification. 486 */ 487 for (retry = 0; retry < 100; retry++) { 488 memset(&cmd, 0, sizeof(cmd)); 489 cmd.c_arg = !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? 490 ocr : (ocr & MMC_OCR_HCS); 491 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R3 | SCF_RSP_SPI_R1; 492 493 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 494 cmd.c_opcode = SD_APP_OP_COND; 495 error = sdmmc_app_command(sc, NULL, &cmd); 496 } else { 497 cmd.c_opcode = MMC_SEND_OP_COND; 498 error = sdmmc_mmc_command(sc, &cmd); 499 } 500 if (error) 501 break; 502 503 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 504 if (!ISSET(MMC_SPI_R1(cmd.c_resp), R1_SPI_IDLE)) 505 break; 506 } else { 507 if (ISSET(MMC_R3(cmd.c_resp), MMC_OCR_MEM_READY) || 508 ocr == 0) 509 break; 510 } 511 512 error = ETIMEDOUT; 513 sdmmc_delay(10000); 514 } 515 if (error == 0 && 516 ocrp != NULL && 517 !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 518 *ocrp = MMC_R3(cmd.c_resp); 519 DPRINTF(("%s: sdmmc_mem_send_op_cond: error=%d, ocr=%#x\n", 520 SDMMCDEVNAME(sc), error, MMC_R3(cmd.c_resp))); 521 return error; 522 } 523 524 int 525 sdmmc_mem_send_if_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 526 { 527 struct sdmmc_command cmd; 528 int error; 529 530 /* Don't lock */ 531 532 memset(&cmd, 0, sizeof(cmd)); 533 cmd.c_arg = ocr; 534 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R7 | SCF_RSP_SPI_R7; 535 cmd.c_opcode = SD_SEND_IF_COND; 536 537 error = sdmmc_mmc_command(sc, &cmd); 538 if (error == 0 && ocrp != NULL) { 539 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 540 *ocrp = MMC_SPI_R7(cmd.c_resp); 541 } else { 542 *ocrp = MMC_R7(cmd.c_resp); 543 } 544 DPRINTF(("%s: sdmmc_mem_send_if_cond: error=%d, ocr=%#x\n", 545 SDMMCDEVNAME(sc), error, *ocrp)); 546 } 547 return error; 548 } 549 550 /* 551 * Set the read block length appropriately for this card, according to 552 * the card CSD register value. 553 */ 554 int 555 sdmmc_mem_set_blocklen(struct sdmmc_softc *sc, struct sdmmc_function *sf) 556 { 557 struct sdmmc_command cmd; 558 int error; 559 560 /* Don't lock */ 561 562 memset(&cmd, 0, sizeof(cmd)); 563 cmd.c_opcode = MMC_SET_BLOCKLEN; 564 cmd.c_arg = SDMMC_SECTOR_SIZE; 565 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R1; 566 567 error = sdmmc_mmc_command(sc, &cmd); 568 569 DPRINTF(("%s: sdmmc_mem_set_blocklen: read_bl_len=%d sector_size=%d\n", 570 SDMMCDEVNAME(sc), 1 << sf->csd.read_bl_len, SDMMC_SECTOR_SIZE)); 571 572 return error; 573 } 574 575 static int 576 sdmmc_mem_sd_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 577 { 578 static const struct { 579 int v; 580 int freq; 581 } switch_group0_functions[] = { 582 /* Default/SDR12 */ 583 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 584 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 25000 }, 585 586 /* High-Speed/SDR25 */ 587 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 588 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 50000 }, 589 590 /* SDR50 */ 591 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 100000 }, 592 593 /* SDR104 */ 594 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 208000 }, 595 596 /* DDR50 */ 597 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 50000 }, 598 }; 599 int host_ocr, support_func, best_func, error, g, i; 600 char status[64]; 601 602 error = sdmmc_mem_send_scr(sc, sf, sf->raw_scr); 603 if (error) { 604 aprint_error_dev(sc->sc_dev, "SD_SEND_SCR send failed.\n"); 605 return error; 606 } 607 error = sdmmc_mem_decode_scr(sc, sf); 608 if (error) 609 return error; 610 611 if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE) && 612 ISSET(sf->scr.bus_width, SCR_SD_BUS_WIDTHS_4BIT)) { 613 DPRINTF(("%s: change bus width\n", SDMMCDEVNAME(sc))); 614 error = sdmmc_set_bus_width(sf, 4); 615 if (error) { 616 aprint_error_dev(sc->sc_dev, 617 "can't change bus width (%d bit)\n", 4); 618 return error; 619 } 620 sf->width = 4; 621 } else { 622 sf->width = 1; 623 } 624 625 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 626 ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) { 627 DPRINTF(("%s: switch func mode 0\n", SDMMCDEVNAME(sc))); 628 error = sdmmc_mem_sd_switch(sf, 0, 1, 0, status); 629 if (error) { 630 aprint_error_dev(sc->sc_dev, 631 "switch func mode 0 failed\n"); 632 return error; 633 } 634 635 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 636 support_func = SFUNC_STATUS_GROUP(status, 1); 637 best_func = 0; 638 for (i = 0, g = 1; 639 i < __arraycount(switch_group0_functions); i++, g <<= 1) { 640 if (!(switch_group0_functions[i].v & host_ocr)) 641 continue; 642 if (g & support_func) 643 best_func = i; 644 } 645 if (ISSET(sc->sc_caps, SMC_CAPS_SD_HIGHSPEED) && 646 best_func != 0) { 647 DPRINTF(("%s: switch func mode 1(func=%d)\n", 648 SDMMCDEVNAME(sc), best_func)); 649 error = 650 sdmmc_mem_sd_switch(sf, 1, 1, best_func, status); 651 if (error) { 652 aprint_error_dev(sc->sc_dev, 653 "switch func mode 1 failed:" 654 " group 1 function %d(0x%2x)\n", 655 best_func, support_func); 656 return error; 657 } 658 sf->csd.tran_speed = 659 switch_group0_functions[best_func].freq; 660 661 /* Wait 400KHz x 8 clock */ 662 delay(1); 663 } 664 } 665 666 /* change bus clock */ 667 if (sc->sc_busclk > sf->csd.tran_speed) 668 sc->sc_busclk = sf->csd.tran_speed; 669 error = sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 670 if (error) { 671 aprint_error_dev(sc->sc_dev, "can't change bus clock\n"); 672 return error; 673 } 674 675 return 0; 676 } 677 678 static int 679 sdmmc_mem_mmc_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 680 { 681 int width, value, hs_timing, error; 682 char ext_csd[512]; 683 684 if (sf->csd.mmcver >= MMC_CSD_MMCVER_4_0) { 685 error = sdmmc_mem_send_cxd_data(sc, 686 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 687 if (error) { 688 aprint_error_dev(sc->sc_dev, "can't read EXT_CSD\n"); 689 return error; 690 } 691 if (ext_csd[EXT_CSD_STRUCTURE] > EXT_CSD_STRUCTURE_VER_1_2) { 692 aprint_error_dev(sc->sc_dev, 693 "unrecognised future version\n"); 694 return error; 695 } 696 hs_timing = 0; 697 switch (ext_csd[EXT_CSD_CARD_TYPE]) { 698 case EXT_CSD_CARD_TYPE_26M: 699 sf->csd.tran_speed = 26000; /* 26MHz */ 700 break; 701 702 case EXT_CSD_CARD_TYPE_52M | EXT_CSD_CARD_TYPE_26M: 703 sf->csd.tran_speed = 52000; /* 52MHz */ 704 hs_timing = 1; 705 706 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 707 EXT_CSD_HS_TIMING, hs_timing); 708 if (error) { 709 aprint_error_dev(sc->sc_dev, 710 "can't change high speed\n"); 711 return error; 712 } 713 break; 714 715 default: 716 aprint_error_dev(sc->sc_dev, 717 "unknwon CARD_TYPE: 0x%x\n", 718 ext_csd[EXT_CSD_CARD_TYPE]); 719 return error; 720 } 721 if (sc->sc_busclk > sf->csd.tran_speed) 722 sc->sc_busclk = sf->csd.tran_speed; 723 error = 724 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 725 if (error) { 726 aprint_error_dev(sc->sc_dev, 727 "can't change bus clock\n"); 728 return error; 729 } 730 if (hs_timing) { 731 error = sdmmc_mem_send_cxd_data(sc, 732 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 733 if (error) { 734 aprint_error_dev(sc->sc_dev, 735 "can't re-read EXT_CSD\n"); 736 return error; 737 } 738 if (ext_csd[EXT_CSD_HS_TIMING] != hs_timing) { 739 aprint_error_dev(sc->sc_dev, 740 "HS_TIMING set failed\n"); 741 return EINVAL; 742 } 743 } 744 745 if (ISSET(sc->sc_caps, SMC_CAPS_8BIT_MODE)) { 746 width = 8; 747 value = EXT_CSD_BUS_WIDTH_8; 748 } else if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE)) { 749 width = 4; 750 value = EXT_CSD_BUS_WIDTH_4; 751 } else { 752 width = 1; 753 value = EXT_CSD_BUS_WIDTH_1; 754 } 755 756 if (width != 1) { 757 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 758 EXT_CSD_BUS_WIDTH, value); 759 if (error == 0) 760 error = sdmmc_chip_bus_width(sc->sc_sct, 761 sc->sc_sch, width); 762 else { 763 DPRINTF(("%s: can't change bus width" 764 " (%d bit)\n", SDMMCDEVNAME(sc), width)); 765 return error; 766 } 767 768 /* XXXX: need bus test? (using by CMD14 & CMD19) */ 769 } 770 sf->width = width; 771 } else { 772 if (sc->sc_busclk > sf->csd.tran_speed) 773 sc->sc_busclk = sf->csd.tran_speed; 774 error = 775 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 776 if (error) { 777 aprint_error_dev(sc->sc_dev, 778 "can't change bus clock\n"); 779 return error; 780 } 781 sf->width = 1; 782 } 783 784 return 0; 785 } 786 787 static int 788 sdmmc_mem_send_cid(struct sdmmc_softc *sc, sdmmc_response *resp) 789 { 790 struct sdmmc_command cmd; 791 int error; 792 793 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 794 memset(&cmd, 0, sizeof cmd); 795 cmd.c_opcode = MMC_ALL_SEND_CID; 796 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R2; 797 798 error = sdmmc_mmc_command(sc, &cmd); 799 } else { 800 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CID, &cmd.c_resp, 801 sizeof(cmd.c_resp)); 802 } 803 804 #ifdef SDMMC_DEBUG 805 sdmmc_dump_data("CID", cmd.c_resp, sizeof(cmd.c_resp)); 806 #endif 807 if (error == 0 && resp != NULL) 808 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 809 return error; 810 } 811 812 static int 813 sdmmc_mem_send_csd(struct sdmmc_softc *sc, struct sdmmc_function *sf, 814 sdmmc_response *resp) 815 { 816 struct sdmmc_command cmd; 817 int error; 818 819 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 820 memset(&cmd, 0, sizeof cmd); 821 cmd.c_opcode = MMC_SEND_CSD; 822 cmd.c_arg = MMC_ARG_RCA(sf->rca); 823 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R2; 824 825 error = sdmmc_mmc_command(sc, &cmd); 826 } else { 827 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CSD, &cmd.c_resp, 828 sizeof(cmd.c_resp)); 829 } 830 831 #ifdef SDMMC_DEBUG 832 sdmmc_dump_data("CSD", cmd.c_resp, sizeof(cmd.c_resp)); 833 #endif 834 if (error == 0 && resp != NULL) 835 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 836 return error; 837 } 838 839 static int 840 sdmmc_mem_send_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf, 841 uint32_t scr[2]) 842 { 843 struct sdmmc_command cmd; 844 bus_dma_segment_t ds[1]; 845 void *ptr = NULL; 846 int datalen = 8; 847 int rseg; 848 int error = 0; 849 850 /* Don't lock */ 851 852 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 853 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, 854 ds, 1, &rseg, BUS_DMA_NOWAIT); 855 if (error) 856 goto out; 857 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 858 BUS_DMA_NOWAIT); 859 if (error) 860 goto dmamem_free; 861 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 862 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 863 if (error) 864 goto dmamem_unmap; 865 866 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 867 BUS_DMASYNC_PREREAD); 868 } else { 869 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 870 if (ptr == NULL) 871 goto out; 872 } 873 874 memset(&cmd, 0, sizeof(cmd)); 875 cmd.c_data = ptr; 876 cmd.c_datalen = datalen; 877 cmd.c_blklen = datalen; 878 cmd.c_arg = 0; 879 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 880 cmd.c_opcode = SD_APP_SEND_SCR; 881 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 882 cmd.c_dmamap = sc->sc_dmap; 883 884 error = sdmmc_app_command(sc, sf, &cmd); 885 if (error == 0) { 886 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 887 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 888 BUS_DMASYNC_POSTREAD); 889 } 890 memcpy(scr, ptr, datalen); 891 } 892 893 out: 894 if (ptr != NULL) { 895 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 896 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 897 dmamem_unmap: 898 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 899 dmamem_free: 900 bus_dmamem_free(sc->sc_dmat, ds, rseg); 901 } else { 902 free(ptr, M_DEVBUF); 903 } 904 } 905 DPRINTF(("%s: sdmem_mem_send_scr: error = %d\n", SDMMCDEVNAME(sc), 906 error)); 907 908 #ifdef SDMMC_DEBUG 909 if (error == 0) 910 sdmmc_dump_data("SCR", scr, 8); 911 #endif 912 return error; 913 } 914 915 static int 916 sdmmc_mem_decode_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf) 917 { 918 sdmmc_response resp; 919 int ver; 920 921 memset(resp, 0, sizeof(resp)); 922 /* 923 * Change the raw-scr received from the DMA stream to resp. 924 */ 925 resp[0] = be32toh(sf->raw_scr[1]); 926 resp[1] = be32toh(sf->raw_scr[0]) >> 8; 927 928 ver = SCR_STRUCTURE(resp); 929 sf->scr.sd_spec = SCR_SD_SPEC(resp); 930 sf->scr.bus_width = SCR_SD_BUS_WIDTHS(resp); 931 932 DPRINTF(("%s: sdmmc_mem_decode_scr: spec=%d, bus width=%d\n", 933 SDMMCDEVNAME(sc), sf->scr.sd_spec, sf->scr.bus_width)); 934 935 if (ver != 0) { 936 DPRINTF(("%s: unknown structure version: %d\n", 937 SDMMCDEVNAME(sc), ver)); 938 return EINVAL; 939 } 940 return 0; 941 } 942 943 static int 944 sdmmc_mem_send_cxd_data(struct sdmmc_softc *sc, int opcode, void *data, 945 size_t datalen) 946 { 947 struct sdmmc_command cmd; 948 bus_dma_segment_t ds[1]; 949 void *ptr = NULL; 950 int rseg; 951 int error = 0; 952 953 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 954 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, ds, 955 1, &rseg, BUS_DMA_NOWAIT); 956 if (error) 957 goto out; 958 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 959 BUS_DMA_NOWAIT); 960 if (error) 961 goto dmamem_free; 962 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 963 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 964 if (error) 965 goto dmamem_unmap; 966 967 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 968 BUS_DMASYNC_PREREAD); 969 } else { 970 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 971 if (ptr == NULL) 972 goto out; 973 } 974 975 memset(&cmd, 0, sizeof(cmd)); 976 cmd.c_data = ptr; 977 cmd.c_datalen = datalen; 978 cmd.c_blklen = datalen; 979 cmd.c_opcode = opcode; 980 cmd.c_arg = 0; 981 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_SPI_R1; 982 if (opcode == MMC_SEND_EXT_CSD) 983 SET(cmd.c_flags, SCF_RSP_R1); 984 else 985 SET(cmd.c_flags, SCF_RSP_R2); 986 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 987 cmd.c_dmamap = sc->sc_dmap; 988 989 error = sdmmc_mmc_command(sc, &cmd); 990 if (error == 0) { 991 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 992 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 993 BUS_DMASYNC_POSTREAD); 994 } 995 memcpy(data, ptr, datalen); 996 } 997 998 out: 999 if (ptr != NULL) { 1000 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1001 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1002 dmamem_unmap: 1003 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 1004 dmamem_free: 1005 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1006 } else { 1007 free(ptr, M_DEVBUF); 1008 } 1009 } 1010 return error; 1011 } 1012 1013 static int 1014 sdmmc_set_bus_width(struct sdmmc_function *sf, int width) 1015 { 1016 struct sdmmc_softc *sc = sf->sc; 1017 struct sdmmc_command cmd; 1018 int error; 1019 1020 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1021 return ENODEV; 1022 1023 memset(&cmd, 0, sizeof(cmd)); 1024 cmd.c_opcode = SD_APP_SET_BUS_WIDTH; 1025 cmd.c_flags = SCF_RSP_R1 | SCF_CMD_AC; 1026 1027 switch (width) { 1028 case 1: 1029 cmd.c_arg = SD_ARG_BUS_WIDTH_1; 1030 break; 1031 1032 case 4: 1033 cmd.c_arg = SD_ARG_BUS_WIDTH_4; 1034 break; 1035 1036 default: 1037 return EINVAL; 1038 } 1039 1040 error = sdmmc_app_command(sc, sf, &cmd); 1041 if (error == 0) 1042 error = sdmmc_chip_bus_width(sc->sc_sct, sc->sc_sch, width); 1043 return error; 1044 } 1045 1046 static int 1047 sdmmc_mem_sd_switch(struct sdmmc_function *sf, int mode, int group, 1048 int function, void *status) 1049 { 1050 struct sdmmc_softc *sc = sf->sc; 1051 struct sdmmc_command cmd; 1052 bus_dma_segment_t ds[1]; 1053 void *ptr = NULL; 1054 int gsft, rseg, error = 0; 1055 const int statlen = 64; 1056 1057 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 1058 !ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) 1059 return EINVAL; 1060 1061 if (group <= 0 || group > 6 || 1062 function < 0 || function > 16) 1063 return EINVAL; 1064 1065 gsft = (group - 1) << 2; 1066 1067 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1068 error = bus_dmamem_alloc(sc->sc_dmat, statlen, PAGE_SIZE, 0, ds, 1069 1, &rseg, BUS_DMA_NOWAIT); 1070 if (error) 1071 goto out; 1072 error = bus_dmamem_map(sc->sc_dmat, ds, 1, statlen, &ptr, 1073 BUS_DMA_NOWAIT); 1074 if (error) 1075 goto dmamem_free; 1076 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, statlen, 1077 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 1078 if (error) 1079 goto dmamem_unmap; 1080 1081 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1082 BUS_DMASYNC_PREREAD); 1083 } else { 1084 ptr = malloc(statlen, M_DEVBUF, M_NOWAIT | M_ZERO); 1085 if (ptr == NULL) 1086 goto out; 1087 } 1088 1089 memset(&cmd, 0, sizeof(cmd)); 1090 cmd.c_data = ptr; 1091 cmd.c_datalen = statlen; 1092 cmd.c_blklen = statlen; 1093 cmd.c_opcode = SD_SEND_SWITCH_FUNC; 1094 cmd.c_arg = 1095 (!!mode << 31) | (function << gsft) | (0x00ffffff & ~(0xf << gsft)); 1096 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1097 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 1098 cmd.c_dmamap = sc->sc_dmap; 1099 1100 error = sdmmc_mmc_command(sc, &cmd); 1101 if (error == 0) { 1102 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1103 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1104 BUS_DMASYNC_POSTREAD); 1105 } 1106 memcpy(status, ptr, statlen); 1107 } 1108 1109 out: 1110 if (ptr != NULL) { 1111 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1112 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1113 dmamem_unmap: 1114 bus_dmamem_unmap(sc->sc_dmat, ptr, statlen); 1115 dmamem_free: 1116 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1117 } else { 1118 free(ptr, M_DEVBUF); 1119 } 1120 } 1121 return error; 1122 } 1123 1124 static int 1125 sdmmc_mem_mmc_switch(struct sdmmc_function *sf, uint8_t set, uint8_t index, 1126 uint8_t value) 1127 { 1128 struct sdmmc_softc *sc = sf->sc; 1129 struct sdmmc_command cmd; 1130 1131 memset(&cmd, 0, sizeof(cmd)); 1132 cmd.c_opcode = MMC_SWITCH; 1133 cmd.c_arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 1134 (index << 16) | (value << 8) | set; 1135 cmd.c_flags = SCF_RSP_SPI_R1B | SCF_RSP_R1B | SCF_CMD_AC; 1136 1137 return sdmmc_mmc_command(sc, &cmd); 1138 } 1139 1140 /* 1141 * SPI mode function 1142 */ 1143 static int 1144 sdmmc_mem_spi_read_ocr(struct sdmmc_softc *sc, uint32_t hcs, uint32_t *card_ocr) 1145 { 1146 struct sdmmc_command cmd; 1147 int error; 1148 1149 memset(&cmd, 0, sizeof(cmd)); 1150 cmd.c_opcode = MMC_READ_OCR; 1151 cmd.c_arg = hcs ? MMC_OCR_HCS : 0; 1152 cmd.c_flags = SCF_RSP_SPI_R3; 1153 1154 error = sdmmc_mmc_command(sc, &cmd); 1155 if (error == 0 && card_ocr != NULL) 1156 *card_ocr = cmd.c_resp[1]; 1157 DPRINTF(("%s: sdmmc_mem_spi_read_ocr: error=%d, ocr=%#x\n", 1158 SDMMCDEVNAME(sc), error, cmd.c_resp[1])); 1159 return error; 1160 } 1161 1162 /* 1163 * read/write function 1164 */ 1165 /* read */ 1166 static int 1167 sdmmc_mem_single_read_block(struct sdmmc_function *sf, uint32_t blkno, 1168 u_char *data, size_t datalen) 1169 { 1170 struct sdmmc_softc *sc __unused = sf->sc; 1171 int error = 0; 1172 int i; 1173 1174 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1175 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1176 1177 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1178 error = sdmmc_mem_read_block_subr(sf, blkno + i, 1179 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1180 if (error) 1181 break; 1182 } 1183 return error; 1184 } 1185 1186 static int 1187 sdmmc_mem_read_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1188 u_char *data, size_t datalen) 1189 { 1190 struct sdmmc_softc *sc = sf->sc; 1191 struct sdmmc_command cmd; 1192 int error, bbuf, seg, off, len, num; 1193 1194 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1195 error = sdmmc_select_card(sc, sf); 1196 if (error) 1197 goto out; 1198 } 1199 1200 bbuf = 0; 1201 num = 0; 1202 seg = off = len = 0; 1203 retry: 1204 memset(&cmd, 0, sizeof(cmd)); 1205 cmd.c_data = data; 1206 cmd.c_datalen = datalen; 1207 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1208 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1209 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1210 cmd.c_arg = blkno; 1211 if (!ISSET(sf->flags, SFF_SDHC)) 1212 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1213 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1214 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1215 cmd.c_dmamap = sc->sc_dmap; 1216 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1217 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1218 len &= ~(SDMMC_SECTOR_SIZE - 1); 1219 cmd.c_datalen = len; 1220 cmd.c_dmaseg = seg; 1221 cmd.c_dmaoff = off; 1222 bbuf = 0; 1223 if (len == 0) { 1224 /* Use bounce buffer */ 1225 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1226 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1227 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1228 cmd.c_dmamap = sf->bbuf_dmap; 1229 cmd.c_dmaseg = 0; 1230 cmd.c_dmaoff = 0; 1231 bbuf = 1; 1232 len = SDMMC_SECTOR_SIZE; 1233 } 1234 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1235 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1236 } 1237 } 1238 1239 error = sdmmc_mmc_command(sc, &cmd); 1240 if (error) 1241 goto out; 1242 1243 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1244 if (cmd.c_opcode == MMC_READ_BLOCK_MULTIPLE) { 1245 memset(&cmd, 0, sizeof cmd); 1246 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1247 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1248 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1249 error = sdmmc_mmc_command(sc, &cmd); 1250 if (error) 1251 goto out; 1252 } 1253 } 1254 1255 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1256 do { 1257 memset(&cmd, 0, sizeof(cmd)); 1258 cmd.c_opcode = MMC_SEND_STATUS; 1259 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1260 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1261 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1262 error = sdmmc_mmc_command(sc, &cmd); 1263 if (error) 1264 break; 1265 /* XXX time out */ 1266 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1267 } 1268 1269 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1270 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1271 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1272 1273 if (bbuf) { 1274 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1275 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1276 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1277 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1278 memcpy(data, sf->bbuf, SDMMC_SECTOR_SIZE); 1279 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1280 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1281 } 1282 num += len; 1283 data += len; 1284 datalen -= len; 1285 blkno += (len / SDMMC_SECTOR_SIZE); 1286 1287 while (off + len >= dm_segs[seg].ds_len) { 1288 len -= dm_segs[seg++].ds_len; 1289 off = 0; 1290 } 1291 off += len; 1292 1293 if (seg < sc->sc_dmap->dm_nsegs) 1294 goto retry; 1295 } 1296 1297 out: 1298 return error; 1299 } 1300 1301 int 1302 sdmmc_mem_read_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1303 size_t datalen) 1304 { 1305 struct sdmmc_softc *sc = sf->sc; 1306 int error; 1307 1308 SDMMC_LOCK(sc); 1309 1310 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1311 error = sdmmc_mem_single_read_block(sf, blkno, data, datalen); 1312 goto out; 1313 } 1314 1315 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1316 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1317 goto out; 1318 } 1319 1320 /* DMA transfer */ 1321 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1322 BUS_DMA_NOWAIT|BUS_DMA_READ); 1323 if (error) 1324 goto out; 1325 1326 #ifdef SDMMC_DEBUG 1327 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1328 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1329 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1330 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1331 } 1332 #endif 1333 1334 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1335 BUS_DMASYNC_PREREAD); 1336 1337 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1338 if (error) 1339 goto unload; 1340 1341 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1342 BUS_DMASYNC_POSTREAD); 1343 unload: 1344 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1345 1346 out: 1347 SDMMC_UNLOCK(sc); 1348 1349 return error; 1350 } 1351 1352 /* write */ 1353 static int 1354 sdmmc_mem_single_write_block(struct sdmmc_function *sf, uint32_t blkno, 1355 u_char *data, size_t datalen) 1356 { 1357 struct sdmmc_softc *sc __unused = sf->sc; 1358 int error = 0; 1359 int i; 1360 1361 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1362 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1363 1364 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1365 error = sdmmc_mem_write_block_subr(sf, blkno + i, 1366 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1367 if (error) 1368 break; 1369 } 1370 return error; 1371 } 1372 1373 static int 1374 sdmmc_mem_write_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1375 u_char *data, size_t datalen) 1376 { 1377 struct sdmmc_softc *sc = sf->sc; 1378 struct sdmmc_command cmd; 1379 int error, bbuf, seg, off, len, num; 1380 1381 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1382 error = sdmmc_select_card(sc, sf); 1383 if (error) 1384 goto out; 1385 } 1386 1387 bbuf = 0; 1388 num = 0; 1389 seg = off = len = 0; 1390 retry: 1391 memset(&cmd, 0, sizeof(cmd)); 1392 cmd.c_data = data; 1393 cmd.c_datalen = datalen; 1394 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1395 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1396 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1397 cmd.c_arg = blkno; 1398 if (!ISSET(sf->flags, SFF_SDHC)) 1399 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1400 cmd.c_flags = SCF_CMD_ADTC | SCF_RSP_R1; 1401 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1402 cmd.c_dmamap = sc->sc_dmap; 1403 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1404 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1405 len &= ~(SDMMC_SECTOR_SIZE - 1); 1406 cmd.c_datalen = len; 1407 cmd.c_dmaseg = seg; 1408 cmd.c_dmaoff = off; 1409 bbuf = 0; 1410 if (len == 0) { 1411 /* Use bounce buffer */ 1412 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1413 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1414 memcpy(sf->bbuf, data, SDMMC_SECTOR_SIZE); 1415 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1416 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1417 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 0, 1418 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1419 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1420 cmd.c_dmamap = sf->bbuf_dmap; 1421 cmd.c_dmaseg = 0; 1422 cmd.c_dmaoff = 0; 1423 bbuf = 1; 1424 len = SDMMC_SECTOR_SIZE; 1425 } 1426 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1427 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1428 } 1429 } 1430 1431 error = sdmmc_mmc_command(sc, &cmd); 1432 if (error) 1433 goto out; 1434 1435 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1436 if (cmd.c_opcode == MMC_WRITE_BLOCK_MULTIPLE) { 1437 memset(&cmd, 0, sizeof(cmd)); 1438 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1439 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1440 error = sdmmc_mmc_command(sc, &cmd); 1441 if (error) 1442 goto out; 1443 } 1444 } 1445 1446 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1447 do { 1448 memset(&cmd, 0, sizeof(cmd)); 1449 cmd.c_opcode = MMC_SEND_STATUS; 1450 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1451 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1452 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1453 error = sdmmc_mmc_command(sc, &cmd); 1454 if (error) 1455 break; 1456 /* XXX time out */ 1457 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1458 } 1459 1460 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1461 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1462 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1463 1464 if (bbuf) 1465 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1466 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1467 num += len; 1468 data += len; 1469 datalen -= len; 1470 blkno += (len / SDMMC_SECTOR_SIZE); 1471 1472 while (off + len >= dm_segs[seg].ds_len) { 1473 len -= dm_segs[seg++].ds_len; 1474 off = 0; 1475 } 1476 off += len; 1477 1478 if (seg < sc->sc_dmap->dm_nsegs) 1479 goto retry; 1480 } 1481 1482 out: 1483 return error; 1484 } 1485 1486 int 1487 sdmmc_mem_write_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1488 size_t datalen) 1489 { 1490 struct sdmmc_softc *sc = sf->sc; 1491 int error; 1492 1493 SDMMC_LOCK(sc); 1494 1495 if (sdmmc_chip_write_protect(sc->sc_sct, sc->sc_sch)) { 1496 aprint_normal_dev(sc->sc_dev, "write-protected\n"); 1497 error = EIO; 1498 goto out; 1499 } 1500 1501 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1502 error = sdmmc_mem_single_write_block(sf, blkno, data, datalen); 1503 goto out; 1504 } 1505 1506 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1507 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1508 goto out; 1509 } 1510 1511 /* DMA transfer */ 1512 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1513 BUS_DMA_NOWAIT|BUS_DMA_WRITE); 1514 if (error) 1515 goto out; 1516 1517 #ifdef SDMMC_DEBUG 1518 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1519 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1520 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1521 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1522 } 1523 #endif 1524 1525 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1526 BUS_DMASYNC_PREWRITE); 1527 1528 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1529 if (error) 1530 goto unload; 1531 1532 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1533 BUS_DMASYNC_POSTWRITE); 1534 unload: 1535 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1536 1537 out: 1538 SDMMC_UNLOCK(sc); 1539 1540 return error; 1541 } 1542
Indexes created Wed Sep 24 15:09:51 GMT 2025