sdmmc_mem.c revision 1.16
1 /* $NetBSD: sdmmc_mem.c,v 1.16 2011/02/13 06:43:52 nonaka Exp $ */ 2 /* $OpenBSD: sdmmc_mem.c,v 1.10 2009/01/09 10:55:22 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Copyright (c) 2007-2010 NONAKA Kimihiro <nonaka (at) netbsd.org> 22 * All rights reserved. 23 * 24 * Redistribution and use in source and binary forms, with or without 25 * modification, are permitted provided that the following conditions 26 * are met: 27 * 1. Redistributions of source code must retain the above copyright 28 * notice, this list of conditions and the following disclaimer. 29 * 2. Redistributions in binary form must reproduce the above copyright 30 * notice, this list of conditions and the following disclaimer in the 31 * documentation and/or other materials provided with the distribution. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 34 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 36 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 41 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 42 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 43 * SUCH DAMAGE. 44 */ 45 46 /* Routines for SD/MMC memory cards. */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: sdmmc_mem.c,v 1.16 2011/02/13 06:43:52 nonaka Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/systm.h> 55 #include <sys/device.h> 56 57 #include <dev/sdmmc/sdmmcchip.h> 58 #include <dev/sdmmc/sdmmcreg.h> 59 #include <dev/sdmmc/sdmmcvar.h> 60 61 #ifdef SDMMC_DEBUG 62 #define DPRINTF(s) do { printf s; } while (/*CONSTCOND*/0) 63 #else 64 #define DPRINTF(s) do {} while (/*CONSTCOND*/0) 65 #endif 66 67 static int sdmmc_mem_sd_init(struct sdmmc_softc *, struct sdmmc_function *); 68 static int sdmmc_mem_mmc_init(struct sdmmc_softc *, struct sdmmc_function *); 69 static int sdmmc_mem_send_cid(struct sdmmc_softc *, sdmmc_response *); 70 static int sdmmc_mem_send_csd(struct sdmmc_softc *, struct sdmmc_function *, 71 sdmmc_response *); 72 static int sdmmc_mem_send_scr(struct sdmmc_softc *, struct sdmmc_function *, 73 uint32_t scr[2]); 74 static int sdmmc_mem_decode_scr(struct sdmmc_softc *, struct sdmmc_function *); 75 static int sdmmc_mem_send_cxd_data(struct sdmmc_softc *, int, void *, size_t); 76 static int sdmmc_set_bus_width(struct sdmmc_function *, int); 77 static int sdmmc_mem_sd_switch(struct sdmmc_function *, int, int, int, void *); 78 static int sdmmc_mem_mmc_switch(struct sdmmc_function *, uint8_t, uint8_t, 79 uint8_t); 80 static int sdmmc_mem_spi_read_ocr(struct sdmmc_softc *, uint32_t, uint32_t *); 81 static int sdmmc_mem_single_read_block(struct sdmmc_function *, uint32_t, 82 u_char *, size_t); 83 static int sdmmc_mem_single_write_block(struct sdmmc_function *, uint32_t, 84 u_char *, size_t); 85 static int sdmmc_mem_read_block_subr(struct sdmmc_function *, uint32_t, 86 u_char *, size_t); 87 static int sdmmc_mem_write_block_subr(struct sdmmc_function *, uint32_t, 88 u_char *, size_t); 89 90 /* 91 * Initialize SD/MMC memory cards and memory in SDIO "combo" cards. 92 */ 93 int 94 sdmmc_mem_enable(struct sdmmc_softc *sc) 95 { 96 uint32_t host_ocr; 97 uint32_t card_ocr; 98 uint32_t ocr = 0; 99 int error; 100 101 SDMMC_LOCK(sc); 102 103 /* Set host mode to SD "combo" card or SD memory-only. */ 104 SET(sc->sc_flags, SMF_SD_MODE|SMF_MEM_MODE); 105 106 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 107 sdmmc_spi_chip_initialize(sc->sc_spi_sct, sc->sc_sch); 108 109 /* Reset memory (*must* do that before CMD55 or CMD1). */ 110 sdmmc_go_idle_state(sc); 111 112 /* Check SD Ver.2 */ 113 error = sdmmc_mem_send_if_cond(sc, 0x1aa, &card_ocr); 114 if (error == 0 && card_ocr == 0x1aa) 115 SET(ocr, MMC_OCR_HCS); 116 117 /* 118 * Read the SD/MMC memory OCR value by issuing CMD55 followed 119 * by ACMD41 to read the OCR value from memory-only SD cards. 120 * MMC cards will not respond to CMD55 or ACMD41 and this is 121 * how we distinguish them from SD cards. 122 */ 123 mmc_mode: 124 error = sdmmc_mem_send_op_cond(sc, 125 ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? ocr : 0, &card_ocr); 126 if (error) { 127 if (ISSET(sc->sc_flags, SMF_SD_MODE) && 128 !ISSET(sc->sc_flags, SMF_IO_MODE)) { 129 /* Not a SD card, switch to MMC mode. */ 130 DPRINTF(("%s: switch to MMC mode\n", SDMMCDEVNAME(sc))); 131 CLR(sc->sc_flags, SMF_SD_MODE); 132 goto mmc_mode; 133 } 134 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 135 DPRINTF(("%s: couldn't read memory OCR\n", 136 SDMMCDEVNAME(sc))); 137 goto out; 138 } else { 139 /* Not a "combo" card. */ 140 CLR(sc->sc_flags, SMF_MEM_MODE); 141 error = 0; 142 goto out; 143 } 144 } 145 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 146 /* get card OCR */ 147 error = sdmmc_mem_spi_read_ocr(sc, ocr, &card_ocr); 148 if (error) { 149 DPRINTF(("%s: couldn't read SPI memory OCR\n", 150 SDMMCDEVNAME(sc))); 151 goto out; 152 } 153 } 154 155 /* Set the lowest voltage supported by the card and host. */ 156 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 157 error = sdmmc_set_bus_power(sc, host_ocr, card_ocr); 158 if (error) { 159 DPRINTF(("%s: couldn't supply voltage requested by card\n", 160 SDMMCDEVNAME(sc))); 161 goto out; 162 } 163 host_ocr &= card_ocr; 164 host_ocr |= ocr; 165 166 /* Send the new OCR value until all cards are ready. */ 167 error = sdmmc_mem_send_op_cond(sc, host_ocr, NULL); 168 if (error) { 169 DPRINTF(("%s: couldn't send memory OCR\n", SDMMCDEVNAME(sc))); 170 goto out; 171 } 172 173 out: 174 SDMMC_UNLOCK(sc); 175 176 return error; 177 } 178 179 /* 180 * Read the CSD and CID from all cards and assign each card a unique 181 * relative card address (RCA). CMD2 is ignored by SDIO-only cards. 182 */ 183 void 184 sdmmc_mem_scan(struct sdmmc_softc *sc) 185 { 186 sdmmc_response resp; 187 struct sdmmc_function *sf; 188 uint16_t next_rca; 189 int error; 190 int retry; 191 192 SDMMC_LOCK(sc); 193 194 /* 195 * CMD2 is a broadcast command understood by SD cards and MMC 196 * cards. All cards begin to respond to the command, but back 197 * off if another card drives the CMD line to a different level. 198 * Only one card will get its entire response through. That 199 * card remains silent once it has been assigned a RCA. 200 */ 201 for (retry = 0; retry < 100; retry++) { 202 error = sdmmc_mem_send_cid(sc, &resp); 203 if (error) { 204 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) && 205 error == ETIMEDOUT) { 206 /* No more cards there. */ 207 break; 208 } 209 DPRINTF(("%s: couldn't read CID\n", SDMMCDEVNAME(sc))); 210 break; 211 } 212 213 /* In MMC mode, find the next available RCA. */ 214 next_rca = 1; 215 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 216 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) 217 next_rca++; 218 } 219 220 /* Allocate a sdmmc_function structure. */ 221 sf = sdmmc_function_alloc(sc); 222 sf->rca = next_rca; 223 224 /* 225 * Remember the CID returned in the CMD2 response for 226 * later decoding. 227 */ 228 memcpy(sf->raw_cid, resp, sizeof(sf->raw_cid)); 229 230 /* 231 * Silence the card by assigning it a unique RCA, or 232 * querying it for its RCA in the case of SD. 233 */ 234 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 235 if (sdmmc_set_relative_addr(sc, sf) != 0) { 236 aprint_error_dev(sc->sc_dev, 237 "couldn't set mem RCA\n"); 238 sdmmc_function_free(sf); 239 break; 240 } 241 } 242 243 /* 244 * If this is a memory-only card, the card responding 245 * first becomes an alias for SDIO function 0. 246 */ 247 if (sc->sc_fn0 == NULL) 248 sc->sc_fn0 = sf; 249 250 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 251 252 /* only one function in SPI mode */ 253 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 254 break; 255 } 256 257 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 258 /* Go to Data Transfer Mode, if possible. */ 259 sdmmc_chip_bus_rod(sc->sc_sct, sc->sc_sch, 0); 260 261 /* 262 * All cards are either inactive or awaiting further commands. 263 * Read the CSDs and decode the raw CID for each card. 264 */ 265 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) { 266 error = sdmmc_mem_send_csd(sc, sf, &resp); 267 if (error) { 268 SET(sf->flags, SFF_ERROR); 269 continue; 270 } 271 272 if (sdmmc_decode_csd(sc, resp, sf) != 0 || 273 sdmmc_decode_cid(sc, sf->raw_cid, sf) != 0) { 274 SET(sf->flags, SFF_ERROR); 275 continue; 276 } 277 278 #ifdef SDMMC_DEBUG 279 printf("%s: CID: ", SDMMCDEVNAME(sc)); 280 sdmmc_print_cid(&sf->cid); 281 #endif 282 } 283 284 SDMMC_UNLOCK(sc); 285 } 286 287 int 288 sdmmc_decode_csd(struct sdmmc_softc *sc, sdmmc_response resp, 289 struct sdmmc_function *sf) 290 { 291 /* TRAN_SPEED(2:0): transfer rate exponent */ 292 static const int speed_exponent[8] = { 293 100 * 1, /* 100 Kbits/s */ 294 1 * 1000, /* 1 Mbits/s */ 295 10 * 1000, /* 10 Mbits/s */ 296 100 * 1000, /* 100 Mbits/s */ 297 0, 298 0, 299 0, 300 0, 301 }; 302 /* TRAN_SPEED(6:3): time mantissa */ 303 static const int speed_mantissa[16] = { 304 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80, 305 }; 306 struct sdmmc_csd *csd = &sf->csd; 307 int e, m; 308 309 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 310 /* 311 * CSD version 1.0 corresponds to SD system 312 * specification version 1.0 - 1.10. (SanDisk, 3.5.3) 313 */ 314 csd->csdver = SD_CSD_CSDVER(resp); 315 switch (csd->csdver) { 316 case SD_CSD_CSDVER_2_0: 317 DPRINTF(("%s: SD Ver.2.0\n", SDMMCDEVNAME(sc))); 318 SET(sf->flags, SFF_SDHC); 319 csd->capacity = SD_CSD_V2_CAPACITY(resp); 320 csd->read_bl_len = SD_CSD_V2_BL_LEN; 321 csd->ccc = SD_CSD_CCC(resp); 322 break; 323 324 case SD_CSD_CSDVER_1_0: 325 DPRINTF(("%s: SD Ver.1.0\n", SDMMCDEVNAME(sc))); 326 csd->capacity = SD_CSD_CAPACITY(resp); 327 csd->read_bl_len = SD_CSD_READ_BL_LEN(resp); 328 break; 329 330 default: 331 aprint_error_dev(sc->sc_dev, 332 "unknown SD CSD structure version 0x%x\n", 333 csd->csdver); 334 return 1; 335 } 336 337 csd->mmcver = SD_CSD_MMCVER(resp); 338 csd->write_bl_len = SD_CSD_WRITE_BL_LEN(resp); 339 csd->r2w_factor = SD_CSD_R2W_FACTOR(resp); 340 e = SD_CSD_SPEED_EXP(resp); 341 m = SD_CSD_SPEED_MANT(resp); 342 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 343 } else { 344 csd->csdver = MMC_CSD_CSDVER(resp); 345 if (csd->csdver == MMC_CSD_CSDVER_1_0) { 346 aprint_error_dev(sc->sc_dev, 347 "unknown MMC CSD structure version 0x%x\n", 348 csd->csdver); 349 return 1; 350 } 351 352 csd->mmcver = MMC_CSD_MMCVER(resp); 353 csd->capacity = MMC_CSD_CAPACITY(resp); 354 csd->read_bl_len = MMC_CSD_READ_BL_LEN(resp); 355 csd->write_bl_len = MMC_CSD_WRITE_BL_LEN(resp); 356 csd->r2w_factor = MMC_CSD_R2W_FACTOR(resp); 357 e = MMC_CSD_TRAN_SPEED_EXP(resp); 358 m = MMC_CSD_TRAN_SPEED_MANT(resp); 359 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 360 } 361 if ((1 << csd->read_bl_len) > SDMMC_SECTOR_SIZE) 362 csd->capacity *= (1 << csd->read_bl_len) / SDMMC_SECTOR_SIZE; 363 364 #ifdef SDMMC_DUMP_CSD 365 sdmmc_print_csd(resp, csd); 366 #endif 367 368 return 0; 369 } 370 371 int 372 sdmmc_decode_cid(struct sdmmc_softc *sc, sdmmc_response resp, 373 struct sdmmc_function *sf) 374 { 375 struct sdmmc_cid *cid = &sf->cid; 376 377 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 378 cid->mid = SD_CID_MID(resp); 379 cid->oid = SD_CID_OID(resp); 380 SD_CID_PNM_CPY(resp, cid->pnm); 381 cid->rev = SD_CID_REV(resp); 382 cid->psn = SD_CID_PSN(resp); 383 cid->mdt = SD_CID_MDT(resp); 384 } else { 385 switch(sf->csd.mmcver) { 386 case MMC_CSD_MMCVER_1_0: 387 case MMC_CSD_MMCVER_1_4: 388 cid->mid = MMC_CID_MID_V1(resp); 389 MMC_CID_PNM_V1_CPY(resp, cid->pnm); 390 cid->rev = MMC_CID_REV_V1(resp); 391 cid->psn = MMC_CID_PSN_V1(resp); 392 cid->mdt = MMC_CID_MDT_V1(resp); 393 break; 394 case MMC_CSD_MMCVER_2_0: 395 case MMC_CSD_MMCVER_3_1: 396 case MMC_CSD_MMCVER_4_0: 397 cid->mid = MMC_CID_MID_V2(resp); 398 cid->oid = MMC_CID_OID_V2(resp); 399 MMC_CID_PNM_V2_CPY(resp, cid->pnm); 400 cid->psn = MMC_CID_PSN_V2(resp); 401 break; 402 default: 403 aprint_error_dev(sc->sc_dev, "unknown MMC version %d\n", 404 sf->csd.mmcver); 405 return 1; 406 } 407 } 408 return 0; 409 } 410 411 void 412 sdmmc_print_cid(struct sdmmc_cid *cid) 413 { 414 415 printf("mid=0x%02x oid=0x%04x pnm=\"%s\" rev=0x%02x psn=0x%08x" 416 " mdt=%03x\n", cid->mid, cid->oid, cid->pnm, cid->rev, cid->psn, 417 cid->mdt); 418 } 419 420 #ifdef SDMMC_DUMP_CSD 421 void 422 sdmmc_print_csd(sdmmc_response resp, struct sdmmc_csd *csd) 423 { 424 425 printf("csdver = %d\n", csd->csdver); 426 printf("mmcver = %d\n", csd->mmcver); 427 printf("capacity = 0x%08x\n", csd->capacity); 428 printf("read_bl_len = %d\n", csd->read_bl_len); 429 printf("write_cl_len = %d\n", csd->write_bl_len); 430 printf("r2w_factor = %d\n", csd->r2w_factor); 431 printf("tran_speed = %d\n", csd->tran_speed); 432 printf("ccc = 0x%x\n", csd->ccc); 433 } 434 #endif 435 436 /* 437 * Initialize a SD/MMC memory card. 438 */ 439 int 440 sdmmc_mem_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 441 { 442 int error = 0; 443 444 SDMMC_LOCK(sc); 445 446 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 447 error = sdmmc_select_card(sc, sf); 448 if (error) 449 goto out; 450 } 451 452 if (!ISSET(sf->flags, SFF_SDHC)) { 453 error = sdmmc_mem_set_blocklen(sc, sf); 454 if (error) 455 goto out; 456 } 457 458 if (ISSET(sc->sc_flags, SMF_SD_MODE)) 459 error = sdmmc_mem_sd_init(sc, sf); 460 else 461 error = sdmmc_mem_mmc_init(sc, sf); 462 463 out: 464 SDMMC_UNLOCK(sc); 465 466 return error; 467 } 468 469 /* 470 * Get or set the card's memory OCR value (SD or MMC). 471 */ 472 int 473 sdmmc_mem_send_op_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 474 { 475 struct sdmmc_command cmd; 476 int error; 477 int retry; 478 479 /* Don't lock */ 480 481 /* 482 * If we change the OCR value, retry the command until the OCR 483 * we receive in response has the "CARD BUSY" bit set, meaning 484 * that all cards are ready for identification. 485 */ 486 for (retry = 0; retry < 100; retry++) { 487 memset(&cmd, 0, sizeof(cmd)); 488 cmd.c_arg = !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? 489 ocr : (ocr & MMC_OCR_HCS); 490 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R3 | SCF_RSP_SPI_R1; 491 492 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 493 cmd.c_opcode = SD_APP_OP_COND; 494 error = sdmmc_app_command(sc, NULL, &cmd); 495 } else { 496 cmd.c_opcode = MMC_SEND_OP_COND; 497 error = sdmmc_mmc_command(sc, &cmd); 498 } 499 if (error) 500 break; 501 502 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 503 if (!ISSET(MMC_SPI_R1(cmd.c_resp), R1_SPI_IDLE)) 504 break; 505 } else { 506 if (ISSET(MMC_R3(cmd.c_resp), MMC_OCR_MEM_READY) || 507 ocr == 0) 508 break; 509 } 510 511 error = ETIMEDOUT; 512 sdmmc_delay(10000); 513 } 514 if (error == 0 && 515 ocrp != NULL && 516 !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 517 *ocrp = MMC_R3(cmd.c_resp); 518 DPRINTF(("%s: sdmmc_mem_send_op_cond: error=%d, ocr=%#x\n", 519 SDMMCDEVNAME(sc), error, MMC_R3(cmd.c_resp))); 520 return error; 521 } 522 523 int 524 sdmmc_mem_send_if_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 525 { 526 struct sdmmc_command cmd; 527 int error; 528 529 /* Don't lock */ 530 531 memset(&cmd, 0, sizeof(cmd)); 532 cmd.c_arg = ocr; 533 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R7 | SCF_RSP_SPI_R7; 534 cmd.c_opcode = SD_SEND_IF_COND; 535 536 error = sdmmc_mmc_command(sc, &cmd); 537 if (error == 0 && ocrp != NULL) { 538 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 539 *ocrp = MMC_SPI_R7(cmd.c_resp); 540 } else { 541 *ocrp = MMC_R7(cmd.c_resp); 542 } 543 DPRINTF(("%s: sdmmc_mem_send_if_cond: error=%d, ocr=%#x\n", 544 SDMMCDEVNAME(sc), error, *ocrp)); 545 } 546 return error; 547 } 548 549 /* 550 * Set the read block length appropriately for this card, according to 551 * the card CSD register value. 552 */ 553 int 554 sdmmc_mem_set_blocklen(struct sdmmc_softc *sc, struct sdmmc_function *sf) 555 { 556 struct sdmmc_command cmd; 557 int error; 558 559 /* Don't lock */ 560 561 memset(&cmd, 0, sizeof(cmd)); 562 cmd.c_opcode = MMC_SET_BLOCKLEN; 563 cmd.c_arg = SDMMC_SECTOR_SIZE; 564 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R1; 565 566 error = sdmmc_mmc_command(sc, &cmd); 567 568 DPRINTF(("%s: sdmmc_mem_set_blocklen: read_bl_len=%d sector_size=%d\n", 569 SDMMCDEVNAME(sc), 1 << sf->csd.read_bl_len, SDMMC_SECTOR_SIZE)); 570 571 return error; 572 } 573 574 static int 575 sdmmc_mem_sd_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 576 { 577 static const struct { 578 int v; 579 int freq; 580 } switch_group0_functions[] = { 581 /* Default/SDR12 */ 582 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 583 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 25000 }, 584 585 /* High-Speed/SDR25 */ 586 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 587 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 50000 }, 588 589 /* SDR50 */ 590 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 100000 }, 591 592 /* SDR104 */ 593 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 208000 }, 594 595 /* DDR50 */ 596 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 50000 }, 597 }; 598 int host_ocr, support_func, best_func, error, g, i; 599 char status[64]; 600 601 error = sdmmc_mem_send_scr(sc, sf, sf->raw_scr); 602 if (error) { 603 aprint_error_dev(sc->sc_dev, "SD_SEND_SCR send failed.\n"); 604 return error; 605 } 606 error = sdmmc_mem_decode_scr(sc, sf); 607 if (error) 608 return error; 609 610 if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE) && 611 ISSET(sf->scr.bus_width, SCR_SD_BUS_WIDTHS_4BIT)) { 612 DPRINTF(("%s: change bus width\n", SDMMCDEVNAME(sc))); 613 error = sdmmc_set_bus_width(sf, 4); 614 if (error) { 615 aprint_error_dev(sc->sc_dev, 616 "can't change bus width (%d bit)\n", 4); 617 return error; 618 } 619 sf->width = 4; 620 } 621 622 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 623 ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) { 624 DPRINTF(("%s: switch func mode 0\n", SDMMCDEVNAME(sc))); 625 error = sdmmc_mem_sd_switch(sf, 0, 1, 0, status); 626 if (error) { 627 aprint_error_dev(sc->sc_dev, 628 "switch func mode 0 failed\n"); 629 return error; 630 } 631 632 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 633 support_func = SFUNC_STATUS_GROUP(status, 1); 634 best_func = 0; 635 for (i = 0, g = 1; 636 i < __arraycount(switch_group0_functions); i++, g <<= 1) { 637 if (!(switch_group0_functions[i].v & host_ocr)) 638 continue; 639 if (g & support_func) 640 best_func = i; 641 } 642 if (ISSET(sc->sc_caps, SMC_CAPS_SD_HIGHSPEED) && 643 best_func != 0) { 644 DPRINTF(("%s: switch func mode 1(func=%d)\n", 645 SDMMCDEVNAME(sc), best_func)); 646 error = 647 sdmmc_mem_sd_switch(sf, 1, 1, best_func, status); 648 if (error) { 649 aprint_error_dev(sc->sc_dev, 650 "switch func mode 1 failed:" 651 " group 1 function %d(0x%2x)\n", 652 best_func, support_func); 653 return error; 654 } 655 sf->csd.tran_speed = 656 switch_group0_functions[best_func].freq; 657 658 /* Wait 400KHz x 8 clock */ 659 delay(1); 660 } 661 } 662 663 /* change bus clock */ 664 if (sc->sc_busclk > sf->csd.tran_speed) 665 sc->sc_busclk = sf->csd.tran_speed; 666 error = sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 667 if (error) { 668 aprint_error_dev(sc->sc_dev, "can't change bus clock\n"); 669 return error; 670 } 671 672 return 0; 673 } 674 675 static int 676 sdmmc_mem_mmc_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 677 { 678 int width, value, hs_timing, error; 679 char ext_csd[512]; 680 681 if (sf->csd.mmcver >= MMC_CSD_MMCVER_4_0) { 682 error = sdmmc_mem_send_cxd_data(sc, 683 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 684 if (error) { 685 aprint_error_dev(sc->sc_dev, "can't read EXT_CSD\n"); 686 return error; 687 } 688 if ((sf->csd.csdver == 3) && 689 (ext_csd[EXT_CSD_STRUCTURE] > EXT_CSD_STRUCTURE_VER_1_2)) { 690 aprint_error_dev(sc->sc_dev, 691 "unrecognised future version (%d)\n", 692 ext_csd[EXT_CSD_STRUCTURE]); 693 return error; 694 } 695 hs_timing = 0; 696 switch (ext_csd[EXT_CSD_CARD_TYPE]) { 697 case EXT_CSD_CARD_TYPE_26M: 698 sf->csd.tran_speed = 26000; /* 26MHz */ 699 break; 700 701 case EXT_CSD_CARD_TYPE_52M | EXT_CSD_CARD_TYPE_26M: 702 sf->csd.tran_speed = 52000; /* 52MHz */ 703 hs_timing = 1; 704 break; 705 706 default: 707 aprint_error_dev(sc->sc_dev, 708 "unknwon CARD_TYPE: 0x%x\n", 709 ext_csd[EXT_CSD_CARD_TYPE]); 710 return error; 711 } 712 713 if (!ISSET(sc->sc_caps, SMC_CAPS_MMC_HIGHSPEED)) { 714 hs_timing = 0; 715 } 716 if (hs_timing) { 717 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 718 EXT_CSD_HS_TIMING, hs_timing); 719 if (error) { 720 aprint_error_dev(sc->sc_dev, 721 "can't change high speed\n"); 722 return error; 723 } 724 } 725 726 if (sc->sc_busclk > sf->csd.tran_speed) 727 sc->sc_busclk = sf->csd.tran_speed; 728 error = 729 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 730 if (error) { 731 aprint_error_dev(sc->sc_dev, 732 "can't change bus clock\n"); 733 return error; 734 } 735 736 if (hs_timing) { 737 error = sdmmc_mem_send_cxd_data(sc, 738 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 739 if (error) { 740 aprint_error_dev(sc->sc_dev, 741 "can't re-read EXT_CSD\n"); 742 return error; 743 } 744 if (ext_csd[EXT_CSD_HS_TIMING] != hs_timing) { 745 aprint_error_dev(sc->sc_dev, 746 "HS_TIMING set failed\n"); 747 return EINVAL; 748 } 749 } 750 751 if (ISSET(sc->sc_caps, SMC_CAPS_8BIT_MODE)) { 752 width = 8; 753 value = EXT_CSD_BUS_WIDTH_8; 754 } else if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE)) { 755 width = 4; 756 value = EXT_CSD_BUS_WIDTH_4; 757 } else { 758 width = 1; 759 value = EXT_CSD_BUS_WIDTH_1; 760 } 761 762 if (width != 1) { 763 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 764 EXT_CSD_BUS_WIDTH, value); 765 if (error == 0) 766 error = sdmmc_chip_bus_width(sc->sc_sct, 767 sc->sc_sch, width); 768 else { 769 DPRINTF(("%s: can't change bus width" 770 " (%d bit)\n", SDMMCDEVNAME(sc), width)); 771 return error; 772 } 773 774 /* XXXX: need bus test? (using by CMD14 & CMD19) */ 775 } 776 sf->width = width; 777 } else { 778 if (sc->sc_busclk > sf->csd.tran_speed) 779 sc->sc_busclk = sf->csd.tran_speed; 780 error = 781 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 782 if (error) { 783 aprint_error_dev(sc->sc_dev, 784 "can't change bus clock\n"); 785 return error; 786 } 787 } 788 789 return 0; 790 } 791 792 static int 793 sdmmc_mem_send_cid(struct sdmmc_softc *sc, sdmmc_response *resp) 794 { 795 struct sdmmc_command cmd; 796 int error; 797 798 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 799 memset(&cmd, 0, sizeof cmd); 800 cmd.c_opcode = MMC_ALL_SEND_CID; 801 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R2; 802 803 error = sdmmc_mmc_command(sc, &cmd); 804 } else { 805 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CID, &cmd.c_resp, 806 sizeof(cmd.c_resp)); 807 } 808 809 #ifdef SDMMC_DEBUG 810 sdmmc_dump_data("CID", cmd.c_resp, sizeof(cmd.c_resp)); 811 #endif 812 if (error == 0 && resp != NULL) 813 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 814 return error; 815 } 816 817 static int 818 sdmmc_mem_send_csd(struct sdmmc_softc *sc, struct sdmmc_function *sf, 819 sdmmc_response *resp) 820 { 821 struct sdmmc_command cmd; 822 int error; 823 824 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 825 memset(&cmd, 0, sizeof cmd); 826 cmd.c_opcode = MMC_SEND_CSD; 827 cmd.c_arg = MMC_ARG_RCA(sf->rca); 828 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R2; 829 830 error = sdmmc_mmc_command(sc, &cmd); 831 } else { 832 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CSD, &cmd.c_resp, 833 sizeof(cmd.c_resp)); 834 } 835 836 #ifdef SDMMC_DEBUG 837 sdmmc_dump_data("CSD", cmd.c_resp, sizeof(cmd.c_resp)); 838 #endif 839 if (error == 0 && resp != NULL) 840 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 841 return error; 842 } 843 844 static int 845 sdmmc_mem_send_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf, 846 uint32_t scr[2]) 847 { 848 struct sdmmc_command cmd; 849 bus_dma_segment_t ds[1]; 850 void *ptr = NULL; 851 int datalen = 8; 852 int rseg; 853 int error = 0; 854 855 /* Don't lock */ 856 857 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 858 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, 859 ds, 1, &rseg, BUS_DMA_NOWAIT); 860 if (error) 861 goto out; 862 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 863 BUS_DMA_NOWAIT); 864 if (error) 865 goto dmamem_free; 866 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 867 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 868 if (error) 869 goto dmamem_unmap; 870 871 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 872 BUS_DMASYNC_PREREAD); 873 } else { 874 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 875 if (ptr == NULL) 876 goto out; 877 } 878 879 memset(&cmd, 0, sizeof(cmd)); 880 cmd.c_data = ptr; 881 cmd.c_datalen = datalen; 882 cmd.c_blklen = datalen; 883 cmd.c_arg = 0; 884 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 885 cmd.c_opcode = SD_APP_SEND_SCR; 886 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 887 cmd.c_dmamap = sc->sc_dmap; 888 889 error = sdmmc_app_command(sc, sf, &cmd); 890 if (error == 0) { 891 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 892 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 893 BUS_DMASYNC_POSTREAD); 894 } 895 memcpy(scr, ptr, datalen); 896 } 897 898 out: 899 if (ptr != NULL) { 900 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 901 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 902 dmamem_unmap: 903 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 904 dmamem_free: 905 bus_dmamem_free(sc->sc_dmat, ds, rseg); 906 } else { 907 free(ptr, M_DEVBUF); 908 } 909 } 910 DPRINTF(("%s: sdmem_mem_send_scr: error = %d\n", SDMMCDEVNAME(sc), 911 error)); 912 913 #ifdef SDMMC_DEBUG 914 if (error == 0) 915 sdmmc_dump_data("SCR", scr, 8); 916 #endif 917 return error; 918 } 919 920 static int 921 sdmmc_mem_decode_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf) 922 { 923 sdmmc_response resp; 924 int ver; 925 926 memset(resp, 0, sizeof(resp)); 927 /* 928 * Change the raw-scr received from the DMA stream to resp. 929 */ 930 resp[0] = be32toh(sf->raw_scr[1]); 931 resp[1] = be32toh(sf->raw_scr[0]) >> 8; 932 933 ver = SCR_STRUCTURE(resp); 934 sf->scr.sd_spec = SCR_SD_SPEC(resp); 935 sf->scr.bus_width = SCR_SD_BUS_WIDTHS(resp); 936 937 DPRINTF(("%s: sdmmc_mem_decode_scr: spec=%d, bus width=%d\n", 938 SDMMCDEVNAME(sc), sf->scr.sd_spec, sf->scr.bus_width)); 939 940 if (ver != 0) { 941 DPRINTF(("%s: unknown structure version: %d\n", 942 SDMMCDEVNAME(sc), ver)); 943 return EINVAL; 944 } 945 return 0; 946 } 947 948 static int 949 sdmmc_mem_send_cxd_data(struct sdmmc_softc *sc, int opcode, void *data, 950 size_t datalen) 951 { 952 struct sdmmc_command cmd; 953 bus_dma_segment_t ds[1]; 954 void *ptr = NULL; 955 int rseg; 956 int error = 0; 957 958 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 959 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, ds, 960 1, &rseg, BUS_DMA_NOWAIT); 961 if (error) 962 goto out; 963 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 964 BUS_DMA_NOWAIT); 965 if (error) 966 goto dmamem_free; 967 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 968 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 969 if (error) 970 goto dmamem_unmap; 971 972 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 973 BUS_DMASYNC_PREREAD); 974 } else { 975 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 976 if (ptr == NULL) 977 goto out; 978 } 979 980 memset(&cmd, 0, sizeof(cmd)); 981 cmd.c_data = ptr; 982 cmd.c_datalen = datalen; 983 cmd.c_blklen = datalen; 984 cmd.c_opcode = opcode; 985 cmd.c_arg = 0; 986 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_SPI_R1; 987 if (opcode == MMC_SEND_EXT_CSD) 988 SET(cmd.c_flags, SCF_RSP_R1); 989 else 990 SET(cmd.c_flags, SCF_RSP_R2); 991 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 992 cmd.c_dmamap = sc->sc_dmap; 993 994 error = sdmmc_mmc_command(sc, &cmd); 995 if (error == 0) { 996 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 997 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 998 BUS_DMASYNC_POSTREAD); 999 } 1000 memcpy(data, ptr, datalen); 1001 #ifdef SDMMC_DEBUG 1002 sdmmc_dump_data("CXD", data, datalen); 1003 #endif 1004 } 1005 1006 out: 1007 if (ptr != NULL) { 1008 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1009 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1010 dmamem_unmap: 1011 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 1012 dmamem_free: 1013 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1014 } else { 1015 free(ptr, M_DEVBUF); 1016 } 1017 } 1018 return error; 1019 } 1020 1021 static int 1022 sdmmc_set_bus_width(struct sdmmc_function *sf, int width) 1023 { 1024 struct sdmmc_softc *sc = sf->sc; 1025 struct sdmmc_command cmd; 1026 int error; 1027 1028 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1029 return ENODEV; 1030 1031 memset(&cmd, 0, sizeof(cmd)); 1032 cmd.c_opcode = SD_APP_SET_BUS_WIDTH; 1033 cmd.c_flags = SCF_RSP_R1 | SCF_CMD_AC; 1034 1035 switch (width) { 1036 case 1: 1037 cmd.c_arg = SD_ARG_BUS_WIDTH_1; 1038 break; 1039 1040 case 4: 1041 cmd.c_arg = SD_ARG_BUS_WIDTH_4; 1042 break; 1043 1044 default: 1045 return EINVAL; 1046 } 1047 1048 error = sdmmc_app_command(sc, sf, &cmd); 1049 if (error == 0) 1050 error = sdmmc_chip_bus_width(sc->sc_sct, sc->sc_sch, width); 1051 return error; 1052 } 1053 1054 static int 1055 sdmmc_mem_sd_switch(struct sdmmc_function *sf, int mode, int group, 1056 int function, void *status) 1057 { 1058 struct sdmmc_softc *sc = sf->sc; 1059 struct sdmmc_command cmd; 1060 bus_dma_segment_t ds[1]; 1061 void *ptr = NULL; 1062 int gsft, rseg, error = 0; 1063 const int statlen = 64; 1064 1065 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 1066 !ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) 1067 return EINVAL; 1068 1069 if (group <= 0 || group > 6 || 1070 function < 0 || function > 16) 1071 return EINVAL; 1072 1073 gsft = (group - 1) << 2; 1074 1075 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1076 error = bus_dmamem_alloc(sc->sc_dmat, statlen, PAGE_SIZE, 0, ds, 1077 1, &rseg, BUS_DMA_NOWAIT); 1078 if (error) 1079 goto out; 1080 error = bus_dmamem_map(sc->sc_dmat, ds, 1, statlen, &ptr, 1081 BUS_DMA_NOWAIT); 1082 if (error) 1083 goto dmamem_free; 1084 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, statlen, 1085 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 1086 if (error) 1087 goto dmamem_unmap; 1088 1089 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1090 BUS_DMASYNC_PREREAD); 1091 } else { 1092 ptr = malloc(statlen, M_DEVBUF, M_NOWAIT | M_ZERO); 1093 if (ptr == NULL) 1094 goto out; 1095 } 1096 1097 memset(&cmd, 0, sizeof(cmd)); 1098 cmd.c_data = ptr; 1099 cmd.c_datalen = statlen; 1100 cmd.c_blklen = statlen; 1101 cmd.c_opcode = SD_SEND_SWITCH_FUNC; 1102 cmd.c_arg = 1103 (!!mode << 31) | (function << gsft) | (0x00ffffff & ~(0xf << gsft)); 1104 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1105 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 1106 cmd.c_dmamap = sc->sc_dmap; 1107 1108 error = sdmmc_mmc_command(sc, &cmd); 1109 if (error == 0) { 1110 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1111 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1112 BUS_DMASYNC_POSTREAD); 1113 } 1114 memcpy(status, ptr, statlen); 1115 } 1116 1117 out: 1118 if (ptr != NULL) { 1119 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1120 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1121 dmamem_unmap: 1122 bus_dmamem_unmap(sc->sc_dmat, ptr, statlen); 1123 dmamem_free: 1124 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1125 } else { 1126 free(ptr, M_DEVBUF); 1127 } 1128 } 1129 return error; 1130 } 1131 1132 static int 1133 sdmmc_mem_mmc_switch(struct sdmmc_function *sf, uint8_t set, uint8_t index, 1134 uint8_t value) 1135 { 1136 struct sdmmc_softc *sc = sf->sc; 1137 struct sdmmc_command cmd; 1138 1139 memset(&cmd, 0, sizeof(cmd)); 1140 cmd.c_opcode = MMC_SWITCH; 1141 cmd.c_arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 1142 (index << 16) | (value << 8) | set; 1143 cmd.c_flags = SCF_RSP_SPI_R1B | SCF_RSP_R1B | SCF_CMD_AC; 1144 1145 return sdmmc_mmc_command(sc, &cmd); 1146 } 1147 1148 /* 1149 * SPI mode function 1150 */ 1151 static int 1152 sdmmc_mem_spi_read_ocr(struct sdmmc_softc *sc, uint32_t hcs, uint32_t *card_ocr) 1153 { 1154 struct sdmmc_command cmd; 1155 int error; 1156 1157 memset(&cmd, 0, sizeof(cmd)); 1158 cmd.c_opcode = MMC_READ_OCR; 1159 cmd.c_arg = hcs ? MMC_OCR_HCS : 0; 1160 cmd.c_flags = SCF_RSP_SPI_R3; 1161 1162 error = sdmmc_mmc_command(sc, &cmd); 1163 if (error == 0 && card_ocr != NULL) 1164 *card_ocr = cmd.c_resp[1]; 1165 DPRINTF(("%s: sdmmc_mem_spi_read_ocr: error=%d, ocr=%#x\n", 1166 SDMMCDEVNAME(sc), error, cmd.c_resp[1])); 1167 return error; 1168 } 1169 1170 /* 1171 * read/write function 1172 */ 1173 /* read */ 1174 static int 1175 sdmmc_mem_single_read_block(struct sdmmc_function *sf, uint32_t blkno, 1176 u_char *data, size_t datalen) 1177 { 1178 struct sdmmc_softc *sc __unused = sf->sc; 1179 int error = 0; 1180 int i; 1181 1182 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1183 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1184 1185 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1186 error = sdmmc_mem_read_block_subr(sf, blkno + i, 1187 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1188 if (error) 1189 break; 1190 } 1191 return error; 1192 } 1193 1194 static int 1195 sdmmc_mem_read_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1196 u_char *data, size_t datalen) 1197 { 1198 struct sdmmc_softc *sc = sf->sc; 1199 struct sdmmc_command cmd; 1200 int error, bbuf, seg, off, len, num; 1201 1202 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1203 error = sdmmc_select_card(sc, sf); 1204 if (error) 1205 goto out; 1206 } 1207 1208 bbuf = 0; 1209 num = 0; 1210 seg = off = len = 0; 1211 retry: 1212 memset(&cmd, 0, sizeof(cmd)); 1213 cmd.c_data = data; 1214 cmd.c_datalen = datalen; 1215 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1216 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1217 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1218 cmd.c_arg = blkno; 1219 if (!ISSET(sf->flags, SFF_SDHC)) 1220 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1221 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1222 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1223 cmd.c_dmamap = sc->sc_dmap; 1224 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1225 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1226 len &= ~(SDMMC_SECTOR_SIZE - 1); 1227 cmd.c_datalen = len; 1228 cmd.c_dmaseg = seg; 1229 cmd.c_dmaoff = off; 1230 bbuf = 0; 1231 if (len == 0) { 1232 /* Use bounce buffer */ 1233 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1234 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1235 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1236 cmd.c_dmamap = sf->bbuf_dmap; 1237 cmd.c_dmaseg = 0; 1238 cmd.c_dmaoff = 0; 1239 bbuf = 1; 1240 len = SDMMC_SECTOR_SIZE; 1241 } 1242 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1243 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1244 } 1245 } 1246 1247 error = sdmmc_mmc_command(sc, &cmd); 1248 if (error) 1249 goto out; 1250 1251 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1252 if (cmd.c_opcode == MMC_READ_BLOCK_MULTIPLE) { 1253 memset(&cmd, 0, sizeof cmd); 1254 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1255 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1256 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1257 error = sdmmc_mmc_command(sc, &cmd); 1258 if (error) 1259 goto out; 1260 } 1261 } 1262 1263 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1264 do { 1265 memset(&cmd, 0, sizeof(cmd)); 1266 cmd.c_opcode = MMC_SEND_STATUS; 1267 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1268 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1269 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1270 error = sdmmc_mmc_command(sc, &cmd); 1271 if (error) 1272 break; 1273 /* XXX time out */ 1274 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1275 } 1276 1277 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1278 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1279 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1280 1281 if (bbuf) { 1282 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1283 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1284 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1285 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1286 memcpy(data, sf->bbuf, SDMMC_SECTOR_SIZE); 1287 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1288 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1289 } 1290 num += len; 1291 data += len; 1292 datalen -= len; 1293 blkno += (len / SDMMC_SECTOR_SIZE); 1294 1295 while (off + len >= dm_segs[seg].ds_len) { 1296 len -= dm_segs[seg++].ds_len; 1297 off = 0; 1298 } 1299 off += len; 1300 1301 if (seg < sc->sc_dmap->dm_nsegs) 1302 goto retry; 1303 } 1304 1305 out: 1306 return error; 1307 } 1308 1309 int 1310 sdmmc_mem_read_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1311 size_t datalen) 1312 { 1313 struct sdmmc_softc *sc = sf->sc; 1314 int error; 1315 1316 SDMMC_LOCK(sc); 1317 1318 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1319 error = sdmmc_mem_single_read_block(sf, blkno, data, datalen); 1320 goto out; 1321 } 1322 1323 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1324 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1325 goto out; 1326 } 1327 1328 /* DMA transfer */ 1329 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1330 BUS_DMA_NOWAIT|BUS_DMA_READ); 1331 if (error) 1332 goto out; 1333 1334 #ifdef SDMMC_DEBUG 1335 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1336 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1337 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1338 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1339 } 1340 #endif 1341 1342 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1343 BUS_DMASYNC_PREREAD); 1344 1345 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1346 if (error) 1347 goto unload; 1348 1349 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1350 BUS_DMASYNC_POSTREAD); 1351 unload: 1352 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1353 1354 out: 1355 SDMMC_UNLOCK(sc); 1356 1357 return error; 1358 } 1359 1360 /* write */ 1361 static int 1362 sdmmc_mem_single_write_block(struct sdmmc_function *sf, uint32_t blkno, 1363 u_char *data, size_t datalen) 1364 { 1365 struct sdmmc_softc *sc __unused = sf->sc; 1366 int error = 0; 1367 int i; 1368 1369 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1370 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1371 1372 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1373 error = sdmmc_mem_write_block_subr(sf, blkno + i, 1374 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1375 if (error) 1376 break; 1377 } 1378 return error; 1379 } 1380 1381 static int 1382 sdmmc_mem_write_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1383 u_char *data, size_t datalen) 1384 { 1385 struct sdmmc_softc *sc = sf->sc; 1386 struct sdmmc_command cmd; 1387 int error, bbuf, seg, off, len, num; 1388 1389 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1390 error = sdmmc_select_card(sc, sf); 1391 if (error) 1392 goto out; 1393 } 1394 1395 bbuf = 0; 1396 num = 0; 1397 seg = off = len = 0; 1398 retry: 1399 memset(&cmd, 0, sizeof(cmd)); 1400 cmd.c_data = data; 1401 cmd.c_datalen = datalen; 1402 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1403 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1404 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1405 cmd.c_arg = blkno; 1406 if (!ISSET(sf->flags, SFF_SDHC)) 1407 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1408 cmd.c_flags = SCF_CMD_ADTC | SCF_RSP_R1; 1409 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1410 cmd.c_dmamap = sc->sc_dmap; 1411 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1412 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1413 len &= ~(SDMMC_SECTOR_SIZE - 1); 1414 cmd.c_datalen = len; 1415 cmd.c_dmaseg = seg; 1416 cmd.c_dmaoff = off; 1417 bbuf = 0; 1418 if (len == 0) { 1419 /* Use bounce buffer */ 1420 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1421 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1422 memcpy(sf->bbuf, data, SDMMC_SECTOR_SIZE); 1423 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1424 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1425 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 0, 1426 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1427 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1428 cmd.c_dmamap = sf->bbuf_dmap; 1429 cmd.c_dmaseg = 0; 1430 cmd.c_dmaoff = 0; 1431 bbuf = 1; 1432 len = SDMMC_SECTOR_SIZE; 1433 } 1434 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1435 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1436 } 1437 } 1438 1439 error = sdmmc_mmc_command(sc, &cmd); 1440 if (error) 1441 goto out; 1442 1443 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1444 if (cmd.c_opcode == MMC_WRITE_BLOCK_MULTIPLE) { 1445 memset(&cmd, 0, sizeof(cmd)); 1446 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1447 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1448 error = sdmmc_mmc_command(sc, &cmd); 1449 if (error) 1450 goto out; 1451 } 1452 } 1453 1454 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1455 do { 1456 memset(&cmd, 0, sizeof(cmd)); 1457 cmd.c_opcode = MMC_SEND_STATUS; 1458 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1459 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1460 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1461 error = sdmmc_mmc_command(sc, &cmd); 1462 if (error) 1463 break; 1464 /* XXX time out */ 1465 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1466 } 1467 1468 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1469 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1470 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1471 1472 if (bbuf) 1473 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1474 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1475 num += len; 1476 data += len; 1477 datalen -= len; 1478 blkno += (len / SDMMC_SECTOR_SIZE); 1479 1480 while (off + len >= dm_segs[seg].ds_len) { 1481 len -= dm_segs[seg++].ds_len; 1482 off = 0; 1483 } 1484 off += len; 1485 1486 if (seg < sc->sc_dmap->dm_nsegs) 1487 goto retry; 1488 } 1489 1490 out: 1491 return error; 1492 } 1493 1494 int 1495 sdmmc_mem_write_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1496 size_t datalen) 1497 { 1498 struct sdmmc_softc *sc = sf->sc; 1499 int error; 1500 1501 SDMMC_LOCK(sc); 1502 1503 if (sdmmc_chip_write_protect(sc->sc_sct, sc->sc_sch)) { 1504 aprint_normal_dev(sc->sc_dev, "write-protected\n"); 1505 error = EIO; 1506 goto out; 1507 } 1508 1509 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1510 error = sdmmc_mem_single_write_block(sf, blkno, data, datalen); 1511 goto out; 1512 } 1513 1514 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1515 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1516 goto out; 1517 } 1518 1519 /* DMA transfer */ 1520 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1521 BUS_DMA_NOWAIT|BUS_DMA_WRITE); 1522 if (error) 1523 goto out; 1524 1525 #ifdef SDMMC_DEBUG 1526 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1527 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1528 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1529 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1530 } 1531 #endif 1532 1533 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1534 BUS_DMASYNC_PREWRITE); 1535 1536 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1537 if (error) 1538 goto unload; 1539 1540 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1541 BUS_DMASYNC_POSTWRITE); 1542 unload: 1543 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1544 1545 out: 1546 SDMMC_UNLOCK(sc); 1547 1548 return error; 1549 } 1550
Indexes created Wed Sep 24 05:09:52 GMT 2025