sdmmc_mem.c revision 1.23
1 /* $NetBSD: sdmmc_mem.c,v 1.23 2012/07/26 18:36:55 matt Exp $ */ 2 /* $OpenBSD: sdmmc_mem.c,v 1.10 2009/01/09 10:55:22 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Copyright (C) 2007, 2008, 2009, 2010 NONAKA Kimihiro <nonaka (at) netbsd.org> 22 * All rights reserved. 23 * 24 * Redistribution and use in source and binary forms, with or without 25 * modification, are permitted provided that the following conditions 26 * are met: 27 * 1. Redistributions of source code must retain the above copyright 28 * notice, this list of conditions and the following disclaimer. 29 * 2. Redistributions in binary form must reproduce the above copyright 30 * notice, this list of conditions and the following disclaimer in the 31 * documentation and/or other materials provided with the distribution. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 34 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 35 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 36 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 37 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 38 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 39 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 40 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 41 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 42 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 43 */ 44 45 /* Routines for SD/MMC memory cards. */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: sdmmc_mem.c,v 1.23 2012/07/26 18:36:55 matt Exp $"); 49 50 #ifdef _KERNEL_OPT 51 #include "opt_sdmmc.h" 52 #endif 53 54 #include <sys/param.h> 55 #include <sys/kernel.h> 56 #include <sys/malloc.h> 57 #include <sys/systm.h> 58 #include <sys/device.h> 59 60 #include <dev/sdmmc/sdmmcchip.h> 61 #include <dev/sdmmc/sdmmcreg.h> 62 #include <dev/sdmmc/sdmmcvar.h> 63 64 #ifdef SDMMC_DEBUG 65 #define DPRINTF(s) do { printf s; } while (/*CONSTCOND*/0) 66 #else 67 #define DPRINTF(s) do {} while (/*CONSTCOND*/0) 68 #endif 69 70 static int sdmmc_mem_sd_init(struct sdmmc_softc *, struct sdmmc_function *); 71 static int sdmmc_mem_mmc_init(struct sdmmc_softc *, struct sdmmc_function *); 72 static int sdmmc_mem_send_cid(struct sdmmc_softc *, sdmmc_response *); 73 static int sdmmc_mem_send_csd(struct sdmmc_softc *, struct sdmmc_function *, 74 sdmmc_response *); 75 static int sdmmc_mem_send_scr(struct sdmmc_softc *, struct sdmmc_function *, 76 uint32_t scr[2]); 77 static int sdmmc_mem_decode_scr(struct sdmmc_softc *, struct sdmmc_function *); 78 static int sdmmc_mem_send_cxd_data(struct sdmmc_softc *, int, void *, size_t); 79 static int sdmmc_set_bus_width(struct sdmmc_function *, int); 80 static int sdmmc_mem_sd_switch(struct sdmmc_function *, int, int, int, void *); 81 static int sdmmc_mem_mmc_switch(struct sdmmc_function *, uint8_t, uint8_t, 82 uint8_t); 83 static int sdmmc_mem_spi_read_ocr(struct sdmmc_softc *, uint32_t, uint32_t *); 84 static int sdmmc_mem_single_read_block(struct sdmmc_function *, uint32_t, 85 u_char *, size_t); 86 static int sdmmc_mem_single_write_block(struct sdmmc_function *, uint32_t, 87 u_char *, size_t); 88 static int sdmmc_mem_read_block_subr(struct sdmmc_function *, uint32_t, 89 u_char *, size_t); 90 static int sdmmc_mem_write_block_subr(struct sdmmc_function *, uint32_t, 91 u_char *, size_t); 92 93 /* 94 * Initialize SD/MMC memory cards and memory in SDIO "combo" cards. 95 */ 96 int 97 sdmmc_mem_enable(struct sdmmc_softc *sc) 98 { 99 uint32_t host_ocr; 100 uint32_t card_ocr; 101 uint32_t ocr = 0; 102 int error; 103 104 SDMMC_LOCK(sc); 105 106 /* Set host mode to SD "combo" card or SD memory-only. */ 107 SET(sc->sc_flags, SMF_SD_MODE|SMF_MEM_MODE); 108 109 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 110 sdmmc_spi_chip_initialize(sc->sc_spi_sct, sc->sc_sch); 111 112 /* Reset memory (*must* do that before CMD55 or CMD1). */ 113 sdmmc_go_idle_state(sc); 114 115 /* Check SD Ver.2 */ 116 error = sdmmc_mem_send_if_cond(sc, 0x1aa, &card_ocr); 117 if (error == 0 && card_ocr == 0x1aa) 118 SET(ocr, MMC_OCR_HCS); 119 120 /* 121 * Read the SD/MMC memory OCR value by issuing CMD55 followed 122 * by ACMD41 to read the OCR value from memory-only SD cards. 123 * MMC cards will not respond to CMD55 or ACMD41 and this is 124 * how we distinguish them from SD cards. 125 */ 126 mmc_mode: 127 error = sdmmc_mem_send_op_cond(sc, 128 ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? ocr : 0, &card_ocr); 129 if (error) { 130 if (ISSET(sc->sc_flags, SMF_SD_MODE) && 131 !ISSET(sc->sc_flags, SMF_IO_MODE)) { 132 /* Not a SD card, switch to MMC mode. */ 133 DPRINTF(("%s: switch to MMC mode\n", SDMMCDEVNAME(sc))); 134 CLR(sc->sc_flags, SMF_SD_MODE); 135 goto mmc_mode; 136 } 137 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 138 DPRINTF(("%s: couldn't read memory OCR\n", 139 SDMMCDEVNAME(sc))); 140 goto out; 141 } else { 142 /* Not a "combo" card. */ 143 CLR(sc->sc_flags, SMF_MEM_MODE); 144 error = 0; 145 goto out; 146 } 147 } 148 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 149 /* get card OCR */ 150 error = sdmmc_mem_spi_read_ocr(sc, ocr, &card_ocr); 151 if (error) { 152 DPRINTF(("%s: couldn't read SPI memory OCR\n", 153 SDMMCDEVNAME(sc))); 154 goto out; 155 } 156 } 157 158 /* Set the lowest voltage supported by the card and host. */ 159 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 160 error = sdmmc_set_bus_power(sc, host_ocr, card_ocr); 161 if (error) { 162 DPRINTF(("%s: couldn't supply voltage requested by card\n", 163 SDMMCDEVNAME(sc))); 164 goto out; 165 } 166 host_ocr &= card_ocr; 167 host_ocr |= ocr; 168 169 /* Send the new OCR value until all cards are ready. */ 170 error = sdmmc_mem_send_op_cond(sc, host_ocr, NULL); 171 if (error) { 172 DPRINTF(("%s: couldn't send memory OCR\n", SDMMCDEVNAME(sc))); 173 goto out; 174 } 175 176 out: 177 SDMMC_UNLOCK(sc); 178 179 return error; 180 } 181 182 /* 183 * Read the CSD and CID from all cards and assign each card a unique 184 * relative card address (RCA). CMD2 is ignored by SDIO-only cards. 185 */ 186 void 187 sdmmc_mem_scan(struct sdmmc_softc *sc) 188 { 189 sdmmc_response resp; 190 struct sdmmc_function *sf; 191 uint16_t next_rca; 192 int error; 193 int retry; 194 195 SDMMC_LOCK(sc); 196 197 /* 198 * CMD2 is a broadcast command understood by SD cards and MMC 199 * cards. All cards begin to respond to the command, but back 200 * off if another card drives the CMD line to a different level. 201 * Only one card will get its entire response through. That 202 * card remains silent once it has been assigned a RCA. 203 */ 204 for (retry = 0; retry < 100; retry++) { 205 error = sdmmc_mem_send_cid(sc, &resp); 206 if (error) { 207 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) && 208 error == ETIMEDOUT) { 209 /* No more cards there. */ 210 break; 211 } 212 DPRINTF(("%s: couldn't read CID\n", SDMMCDEVNAME(sc))); 213 break; 214 } 215 216 /* In MMC mode, find the next available RCA. */ 217 next_rca = 1; 218 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 219 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) 220 next_rca++; 221 } 222 223 /* Allocate a sdmmc_function structure. */ 224 sf = sdmmc_function_alloc(sc); 225 sf->rca = next_rca; 226 227 /* 228 * Remember the CID returned in the CMD2 response for 229 * later decoding. 230 */ 231 memcpy(sf->raw_cid, resp, sizeof(sf->raw_cid)); 232 233 /* 234 * Silence the card by assigning it a unique RCA, or 235 * querying it for its RCA in the case of SD. 236 */ 237 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 238 if (sdmmc_set_relative_addr(sc, sf) != 0) { 239 aprint_error_dev(sc->sc_dev, 240 "couldn't set mem RCA\n"); 241 sdmmc_function_free(sf); 242 break; 243 } 244 } 245 246 /* 247 * If this is a memory-only card, the card responding 248 * first becomes an alias for SDIO function 0. 249 */ 250 if (sc->sc_fn0 == NULL) 251 sc->sc_fn0 = sf; 252 253 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 254 255 /* only one function in SPI mode */ 256 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 257 break; 258 } 259 260 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 261 /* Go to Data Transfer Mode, if possible. */ 262 sdmmc_chip_bus_rod(sc->sc_sct, sc->sc_sch, 0); 263 264 /* 265 * All cards are either inactive or awaiting further commands. 266 * Read the CSDs and decode the raw CID for each card. 267 */ 268 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) { 269 error = sdmmc_mem_send_csd(sc, sf, &resp); 270 if (error) { 271 SET(sf->flags, SFF_ERROR); 272 continue; 273 } 274 275 if (sdmmc_decode_csd(sc, resp, sf) != 0 || 276 sdmmc_decode_cid(sc, sf->raw_cid, sf) != 0) { 277 SET(sf->flags, SFF_ERROR); 278 continue; 279 } 280 281 #ifdef SDMMC_DEBUG 282 printf("%s: CID: ", SDMMCDEVNAME(sc)); 283 sdmmc_print_cid(&sf->cid); 284 #endif 285 } 286 287 SDMMC_UNLOCK(sc); 288 } 289 290 int 291 sdmmc_decode_csd(struct sdmmc_softc *sc, sdmmc_response resp, 292 struct sdmmc_function *sf) 293 { 294 /* TRAN_SPEED(2:0): transfer rate exponent */ 295 static const int speed_exponent[8] = { 296 100 * 1, /* 100 Kbits/s */ 297 1 * 1000, /* 1 Mbits/s */ 298 10 * 1000, /* 10 Mbits/s */ 299 100 * 1000, /* 100 Mbits/s */ 300 0, 301 0, 302 0, 303 0, 304 }; 305 /* TRAN_SPEED(6:3): time mantissa */ 306 static const int speed_mantissa[16] = { 307 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80, 308 }; 309 struct sdmmc_csd *csd = &sf->csd; 310 int e, m; 311 312 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 313 /* 314 * CSD version 1.0 corresponds to SD system 315 * specification version 1.0 - 1.10. (SanDisk, 3.5.3) 316 */ 317 csd->csdver = SD_CSD_CSDVER(resp); 318 switch (csd->csdver) { 319 case SD_CSD_CSDVER_2_0: 320 DPRINTF(("%s: SD Ver.2.0\n", SDMMCDEVNAME(sc))); 321 SET(sf->flags, SFF_SDHC); 322 csd->capacity = SD_CSD_V2_CAPACITY(resp); 323 csd->read_bl_len = SD_CSD_V2_BL_LEN; 324 csd->ccc = SD_CSD_CCC(resp); 325 break; 326 327 case SD_CSD_CSDVER_1_0: 328 DPRINTF(("%s: SD Ver.1.0\n", SDMMCDEVNAME(sc))); 329 csd->capacity = SD_CSD_CAPACITY(resp); 330 csd->read_bl_len = SD_CSD_READ_BL_LEN(resp); 331 break; 332 333 default: 334 aprint_error_dev(sc->sc_dev, 335 "unknown SD CSD structure version 0x%x\n", 336 csd->csdver); 337 return 1; 338 } 339 340 csd->mmcver = SD_CSD_MMCVER(resp); 341 csd->write_bl_len = SD_CSD_WRITE_BL_LEN(resp); 342 csd->r2w_factor = SD_CSD_R2W_FACTOR(resp); 343 e = SD_CSD_SPEED_EXP(resp); 344 m = SD_CSD_SPEED_MANT(resp); 345 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 346 } else { 347 csd->csdver = MMC_CSD_CSDVER(resp); 348 if (csd->csdver == MMC_CSD_CSDVER_1_0) { 349 aprint_error_dev(sc->sc_dev, 350 "unknown MMC CSD structure version 0x%x\n", 351 csd->csdver); 352 return 1; 353 } 354 355 csd->mmcver = MMC_CSD_MMCVER(resp); 356 csd->capacity = MMC_CSD_CAPACITY(resp); 357 csd->read_bl_len = MMC_CSD_READ_BL_LEN(resp); 358 csd->write_bl_len = MMC_CSD_WRITE_BL_LEN(resp); 359 csd->r2w_factor = MMC_CSD_R2W_FACTOR(resp); 360 e = MMC_CSD_TRAN_SPEED_EXP(resp); 361 m = MMC_CSD_TRAN_SPEED_MANT(resp); 362 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 363 } 364 if ((1 << csd->read_bl_len) > SDMMC_SECTOR_SIZE) 365 csd->capacity *= (1 << csd->read_bl_len) / SDMMC_SECTOR_SIZE; 366 367 #ifdef SDMMC_DUMP_CSD 368 sdmmc_print_csd(resp, csd); 369 #endif 370 371 return 0; 372 } 373 374 int 375 sdmmc_decode_cid(struct sdmmc_softc *sc, sdmmc_response resp, 376 struct sdmmc_function *sf) 377 { 378 struct sdmmc_cid *cid = &sf->cid; 379 380 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 381 cid->mid = SD_CID_MID(resp); 382 cid->oid = SD_CID_OID(resp); 383 SD_CID_PNM_CPY(resp, cid->pnm); 384 cid->rev = SD_CID_REV(resp); 385 cid->psn = SD_CID_PSN(resp); 386 cid->mdt = SD_CID_MDT(resp); 387 } else { 388 switch(sf->csd.mmcver) { 389 case MMC_CSD_MMCVER_1_0: 390 case MMC_CSD_MMCVER_1_4: 391 cid->mid = MMC_CID_MID_V1(resp); 392 MMC_CID_PNM_V1_CPY(resp, cid->pnm); 393 cid->rev = MMC_CID_REV_V1(resp); 394 cid->psn = MMC_CID_PSN_V1(resp); 395 cid->mdt = MMC_CID_MDT_V1(resp); 396 break; 397 case MMC_CSD_MMCVER_2_0: 398 case MMC_CSD_MMCVER_3_1: 399 case MMC_CSD_MMCVER_4_0: 400 cid->mid = MMC_CID_MID_V2(resp); 401 cid->oid = MMC_CID_OID_V2(resp); 402 MMC_CID_PNM_V2_CPY(resp, cid->pnm); 403 cid->psn = MMC_CID_PSN_V2(resp); 404 break; 405 default: 406 aprint_error_dev(sc->sc_dev, "unknown MMC version %d\n", 407 sf->csd.mmcver); 408 return 1; 409 } 410 } 411 return 0; 412 } 413 414 void 415 sdmmc_print_cid(struct sdmmc_cid *cid) 416 { 417 418 printf("mid=0x%02x oid=0x%04x pnm=\"%s\" rev=0x%02x psn=0x%08x" 419 " mdt=%03x\n", cid->mid, cid->oid, cid->pnm, cid->rev, cid->psn, 420 cid->mdt); 421 } 422 423 #ifdef SDMMC_DUMP_CSD 424 void 425 sdmmc_print_csd(sdmmc_response resp, struct sdmmc_csd *csd) 426 { 427 428 printf("csdver = %d\n", csd->csdver); 429 printf("mmcver = %d\n", csd->mmcver); 430 printf("capacity = 0x%08x\n", csd->capacity); 431 printf("read_bl_len = %d\n", csd->read_bl_len); 432 printf("write_cl_len = %d\n", csd->write_bl_len); 433 printf("r2w_factor = %d\n", csd->r2w_factor); 434 printf("tran_speed = %d\n", csd->tran_speed); 435 printf("ccc = 0x%x\n", csd->ccc); 436 } 437 #endif 438 439 /* 440 * Initialize a SD/MMC memory card. 441 */ 442 int 443 sdmmc_mem_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 444 { 445 int error = 0; 446 447 SDMMC_LOCK(sc); 448 449 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 450 error = sdmmc_select_card(sc, sf); 451 if (error) 452 goto out; 453 } 454 455 if (!ISSET(sf->flags, SFF_SDHC)) { 456 error = sdmmc_mem_set_blocklen(sc, sf); 457 if (error) 458 goto out; 459 } 460 461 if (ISSET(sc->sc_flags, SMF_SD_MODE)) 462 error = sdmmc_mem_sd_init(sc, sf); 463 else 464 error = sdmmc_mem_mmc_init(sc, sf); 465 466 out: 467 SDMMC_UNLOCK(sc); 468 469 return error; 470 } 471 472 /* 473 * Get or set the card's memory OCR value (SD or MMC). 474 */ 475 int 476 sdmmc_mem_send_op_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 477 { 478 struct sdmmc_command cmd; 479 int error; 480 int retry; 481 482 /* Don't lock */ 483 484 /* 485 * If we change the OCR value, retry the command until the OCR 486 * we receive in response has the "CARD BUSY" bit set, meaning 487 * that all cards are ready for identification. 488 */ 489 for (retry = 0; retry < 100; retry++) { 490 memset(&cmd, 0, sizeof(cmd)); 491 cmd.c_arg = !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? 492 ocr : (ocr & MMC_OCR_HCS); 493 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R3 | SCF_RSP_SPI_R1; 494 495 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 496 cmd.c_opcode = SD_APP_OP_COND; 497 error = sdmmc_app_command(sc, NULL, &cmd); 498 } else { 499 cmd.c_opcode = MMC_SEND_OP_COND; 500 error = sdmmc_mmc_command(sc, &cmd); 501 } 502 if (error) 503 break; 504 505 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 506 if (!ISSET(MMC_SPI_R1(cmd.c_resp), R1_SPI_IDLE)) 507 break; 508 } else { 509 if (ISSET(MMC_R3(cmd.c_resp), MMC_OCR_MEM_READY) || 510 ocr == 0) 511 break; 512 } 513 514 error = ETIMEDOUT; 515 sdmmc_delay(10000); 516 } 517 if (error == 0 && 518 ocrp != NULL && 519 !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 520 *ocrp = MMC_R3(cmd.c_resp); 521 DPRINTF(("%s: sdmmc_mem_send_op_cond: error=%d, ocr=%#x\n", 522 SDMMCDEVNAME(sc), error, MMC_R3(cmd.c_resp))); 523 return error; 524 } 525 526 int 527 sdmmc_mem_send_if_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 528 { 529 struct sdmmc_command cmd; 530 int error; 531 532 /* Don't lock */ 533 534 memset(&cmd, 0, sizeof(cmd)); 535 cmd.c_arg = ocr; 536 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R7 | SCF_RSP_SPI_R7; 537 cmd.c_opcode = SD_SEND_IF_COND; 538 539 error = sdmmc_mmc_command(sc, &cmd); 540 if (error == 0 && ocrp != NULL) { 541 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 542 *ocrp = MMC_SPI_R7(cmd.c_resp); 543 } else { 544 *ocrp = MMC_R7(cmd.c_resp); 545 } 546 DPRINTF(("%s: sdmmc_mem_send_if_cond: error=%d, ocr=%#x\n", 547 SDMMCDEVNAME(sc), error, *ocrp)); 548 } 549 return error; 550 } 551 552 /* 553 * Set the read block length appropriately for this card, according to 554 * the card CSD register value. 555 */ 556 int 557 sdmmc_mem_set_blocklen(struct sdmmc_softc *sc, struct sdmmc_function *sf) 558 { 559 struct sdmmc_command cmd; 560 int error; 561 562 /* Don't lock */ 563 564 memset(&cmd, 0, sizeof(cmd)); 565 cmd.c_opcode = MMC_SET_BLOCKLEN; 566 cmd.c_arg = SDMMC_SECTOR_SIZE; 567 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R1; 568 569 error = sdmmc_mmc_command(sc, &cmd); 570 571 DPRINTF(("%s: sdmmc_mem_set_blocklen: read_bl_len=%d sector_size=%d\n", 572 SDMMCDEVNAME(sc), 1 << sf->csd.read_bl_len, SDMMC_SECTOR_SIZE)); 573 574 return error; 575 } 576 577 static int 578 sdmmc_mem_sd_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 579 { 580 static const struct { 581 int v; 582 int freq; 583 } switch_group0_functions[] = { 584 /* Default/SDR12 */ 585 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 586 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 25000 }, 587 588 /* High-Speed/SDR25 */ 589 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V | 590 MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V, 50000 }, 591 592 /* SDR50 */ 593 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 100000 }, 594 595 /* SDR104 */ 596 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 208000 }, 597 598 /* DDR50 */ 599 { MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V, 50000 }, 600 }; 601 int host_ocr, support_func, best_func, error, g, i; 602 char status[64]; 603 604 error = sdmmc_mem_send_scr(sc, sf, sf->raw_scr); 605 if (error) { 606 aprint_error_dev(sc->sc_dev, "SD_SEND_SCR send failed.\n"); 607 return error; 608 } 609 error = sdmmc_mem_decode_scr(sc, sf); 610 if (error) 611 return error; 612 613 if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE) && 614 ISSET(sf->scr.bus_width, SCR_SD_BUS_WIDTHS_4BIT)) { 615 DPRINTF(("%s: change bus width\n", SDMMCDEVNAME(sc))); 616 error = sdmmc_set_bus_width(sf, 4); 617 if (error) { 618 aprint_error_dev(sc->sc_dev, 619 "can't change bus width (%d bit)\n", 4); 620 return error; 621 } 622 sf->width = 4; 623 } 624 625 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 626 ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) { 627 DPRINTF(("%s: switch func mode 0\n", SDMMCDEVNAME(sc))); 628 error = sdmmc_mem_sd_switch(sf, 0, 1, 0, status); 629 if (error) { 630 aprint_error_dev(sc->sc_dev, 631 "switch func mode 0 failed\n"); 632 return error; 633 } 634 635 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 636 support_func = SFUNC_STATUS_GROUP(status, 1); 637 best_func = 0; 638 for (i = 0, g = 1; 639 i < __arraycount(switch_group0_functions); i++, g <<= 1) { 640 if (!(switch_group0_functions[i].v & host_ocr)) 641 continue; 642 if (g & support_func) 643 best_func = i; 644 } 645 if (ISSET(sc->sc_caps, SMC_CAPS_SD_HIGHSPEED) && 646 best_func != 0) { 647 DPRINTF(("%s: switch func mode 1(func=%d)\n", 648 SDMMCDEVNAME(sc), best_func)); 649 error = 650 sdmmc_mem_sd_switch(sf, 1, 1, best_func, status); 651 if (error) { 652 aprint_error_dev(sc->sc_dev, 653 "switch func mode 1 failed:" 654 " group 1 function %d(0x%2x)\n", 655 best_func, support_func); 656 return error; 657 } 658 sf->csd.tran_speed = 659 switch_group0_functions[best_func].freq; 660 661 /* Wait 400KHz x 8 clock (2.5us * 8 + slop) */ 662 delay(25); 663 } 664 } 665 666 /* change bus clock */ 667 if (sc->sc_busclk > sf->csd.tran_speed) 668 sc->sc_busclk = sf->csd.tran_speed; 669 error = sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 670 if (error) { 671 aprint_error_dev(sc->sc_dev, "can't change bus clock\n"); 672 return error; 673 } 674 675 return 0; 676 } 677 678 static int 679 sdmmc_mem_mmc_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 680 { 681 int width, value, hs_timing, error; 682 char ext_csd[512]; 683 684 if (sf->csd.mmcver >= MMC_CSD_MMCVER_4_0) { 685 error = sdmmc_mem_send_cxd_data(sc, 686 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 687 if (error) { 688 aprint_error_dev(sc->sc_dev, "can't read EXT_CSD\n"); 689 return error; 690 } 691 if ((sf->csd.csdver == MMC_CSD_CSDVER_EXT_CSD) && 692 (ext_csd[EXT_CSD_STRUCTURE] > EXT_CSD_STRUCTURE_VER_1_2)) { 693 aprint_error_dev(sc->sc_dev, 694 "unrecognised future version (%d)\n", 695 ext_csd[EXT_CSD_STRUCTURE]); 696 return error; 697 } 698 hs_timing = 0; 699 switch (ext_csd[EXT_CSD_CARD_TYPE]) { 700 case EXT_CSD_CARD_TYPE_26M: 701 sf->csd.tran_speed = 26000; /* 26MHz */ 702 break; 703 704 case EXT_CSD_CARD_TYPE_52M | EXT_CSD_CARD_TYPE_26M: 705 sf->csd.tran_speed = 52000; /* 52MHz */ 706 hs_timing = 1; 707 break; 708 709 default: 710 aprint_error_dev(sc->sc_dev, 711 "unknwon CARD_TYPE: 0x%x\n", 712 ext_csd[EXT_CSD_CARD_TYPE]); 713 return error; 714 } 715 716 if (!ISSET(sc->sc_caps, SMC_CAPS_MMC_HIGHSPEED)) { 717 hs_timing = 0; 718 } 719 if (hs_timing) { 720 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 721 EXT_CSD_HS_TIMING, hs_timing); 722 if (error) { 723 aprint_error_dev(sc->sc_dev, 724 "can't change high speed\n"); 725 return error; 726 } 727 } 728 729 if (sc->sc_busclk > sf->csd.tran_speed) 730 sc->sc_busclk = sf->csd.tran_speed; 731 error = 732 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 733 if (error) { 734 aprint_error_dev(sc->sc_dev, 735 "can't change bus clock\n"); 736 return error; 737 } 738 739 if (hs_timing) { 740 error = sdmmc_mem_send_cxd_data(sc, 741 MMC_SEND_EXT_CSD, ext_csd, sizeof(ext_csd)); 742 if (error) { 743 aprint_error_dev(sc->sc_dev, 744 "can't re-read EXT_CSD\n"); 745 return error; 746 } 747 if (ext_csd[EXT_CSD_HS_TIMING] != hs_timing) { 748 aprint_error_dev(sc->sc_dev, 749 "HS_TIMING set failed\n"); 750 return EINVAL; 751 } 752 } 753 754 if (ISSET(sc->sc_caps, SMC_CAPS_8BIT_MODE)) { 755 width = 8; 756 value = EXT_CSD_BUS_WIDTH_8; 757 } else if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE)) { 758 width = 4; 759 value = EXT_CSD_BUS_WIDTH_4; 760 } else { 761 width = 1; 762 value = EXT_CSD_BUS_WIDTH_1; 763 } 764 765 if (width != 1) { 766 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL, 767 EXT_CSD_BUS_WIDTH, value); 768 if (error == 0) 769 error = sdmmc_chip_bus_width(sc->sc_sct, 770 sc->sc_sch, width); 771 else { 772 DPRINTF(("%s: can't change bus width" 773 " (%d bit)\n", SDMMCDEVNAME(sc), width)); 774 return error; 775 } 776 777 /* XXXX: need bus test? (using by CMD14 & CMD19) */ 778 } 779 sf->width = width; 780 } else { 781 if (sc->sc_busclk > sf->csd.tran_speed) 782 sc->sc_busclk = sf->csd.tran_speed; 783 error = 784 sdmmc_chip_bus_clock(sc->sc_sct, sc->sc_sch, sc->sc_busclk); 785 if (error) { 786 aprint_error_dev(sc->sc_dev, 787 "can't change bus clock\n"); 788 return error; 789 } 790 } 791 792 return 0; 793 } 794 795 static int 796 sdmmc_mem_send_cid(struct sdmmc_softc *sc, sdmmc_response *resp) 797 { 798 struct sdmmc_command cmd; 799 int error; 800 801 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 802 memset(&cmd, 0, sizeof cmd); 803 cmd.c_opcode = MMC_ALL_SEND_CID; 804 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R2; 805 806 error = sdmmc_mmc_command(sc, &cmd); 807 } else { 808 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CID, &cmd.c_resp, 809 sizeof(cmd.c_resp)); 810 } 811 812 #ifdef SDMMC_DEBUG 813 sdmmc_dump_data("CID", cmd.c_resp, sizeof(cmd.c_resp)); 814 #endif 815 if (error == 0 && resp != NULL) 816 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 817 return error; 818 } 819 820 static int 821 sdmmc_mem_send_csd(struct sdmmc_softc *sc, struct sdmmc_function *sf, 822 sdmmc_response *resp) 823 { 824 struct sdmmc_command cmd; 825 int error; 826 827 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 828 memset(&cmd, 0, sizeof cmd); 829 cmd.c_opcode = MMC_SEND_CSD; 830 cmd.c_arg = MMC_ARG_RCA(sf->rca); 831 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R2; 832 833 error = sdmmc_mmc_command(sc, &cmd); 834 } else { 835 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CSD, &cmd.c_resp, 836 sizeof(cmd.c_resp)); 837 } 838 839 #ifdef SDMMC_DEBUG 840 sdmmc_dump_data("CSD", cmd.c_resp, sizeof(cmd.c_resp)); 841 #endif 842 if (error == 0 && resp != NULL) 843 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 844 return error; 845 } 846 847 static int 848 sdmmc_mem_send_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf, 849 uint32_t scr[2]) 850 { 851 struct sdmmc_command cmd; 852 bus_dma_segment_t ds[1]; 853 void *ptr = NULL; 854 int datalen = 8; 855 int rseg; 856 int error = 0; 857 858 /* Don't lock */ 859 860 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 861 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, 862 ds, 1, &rseg, BUS_DMA_NOWAIT); 863 if (error) 864 goto out; 865 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 866 BUS_DMA_NOWAIT); 867 if (error) 868 goto dmamem_free; 869 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 870 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 871 if (error) 872 goto dmamem_unmap; 873 874 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 875 BUS_DMASYNC_PREREAD); 876 } else { 877 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 878 if (ptr == NULL) 879 goto out; 880 } 881 882 memset(&cmd, 0, sizeof(cmd)); 883 cmd.c_data = ptr; 884 cmd.c_datalen = datalen; 885 cmd.c_blklen = datalen; 886 cmd.c_arg = 0; 887 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 888 cmd.c_opcode = SD_APP_SEND_SCR; 889 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 890 cmd.c_dmamap = sc->sc_dmap; 891 892 error = sdmmc_app_command(sc, sf, &cmd); 893 if (error == 0) { 894 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 895 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 896 BUS_DMASYNC_POSTREAD); 897 } 898 memcpy(scr, ptr, datalen); 899 } 900 901 out: 902 if (ptr != NULL) { 903 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 904 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 905 dmamem_unmap: 906 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 907 dmamem_free: 908 bus_dmamem_free(sc->sc_dmat, ds, rseg); 909 } else { 910 free(ptr, M_DEVBUF); 911 } 912 } 913 DPRINTF(("%s: sdmem_mem_send_scr: error = %d\n", SDMMCDEVNAME(sc), 914 error)); 915 916 #ifdef SDMMC_DEBUG 917 if (error == 0) 918 sdmmc_dump_data("SCR", scr, 8); 919 #endif 920 return error; 921 } 922 923 static int 924 sdmmc_mem_decode_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf) 925 { 926 sdmmc_response resp; 927 int ver; 928 929 memset(resp, 0, sizeof(resp)); 930 /* 931 * Change the raw-scr received from the DMA stream to resp. 932 */ 933 resp[0] = be32toh(sf->raw_scr[1]) >> 8; // LSW 934 resp[1] = be32toh(sf->raw_scr[0]); // MSW 935 resp[0] |= (resp[1] & 0xff) << 24; 936 resp[1] >>= 8; 937 938 ver = SCR_STRUCTURE(resp); 939 sf->scr.sd_spec = SCR_SD_SPEC(resp); 940 sf->scr.bus_width = SCR_SD_BUS_WIDTHS(resp); 941 942 DPRINTF(("%s: sdmmc_mem_decode_scr: %08x%08x spec=%d, bus width=%d\n", 943 SDMMCDEVNAME(sc), resp[1], resp[0], 944 sf->scr.sd_spec, sf->scr.bus_width)); 945 946 if (ver != 0) { 947 DPRINTF(("%s: unknown structure version: %d\n", 948 SDMMCDEVNAME(sc), ver)); 949 return EINVAL; 950 } 951 return 0; 952 } 953 954 static int 955 sdmmc_mem_send_cxd_data(struct sdmmc_softc *sc, int opcode, void *data, 956 size_t datalen) 957 { 958 struct sdmmc_command cmd; 959 bus_dma_segment_t ds[1]; 960 void *ptr = NULL; 961 int rseg; 962 int error = 0; 963 964 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 965 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, ds, 966 1, &rseg, BUS_DMA_NOWAIT); 967 if (error) 968 goto out; 969 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 970 BUS_DMA_NOWAIT); 971 if (error) 972 goto dmamem_free; 973 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 974 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 975 if (error) 976 goto dmamem_unmap; 977 978 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 979 BUS_DMASYNC_PREREAD); 980 } else { 981 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 982 if (ptr == NULL) 983 goto out; 984 } 985 986 memset(&cmd, 0, sizeof(cmd)); 987 cmd.c_data = ptr; 988 cmd.c_datalen = datalen; 989 cmd.c_blklen = datalen; 990 cmd.c_opcode = opcode; 991 cmd.c_arg = 0; 992 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_SPI_R1; 993 if (opcode == MMC_SEND_EXT_CSD) 994 SET(cmd.c_flags, SCF_RSP_R1); 995 else 996 SET(cmd.c_flags, SCF_RSP_R2); 997 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 998 cmd.c_dmamap = sc->sc_dmap; 999 1000 error = sdmmc_mmc_command(sc, &cmd); 1001 if (error == 0) { 1002 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1003 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1004 BUS_DMASYNC_POSTREAD); 1005 } 1006 memcpy(data, ptr, datalen); 1007 #ifdef SDMMC_DEBUG 1008 sdmmc_dump_data("CXD", data, datalen); 1009 #endif 1010 } 1011 1012 out: 1013 if (ptr != NULL) { 1014 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1015 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1016 dmamem_unmap: 1017 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 1018 dmamem_free: 1019 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1020 } else { 1021 free(ptr, M_DEVBUF); 1022 } 1023 } 1024 return error; 1025 } 1026 1027 static int 1028 sdmmc_set_bus_width(struct sdmmc_function *sf, int width) 1029 { 1030 struct sdmmc_softc *sc = sf->sc; 1031 struct sdmmc_command cmd; 1032 int error; 1033 1034 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1035 return ENODEV; 1036 1037 memset(&cmd, 0, sizeof(cmd)); 1038 cmd.c_opcode = SD_APP_SET_BUS_WIDTH; 1039 cmd.c_flags = SCF_RSP_R1 | SCF_CMD_AC; 1040 1041 switch (width) { 1042 case 1: 1043 cmd.c_arg = SD_ARG_BUS_WIDTH_1; 1044 break; 1045 1046 case 4: 1047 cmd.c_arg = SD_ARG_BUS_WIDTH_4; 1048 break; 1049 1050 default: 1051 return EINVAL; 1052 } 1053 1054 error = sdmmc_app_command(sc, sf, &cmd); 1055 if (error == 0) 1056 error = sdmmc_chip_bus_width(sc->sc_sct, sc->sc_sch, width); 1057 return error; 1058 } 1059 1060 static int 1061 sdmmc_mem_sd_switch(struct sdmmc_function *sf, int mode, int group, 1062 int function, void *status) 1063 { 1064 struct sdmmc_softc *sc = sf->sc; 1065 struct sdmmc_command cmd; 1066 bus_dma_segment_t ds[1]; 1067 void *ptr = NULL; 1068 int gsft, rseg, error = 0; 1069 const int statlen = 64; 1070 1071 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 && 1072 !ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) 1073 return EINVAL; 1074 1075 if (group <= 0 || group > 6 || 1076 function < 0 || function > 16) 1077 return EINVAL; 1078 1079 gsft = (group - 1) << 2; 1080 1081 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1082 error = bus_dmamem_alloc(sc->sc_dmat, statlen, PAGE_SIZE, 0, ds, 1083 1, &rseg, BUS_DMA_NOWAIT); 1084 if (error) 1085 goto out; 1086 error = bus_dmamem_map(sc->sc_dmat, ds, 1, statlen, &ptr, 1087 BUS_DMA_NOWAIT); 1088 if (error) 1089 goto dmamem_free; 1090 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, statlen, 1091 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 1092 if (error) 1093 goto dmamem_unmap; 1094 1095 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1096 BUS_DMASYNC_PREREAD); 1097 } else { 1098 ptr = malloc(statlen, M_DEVBUF, M_NOWAIT | M_ZERO); 1099 if (ptr == NULL) 1100 goto out; 1101 } 1102 1103 memset(&cmd, 0, sizeof(cmd)); 1104 cmd.c_data = ptr; 1105 cmd.c_datalen = statlen; 1106 cmd.c_blklen = statlen; 1107 cmd.c_opcode = SD_SEND_SWITCH_FUNC; 1108 cmd.c_arg = 1109 (!!mode << 31) | (function << gsft) | (0x00ffffff & ~(0xf << gsft)); 1110 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1111 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 1112 cmd.c_dmamap = sc->sc_dmap; 1113 1114 error = sdmmc_mmc_command(sc, &cmd); 1115 if (error == 0) { 1116 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1117 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, statlen, 1118 BUS_DMASYNC_POSTREAD); 1119 } 1120 memcpy(status, ptr, statlen); 1121 } 1122 1123 out: 1124 if (ptr != NULL) { 1125 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1126 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1127 dmamem_unmap: 1128 bus_dmamem_unmap(sc->sc_dmat, ptr, statlen); 1129 dmamem_free: 1130 bus_dmamem_free(sc->sc_dmat, ds, rseg); 1131 } else { 1132 free(ptr, M_DEVBUF); 1133 } 1134 } 1135 return error; 1136 } 1137 1138 static int 1139 sdmmc_mem_mmc_switch(struct sdmmc_function *sf, uint8_t set, uint8_t index, 1140 uint8_t value) 1141 { 1142 struct sdmmc_softc *sc = sf->sc; 1143 struct sdmmc_command cmd; 1144 1145 memset(&cmd, 0, sizeof(cmd)); 1146 cmd.c_opcode = MMC_SWITCH; 1147 cmd.c_arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 1148 (index << 16) | (value << 8) | set; 1149 cmd.c_flags = SCF_RSP_SPI_R1B | SCF_RSP_R1B | SCF_CMD_AC; 1150 1151 return sdmmc_mmc_command(sc, &cmd); 1152 } 1153 1154 /* 1155 * SPI mode function 1156 */ 1157 static int 1158 sdmmc_mem_spi_read_ocr(struct sdmmc_softc *sc, uint32_t hcs, uint32_t *card_ocr) 1159 { 1160 struct sdmmc_command cmd; 1161 int error; 1162 1163 memset(&cmd, 0, sizeof(cmd)); 1164 cmd.c_opcode = MMC_READ_OCR; 1165 cmd.c_arg = hcs ? MMC_OCR_HCS : 0; 1166 cmd.c_flags = SCF_RSP_SPI_R3; 1167 1168 error = sdmmc_mmc_command(sc, &cmd); 1169 if (error == 0 && card_ocr != NULL) 1170 *card_ocr = cmd.c_resp[1]; 1171 DPRINTF(("%s: sdmmc_mem_spi_read_ocr: error=%d, ocr=%#x\n", 1172 SDMMCDEVNAME(sc), error, cmd.c_resp[1])); 1173 return error; 1174 } 1175 1176 /* 1177 * read/write function 1178 */ 1179 /* read */ 1180 static int 1181 sdmmc_mem_single_read_block(struct sdmmc_function *sf, uint32_t blkno, 1182 u_char *data, size_t datalen) 1183 { 1184 struct sdmmc_softc *sc __unused = sf->sc; 1185 int error = 0; 1186 int i; 1187 1188 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1189 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1190 1191 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1192 error = sdmmc_mem_read_block_subr(sf, blkno + i, 1193 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1194 if (error) 1195 break; 1196 } 1197 return error; 1198 } 1199 1200 static int 1201 sdmmc_mem_read_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1202 u_char *data, size_t datalen) 1203 { 1204 struct sdmmc_softc *sc = sf->sc; 1205 struct sdmmc_command cmd; 1206 int error, bbuf, seg, off, len, num; 1207 1208 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1209 error = sdmmc_select_card(sc, sf); 1210 if (error) 1211 goto out; 1212 } 1213 1214 bbuf = 0; 1215 num = 0; 1216 seg = off = len = 0; 1217 retry: 1218 memset(&cmd, 0, sizeof(cmd)); 1219 cmd.c_data = data; 1220 cmd.c_datalen = datalen; 1221 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1222 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1223 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1224 cmd.c_arg = blkno; 1225 if (!ISSET(sf->flags, SFF_SDHC)) 1226 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1227 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 1228 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1229 cmd.c_dmamap = sc->sc_dmap; 1230 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1231 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1232 len &= ~(SDMMC_SECTOR_SIZE - 1); 1233 cmd.c_datalen = len; 1234 cmd.c_dmaseg = seg; 1235 cmd.c_dmaoff = off; 1236 bbuf = 0; 1237 if (len == 0) { 1238 /* Use bounce buffer */ 1239 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1240 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1241 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1242 cmd.c_dmamap = sf->bbuf_dmap; 1243 cmd.c_dmaseg = 0; 1244 cmd.c_dmaoff = 0; 1245 bbuf = 1; 1246 len = SDMMC_SECTOR_SIZE; 1247 } 1248 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1249 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 1250 } 1251 } 1252 1253 error = sdmmc_mmc_command(sc, &cmd); 1254 if (error) 1255 goto out; 1256 1257 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1258 if (cmd.c_opcode == MMC_READ_BLOCK_MULTIPLE) { 1259 memset(&cmd, 0, sizeof cmd); 1260 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1261 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1262 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1263 error = sdmmc_mmc_command(sc, &cmd); 1264 if (error) 1265 goto out; 1266 } 1267 } 1268 1269 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1270 do { 1271 memset(&cmd, 0, sizeof(cmd)); 1272 cmd.c_opcode = MMC_SEND_STATUS; 1273 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1274 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1275 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1276 error = sdmmc_mmc_command(sc, &cmd); 1277 if (error) 1278 break; 1279 /* XXX time out */ 1280 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1281 } 1282 1283 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1284 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1285 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1286 1287 if (bbuf) { 1288 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1289 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1290 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1291 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTREAD); 1292 memcpy(data, sf->bbuf, SDMMC_SECTOR_SIZE); 1293 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1294 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREREAD); 1295 } 1296 num += len; 1297 data += len; 1298 datalen -= len; 1299 blkno += (len / SDMMC_SECTOR_SIZE); 1300 1301 while (off + len >= dm_segs[seg].ds_len) { 1302 len -= dm_segs[seg++].ds_len; 1303 off = 0; 1304 } 1305 off += len; 1306 1307 if (seg < sc->sc_dmap->dm_nsegs) 1308 goto retry; 1309 } 1310 1311 out: 1312 return error; 1313 } 1314 1315 int 1316 sdmmc_mem_read_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1317 size_t datalen) 1318 { 1319 struct sdmmc_softc *sc = sf->sc; 1320 int error; 1321 1322 SDMMC_LOCK(sc); 1323 1324 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1325 error = sdmmc_mem_single_read_block(sf, blkno, data, datalen); 1326 goto out; 1327 } 1328 1329 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1330 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1331 goto out; 1332 } 1333 1334 /* DMA transfer */ 1335 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1336 BUS_DMA_NOWAIT|BUS_DMA_READ); 1337 if (error) 1338 goto out; 1339 1340 #ifdef SDMMC_DEBUG 1341 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1342 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1343 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1344 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1345 } 1346 #endif 1347 1348 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1349 BUS_DMASYNC_PREREAD); 1350 1351 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1352 if (error) 1353 goto unload; 1354 1355 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1356 BUS_DMASYNC_POSTREAD); 1357 unload: 1358 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1359 1360 out: 1361 SDMMC_UNLOCK(sc); 1362 1363 return error; 1364 } 1365 1366 /* write */ 1367 static int 1368 sdmmc_mem_single_write_block(struct sdmmc_function *sf, uint32_t blkno, 1369 u_char *data, size_t datalen) 1370 { 1371 struct sdmmc_softc *sc __unused = sf->sc; 1372 int error = 0; 1373 int i; 1374 1375 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1376 KASSERT(!ISSET(sc->sc_caps, SMC_CAPS_DMA)); 1377 1378 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1379 error = sdmmc_mem_write_block_subr(sf, blkno + i, 1380 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1381 if (error) 1382 break; 1383 } 1384 return error; 1385 } 1386 1387 static int 1388 sdmmc_mem_write_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1389 u_char *data, size_t datalen) 1390 { 1391 struct sdmmc_softc *sc = sf->sc; 1392 struct sdmmc_command cmd; 1393 int error, bbuf, seg, off, len, num; 1394 1395 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1396 error = sdmmc_select_card(sc, sf); 1397 if (error) 1398 goto out; 1399 } 1400 1401 bbuf = 0; 1402 num = 0; 1403 seg = off = len = 0; 1404 retry: 1405 memset(&cmd, 0, sizeof(cmd)); 1406 cmd.c_data = data; 1407 cmd.c_datalen = datalen; 1408 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1409 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1410 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1411 cmd.c_arg = blkno; 1412 if (!ISSET(sf->flags, SFF_SDHC)) 1413 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1414 cmd.c_flags = SCF_CMD_ADTC | SCF_RSP_R1; 1415 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1416 cmd.c_dmamap = sc->sc_dmap; 1417 if (!ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1418 len = sc->sc_dmap->dm_segs[seg].ds_len - off; 1419 len &= ~(SDMMC_SECTOR_SIZE - 1); 1420 cmd.c_datalen = len; 1421 cmd.c_dmaseg = seg; 1422 cmd.c_dmaoff = off; 1423 bbuf = 0; 1424 if (len == 0) { 1425 /* Use bounce buffer */ 1426 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1427 SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1428 memcpy(sf->bbuf, data, SDMMC_SECTOR_SIZE); 1429 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, num, 1430 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1431 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 0, 1432 SDMMC_SECTOR_SIZE, BUS_DMASYNC_PREWRITE); 1433 cmd.c_datalen = SDMMC_SECTOR_SIZE; 1434 cmd.c_dmamap = sf->bbuf_dmap; 1435 cmd.c_dmaseg = 0; 1436 cmd.c_dmaoff = 0; 1437 bbuf = 1; 1438 len = SDMMC_SECTOR_SIZE; 1439 } 1440 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1441 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1442 } 1443 } 1444 1445 error = sdmmc_mmc_command(sc, &cmd); 1446 if (error) 1447 goto out; 1448 1449 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1450 if (cmd.c_opcode == MMC_WRITE_BLOCK_MULTIPLE) { 1451 memset(&cmd, 0, sizeof(cmd)); 1452 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1453 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1454 error = sdmmc_mmc_command(sc, &cmd); 1455 if (error) 1456 goto out; 1457 } 1458 } 1459 1460 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1461 do { 1462 memset(&cmd, 0, sizeof(cmd)); 1463 cmd.c_opcode = MMC_SEND_STATUS; 1464 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1465 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1466 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1467 error = sdmmc_mmc_command(sc, &cmd); 1468 if (error) 1469 break; 1470 /* XXX time out */ 1471 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1472 } 1473 1474 if (ISSET(sc->sc_caps, SMC_CAPS_DMA) && 1475 !ISSET(sc->sc_caps, SMC_CAPS_MULTI_SEG_DMA)) { 1476 bus_dma_segment_t *dm_segs = sc->sc_dmap->dm_segs; 1477 1478 if (bbuf) 1479 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 1480 0, SDMMC_SECTOR_SIZE, BUS_DMASYNC_POSTWRITE); 1481 num += len; 1482 data += len; 1483 datalen -= len; 1484 blkno += (len / SDMMC_SECTOR_SIZE); 1485 1486 while (off + len >= dm_segs[seg].ds_len) { 1487 len -= dm_segs[seg++].ds_len; 1488 off = 0; 1489 } 1490 off += len; 1491 1492 if (seg < sc->sc_dmap->dm_nsegs) 1493 goto retry; 1494 } 1495 1496 out: 1497 return error; 1498 } 1499 1500 int 1501 sdmmc_mem_write_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1502 size_t datalen) 1503 { 1504 struct sdmmc_softc *sc = sf->sc; 1505 int error; 1506 1507 SDMMC_LOCK(sc); 1508 1509 if (sdmmc_chip_write_protect(sc->sc_sct, sc->sc_sch)) { 1510 aprint_normal_dev(sc->sc_dev, "write-protected\n"); 1511 error = EIO; 1512 goto out; 1513 } 1514 1515 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1516 error = sdmmc_mem_single_write_block(sf, blkno, data, datalen); 1517 goto out; 1518 } 1519 1520 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1521 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1522 goto out; 1523 } 1524 1525 /* DMA transfer */ 1526 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1527 BUS_DMA_NOWAIT|BUS_DMA_WRITE); 1528 if (error) 1529 goto out; 1530 1531 #ifdef SDMMC_DEBUG 1532 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1533 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1534 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1535 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1536 } 1537 #endif 1538 1539 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1540 BUS_DMASYNC_PREWRITE); 1541 1542 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1543 if (error) 1544 goto unload; 1545 1546 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1547 BUS_DMASYNC_POSTWRITE); 1548 unload: 1549 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1550 1551 out: 1552 SDMMC_UNLOCK(sc); 1553 1554 return error; 1555 } 1556
Indexes created Tue Sep 23 23:09:58 GMT 2025