sdmmc_mem.c revision 1.6
1 /* $NetBSD: sdmmc_mem.c,v 1.6 2010/09/20 09:19:31 kiyohara Exp $ */ 2 /* $OpenBSD: sdmmc_mem.c,v 1.10 2009/01/09 10:55:22 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Copyright (c) 2007-2010 NONAKA Kimihiro <nonaka (at) netbsd.org> 22 * All rights reserved. 23 * 24 * Redistribution and use in source and binary forms, with or without 25 * modification, are permitted provided that the following conditions 26 * are met: 27 * 1. Redistributions of source code must retain the above copyright 28 * notice, this list of conditions and the following disclaimer. 29 * 2. Redistributions in binary form must reproduce the above copyright 30 * notice, this list of conditions and the following disclaimer in the 31 * documentation and/or other materials provided with the distribution. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 34 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 36 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 37 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 41 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 42 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 43 * SUCH DAMAGE. 44 */ 45 46 /* Routines for SD/MMC memory cards. */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: sdmmc_mem.c,v 1.6 2010/09/20 09:19:31 kiyohara Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/kernel.h> 53 #include <sys/malloc.h> 54 #include <sys/systm.h> 55 #include <sys/device.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <dev/sdmmc/sdmmcchip.h> 60 #include <dev/sdmmc/sdmmcreg.h> 61 #include <dev/sdmmc/sdmmcvar.h> 62 63 #ifdef SDMMC_DEBUG 64 #define DPRINTF(s) do { printf s; } while (/*CONSTCOND*/0) 65 #else 66 #define DPRINTF(s) do {} while (/*CONSTCOND*/0) 67 #endif 68 69 static int sdmmc_mem_send_cid(struct sdmmc_softc *, sdmmc_response *); 70 static int sdmmc_mem_send_csd(struct sdmmc_softc *, struct sdmmc_function *, 71 sdmmc_response *); 72 static int sdmmc_mem_send_scr(struct sdmmc_softc *, struct sdmmc_function *, 73 uint32_t scr[2]); 74 static int sdmmc_mem_decode_scr(struct sdmmc_softc *, struct sdmmc_function *); 75 static int sdmmc_mem_send_cxd_data(struct sdmmc_softc *, int, void *, size_t); 76 static int sdmmc_set_bus_width(struct sdmmc_function *, int); 77 #if 0 78 static int sdmmc_mem_mmc_switch(struct sdmmc_function *, uint8_t, uint8_t, 79 uint8_t); 80 #endif 81 static int sdmmc_mem_spi_read_ocr(struct sdmmc_softc *, uint32_t, uint32_t *); 82 static int sdmmc_mem_single_read_block(struct sdmmc_function *, uint32_t, 83 u_char *, size_t); 84 static int sdmmc_mem_single_write_block(struct sdmmc_function *, uint32_t, 85 u_char *, size_t); 86 static int sdmmc_mem_read_block_subr(struct sdmmc_function *, uint32_t, 87 u_char *, size_t); 88 static int sdmmc_mem_write_block_subr(struct sdmmc_function *, uint32_t, 89 u_char *, size_t); 90 91 /* 92 * Initialize SD/MMC memory cards and memory in SDIO "combo" cards. 93 */ 94 int 95 sdmmc_mem_enable(struct sdmmc_softc *sc) 96 { 97 uint32_t host_ocr; 98 uint32_t card_ocr; 99 uint32_t ocr = 0; 100 int error; 101 102 SDMMC_LOCK(sc); 103 104 /* Set host mode to SD "combo" card or SD memory-only. */ 105 SET(sc->sc_flags, SMF_SD_MODE|SMF_MEM_MODE); 106 107 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 108 sdmmc_spi_chip_initialize(sc->sc_spi_sct, sc->sc_sch); 109 110 /* Reset memory (*must* do that before CMD55 or CMD1). */ 111 sdmmc_go_idle_state(sc); 112 113 /* Check SD Ver.2 */ 114 error = sdmmc_mem_send_if_cond(sc, 0x1aa, &card_ocr); 115 if (error == 0 && card_ocr == 0x1aa) 116 SET(ocr, MMC_OCR_HCS); 117 118 /* 119 * Read the SD/MMC memory OCR value by issuing CMD55 followed 120 * by ACMD41 to read the OCR value from memory-only SD cards. 121 * MMC cards will not respond to CMD55 or ACMD41 and this is 122 * how we distinguish them from SD cards. 123 */ 124 mmc_mode: 125 error = sdmmc_mem_send_op_cond(sc, 126 ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? ocr : 0, &card_ocr); 127 if (error) { 128 if (ISSET(sc->sc_flags, SMF_SD_MODE) && 129 !ISSET(sc->sc_flags, SMF_IO_MODE)) { 130 /* Not a SD card, switch to MMC mode. */ 131 DPRINTF(("%s: switch to MMC mode\n", SDMMCDEVNAME(sc))); 132 CLR(sc->sc_flags, SMF_SD_MODE); 133 goto mmc_mode; 134 } 135 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 136 DPRINTF(("%s: couldn't read memory OCR\n", 137 SDMMCDEVNAME(sc))); 138 goto out; 139 } else { 140 /* Not a "combo" card. */ 141 CLR(sc->sc_flags, SMF_MEM_MODE); 142 error = 0; 143 goto out; 144 } 145 } 146 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 147 /* get card OCR */ 148 error = sdmmc_mem_spi_read_ocr(sc, ocr, &card_ocr); 149 if (error) { 150 DPRINTF(("%s: couldn't read SPI memory OCR\n", 151 SDMMCDEVNAME(sc))); 152 goto out; 153 } 154 } 155 156 /* Set the lowest voltage supported by the card and host. */ 157 host_ocr = sdmmc_chip_host_ocr(sc->sc_sct, sc->sc_sch); 158 error = sdmmc_set_bus_power(sc, host_ocr, card_ocr); 159 if (error) { 160 DPRINTF(("%s: couldn't supply voltage requested by card\n", 161 SDMMCDEVNAME(sc))); 162 goto out; 163 } 164 host_ocr &= card_ocr; 165 host_ocr |= ocr; 166 167 /* Send the new OCR value until all cards are ready. */ 168 error = sdmmc_mem_send_op_cond(sc, host_ocr, NULL); 169 if (error) { 170 DPRINTF(("%s: couldn't send memory OCR\n", SDMMCDEVNAME(sc))); 171 goto out; 172 } 173 174 out: 175 SDMMC_UNLOCK(sc); 176 177 return error; 178 } 179 180 /* 181 * Read the CSD and CID from all cards and assign each card a unique 182 * relative card address (RCA). CMD2 is ignored by SDIO-only cards. 183 */ 184 void 185 sdmmc_mem_scan(struct sdmmc_softc *sc) 186 { 187 sdmmc_response resp; 188 struct sdmmc_function *sf; 189 uint16_t next_rca; 190 int error; 191 int retry; 192 193 SDMMC_LOCK(sc); 194 195 /* 196 * CMD2 is a broadcast command understood by SD cards and MMC 197 * cards. All cards begin to respond to the command, but back 198 * off if another card drives the CMD line to a different level. 199 * Only one card will get its entire response through. That 200 * card remains silent once it has been assigned a RCA. 201 */ 202 for (retry = 0; retry < 100; retry++) { 203 error = sdmmc_mem_send_cid(sc, &resp); 204 if (error) { 205 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) && 206 error == ETIMEDOUT) { 207 /* No more cards there. */ 208 break; 209 } 210 DPRINTF(("%s: couldn't read CID\n", SDMMCDEVNAME(sc))); 211 break; 212 } 213 214 /* In MMC mode, find the next available RCA. */ 215 next_rca = 1; 216 if (!ISSET(sc->sc_flags, SMF_SD_MODE)) { 217 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) 218 next_rca++; 219 } 220 221 /* Allocate a sdmmc_function structure. */ 222 sf = sdmmc_function_alloc(sc); 223 sf->rca = next_rca; 224 225 /* 226 * Remember the CID returned in the CMD2 response for 227 * later decoding. 228 */ 229 memcpy(sf->raw_cid, resp, sizeof(sf->raw_cid)); 230 231 /* 232 * Silence the card by assigning it a unique RCA, or 233 * querying it for its RCA in the case of SD. 234 */ 235 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 236 if (sdmmc_set_relative_addr(sc, sf) != 0) { 237 aprint_error_dev(sc->sc_dev, 238 "couldn't set mem RCA\n"); 239 sdmmc_function_free(sf); 240 break; 241 } 242 } 243 244 /* 245 * If this is a memory-only card, the card responding 246 * first becomes an alias for SDIO function 0. 247 */ 248 if (sc->sc_fn0 == NULL) 249 sc->sc_fn0 = sf; 250 251 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 252 253 /* only one function in SPI mode */ 254 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 255 break; 256 } 257 258 /* 259 * All cards are either inactive or awaiting further commands. 260 * Read the CSDs and decode the raw CID for each card. 261 */ 262 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) { 263 error = sdmmc_mem_send_csd(sc, sf, &resp); 264 if (error) { 265 SET(sf->flags, SFF_ERROR); 266 continue; 267 } 268 269 if (sdmmc_decode_csd(sc, resp, sf) != 0 || 270 sdmmc_decode_cid(sc, sf->raw_cid, sf) != 0) { 271 SET(sf->flags, SFF_ERROR); 272 continue; 273 } 274 275 #ifdef SDMMC_DEBUG 276 printf("%s: CID: ", SDMMCDEVNAME(sc)); 277 sdmmc_print_cid(&sf->cid); 278 #endif 279 } 280 281 SDMMC_UNLOCK(sc); 282 } 283 284 int 285 sdmmc_decode_csd(struct sdmmc_softc *sc, sdmmc_response resp, 286 struct sdmmc_function *sf) 287 { 288 /* TRAN_SPEED(2:0): transfer rate exponent */ 289 static const int speed_exponent[8] = { 290 100 * 1, /* 100 Kbits/s */ 291 1 * 1000, /* 1 Mbits/s */ 292 10 * 1000, /* 10 Mbits/s */ 293 100 * 1000, /* 100 Mbits/s */ 294 0, 295 0, 296 0, 297 0, 298 }; 299 /* TRAN_SPEED(6:3): time mantissa */ 300 static const int speed_mantissa[16] = { 301 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80, 302 }; 303 struct sdmmc_csd *csd = &sf->csd; 304 int e, m; 305 306 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 307 /* 308 * CSD version 1.0 corresponds to SD system 309 * specification version 1.0 - 1.10. (SanDisk, 3.5.3) 310 */ 311 csd->csdver = SD_CSD_CSDVER(resp); 312 switch (csd->csdver) { 313 case SD_CSD_CSDVER_2_0: 314 DPRINTF(("%s: SD Ver.2.0\n", SDMMCDEVNAME(sc))); 315 SET(sf->flags, SFF_SDHC); 316 csd->capacity = SD_CSD_V2_CAPACITY(resp); 317 csd->read_bl_len = SD_CSD_V2_BL_LEN; 318 break; 319 320 case SD_CSD_CSDVER_1_0: 321 DPRINTF(("%s: SD Ver.1.0\n", SDMMCDEVNAME(sc))); 322 csd->capacity = SD_CSD_CAPACITY(resp); 323 csd->read_bl_len = SD_CSD_READ_BL_LEN(resp); 324 break; 325 326 default: 327 aprint_error_dev(sc->sc_dev, 328 "unknown SD CSD structure version 0x%x\n", 329 csd->csdver); 330 return 1; 331 } 332 333 csd->mmcver = SD_CSD_MMCVER(resp); 334 csd->write_bl_len = SD_CSD_WRITE_BL_LEN(resp); 335 csd->r2w_factor = SD_CSD_R2W_FACTOR(resp); 336 e = SD_CSD_SPEED_EXP(resp); 337 m = SD_CSD_SPEED_MANT(resp); 338 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 339 } else { 340 csd->csdver = MMC_CSD_CSDVER(resp); 341 if (csd->csdver != MMC_CSD_CSDVER_1_0 && 342 csd->csdver != MMC_CSD_CSDVER_2_0) { 343 aprint_error_dev(sc->sc_dev, 344 "unknown MMC CSD structure version 0x%x\n", 345 csd->csdver); 346 return 1; 347 } 348 349 csd->mmcver = MMC_CSD_MMCVER(resp); 350 csd->capacity = MMC_CSD_CAPACITY(resp); 351 csd->read_bl_len = MMC_CSD_READ_BL_LEN(resp); 352 csd->write_bl_len = MMC_CSD_WRITE_BL_LEN(resp); 353 csd->r2w_factor = MMC_CSD_R2W_FACTOR(resp); 354 e = MMC_CSD_TRAN_SPEED_EXP(resp); 355 m = MMC_CSD_TRAN_SPEED_MANT(resp); 356 csd->tran_speed = speed_exponent[e] * speed_mantissa[m] / 10; 357 } 358 if ((1 << csd->read_bl_len) > SDMMC_SECTOR_SIZE) 359 csd->capacity *= (1 << csd->read_bl_len) / SDMMC_SECTOR_SIZE; 360 361 if (sc->sc_busclk > csd->tran_speed) 362 sc->sc_busclk = csd->tran_speed; 363 364 #ifdef SDMMC_DUMP_CSD 365 sdmmc_print_csd(resp, csd); 366 #endif 367 368 return 0; 369 } 370 371 int 372 sdmmc_decode_cid(struct sdmmc_softc *sc, sdmmc_response resp, 373 struct sdmmc_function *sf) 374 { 375 struct sdmmc_cid *cid = &sf->cid; 376 377 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 378 cid->mid = SD_CID_MID(resp); 379 cid->oid = SD_CID_OID(resp); 380 SD_CID_PNM_CPY(resp, cid->pnm); 381 cid->rev = SD_CID_REV(resp); 382 cid->psn = SD_CID_PSN(resp); 383 cid->mdt = SD_CID_MDT(resp); 384 } else { 385 switch(sf->csd.mmcver) { 386 case MMC_CSD_MMCVER_1_0: 387 case MMC_CSD_MMCVER_1_4: 388 cid->mid = MMC_CID_MID_V1(resp); 389 MMC_CID_PNM_V1_CPY(resp, cid->pnm); 390 cid->rev = MMC_CID_REV_V1(resp); 391 cid->psn = MMC_CID_PSN_V1(resp); 392 cid->mdt = MMC_CID_MDT_V1(resp); 393 break; 394 case MMC_CSD_MMCVER_2_0: 395 case MMC_CSD_MMCVER_3_1: 396 case MMC_CSD_MMCVER_4_0: 397 cid->mid = MMC_CID_MID_V2(resp); 398 cid->oid = MMC_CID_OID_V2(resp); 399 MMC_CID_PNM_V2_CPY(resp, cid->pnm); 400 cid->psn = MMC_CID_PSN_V2(resp); 401 break; 402 default: 403 aprint_error_dev(sc->sc_dev, "unknown MMC version %d\n", 404 sf->csd.mmcver); 405 return 1; 406 } 407 } 408 return 0; 409 } 410 411 void 412 sdmmc_print_cid(struct sdmmc_cid *cid) 413 { 414 415 printf("mid=0x%02x oid=0x%04x pnm=\"%s\" rev=0x%02x psn=0x%08x" 416 " mdt=%03x\n", cid->mid, cid->oid, cid->pnm, cid->rev, cid->psn, 417 cid->mdt); 418 } 419 420 #ifdef SDMMC_DUMP_CSD 421 void 422 sdmmc_print_csd(sdmmc_response resp, struct sdmmc_csd *csd) 423 { 424 425 printf("csdver = %d\n", csd->csdver); 426 printf("mmcver = %d\n", csd->mmcver); 427 printf("capacity = %08x\n", csd->capacity); 428 printf("read_bl_len = %d\n", csd->read_bl_len); 429 printf("write_cl_len = %d\n", csd->write_bl_len); 430 printf("r2w_factor = %d\n", csd->r2w_factor); 431 printf("tran_speed = %d\n", csd->tran_speed); 432 } 433 #endif 434 435 /* 436 * Initialize a SD/MMC memory card. 437 */ 438 int 439 sdmmc_mem_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 440 { 441 int error = 0; 442 443 SDMMC_LOCK(sc); 444 445 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 446 error = sdmmc_select_card(sc, sf); 447 if (error) 448 goto out; 449 } 450 451 if (!ISSET(sf->flags, SFF_SDHC)) { 452 error = sdmmc_mem_set_blocklen(sc, sf); 453 if (error) 454 goto out; 455 } 456 457 /* change bus width if supported */ 458 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 459 error = sdmmc_mem_send_scr(sc, sf, sf->raw_scr); 460 if (error) { 461 DPRINTF(("%s: SD_SEND_SCR send failed.\n", 462 SDMMCDEVNAME(sc))); 463 goto out; 464 } 465 error = sdmmc_mem_decode_scr(sc, sf); 466 if (error) 467 goto out; 468 469 if (ISSET(sc->sc_caps, SMC_CAPS_4BIT_MODE) && 470 ISSET(sf->scr.bus_width, SCR_SD_BUS_WIDTHS_4BIT)) { 471 error = sdmmc_set_bus_width(sf, 4); 472 if (error) { 473 DPRINTF(("%s: can't change bus width" 474 " (%d bit)\n", SDMMCDEVNAME(sc), 4)); 475 } 476 } 477 } 478 479 out: 480 SDMMC_UNLOCK(sc); 481 482 return error; 483 } 484 485 /* 486 * Get or set the card's memory OCR value (SD or MMC). 487 */ 488 int 489 sdmmc_mem_send_op_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 490 { 491 struct sdmmc_command cmd; 492 int error; 493 int retry; 494 495 /* Don't lock */ 496 497 /* 498 * If we change the OCR value, retry the command until the OCR 499 * we receive in response has the "CARD BUSY" bit set, meaning 500 * that all cards are ready for identification. 501 */ 502 for (retry = 0; retry < 100; retry++) { 503 memset(&cmd, 0, sizeof(cmd)); 504 cmd.c_arg = !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) ? 505 ocr : (ocr & MMC_OCR_HCS); 506 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R3 | SCF_RSP_SPI_R1; 507 508 if (ISSET(sc->sc_flags, SMF_SD_MODE)) { 509 cmd.c_opcode = SD_APP_OP_COND; 510 error = sdmmc_app_command(sc, NULL, &cmd); 511 } else { 512 cmd.c_opcode = MMC_SEND_OP_COND; 513 error = sdmmc_mmc_command(sc, &cmd); 514 } 515 if (error) 516 break; 517 518 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 519 if (!ISSET(MMC_SPI_R1(cmd.c_resp), R1_SPI_IDLE)) 520 break; 521 } else { 522 if (ISSET(MMC_R3(cmd.c_resp), MMC_OCR_MEM_READY) || 523 ocr == 0) 524 break; 525 } 526 527 error = ETIMEDOUT; 528 sdmmc_delay(10000); 529 } 530 if (error == 0 && 531 ocrp != NULL && 532 !ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 533 *ocrp = MMC_R3(cmd.c_resp); 534 DPRINTF(("%s: sdmmc_mem_send_op_cond: error=%d, ocr=%#x\n", 535 SDMMCDEVNAME(sc), error, MMC_R3(cmd.c_resp))); 536 return error; 537 } 538 539 int 540 sdmmc_mem_send_if_cond(struct sdmmc_softc *sc, uint32_t ocr, uint32_t *ocrp) 541 { 542 struct sdmmc_command cmd; 543 int error; 544 545 /* Don't lock */ 546 547 memset(&cmd, 0, sizeof(cmd)); 548 cmd.c_arg = ocr; 549 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R7 | SCF_RSP_SPI_R7; 550 cmd.c_opcode = SD_SEND_IF_COND; 551 552 error = sdmmc_mmc_command(sc, &cmd); 553 if (error == 0 && ocrp != NULL) { 554 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 555 *ocrp = MMC_SPI_R7(cmd.c_resp); 556 } else { 557 *ocrp = MMC_R7(cmd.c_resp); 558 } 559 DPRINTF(("%s: sdmmc_mem_send_if_cond: error=%d, ocr=%#x\n", 560 SDMMCDEVNAME(sc), error, *ocrp)); 561 } 562 return error; 563 } 564 565 /* 566 * Set the read block length appropriately for this card, according to 567 * the card CSD register value. 568 */ 569 int 570 sdmmc_mem_set_blocklen(struct sdmmc_softc *sc, struct sdmmc_function *sf) 571 { 572 struct sdmmc_command cmd; 573 int error; 574 575 /* Don't lock */ 576 577 memset(&cmd, 0, sizeof(cmd)); 578 cmd.c_opcode = MMC_SET_BLOCKLEN; 579 cmd.c_arg = SDMMC_SECTOR_SIZE; 580 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R1; 581 582 error = sdmmc_mmc_command(sc, &cmd); 583 584 DPRINTF(("%s: sdmmc_mem_set_blocklen: read_bl_len=%d sector_size=%d\n", 585 SDMMCDEVNAME(sc), 1 << sf->csd.read_bl_len, SDMMC_SECTOR_SIZE)); 586 587 return error; 588 } 589 590 static int 591 sdmmc_mem_send_cid(struct sdmmc_softc *sc, sdmmc_response *resp) 592 { 593 struct sdmmc_command cmd; 594 int error; 595 596 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 597 memset(&cmd, 0, sizeof cmd); 598 cmd.c_opcode = MMC_ALL_SEND_CID; 599 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R2; 600 601 error = sdmmc_mmc_command(sc, &cmd); 602 } else { 603 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CID, &cmd.c_resp, 604 sizeof(cmd.c_resp)); 605 } 606 607 #ifdef SDMMC_DEBUG 608 sdmmc_dump_data("CID", cmd.c_resp, sizeof(cmd.c_resp)); 609 #endif 610 if (error == 0 && resp != NULL) 611 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 612 return error; 613 } 614 615 static int 616 sdmmc_mem_send_csd(struct sdmmc_softc *sc, struct sdmmc_function *sf, 617 sdmmc_response *resp) 618 { 619 struct sdmmc_command cmd; 620 int error; 621 622 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 623 memset(&cmd, 0, sizeof cmd); 624 cmd.c_opcode = MMC_SEND_CSD; 625 cmd.c_arg = MMC_ARG_RCA(sf->rca); 626 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R2; 627 628 error = sdmmc_mmc_command(sc, &cmd); 629 } else { 630 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_CSD, &cmd.c_resp, 631 sizeof(cmd.c_resp)); 632 } 633 634 #ifdef SDMMC_DEBUG 635 sdmmc_dump_data("CSD", cmd.c_resp, sizeof(cmd.c_resp)); 636 #endif 637 if (error == 0 && resp != NULL) 638 memcpy(resp, &cmd.c_resp, sizeof(*resp)); 639 return error; 640 } 641 642 static int 643 sdmmc_mem_send_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf, 644 uint32_t scr[2]) 645 { 646 struct sdmmc_command cmd; 647 bus_dma_segment_t ds[1]; 648 void *ptr = NULL; 649 int datalen = 8; 650 int rseg; 651 int error = 0; 652 653 /* Don't lock */ 654 655 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 656 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, 657 ds, 1, &rseg, BUS_DMA_NOWAIT); 658 if (error) 659 goto out; 660 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 661 BUS_DMA_NOWAIT); 662 if (error) 663 goto dmamem_free; 664 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 665 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 666 if (error) 667 goto dmamem_unmap; 668 669 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 670 BUS_DMASYNC_PREREAD); 671 } else { 672 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 673 if (ptr == NULL) 674 goto out; 675 } 676 677 memset(&cmd, 0, sizeof(cmd)); 678 cmd.c_data = ptr; 679 cmd.c_datalen = datalen; 680 cmd.c_blklen = datalen; 681 cmd.c_arg = 0; 682 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 683 cmd.c_opcode = SD_APP_SEND_SCR; 684 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 685 cmd.c_dmamap = sc->sc_dmap; 686 687 error = sdmmc_app_command(sc, sf, &cmd); 688 if (error == 0) { 689 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 690 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 691 BUS_DMASYNC_POSTREAD); 692 } 693 memcpy(scr, ptr, datalen); 694 } 695 696 out: 697 if (ptr != NULL) { 698 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 699 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 700 dmamem_unmap: 701 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 702 dmamem_free: 703 bus_dmamem_free(sc->sc_dmat, ds, rseg); 704 } else { 705 free(ptr, M_DEVBUF); 706 } 707 } 708 DPRINTF(("%s: sdmem_mem_send_scr: error = %d\n", SDMMCDEVNAME(sc), 709 error)); 710 if (error) 711 return error; 712 #ifdef SDMMC_DEBUG 713 sdmmc_dump_data("SCR", scr, 8); 714 #endif 715 return error; 716 } 717 718 static int 719 sdmmc_mem_decode_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf) 720 { 721 sdmmc_response resp; 722 int ver; 723 724 memset(resp, 0, sizeof(resp)); 725 resp[0] = sf->raw_scr[1]; 726 resp[1] = sf->raw_scr[0]; 727 728 ver = SCR_STRUCTURE(resp); 729 sf->scr.sd_spec = SCR_SD_SPEC(resp); 730 sf->scr.bus_width = SCR_SD_BUS_WIDTHS(resp); 731 732 DPRINTF(("%s: sdmmc_mem_decode_scr: spec=%d, bus width=%d\n", 733 SDMMCDEVNAME(sc), sf->scr.sd_spec, sf->scr.bus_width)); 734 735 if (ver != 0) { 736 DPRINTF(("%s: unknown structure version: %d\n", 737 SDMMCDEVNAME(sc), ver)); 738 return EINVAL; 739 } 740 return 0; 741 } 742 743 static int 744 sdmmc_mem_send_cxd_data(struct sdmmc_softc *sc, int opcode, void *data, 745 size_t datalen) 746 { 747 struct sdmmc_command cmd; 748 bus_dma_segment_t ds[1]; 749 void *ptr = NULL; 750 int rseg; 751 int error = 0; 752 753 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 754 error = bus_dmamem_alloc(sc->sc_dmat, datalen, PAGE_SIZE, 0, ds, 755 1, &rseg, BUS_DMA_NOWAIT); 756 if (error) 757 goto out; 758 error = bus_dmamem_map(sc->sc_dmat, ds, 1, datalen, &ptr, 759 BUS_DMA_NOWAIT); 760 if (error) 761 goto dmamem_free; 762 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, ptr, datalen, 763 NULL, BUS_DMA_NOWAIT|BUS_DMA_STREAMING|BUS_DMA_READ); 764 if (error) 765 goto dmamem_unmap; 766 767 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 768 BUS_DMASYNC_PREREAD); 769 } else { 770 ptr = malloc(datalen, M_DEVBUF, M_NOWAIT | M_ZERO); 771 if (ptr == NULL) 772 goto out; 773 } 774 775 memset(&cmd, 0, sizeof(cmd)); 776 cmd.c_data = ptr; 777 cmd.c_datalen = datalen; 778 cmd.c_blklen = datalen; 779 cmd.c_opcode = opcode; 780 cmd.c_arg = 0; 781 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_SPI_R1; 782 if (opcode == MMC_SEND_EXT_CSD) 783 SET(cmd.c_flags, SCF_RSP_R1); 784 else 785 SET(cmd.c_flags, SCF_RSP_R2); 786 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 787 cmd.c_dmamap = sc->sc_dmap; 788 789 error = sdmmc_mmc_command(sc, &cmd); 790 if (error == 0) { 791 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 792 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 793 BUS_DMASYNC_POSTREAD); 794 } 795 memcpy(data, ptr, datalen); 796 } 797 798 out: 799 if (ptr != NULL) { 800 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 801 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 802 dmamem_unmap: 803 bus_dmamem_unmap(sc->sc_dmat, ptr, datalen); 804 dmamem_free: 805 bus_dmamem_free(sc->sc_dmat, ds, rseg); 806 } else { 807 free(ptr, M_DEVBUF); 808 } 809 } 810 return error; 811 } 812 813 int 814 sdmmc_mem_send_extcsd(struct sdmmc_softc *sc) 815 { 816 char buf[512]; 817 int error; 818 819 error = sdmmc_mem_send_cxd_data(sc, MMC_SEND_EXT_CSD, buf, 512); 820 821 /*XXX*/ 822 823 return error; 824 } 825 826 static int 827 sdmmc_set_bus_width(struct sdmmc_function *sf, int width) 828 { 829 struct sdmmc_softc *sc = sf->sc; 830 struct sdmmc_command cmd; 831 int error; 832 833 if (ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 834 return ENODEV; 835 836 memset(&cmd, 0, sizeof(cmd)); 837 cmd.c_opcode = SD_APP_SET_BUS_WIDTH; 838 cmd.c_flags = SCF_RSP_R1 | SCF_CMD_AC; 839 840 switch (width) { 841 case 1: 842 cmd.c_arg = SD_ARG_BUS_WIDTH_1; 843 break; 844 845 case 4: 846 cmd.c_arg = SD_ARG_BUS_WIDTH_4; 847 break; 848 849 default: 850 return EINVAL; 851 } 852 853 error = sdmmc_app_command(sc, sf, &cmd); 854 if (error == 0) 855 error = sdmmc_chip_bus_width(sc->sc_sct, sc->sc_sch, width); 856 return error; 857 } 858 859 #if 0 860 static int 861 sdmmc_mem_mmc_switch(struct sdmmc_function *sf, uint8_t set, uint8_t index, 862 uint8_t value) 863 { 864 struct sdmmc_softc *sc = sf->sc; 865 struct sdmmc_command cmd; 866 867 memset(&cmd, 0, sizeof(cmd)); 868 cmd.c_opcode = MMC_SWITCH; 869 cmd.c_arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 870 (index << 16) | (value << 8) | set; 871 cmd.c_flags = SCF_RSP_SPI_R1B | SCF_RSP_R1B | SCF_CMD_AC; 872 873 return sdmmc_mmc_command(sc, &cmd); 874 } 875 #endif 876 877 /* 878 * SPI mode function 879 */ 880 static int 881 sdmmc_mem_spi_read_ocr(struct sdmmc_softc *sc, uint32_t hcs, uint32_t *card_ocr) 882 { 883 struct sdmmc_command cmd; 884 int error; 885 886 memset(&cmd, 0, sizeof(cmd)); 887 cmd.c_opcode = MMC_READ_OCR; 888 cmd.c_arg = hcs ? MMC_OCR_HCS : 0; 889 cmd.c_flags = SCF_RSP_SPI_R3; 890 891 error = sdmmc_mmc_command(sc, &cmd); 892 if (error == 0 && card_ocr != NULL) 893 *card_ocr = cmd.c_resp[1]; 894 DPRINTF(("%s: sdmmc_mem_spi_read_ocr: error=%d, ocr=%#x\n", 895 SDMMCDEVNAME(sc), error, cmd.c_resp[1])); 896 return error; 897 } 898 899 /* 900 * read/write function 901 */ 902 /* read */ 903 static int 904 sdmmc_mem_single_read_block(struct sdmmc_function *sf, uint32_t blkno, 905 u_char *data, size_t datalen) 906 { 907 int error = 0; 908 int i; 909 910 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 911 912 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 913 error = sdmmc_mem_read_block_subr(sf, blkno + i, 914 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 915 if (error) 916 break; 917 } 918 return error; 919 } 920 921 static int 922 sdmmc_mem_read_block_subr(struct sdmmc_function *sf, uint32_t blkno, 923 u_char *data, size_t datalen) 924 { 925 struct sdmmc_softc *sc = sf->sc; 926 struct sdmmc_command cmd; 927 int error; 928 929 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 930 error = sdmmc_select_card(sc, sf); 931 if (error) 932 goto out; 933 } 934 935 memset(&cmd, 0, sizeof(cmd)); 936 cmd.c_data = data; 937 cmd.c_datalen = datalen; 938 cmd.c_blklen = SDMMC_SECTOR_SIZE; 939 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 940 MMC_READ_BLOCK_MULTIPLE : MMC_READ_BLOCK_SINGLE; 941 cmd.c_arg = blkno; 942 if (!ISSET(sf->flags, SFF_SDHC)) 943 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 944 cmd.c_flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1 | SCF_RSP_SPI_R1; 945 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 946 cmd.c_dmamap = sc->sc_dmap; 947 948 error = sdmmc_mmc_command(sc, &cmd); 949 if (error) 950 goto out; 951 952 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 953 if (cmd.c_opcode == MMC_READ_BLOCK_MULTIPLE) { 954 memset(&cmd, 0, sizeof cmd); 955 cmd.c_opcode = MMC_STOP_TRANSMISSION; 956 cmd.c_arg = MMC_ARG_RCA(sf->rca); 957 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 958 error = sdmmc_mmc_command(sc, &cmd); 959 if (error) 960 goto out; 961 } 962 } 963 964 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 965 do { 966 memset(&cmd, 0, sizeof(cmd)); 967 cmd.c_opcode = MMC_SEND_STATUS; 968 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 969 cmd.c_arg = MMC_ARG_RCA(sf->rca); 970 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 971 error = sdmmc_mmc_command(sc, &cmd); 972 if (error) 973 break; 974 /* XXX time out */ 975 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 976 } 977 978 out: 979 return error; 980 } 981 982 int 983 sdmmc_mem_read_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 984 size_t datalen) 985 { 986 struct sdmmc_softc *sc = sf->sc; 987 int error; 988 989 SDMMC_LOCK(sc); 990 991 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 992 error = sdmmc_mem_single_read_block(sf, blkno, data, datalen); 993 goto out; 994 } 995 996 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 997 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 998 goto out; 999 } 1000 1001 /* DMA transfer */ 1002 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1003 BUS_DMA_NOWAIT|BUS_DMA_READ); 1004 if (error) 1005 goto out; 1006 1007 #ifdef SDMMC_DEBUG 1008 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1009 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1010 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1011 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1012 } 1013 #endif 1014 1015 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1016 BUS_DMASYNC_PREREAD); 1017 1018 error = sdmmc_mem_read_block_subr(sf, blkno, data, datalen); 1019 if (error) 1020 goto unload; 1021 1022 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1023 BUS_DMASYNC_POSTREAD); 1024 unload: 1025 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1026 1027 out: 1028 SDMMC_UNLOCK(sc); 1029 1030 return error; 1031 } 1032 1033 /* write */ 1034 static int 1035 sdmmc_mem_single_write_block(struct sdmmc_function *sf, uint32_t blkno, 1036 u_char *data, size_t datalen) 1037 { 1038 int error = 0; 1039 int i; 1040 1041 KASSERT((datalen % SDMMC_SECTOR_SIZE) == 0); 1042 1043 for (i = 0; i < datalen / SDMMC_SECTOR_SIZE; i++) { 1044 error = sdmmc_mem_write_block_subr(sf, blkno + i, 1045 data + i * SDMMC_SECTOR_SIZE, SDMMC_SECTOR_SIZE); 1046 if (error) 1047 break; 1048 } 1049 return error; 1050 } 1051 1052 static int 1053 sdmmc_mem_write_block_subr(struct sdmmc_function *sf, uint32_t blkno, 1054 u_char *data, size_t datalen) 1055 { 1056 struct sdmmc_softc *sc = sf->sc; 1057 struct sdmmc_command cmd; 1058 int error; 1059 1060 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1061 error = sdmmc_select_card(sc, sf); 1062 if (error) 1063 goto out; 1064 } 1065 1066 memset(&cmd, 0, sizeof(cmd)); 1067 cmd.c_data = data; 1068 cmd.c_datalen = datalen; 1069 cmd.c_blklen = SDMMC_SECTOR_SIZE; 1070 cmd.c_opcode = (cmd.c_datalen / cmd.c_blklen) > 1 ? 1071 MMC_WRITE_BLOCK_MULTIPLE : MMC_WRITE_BLOCK_SINGLE; 1072 cmd.c_arg = blkno; 1073 if (!ISSET(sf->flags, SFF_SDHC)) 1074 cmd.c_arg <<= SDMMC_SECTOR_SIZE_SB; 1075 cmd.c_flags = SCF_CMD_ADTC | SCF_RSP_R1; 1076 if (ISSET(sc->sc_caps, SMC_CAPS_DMA)) 1077 cmd.c_dmamap = sc->sc_dmap; 1078 1079 error = sdmmc_mmc_command(sc, &cmd); 1080 if (error) 1081 goto out; 1082 1083 if (!ISSET(sc->sc_caps, SMC_CAPS_AUTO_STOP)) { 1084 if (cmd.c_opcode == MMC_WRITE_BLOCK_MULTIPLE) { 1085 memset(&cmd, 0, sizeof(cmd)); 1086 cmd.c_opcode = MMC_STOP_TRANSMISSION; 1087 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_RSP_SPI_R1B; 1088 error = sdmmc_mmc_command(sc, &cmd); 1089 if (error) 1090 goto out; 1091 } 1092 } 1093 1094 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) { 1095 do { 1096 memset(&cmd, 0, sizeof(cmd)); 1097 cmd.c_opcode = MMC_SEND_STATUS; 1098 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE)) 1099 cmd.c_arg = MMC_ARG_RCA(sf->rca); 1100 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_RSP_SPI_R2; 1101 error = sdmmc_mmc_command(sc, &cmd); 1102 if (error) 1103 break; 1104 /* XXX time out */ 1105 } while (!ISSET(MMC_R1(cmd.c_resp), MMC_R1_READY_FOR_DATA)); 1106 } 1107 1108 out: 1109 return error; 1110 } 1111 1112 int 1113 sdmmc_mem_write_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data, 1114 size_t datalen) 1115 { 1116 struct sdmmc_softc *sc = sf->sc; 1117 int error; 1118 1119 SDMMC_LOCK(sc); 1120 1121 if (sdmmc_chip_write_protect(sc->sc_sct, sc->sc_sch)) { 1122 aprint_normal_dev(sc->sc_dev, "write-protected\n"); 1123 error = EIO; 1124 goto out; 1125 } 1126 1127 if (ISSET(sc->sc_caps, SMC_CAPS_SINGLE_ONLY)) { 1128 error = sdmmc_mem_single_write_block(sf, blkno, data, datalen); 1129 goto out; 1130 } 1131 1132 if (!ISSET(sc->sc_caps, SMC_CAPS_DMA)) { 1133 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1134 goto out; 1135 } 1136 1137 /* DMA transfer */ 1138 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmap, data, datalen, NULL, 1139 BUS_DMA_NOWAIT|BUS_DMA_WRITE); 1140 if (error) 1141 goto out; 1142 1143 #ifdef SDMMC_DEBUG 1144 for (int i = 0; i < sc->sc_dmap->dm_nsegs; i++) { 1145 printf("seg#%d: addr=%#lx, size=%#lx\n", i, 1146 (u_long)sc->sc_dmap->dm_segs[i].ds_addr, 1147 (u_long)sc->sc_dmap->dm_segs[i].ds_len); 1148 } 1149 #endif 1150 1151 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1152 BUS_DMASYNC_PREWRITE); 1153 1154 error = sdmmc_mem_write_block_subr(sf, blkno, data, datalen); 1155 if (error) 1156 goto unload; 1157 1158 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmap, 0, datalen, 1159 BUS_DMASYNC_POSTWRITE); 1160 unload: 1161 bus_dmamap_unload(sc->sc_dmat, sc->sc_dmap); 1162 1163 out: 1164 SDMMC_UNLOCK(sc); 1165 1166 return error; 1167 } 1168
Indexes created Wed Sep 24 05:09:52 GMT 2025