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sdmmcchip.h revision 1.10 
      1 /*	$NetBSD: sdmmcchip.h,v 1.10 2019/10/23 05:20:52 hkenken Exp $	*/
      2 /*	$OpenBSD: sdmmcchip.h,v 1.3 2007/05/31 10:09:01 uwe Exp $	*/
      3 
      4 /*
      5  * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org>
      6  *
      7  * Permission to use, copy, modify, and distribute this software for any
      8  * purpose with or without fee is hereby granted, provided that the above
      9  * copyright notice and this permission notice appear in all copies.
     10  *
     11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     18  */
     19 
     20 #ifndef	_SDMMC_CHIP_H_
     21 #define	_SDMMC_CHIP_H_
     22 
     23 #include <sys/device.h>
     24 
     25 #include <sys/bus.h>
     26 
     27 struct sdmmc_command;
     28 
     29 typedef struct sdmmc_chip_functions *sdmmc_chipset_tag_t;
     30 typedef struct sdmmc_spi_chip_functions *sdmmc_spi_chipset_tag_t;
     31 typedef void *sdmmc_chipset_handle_t;
     32 
     33 struct sdmmc_chip_functions {
     34 	/* host controller reset */
     35 	int		(*host_reset)(sdmmc_chipset_handle_t);
     36 
     37 	/* host capabilities */
     38 	uint32_t	(*host_ocr)(sdmmc_chipset_handle_t);
     39 	int		(*host_maxblklen)(sdmmc_chipset_handle_t);
     40 
     41 	/* card detection */
     42 	int		(*card_detect)(sdmmc_chipset_handle_t);
     43 
     44 	/* write protect */
     45 	int		(*write_protect)(sdmmc_chipset_handle_t);
     46 
     47 	/* bus power, clock frequency, width and ROD(OpenDrain/PushPull) */
     48 	int		(*bus_power)(sdmmc_chipset_handle_t, uint32_t);
     49 	int		(*bus_clock)(sdmmc_chipset_handle_t, int);
     50 	int		(*bus_width)(sdmmc_chipset_handle_t, int);
     51 	int		(*bus_rod)(sdmmc_chipset_handle_t, int);
     52 
     53 	/* command execution */
     54 	void		(*exec_command)(sdmmc_chipset_handle_t,
     55 			    struct sdmmc_command *);
     56 
     57 	/* card interrupt */
     58 	void		(*card_enable_intr)(sdmmc_chipset_handle_t, int);
     59 	void		(*card_intr_ack)(sdmmc_chipset_handle_t);
     60 
     61 	/* UHS functions */
     62 	int		(*signal_voltage)(sdmmc_chipset_handle_t, int);
     63 	int		(*bus_clock_ddr)(sdmmc_chipset_handle_t, int, bool);
     64 	int		(*execute_tuning)(sdmmc_chipset_handle_t, int);
     65 
     66 	/* hardware reset */
     67 	void		(*hw_reset)(sdmmc_chipset_handle_t);
     68 };
     69 
     70 /* host controller reset */
     71 #define sdmmc_chip_host_reset(tag, handle)				\
     72 	((tag)->host_reset((handle)))
     73 /* host capabilities */
     74 #define sdmmc_chip_host_ocr(tag, handle)				\
     75 	((tag)->host_ocr((handle)))
     76 #define sdmmc_chip_host_maxblklen(tag, handle)				\
     77 	((tag)->host_maxblklen((handle)))
     78 /* card detection */
     79 #define sdmmc_chip_card_detect(tag, handle)				\
     80 	((tag)->card_detect((handle)))
     81 /* write protect */
     82 #define sdmmc_chip_write_protect(tag, handle)				\
     83 	((tag)->write_protect((handle)))
     84 /* bus power, clock frequency, width and rod */
     85 #define sdmmc_chip_bus_power(tag, handle, ocr)				\
     86 	((tag)->bus_power((handle), (ocr)))
     87 #define sdmmc_chip_bus_clock(tag, handle, freq, ddr)			\
     88 	((tag)->bus_clock_ddr ? (tag)->bus_clock_ddr((handle), (freq), (ddr)) : ((ddr) ? EINVAL : ((tag)->bus_clock((handle), (freq)))))
     89 #define sdmmc_chip_bus_width(tag, handle, width)			\
     90 	((tag)->bus_width((handle), (width)))
     91 #define sdmmc_chip_bus_rod(tag, handle, width)				\
     92 	((tag)->bus_rod((handle), (width)))
     93 /* command execution */
     94 #define sdmmc_chip_exec_command(tag, handle, cmdp)			\
     95 	((tag)->exec_command((handle), (cmdp)))
     96 /* card interrupt */
     97 #define sdmmc_chip_card_enable_intr(tag, handle, enable)		\
     98 	((tag)->card_enable_intr((handle), (enable)))
     99 #define sdmmc_chip_card_intr_ack(tag, handle)				\
    100 	((tag)->card_intr_ack((handle)))
    101 /* UHS functions */
    102 #define sdmmc_chip_signal_voltage(tag, handle, voltage)			\
    103 	((tag)->signal_voltage ? (tag)->signal_voltage((handle), (voltage)) : EINVAL)
    104 #define sdmmc_chip_execute_tuning(tag, handle, timing)			\
    105 	((tag)->execute_tuning ? (tag)->execute_tuning((handle), (timing)) : EINVAL)
    106 /* hardware reset */
    107 #define	sdmmc_chip_hw_reset(tag, handle)				\
    108 	((tag)->hw_reset ? (tag)->hw_reset((handle)) : /*CONSTCOND*/0)
    109 
    110 /* clock frequencies for sdmmc_chip_bus_clock() */
    111 #define SDMMC_SDCLK_OFF		0
    112 #define SDMMC_SDCLK_400K	400
    113 
    114 /* voltage levels for sdmmc_chip_signal_voltage() */
    115 #define SDMMC_SIGNAL_VOLTAGE_330	0
    116 #define SDMMC_SIGNAL_VOLTAGE_180	1
    117 
    118 /* timings for sdmmc_chip_execute_tuning() */
    119 #define SDMMC_TIMING_UHS_SDR50		0
    120 #define SDMMC_TIMING_UHS_SDR104		1
    121 #define SDMMC_TIMING_MMC_HS200		2
    122 
    123 /* SPI mode */
    124 struct sdmmc_spi_chip_functions {
    125 	/* card initialize */
    126 	void		(*initialize)(sdmmc_chipset_handle_t);
    127 };
    128 #define sdmmc_spi_chip_initialize(tag, handle)				\
    129 	((tag)->initialize((handle)))
    130 
    131 struct sdmmcbus_attach_args {
    132 	const char		*saa_busname;
    133 	sdmmc_chipset_tag_t	saa_sct;
    134 	sdmmc_spi_chipset_tag_t	saa_spi_sct;
    135 	sdmmc_chipset_handle_t	saa_sch;
    136 	bus_dma_tag_t		saa_dmat;
    137 	u_int			saa_clkmin;
    138 	u_int			saa_clkmax;
    139 	uint32_t		saa_caps;	/* see sdmmc_softc.sc_caps */
    140 	uint32_t		saa_max_seg;
    141 };
    142 
    143 void	sdmmc_needs_discover(device_t);
    144 void	sdmmc_card_intr(device_t);
    145 void	sdmmc_delay(u_int);
    146 
    147 #endif	/* _SDMMC_CHIP_H_ */
    148