sdmmcvar.h revision 1.1.2.2 1 1.1.2.2 skrll /* $NetBSD: sdmmcvar.h,v 1.1.2.2 2009/04/28 07:36:34 skrll Exp $ */
2 1.1.2.2 skrll /* $OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $ */
3 1.1.2.2 skrll
4 1.1.2.2 skrll /*
5 1.1.2.2 skrll * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org>
6 1.1.2.2 skrll *
7 1.1.2.2 skrll * Permission to use, copy, modify, and distribute this software for any
8 1.1.2.2 skrll * purpose with or without fee is hereby granted, provided that the above
9 1.1.2.2 skrll * copyright notice and this permission notice appear in all copies.
10 1.1.2.2 skrll *
11 1.1.2.2 skrll * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1.2.2 skrll * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1.2.2 skrll * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1.2.2 skrll * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1.2.2 skrll * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1.2.2 skrll * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1.2.2 skrll * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1.2.2 skrll */
19 1.1.2.2 skrll
20 1.1.2.2 skrll #ifndef _SDMMCVAR_H_
21 1.1.2.2 skrll #define _SDMMCVAR_H_
22 1.1.2.2 skrll
23 1.1.2.2 skrll #include <sys/queue.h>
24 1.1.2.2 skrll #include <sys/mutex.h>
25 1.1.2.2 skrll
26 1.1.2.2 skrll #include <machine/bus.h>
27 1.1.2.2 skrll
28 1.1.2.2 skrll #include <dev/sdmmc/sdmmcchip.h>
29 1.1.2.2 skrll #include <dev/sdmmc/sdmmcreg.h>
30 1.1.2.2 skrll
31 1.1.2.2 skrll struct sdmmc_csd {
32 1.1.2.2 skrll int csdver; /* CSD structure format */
33 1.1.2.2 skrll u_int mmcver; /* MMC version (for CID format) */
34 1.1.2.2 skrll int capacity; /* total number of sectors */
35 1.1.2.2 skrll int sector_size; /* sector size in bytes */
36 1.1.2.2 skrll int sector_size_sb; /* sector size in shift bit */
37 1.1.2.2 skrll int read_bl_len; /* block length for reads */
38 1.1.2.2 skrll int write_bl_len; /* block length for writes */
39 1.1.2.2 skrll int r2w_factor;
40 1.1.2.2 skrll int tran_speed; /* transfer speed (kbit/s) */
41 1.1.2.2 skrll /* ... */
42 1.1.2.2 skrll };
43 1.1.2.2 skrll
44 1.1.2.2 skrll struct sdmmc_cid {
45 1.1.2.2 skrll int mid; /* manufacturer identification number */
46 1.1.2.2 skrll int oid; /* OEM/product identification number */
47 1.1.2.2 skrll char pnm[8]; /* product name (MMC v1 has the longest) */
48 1.1.2.2 skrll int rev; /* product revision */
49 1.1.2.2 skrll int psn; /* product serial number */
50 1.1.2.2 skrll int mdt; /* manufacturing date */
51 1.1.2.2 skrll };
52 1.1.2.2 skrll
53 1.1.2.2 skrll typedef uint32_t sdmmc_response[4];
54 1.1.2.2 skrll
55 1.1.2.2 skrll struct sdmmc_softc;
56 1.1.2.2 skrll
57 1.1.2.2 skrll struct sdmmc_task {
58 1.1.2.2 skrll void (*func)(void *arg);
59 1.1.2.2 skrll void *arg;
60 1.1.2.2 skrll int onqueue;
61 1.1.2.2 skrll struct sdmmc_softc *sc;
62 1.1.2.2 skrll TAILQ_ENTRY(sdmmc_task) next;
63 1.1.2.2 skrll };
64 1.1.2.2 skrll
65 1.1.2.2 skrll #define sdmmc_init_task(xtask, xfunc, xarg) \
66 1.1.2.2 skrll do { \
67 1.1.2.2 skrll (xtask)->func = (xfunc); \
68 1.1.2.2 skrll (xtask)->arg = (xarg); \
69 1.1.2.2 skrll (xtask)->onqueue = 0; \
70 1.1.2.2 skrll (xtask)->sc = NULL; \
71 1.1.2.2 skrll } while (/*CONSTCOND*/0)
72 1.1.2.2 skrll
73 1.1.2.2 skrll #define sdmmc_task_pending(xtask) ((xtask)->onqueue)
74 1.1.2.2 skrll
75 1.1.2.2 skrll struct sdmmc_command {
76 1.1.2.2 skrll struct sdmmc_task c_task; /* task queue entry */
77 1.1.2.2 skrll uint16_t c_opcode; /* SD or MMC command index */
78 1.1.2.2 skrll uint32_t c_arg; /* SD/MMC command argument */
79 1.1.2.2 skrll sdmmc_response c_resp; /* response buffer */
80 1.1.2.2 skrll bus_dmamap_t c_dmamap;
81 1.1.2.2 skrll void *c_data; /* buffer to send or read into */
82 1.1.2.2 skrll int c_datalen; /* length of data buffer */
83 1.1.2.2 skrll int c_blklen; /* block length */
84 1.1.2.2 skrll int c_flags; /* see below */
85 1.1.2.2 skrll #define SCF_ITSDONE 0x0001 /* command is complete */
86 1.1.2.2 skrll #define SCF_CMD_AC 0x0000
87 1.1.2.2 skrll #define SCF_CMD_ADTC 0x0010
88 1.1.2.2 skrll #define SCF_CMD_BC 0x0020
89 1.1.2.2 skrll #define SCF_CMD_BCR 0x0030
90 1.1.2.2 skrll #define SCF_CMD_READ 0x0040 /* read command (data expected) */
91 1.1.2.2 skrll #define SCF_RSP_BSY 0x0100
92 1.1.2.2 skrll #define SCF_RSP_136 0x0200
93 1.1.2.2 skrll #define SCF_RSP_CRC 0x0400
94 1.1.2.2 skrll #define SCF_RSP_IDX 0x0800
95 1.1.2.2 skrll #define SCF_RSP_PRESENT 0x1000
96 1.1.2.2 skrll /* response types */
97 1.1.2.2 skrll #define SCF_RSP_R0 0 /* none */
98 1.1.2.2 skrll #define SCF_RSP_R1 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
99 1.1.2.2 skrll #define SCF_RSP_R1B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
100 1.1.2.2 skrll #define SCF_RSP_R2 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136)
101 1.1.2.2 skrll #define SCF_RSP_R3 (SCF_RSP_PRESENT)
102 1.1.2.2 skrll #define SCF_RSP_R4 (SCF_RSP_PRESENT)
103 1.1.2.2 skrll #define SCF_RSP_R5 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
104 1.1.2.2 skrll #define SCF_RSP_R5B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
105 1.1.2.2 skrll #define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
106 1.1.2.2 skrll #define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
107 1.1.2.2 skrll int c_error; /* errno value on completion */
108 1.1.2.2 skrll
109 1.1.2.2 skrll /* Host controller owned fields for data xfer in progress */
110 1.1.2.2 skrll int c_resid; /* remaining I/O */
111 1.1.2.2 skrll u_char *c_buf; /* remaining data */
112 1.1.2.2 skrll };
113 1.1.2.2 skrll
114 1.1.2.2 skrll /*
115 1.1.2.2 skrll * Decoded PC Card 16 based Card Information Structure (CIS),
116 1.1.2.2 skrll * per card (function 0) and per function (1 and greater).
117 1.1.2.2 skrll */
118 1.1.2.2 skrll struct sdmmc_cis {
119 1.1.2.2 skrll uint16_t manufacturer;
120 1.1.2.2 skrll #define SDMMC_VENDOR_INVALID 0xffff
121 1.1.2.2 skrll uint16_t product;
122 1.1.2.2 skrll #define SDMMC_PRODUCT_INVALID 0xffff
123 1.1.2.2 skrll uint8_t function;
124 1.1.2.2 skrll #define SDMMC_FUNCTION_INVALID 0xff
125 1.1.2.2 skrll u_char cis1_major;
126 1.1.2.2 skrll u_char cis1_minor;
127 1.1.2.2 skrll char cis1_info_buf[256];
128 1.1.2.2 skrll char *cis1_info[4];
129 1.1.2.2 skrll };
130 1.1.2.2 skrll
131 1.1.2.2 skrll /*
132 1.1.2.2 skrll * Structure describing either an SD card I/O function or a SD/MMC
133 1.1.2.2 skrll * memory card from a "stack of cards" that responded to CMD2. For a
134 1.1.2.2 skrll * combo card with one I/O function and one memory card, there will be
135 1.1.2.2 skrll * two of these structures allocated. Each card slot has such a list
136 1.1.2.2 skrll * of sdmmc_function structures.
137 1.1.2.2 skrll */
138 1.1.2.2 skrll struct sdmmc_function {
139 1.1.2.2 skrll /* common members */
140 1.1.2.2 skrll struct sdmmc_softc *sc; /* card slot softc */
141 1.1.2.2 skrll uint16_t rca; /* relative card address */
142 1.1.2.2 skrll int flags;
143 1.1.2.2 skrll #define SFF_ERROR 0x0001 /* function is poo; ignore it */
144 1.1.2.2 skrll #define SFF_SDHC 0x0002 /* SD High Capacity card */
145 1.1.2.2 skrll SIMPLEQ_ENTRY(sdmmc_function) sf_list;
146 1.1.2.2 skrll /* SD card I/O function members */
147 1.1.2.2 skrll int number; /* I/O function number or -1 */
148 1.1.2.2 skrll device_t child; /* function driver */
149 1.1.2.2 skrll struct sdmmc_cis cis; /* decoded CIS */
150 1.1.2.2 skrll /* SD/MMC memory card members */
151 1.1.2.2 skrll struct sdmmc_csd csd; /* decoded CSD value */
152 1.1.2.2 skrll struct sdmmc_cid cid; /* decoded CID value */
153 1.1.2.2 skrll sdmmc_response raw_cid; /* temp. storage for decoding */
154 1.1.2.2 skrll };
155 1.1.2.2 skrll
156 1.1.2.2 skrll /*
157 1.1.2.2 skrll * Structure describing a single SD/MMC/SDIO card slot.
158 1.1.2.2 skrll */
159 1.1.2.2 skrll struct sdmmc_softc {
160 1.1.2.2 skrll device_t sc_dev; /* base device */
161 1.1.2.2 skrll #define SDMMCDEVNAME(sc) (device_xname(sc->sc_dev))
162 1.1.2.2 skrll
163 1.1.2.2 skrll sdmmc_chipset_tag_t sc_sct; /* host controller chipset tag */
164 1.1.2.2 skrll sdmmc_chipset_handle_t sc_sch; /* host controller chipset handle */
165 1.1.2.2 skrll bus_dma_tag_t sc_dmat;
166 1.1.2.2 skrll bus_dmamap_t sc_dmap;
167 1.1.2.2 skrll #define SDMMC_MAXNSEGS 16 /* (MAXPHYS / PAGE_SIZE) */
168 1.1.2.2 skrll
169 1.1.2.2 skrll struct kmutex sc_mtx; /* lock around host controller */
170 1.1.2.2 skrll int sc_dying; /* bus driver is shutting down */
171 1.1.2.2 skrll
172 1.1.2.2 skrll uint32_t sc_flags;
173 1.1.2.2 skrll #define SMF_INITED 0x0001
174 1.1.2.2 skrll #define SMF_SD_MODE 0x0002 /* host in SD mode (MMC otherwise) */
175 1.1.2.2 skrll #define SMF_IO_MODE 0x0004 /* host in I/O mode (SD mode only) */
176 1.1.2.2 skrll #define SMF_MEM_MODE 0x0008 /* host in memory mode (SD or MMC) */
177 1.1.2.2 skrll #define SMF_CARD_PRESENT 0x4000 /* card presence noticed */
178 1.1.2.2 skrll #define SMF_CARD_ATTACHED 0x8000 /* card driver(s) attached */
179 1.1.2.2 skrll
180 1.1.2.2 skrll uint32_t sc_caps; /* host capability */
181 1.1.2.2 skrll #define SMC_CAPS_AUTO_STOP 0x0001 /* send CMD12 automagically by host */
182 1.1.2.2 skrll #define SMC_CAPS_4BIT_MODE 0x0002 /* 4-bits data bus width */
183 1.1.2.2 skrll #define SMC_CAPS_DMA 0x0004 /* DMA transfer */
184 1.1.2.2 skrll
185 1.1.2.2 skrll /* function */
186 1.1.2.2 skrll int sc_function_count; /* number of I/O functions (SDIO) */
187 1.1.2.2 skrll struct sdmmc_function *sc_card; /* selected card */
188 1.1.2.2 skrll struct sdmmc_function *sc_fn0; /* function 0, the card itself */
189 1.1.2.2 skrll SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */
190 1.1.2.2 skrll
191 1.1.2.2 skrll /* task queue */
192 1.1.2.2 skrll struct lwp *sc_tskq_lwp; /* asynchronous tasks */
193 1.1.2.2 skrll TAILQ_HEAD(, sdmmc_task) sc_tskq; /* task thread work queue */
194 1.1.2.2 skrll struct kmutex sc_tskq_mtx;
195 1.1.2.2 skrll struct kcondvar sc_tskq_cv;
196 1.1.2.2 skrll
197 1.1.2.2 skrll /* discover task */
198 1.1.2.2 skrll struct sdmmc_task sc_discover_task; /* card attach/detach task */
199 1.1.2.2 skrll struct kmutex sc_discover_task_mtx;
200 1.1.2.2 skrll
201 1.1.2.2 skrll /* interrupt task */
202 1.1.2.2 skrll struct sdmmc_task sc_intr_task; /* card interrupt task */
203 1.1.2.2 skrll struct kmutex sc_intr_task_mtx;
204 1.1.2.2 skrll TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */
205 1.1.2.2 skrll
206 1.1.2.2 skrll u_int sc_clkmin; /* host min bus clock */
207 1.1.2.2 skrll u_int sc_clkmax; /* host max bus clock */
208 1.1.2.2 skrll u_int sc_busclk; /* host bus clock */
209 1.1.2.2 skrll int sc_buswidth; /* host bus width */
210 1.1.2.2 skrll };
211 1.1.2.2 skrll
212 1.1.2.2 skrll /*
213 1.1.2.2 skrll * Attach devices at the sdmmc bus.
214 1.1.2.2 skrll */
215 1.1.2.2 skrll struct sdmmc_attach_args {
216 1.1.2.2 skrll uint16_t manufacturer;
217 1.1.2.2 skrll uint16_t product;
218 1.1.2.2 skrll struct sdmmc_function *sf;
219 1.1.2.2 skrll };
220 1.1.2.2 skrll
221 1.1.2.2 skrll struct sdmmc_product {
222 1.1.2.2 skrll uint16_t pp_vendor;
223 1.1.2.2 skrll uint16_t pp_product;
224 1.1.2.2 skrll const char *pp_cisinfo[4];
225 1.1.2.2 skrll };
226 1.1.2.2 skrll
227 1.1.2.2 skrll #ifndef IPL_SDMMC
228 1.1.2.2 skrll #define IPL_SDMMC IPL_BIO
229 1.1.2.2 skrll #endif
230 1.1.2.2 skrll
231 1.1.2.2 skrll #ifndef splsdmmc
232 1.1.2.2 skrll #define splsdmmc() splbio()
233 1.1.2.2 skrll #endif
234 1.1.2.2 skrll
235 1.1.2.2 skrll #define SDMMC_LOCK(sc)
236 1.1.2.2 skrll #define SDMMC_UNLOCK(sc)
237 1.1.2.2 skrll
238 1.1.2.2 skrll #ifdef SDMMC_DEBUG
239 1.1.2.2 skrll extern int sdmmcdebug;
240 1.1.2.2 skrll #endif
241 1.1.2.2 skrll
242 1.1.2.2 skrll void sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *);
243 1.1.2.2 skrll void sdmmc_del_task(struct sdmmc_task *);
244 1.1.2.2 skrll
245 1.1.2.2 skrll struct sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *);
246 1.1.2.2 skrll void sdmmc_function_free(struct sdmmc_function *);
247 1.1.2.2 skrll int sdmmc_set_bus_power(struct sdmmc_softc *, uint32_t, uint32_t);
248 1.1.2.2 skrll int sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *);
249 1.1.2.2 skrll int sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_command *);
250 1.1.2.2 skrll void sdmmc_go_idle_state(struct sdmmc_softc *);
251 1.1.2.2 skrll int sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *);
252 1.1.2.2 skrll int sdmmc_set_relative_addr(struct sdmmc_softc *,
253 1.1.2.2 skrll struct sdmmc_function *);
254 1.1.2.2 skrll
255 1.1.2.2 skrll void sdmmc_intr_enable(struct sdmmc_function *);
256 1.1.2.2 skrll void sdmmc_intr_disable(struct sdmmc_function *);
257 1.1.2.2 skrll void *sdmmc_intr_establish(device_t, int (*)(void *), void *, const char *);
258 1.1.2.2 skrll void sdmmc_intr_disestablish(void *);
259 1.1.2.2 skrll void sdmmc_intr_task(void *);
260 1.1.2.2 skrll
261 1.1.2.2 skrll int sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response,
262 1.1.2.2 skrll struct sdmmc_function *);
263 1.1.2.2 skrll int sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response,
264 1.1.2.2 skrll struct sdmmc_function *);
265 1.1.2.2 skrll void sdmmc_print_cid(struct sdmmc_cid *);
266 1.1.2.2 skrll
267 1.1.2.2 skrll int sdmmc_io_enable(struct sdmmc_softc *);
268 1.1.2.2 skrll void sdmmc_io_scan(struct sdmmc_softc *);
269 1.1.2.2 skrll int sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *);
270 1.1.2.2 skrll uint8_t sdmmc_io_read_1(struct sdmmc_function *, int);
271 1.1.2.2 skrll uint16_t sdmmc_io_read_2(struct sdmmc_function *, int);
272 1.1.2.2 skrll uint32_t sdmmc_io_read_4(struct sdmmc_function *, int);
273 1.1.2.2 skrll int sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int);
274 1.1.2.2 skrll void sdmmc_io_write_1(struct sdmmc_function *, int, uint8_t);
275 1.1.2.2 skrll void sdmmc_io_write_2(struct sdmmc_function *, int, uint16_t);
276 1.1.2.2 skrll void sdmmc_io_write_4(struct sdmmc_function *, int, uint32_t);
277 1.1.2.2 skrll int sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int);
278 1.1.2.2 skrll int sdmmc_io_function_enable(struct sdmmc_function *);
279 1.1.2.2 skrll void sdmmc_io_function_disable(struct sdmmc_function *);
280 1.1.2.2 skrll
281 1.1.2.2 skrll int sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *);
282 1.1.2.2 skrll void sdmmc_print_cis(struct sdmmc_function *);
283 1.1.2.2 skrll void sdmmc_check_cis_quirks(struct sdmmc_function *);
284 1.1.2.2 skrll
285 1.1.2.2 skrll int sdmmc_mem_enable(struct sdmmc_softc *);
286 1.1.2.2 skrll void sdmmc_mem_scan(struct sdmmc_softc *);
287 1.1.2.2 skrll int sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *);
288 1.1.2.2 skrll int sdmmc_mem_read_block(struct sdmmc_function *, uint32_t, u_char *,
289 1.1.2.2 skrll size_t);
290 1.1.2.2 skrll int sdmmc_mem_write_block(struct sdmmc_function *, uint32_t, u_char *,
291 1.1.2.2 skrll size_t);
292 1.1.2.2 skrll
293 1.1.2.2 skrll #endif /* _SDMMCVAR_H_ */
294