sdmmcvar.h revision 1.15.6.4 1 1.15.6.4 skrll /* $NetBSD: sdmmcvar.h,v 1.15.6.4 2017/08/28 17:52:27 skrll Exp $ */
2 1.1 nonaka /* $OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $ */
3 1.1 nonaka
4 1.1 nonaka /*
5 1.1 nonaka * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org>
6 1.1 nonaka *
7 1.1 nonaka * Permission to use, copy, modify, and distribute this software for any
8 1.1 nonaka * purpose with or without fee is hereby granted, provided that the above
9 1.1 nonaka * copyright notice and this permission notice appear in all copies.
10 1.1 nonaka *
11 1.1 nonaka * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 1.1 nonaka * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 1.1 nonaka * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 1.1 nonaka * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 1.1 nonaka * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 1.1 nonaka * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 1.1 nonaka * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 1.1 nonaka */
19 1.1 nonaka
20 1.1 nonaka #ifndef _SDMMCVAR_H_
21 1.1 nonaka #define _SDMMCVAR_H_
22 1.1 nonaka
23 1.12 matt #ifdef _KERNEL_OPT
24 1.12 matt #include "opt_sdmmc.h"
25 1.12 matt #endif
26 1.12 matt
27 1.1 nonaka #include <sys/queue.h>
28 1.1 nonaka #include <sys/mutex.h>
29 1.3 nonaka #include <sys/callout.h>
30 1.15.6.3 skrll #include <sys/evcnt.h>
31 1.1 nonaka
32 1.11 dyoung #include <sys/bus.h>
33 1.1 nonaka
34 1.1 nonaka #include <dev/sdmmc/sdmmcchip.h>
35 1.1 nonaka #include <dev/sdmmc/sdmmcreg.h>
36 1.1 nonaka
37 1.2 nonaka #define SDMMC_SECTOR_SIZE_SB 9
38 1.2 nonaka #define SDMMC_SECTOR_SIZE (1 << SDMMC_SECTOR_SIZE_SB) /* =512 */
39 1.2 nonaka
40 1.1 nonaka struct sdmmc_csd {
41 1.1 nonaka int csdver; /* CSD structure format */
42 1.1 nonaka u_int mmcver; /* MMC version (for CID format) */
43 1.1 nonaka int capacity; /* total number of sectors */
44 1.1 nonaka int read_bl_len; /* block length for reads */
45 1.1 nonaka int write_bl_len; /* block length for writes */
46 1.1 nonaka int r2w_factor;
47 1.1 nonaka int tran_speed; /* transfer speed (kbit/s) */
48 1.8 kiyohara int ccc; /* Card Command Class for SD */
49 1.1 nonaka /* ... */
50 1.1 nonaka };
51 1.1 nonaka
52 1.15.6.4 skrll struct sdmmc_ext_csd {
53 1.15.6.4 skrll uint8_t rev;
54 1.15.6.4 skrll uint8_t rst_n_function; /* RST_n_FUNCTION */
55 1.15.6.4 skrll uint32_t cache_size;
56 1.15.6.4 skrll };
57 1.15.6.4 skrll
58 1.1 nonaka struct sdmmc_cid {
59 1.1 nonaka int mid; /* manufacturer identification number */
60 1.1 nonaka int oid; /* OEM/product identification number */
61 1.1 nonaka char pnm[8]; /* product name (MMC v1 has the longest) */
62 1.1 nonaka int rev; /* product revision */
63 1.1 nonaka int psn; /* product serial number */
64 1.1 nonaka int mdt; /* manufacturing date */
65 1.1 nonaka };
66 1.1 nonaka
67 1.3 nonaka struct sdmmc_scr {
68 1.3 nonaka int sd_spec;
69 1.3 nonaka int bus_width;
70 1.3 nonaka };
71 1.3 nonaka
72 1.1 nonaka typedef uint32_t sdmmc_response[4];
73 1.1 nonaka
74 1.1 nonaka struct sdmmc_softc;
75 1.1 nonaka
76 1.1 nonaka struct sdmmc_task {
77 1.1 nonaka void (*func)(void *arg);
78 1.1 nonaka void *arg;
79 1.1 nonaka int onqueue;
80 1.1 nonaka struct sdmmc_softc *sc;
81 1.1 nonaka TAILQ_ENTRY(sdmmc_task) next;
82 1.1 nonaka };
83 1.1 nonaka
84 1.1 nonaka #define sdmmc_init_task(xtask, xfunc, xarg) \
85 1.1 nonaka do { \
86 1.1 nonaka (xtask)->func = (xfunc); \
87 1.1 nonaka (xtask)->arg = (xarg); \
88 1.1 nonaka (xtask)->onqueue = 0; \
89 1.1 nonaka (xtask)->sc = NULL; \
90 1.1 nonaka } while (/*CONSTCOND*/0)
91 1.1 nonaka
92 1.1 nonaka #define sdmmc_task_pending(xtask) ((xtask)->onqueue)
93 1.1 nonaka
94 1.1 nonaka struct sdmmc_command {
95 1.1 nonaka struct sdmmc_task c_task; /* task queue entry */
96 1.1 nonaka uint16_t c_opcode; /* SD or MMC command index */
97 1.1 nonaka uint32_t c_arg; /* SD/MMC command argument */
98 1.1 nonaka sdmmc_response c_resp; /* response buffer */
99 1.1 nonaka bus_dmamap_t c_dmamap;
100 1.7 kiyohara int c_dmaseg; /* DMA segment number */
101 1.7 kiyohara int c_dmaoff; /* offset in DMA segment */
102 1.1 nonaka void *c_data; /* buffer to send or read into */
103 1.1 nonaka int c_datalen; /* length of data buffer */
104 1.1 nonaka int c_blklen; /* block length */
105 1.1 nonaka int c_flags; /* see below */
106 1.3 nonaka #define SCF_ITSDONE (1U << 0) /* command is complete */
107 1.3 nonaka #define SCF_RSP_PRESENT (1U << 1)
108 1.3 nonaka #define SCF_RSP_BSY (1U << 2)
109 1.3 nonaka #define SCF_RSP_136 (1U << 3)
110 1.3 nonaka #define SCF_RSP_CRC (1U << 4)
111 1.3 nonaka #define SCF_RSP_IDX (1U << 5)
112 1.3 nonaka #define SCF_CMD_READ (1U << 6) /* read command (data expected) */
113 1.3 nonaka /* non SPI */
114 1.3 nonaka #define SCF_CMD_AC (0U << 8)
115 1.3 nonaka #define SCF_CMD_ADTC (1U << 8)
116 1.3 nonaka #define SCF_CMD_BC (2U << 8)
117 1.3 nonaka #define SCF_CMD_BCR (3U << 8)
118 1.3 nonaka #define SCF_CMD_MASK (3U << 8)
119 1.3 nonaka /* SPI */
120 1.3 nonaka #define SCF_RSP_SPI_S1 (1U << 10)
121 1.3 nonaka #define SCF_RSP_SPI_S2 (1U << 11)
122 1.3 nonaka #define SCF_RSP_SPI_B4 (1U << 12)
123 1.3 nonaka #define SCF_RSP_SPI_BSY (1U << 13)
124 1.15.6.3 skrll /* Probing */
125 1.15.6.3 skrll #define SCF_TOUT_OK (1U << 14) /* command timeout expected */
126 1.15.6.4 skrll /* Command hints */
127 1.15.6.4 skrll #define SCF_XFER_SDHC (1U << 15) /* card is SDHC */
128 1.15.6.4 skrll #define SCF_POLL (1U << 16) /* polling required */
129 1.1 nonaka /* response types */
130 1.1 nonaka #define SCF_RSP_R0 0 /* none */
131 1.1 nonaka #define SCF_RSP_R1 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
132 1.1 nonaka #define SCF_RSP_R1B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
133 1.1 nonaka #define SCF_RSP_R2 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136)
134 1.1 nonaka #define SCF_RSP_R3 (SCF_RSP_PRESENT)
135 1.1 nonaka #define SCF_RSP_R4 (SCF_RSP_PRESENT)
136 1.1 nonaka #define SCF_RSP_R5 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
137 1.1 nonaka #define SCF_RSP_R5B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
138 1.1 nonaka #define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
139 1.1 nonaka #define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
140 1.15 nonaka #define SCF_RSP_MASK (0x1f << 1)
141 1.3 nonaka /* SPI */
142 1.3 nonaka #define SCF_RSP_SPI_R1 (SCF_RSP_SPI_S1)
143 1.3 nonaka #define SCF_RSP_SPI_R1B (SCF_RSP_SPI_S1|SCF_RSP_SPI_BSY)
144 1.3 nonaka #define SCF_RSP_SPI_R2 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2)
145 1.3 nonaka #define SCF_RSP_SPI_R3 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4)
146 1.3 nonaka #define SCF_RSP_SPI_R4 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4)
147 1.3 nonaka #define SCF_RSP_SPI_R5 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2)
148 1.3 nonaka #define SCF_RSP_SPI_R7 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4)
149 1.15 nonaka #define SCF_RSP_SPI_MASK (0xf << 10)
150 1.1 nonaka int c_error; /* errno value on completion */
151 1.1 nonaka
152 1.1 nonaka /* Host controller owned fields for data xfer in progress */
153 1.1 nonaka int c_resid; /* remaining I/O */
154 1.1 nonaka u_char *c_buf; /* remaining data */
155 1.1 nonaka };
156 1.1 nonaka
157 1.1 nonaka /*
158 1.1 nonaka * Decoded PC Card 16 based Card Information Structure (CIS),
159 1.1 nonaka * per card (function 0) and per function (1 and greater).
160 1.1 nonaka */
161 1.1 nonaka struct sdmmc_cis {
162 1.1 nonaka uint16_t manufacturer;
163 1.1 nonaka #define SDMMC_VENDOR_INVALID 0xffff
164 1.1 nonaka uint16_t product;
165 1.1 nonaka #define SDMMC_PRODUCT_INVALID 0xffff
166 1.1 nonaka uint8_t function;
167 1.1 nonaka #define SDMMC_FUNCTION_INVALID 0xff
168 1.1 nonaka u_char cis1_major;
169 1.1 nonaka u_char cis1_minor;
170 1.1 nonaka char cis1_info_buf[256];
171 1.1 nonaka char *cis1_info[4];
172 1.1 nonaka };
173 1.1 nonaka
174 1.1 nonaka /*
175 1.1 nonaka * Structure describing either an SD card I/O function or a SD/MMC
176 1.1 nonaka * memory card from a "stack of cards" that responded to CMD2. For a
177 1.1 nonaka * combo card with one I/O function and one memory card, there will be
178 1.1 nonaka * two of these structures allocated. Each card slot has such a list
179 1.1 nonaka * of sdmmc_function structures.
180 1.1 nonaka */
181 1.1 nonaka struct sdmmc_function {
182 1.1 nonaka /* common members */
183 1.1 nonaka struct sdmmc_softc *sc; /* card slot softc */
184 1.1 nonaka uint16_t rca; /* relative card address */
185 1.8 kiyohara int interface; /* SD/MMC:0, SDIO:standard interface */
186 1.6 kiyohara int width; /* bus width */
187 1.1 nonaka int flags;
188 1.1 nonaka #define SFF_ERROR 0x0001 /* function is poo; ignore it */
189 1.1 nonaka #define SFF_SDHC 0x0002 /* SD High Capacity card */
190 1.15.6.4 skrll #define SFF_CACHE_ENABLED 0x0004 /* cache enabled */
191 1.1 nonaka SIMPLEQ_ENTRY(sdmmc_function) sf_list;
192 1.1 nonaka /* SD card I/O function members */
193 1.1 nonaka int number; /* I/O function number or -1 */
194 1.1 nonaka device_t child; /* function driver */
195 1.1 nonaka struct sdmmc_cis cis; /* decoded CIS */
196 1.1 nonaka /* SD/MMC memory card members */
197 1.1 nonaka struct sdmmc_csd csd; /* decoded CSD value */
198 1.15.6.4 skrll struct sdmmc_ext_csd ext_csd; /* decoded EXT_CSD value */
199 1.1 nonaka struct sdmmc_cid cid; /* decoded CID value */
200 1.1 nonaka sdmmc_response raw_cid; /* temp. storage for decoding */
201 1.3 nonaka uint32_t raw_scr[2];
202 1.13 jakllsch struct sdmmc_scr scr; /* decoded SCR value */
203 1.8 kiyohara
204 1.7 kiyohara void *bbuf; /* bounce buffer */
205 1.7 kiyohara bus_dmamap_t bbuf_dmap; /* DMA map for bounce buffer */
206 1.15.6.1 skrll bus_dmamap_t sseg_dmap; /* DMA map for single segment */
207 1.1 nonaka };
208 1.1 nonaka
209 1.1 nonaka /*
210 1.1 nonaka * Structure describing a single SD/MMC/SDIO card slot.
211 1.1 nonaka */
212 1.1 nonaka struct sdmmc_softc {
213 1.1 nonaka device_t sc_dev; /* base device */
214 1.1 nonaka #define SDMMCDEVNAME(sc) (device_xname(sc->sc_dev))
215 1.1 nonaka
216 1.1 nonaka sdmmc_chipset_tag_t sc_sct; /* host controller chipset tag */
217 1.3 nonaka sdmmc_spi_chipset_tag_t sc_spi_sct;
218 1.1 nonaka sdmmc_chipset_handle_t sc_sch; /* host controller chipset handle */
219 1.1 nonaka bus_dma_tag_t sc_dmat;
220 1.1 nonaka bus_dmamap_t sc_dmap;
221 1.14 jakllsch #define SDMMC_MAXNSEGS ((MAXPHYS / PAGE_SIZE) + 1)
222 1.1 nonaka
223 1.1 nonaka struct kmutex sc_mtx; /* lock around host controller */
224 1.1 nonaka int sc_dying; /* bus driver is shutting down */
225 1.1 nonaka
226 1.1 nonaka uint32_t sc_flags;
227 1.1 nonaka #define SMF_INITED 0x0001
228 1.1 nonaka #define SMF_SD_MODE 0x0002 /* host in SD mode (MMC otherwise) */
229 1.1 nonaka #define SMF_IO_MODE 0x0004 /* host in I/O mode (SD mode only) */
230 1.1 nonaka #define SMF_MEM_MODE 0x0008 /* host in memory mode (SD or MMC) */
231 1.1 nonaka #define SMF_CARD_PRESENT 0x4000 /* card presence noticed */
232 1.1 nonaka #define SMF_CARD_ATTACHED 0x8000 /* card driver(s) attached */
233 1.15.6.2 skrll #define SMF_UHS_MODE 0x10000 /* host in UHS mode */
234 1.1 nonaka
235 1.1 nonaka uint32_t sc_caps; /* host capability */
236 1.15.6.4 skrll #define SMC_CAPS_AUTO_STOP __BIT(0) /* send CMD12 automagically by host */
237 1.15.6.4 skrll #define SMC_CAPS_4BIT_MODE __BIT(1) /* 4-bits data bus width */
238 1.15.6.4 skrll #define SMC_CAPS_DMA __BIT(2) /* DMA transfer */
239 1.15.6.4 skrll #define SMC_CAPS_SPI_MODE __BIT(3) /* SPI mode */
240 1.15.6.4 skrll #define SMC_CAPS_POLL_CARD_DET __BIT(4) /* Polling card detect */
241 1.15.6.4 skrll #define SMC_CAPS_SINGLE_ONLY __BIT(5) /* only single read/write */
242 1.15.6.4 skrll #define SMC_CAPS_8BIT_MODE __BIT(6) /* 8-bits data bus width */
243 1.15.6.4 skrll #define SMC_CAPS_MULTI_SEG_DMA __BIT(7) /* multiple segment DMA transfer */
244 1.15.6.4 skrll #define SMC_CAPS_SD_HIGHSPEED __BIT(8) /* SD high-speed timing */
245 1.15.6.4 skrll #define SMC_CAPS_MMC_HIGHSPEED __BIT(9) /* MMC high-speed timing */
246 1.15.6.4 skrll #define SMC_CAPS_MMC_DDR52 __BIT(10) /* MMC HS DDR52 timing */
247 1.15.6.4 skrll /* __BIT(11) */
248 1.15.6.4 skrll #define SMC_CAPS_UHS_SDR50 __BIT(12) /* UHS SDR50 timing */
249 1.15.6.4 skrll #define SMC_CAPS_UHS_SDR104 __BIT(13) /* UHS SDR104 timing */
250 1.15.6.4 skrll #define SMC_CAPS_UHS_DDR50 __BIT(14) /* UHS DDR50 timing */
251 1.15.6.4 skrll #define SMC_CAPS_UHS_MASK (SMC_CAPS_UHS_SDR50 \
252 1.15.6.4 skrll | SMC_CAPS_UHS_SDR104 \
253 1.15.6.4 skrll | SMC_CAPS_UHS_DDR50)
254 1.15.6.4 skrll #define SMC_CAPS_MMC_HS200 __BIT(15) /* eMMC HS200 timing */
255 1.15.6.4 skrll #define SMC_CAPS_POLLING __BIT(30) /* driver supports cmd polling */
256 1.1 nonaka
257 1.1 nonaka /* function */
258 1.1 nonaka int sc_function_count; /* number of I/O functions (SDIO) */
259 1.1 nonaka struct sdmmc_function *sc_card; /* selected card */
260 1.1 nonaka struct sdmmc_function *sc_fn0; /* function 0, the card itself */
261 1.1 nonaka SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */
262 1.1 nonaka
263 1.1 nonaka /* task queue */
264 1.1 nonaka struct lwp *sc_tskq_lwp; /* asynchronous tasks */
265 1.1 nonaka TAILQ_HEAD(, sdmmc_task) sc_tskq; /* task thread work queue */
266 1.1 nonaka struct kmutex sc_tskq_mtx;
267 1.1 nonaka struct kcondvar sc_tskq_cv;
268 1.1 nonaka
269 1.1 nonaka /* discover task */
270 1.1 nonaka struct sdmmc_task sc_discover_task; /* card attach/detach task */
271 1.1 nonaka struct kmutex sc_discover_task_mtx;
272 1.1 nonaka
273 1.1 nonaka /* interrupt task */
274 1.1 nonaka struct sdmmc_task sc_intr_task; /* card interrupt task */
275 1.1 nonaka struct kmutex sc_intr_task_mtx;
276 1.1 nonaka TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */
277 1.1 nonaka
278 1.1 nonaka u_int sc_clkmin; /* host min bus clock */
279 1.1 nonaka u_int sc_clkmax; /* host max bus clock */
280 1.1 nonaka u_int sc_busclk; /* host bus clock */
281 1.15.6.2 skrll bool sc_busddr; /* host bus clock is in DDR mode */
282 1.1 nonaka int sc_buswidth; /* host bus width */
283 1.15.6.2 skrll const char *sc_transfer_mode; /* current transfer mode */
284 1.3 nonaka
285 1.3 nonaka callout_t sc_card_detect_ch; /* polling card insert/remove */
286 1.15.6.3 skrll
287 1.15.6.3 skrll /* event counters */
288 1.15.6.3 skrll struct evcnt sc_ev_xfer; /* xfer count */
289 1.15.6.3 skrll struct evcnt sc_ev_xfer_aligned[8]; /* aligned xfer counts */
290 1.15.6.3 skrll struct evcnt sc_ev_xfer_unaligned; /* unaligned xfer count */
291 1.15.6.3 skrll struct evcnt sc_ev_xfer_error; /* error xfer count */
292 1.1 nonaka };
293 1.1 nonaka
294 1.1 nonaka /*
295 1.1 nonaka * Attach devices at the sdmmc bus.
296 1.1 nonaka */
297 1.1 nonaka struct sdmmc_attach_args {
298 1.1 nonaka uint16_t manufacturer;
299 1.1 nonaka uint16_t product;
300 1.8 kiyohara int interface;
301 1.1 nonaka struct sdmmc_function *sf;
302 1.1 nonaka };
303 1.1 nonaka
304 1.1 nonaka struct sdmmc_product {
305 1.1 nonaka uint16_t pp_vendor;
306 1.1 nonaka uint16_t pp_product;
307 1.1 nonaka const char *pp_cisinfo[4];
308 1.1 nonaka };
309 1.1 nonaka
310 1.1 nonaka #ifndef IPL_SDMMC
311 1.1 nonaka #define IPL_SDMMC IPL_BIO
312 1.1 nonaka #endif
313 1.1 nonaka
314 1.1 nonaka #ifndef splsdmmc
315 1.1 nonaka #define splsdmmc() splbio()
316 1.1 nonaka #endif
317 1.1 nonaka
318 1.1 nonaka #define SDMMC_LOCK(sc)
319 1.1 nonaka #define SDMMC_UNLOCK(sc)
320 1.1 nonaka
321 1.1 nonaka #ifdef SDMMC_DEBUG
322 1.1 nonaka extern int sdmmcdebug;
323 1.1 nonaka #endif
324 1.1 nonaka
325 1.1 nonaka void sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *);
326 1.1 nonaka void sdmmc_del_task(struct sdmmc_task *);
327 1.1 nonaka
328 1.1 nonaka struct sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *);
329 1.1 nonaka void sdmmc_function_free(struct sdmmc_function *);
330 1.1 nonaka int sdmmc_set_bus_power(struct sdmmc_softc *, uint32_t, uint32_t);
331 1.1 nonaka int sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *);
332 1.3 nonaka int sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_function *,
333 1.3 nonaka struct sdmmc_command *);
334 1.15.6.2 skrll void sdmmc_stop_transmission(struct sdmmc_softc *);
335 1.1 nonaka void sdmmc_go_idle_state(struct sdmmc_softc *);
336 1.1 nonaka int sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *);
337 1.3 nonaka int sdmmc_set_relative_addr(struct sdmmc_softc *, struct sdmmc_function *);
338 1.1 nonaka
339 1.1 nonaka void sdmmc_intr_enable(struct sdmmc_function *);
340 1.1 nonaka void sdmmc_intr_disable(struct sdmmc_function *);
341 1.1 nonaka void *sdmmc_intr_establish(device_t, int (*)(void *), void *, const char *);
342 1.1 nonaka void sdmmc_intr_disestablish(void *);
343 1.1 nonaka void sdmmc_intr_task(void *);
344 1.1 nonaka
345 1.1 nonaka int sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response,
346 1.1 nonaka struct sdmmc_function *);
347 1.1 nonaka int sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response,
348 1.1 nonaka struct sdmmc_function *);
349 1.1 nonaka void sdmmc_print_cid(struct sdmmc_cid *);
350 1.3 nonaka #ifdef SDMMC_DUMP_CSD
351 1.3 nonaka void sdmmc_print_csd(sdmmc_response, struct sdmmc_csd *);
352 1.3 nonaka #endif
353 1.3 nonaka void sdmmc_dump_data(const char *, void *, size_t);
354 1.1 nonaka
355 1.1 nonaka int sdmmc_io_enable(struct sdmmc_softc *);
356 1.1 nonaka void sdmmc_io_scan(struct sdmmc_softc *);
357 1.1 nonaka int sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *);
358 1.1 nonaka uint8_t sdmmc_io_read_1(struct sdmmc_function *, int);
359 1.1 nonaka uint16_t sdmmc_io_read_2(struct sdmmc_function *, int);
360 1.1 nonaka uint32_t sdmmc_io_read_4(struct sdmmc_function *, int);
361 1.1 nonaka int sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int);
362 1.1 nonaka void sdmmc_io_write_1(struct sdmmc_function *, int, uint8_t);
363 1.1 nonaka void sdmmc_io_write_2(struct sdmmc_function *, int, uint16_t);
364 1.1 nonaka void sdmmc_io_write_4(struct sdmmc_function *, int, uint32_t);
365 1.1 nonaka int sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int);
366 1.1 nonaka int sdmmc_io_function_enable(struct sdmmc_function *);
367 1.1 nonaka void sdmmc_io_function_disable(struct sdmmc_function *);
368 1.1 nonaka
369 1.1 nonaka int sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *);
370 1.1 nonaka void sdmmc_print_cis(struct sdmmc_function *);
371 1.1 nonaka void sdmmc_check_cis_quirks(struct sdmmc_function *);
372 1.1 nonaka
373 1.1 nonaka int sdmmc_mem_enable(struct sdmmc_softc *);
374 1.1 nonaka void sdmmc_mem_scan(struct sdmmc_softc *);
375 1.1 nonaka int sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *);
376 1.3 nonaka int sdmmc_mem_send_op_cond(struct sdmmc_softc *, uint32_t, uint32_t *);
377 1.3 nonaka int sdmmc_mem_send_if_cond(struct sdmmc_softc *, uint32_t, uint32_t *);
378 1.15 nonaka int sdmmc_mem_set_blocklen(struct sdmmc_softc *, struct sdmmc_function *,
379 1.15 nonaka int);
380 1.1 nonaka int sdmmc_mem_read_block(struct sdmmc_function *, uint32_t, u_char *,
381 1.1 nonaka size_t);
382 1.1 nonaka int sdmmc_mem_write_block(struct sdmmc_function *, uint32_t, u_char *,
383 1.1 nonaka size_t);
384 1.15.6.4 skrll int sdmmc_mem_discard(struct sdmmc_function *, uint32_t, uint32_t);
385 1.15.6.4 skrll int sdmmc_mem_flush_cache(struct sdmmc_function *, bool);
386 1.1 nonaka
387 1.1 nonaka #endif /* _SDMMCVAR_H_ */
388