sdmmcvar.h revision 1.16
1 /* $NetBSD: sdmmcvar.h,v 1.16 2015/02/27 16:08:17 nonaka Exp $ */ 2 /* $OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _SDMMCVAR_H_ 21 #define _SDMMCVAR_H_ 22 23 #ifdef _KERNEL_OPT 24 #include "opt_sdmmc.h" 25 #endif 26 27 #include <sys/queue.h> 28 #include <sys/mutex.h> 29 #include <sys/callout.h> 30 31 #include <sys/bus.h> 32 33 #include <dev/sdmmc/sdmmcchip.h> 34 #include <dev/sdmmc/sdmmcreg.h> 35 36 #define SDMMC_SECTOR_SIZE_SB 9 37 #define SDMMC_SECTOR_SIZE (1 << SDMMC_SECTOR_SIZE_SB) /* =512 */ 38 39 struct sdmmc_csd { 40 int csdver; /* CSD structure format */ 41 u_int mmcver; /* MMC version (for CID format) */ 42 int capacity; /* total number of sectors */ 43 int read_bl_len; /* block length for reads */ 44 int write_bl_len; /* block length for writes */ 45 int r2w_factor; 46 int tran_speed; /* transfer speed (kbit/s) */ 47 int ccc; /* Card Command Class for SD */ 48 /* ... */ 49 }; 50 51 struct sdmmc_cid { 52 int mid; /* manufacturer identification number */ 53 int oid; /* OEM/product identification number */ 54 char pnm[8]; /* product name (MMC v1 has the longest) */ 55 int rev; /* product revision */ 56 int psn; /* product serial number */ 57 int mdt; /* manufacturing date */ 58 }; 59 60 struct sdmmc_scr { 61 int sd_spec; 62 int bus_width; 63 }; 64 65 typedef uint32_t sdmmc_response[4]; 66 67 struct sdmmc_softc; 68 69 struct sdmmc_task { 70 void (*func)(void *arg); 71 void *arg; 72 int onqueue; 73 struct sdmmc_softc *sc; 74 TAILQ_ENTRY(sdmmc_task) next; 75 }; 76 77 #define sdmmc_init_task(xtask, xfunc, xarg) \ 78 do { \ 79 (xtask)->func = (xfunc); \ 80 (xtask)->arg = (xarg); \ 81 (xtask)->onqueue = 0; \ 82 (xtask)->sc = NULL; \ 83 } while (/*CONSTCOND*/0) 84 85 #define sdmmc_task_pending(xtask) ((xtask)->onqueue) 86 87 struct sdmmc_command { 88 struct sdmmc_task c_task; /* task queue entry */ 89 uint16_t c_opcode; /* SD or MMC command index */ 90 uint32_t c_arg; /* SD/MMC command argument */ 91 sdmmc_response c_resp; /* response buffer */ 92 bus_dmamap_t c_dmamap; 93 int c_dmaseg; /* DMA segment number */ 94 int c_dmaoff; /* offset in DMA segment */ 95 void *c_data; /* buffer to send or read into */ 96 int c_datalen; /* length of data buffer */ 97 int c_blklen; /* block length */ 98 int c_flags; /* see below */ 99 #define SCF_ITSDONE (1U << 0) /* command is complete */ 100 #define SCF_RSP_PRESENT (1U << 1) 101 #define SCF_RSP_BSY (1U << 2) 102 #define SCF_RSP_136 (1U << 3) 103 #define SCF_RSP_CRC (1U << 4) 104 #define SCF_RSP_IDX (1U << 5) 105 #define SCF_CMD_READ (1U << 6) /* read command (data expected) */ 106 /* non SPI */ 107 #define SCF_CMD_AC (0U << 8) 108 #define SCF_CMD_ADTC (1U << 8) 109 #define SCF_CMD_BC (2U << 8) 110 #define SCF_CMD_BCR (3U << 8) 111 #define SCF_CMD_MASK (3U << 8) 112 /* SPI */ 113 #define SCF_RSP_SPI_S1 (1U << 10) 114 #define SCF_RSP_SPI_S2 (1U << 11) 115 #define SCF_RSP_SPI_B4 (1U << 12) 116 #define SCF_RSP_SPI_BSY (1U << 13) 117 /* response types */ 118 #define SCF_RSP_R0 0 /* none */ 119 #define SCF_RSP_R1 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 120 #define SCF_RSP_R1B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 121 #define SCF_RSP_R2 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136) 122 #define SCF_RSP_R3 (SCF_RSP_PRESENT) 123 #define SCF_RSP_R4 (SCF_RSP_PRESENT) 124 #define SCF_RSP_R5 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 125 #define SCF_RSP_R5B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 126 #define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 127 #define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 128 #define SCF_RSP_MASK (0x1f << 1) 129 /* SPI */ 130 #define SCF_RSP_SPI_R1 (SCF_RSP_SPI_S1) 131 #define SCF_RSP_SPI_R1B (SCF_RSP_SPI_S1|SCF_RSP_SPI_BSY) 132 #define SCF_RSP_SPI_R2 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2) 133 #define SCF_RSP_SPI_R3 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 134 #define SCF_RSP_SPI_R4 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 135 #define SCF_RSP_SPI_R5 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2) 136 #define SCF_RSP_SPI_R7 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 137 #define SCF_RSP_SPI_MASK (0xf << 10) 138 int c_error; /* errno value on completion */ 139 140 /* Host controller owned fields for data xfer in progress */ 141 int c_resid; /* remaining I/O */ 142 u_char *c_buf; /* remaining data */ 143 }; 144 145 /* 146 * Decoded PC Card 16 based Card Information Structure (CIS), 147 * per card (function 0) and per function (1 and greater). 148 */ 149 struct sdmmc_cis { 150 uint16_t manufacturer; 151 #define SDMMC_VENDOR_INVALID 0xffff 152 uint16_t product; 153 #define SDMMC_PRODUCT_INVALID 0xffff 154 uint8_t function; 155 #define SDMMC_FUNCTION_INVALID 0xff 156 u_char cis1_major; 157 u_char cis1_minor; 158 char cis1_info_buf[256]; 159 char *cis1_info[4]; 160 }; 161 162 /* 163 * Structure describing either an SD card I/O function or a SD/MMC 164 * memory card from a "stack of cards" that responded to CMD2. For a 165 * combo card with one I/O function and one memory card, there will be 166 * two of these structures allocated. Each card slot has such a list 167 * of sdmmc_function structures. 168 */ 169 struct sdmmc_function { 170 /* common members */ 171 struct sdmmc_softc *sc; /* card slot softc */ 172 uint16_t rca; /* relative card address */ 173 int interface; /* SD/MMC:0, SDIO:standard interface */ 174 int width; /* bus width */ 175 int flags; 176 #define SFF_ERROR 0x0001 /* function is poo; ignore it */ 177 #define SFF_SDHC 0x0002 /* SD High Capacity card */ 178 SIMPLEQ_ENTRY(sdmmc_function) sf_list; 179 /* SD card I/O function members */ 180 int number; /* I/O function number or -1 */ 181 device_t child; /* function driver */ 182 struct sdmmc_cis cis; /* decoded CIS */ 183 /* SD/MMC memory card members */ 184 struct sdmmc_csd csd; /* decoded CSD value */ 185 struct sdmmc_cid cid; /* decoded CID value */ 186 sdmmc_response raw_cid; /* temp. storage for decoding */ 187 uint32_t raw_scr[2]; 188 struct sdmmc_scr scr; /* decoded SCR value */ 189 190 void *bbuf; /* bounce buffer */ 191 bus_dmamap_t bbuf_dmap; /* DMA map for bounce buffer */ 192 bus_dmamap_t sseg_dmap; /* DMA map for single segment */ 193 }; 194 195 /* 196 * Structure describing a single SD/MMC/SDIO card slot. 197 */ 198 struct sdmmc_softc { 199 device_t sc_dev; /* base device */ 200 #define SDMMCDEVNAME(sc) (device_xname(sc->sc_dev)) 201 202 sdmmc_chipset_tag_t sc_sct; /* host controller chipset tag */ 203 sdmmc_spi_chipset_tag_t sc_spi_sct; 204 sdmmc_chipset_handle_t sc_sch; /* host controller chipset handle */ 205 bus_dma_tag_t sc_dmat; 206 bus_dmamap_t sc_dmap; 207 #define SDMMC_MAXNSEGS ((MAXPHYS / PAGE_SIZE) + 1) 208 209 struct kmutex sc_mtx; /* lock around host controller */ 210 int sc_dying; /* bus driver is shutting down */ 211 212 uint32_t sc_flags; 213 #define SMF_INITED 0x0001 214 #define SMF_SD_MODE 0x0002 /* host in SD mode (MMC otherwise) */ 215 #define SMF_IO_MODE 0x0004 /* host in I/O mode (SD mode only) */ 216 #define SMF_MEM_MODE 0x0008 /* host in memory mode (SD or MMC) */ 217 #define SMF_CARD_PRESENT 0x4000 /* card presence noticed */ 218 #define SMF_CARD_ATTACHED 0x8000 /* card driver(s) attached */ 219 220 uint32_t sc_caps; /* host capability */ 221 #define SMC_CAPS_AUTO_STOP 0x0001 /* send CMD12 automagically by host */ 222 #define SMC_CAPS_4BIT_MODE 0x0002 /* 4-bits data bus width */ 223 #define SMC_CAPS_DMA 0x0004 /* DMA transfer */ 224 #define SMC_CAPS_SPI_MODE 0x0008 /* SPI mode */ 225 #define SMC_CAPS_POLL_CARD_DET 0x0010 /* Polling card detect */ 226 #define SMC_CAPS_SINGLE_ONLY 0x0020 /* only single read/write */ 227 #define SMC_CAPS_8BIT_MODE 0x0040 /* 8-bits data bus width */ 228 #define SMC_CAPS_MULTI_SEG_DMA 0x0080 /* multiple segment DMA transfer */ 229 #define SMC_CAPS_SD_HIGHSPEED 0x0100 /* SD high-speed timing */ 230 #define SMC_CAPS_MMC_HIGHSPEED 0x0200 /* MMC high-speed timing */ 231 232 /* function */ 233 int sc_function_count; /* number of I/O functions (SDIO) */ 234 struct sdmmc_function *sc_card; /* selected card */ 235 struct sdmmc_function *sc_fn0; /* function 0, the card itself */ 236 SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */ 237 238 /* task queue */ 239 struct lwp *sc_tskq_lwp; /* asynchronous tasks */ 240 TAILQ_HEAD(, sdmmc_task) sc_tskq; /* task thread work queue */ 241 struct kmutex sc_tskq_mtx; 242 struct kcondvar sc_tskq_cv; 243 244 /* discover task */ 245 struct sdmmc_task sc_discover_task; /* card attach/detach task */ 246 struct kmutex sc_discover_task_mtx; 247 248 /* interrupt task */ 249 struct sdmmc_task sc_intr_task; /* card interrupt task */ 250 struct kmutex sc_intr_task_mtx; 251 TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */ 252 253 u_int sc_clkmin; /* host min bus clock */ 254 u_int sc_clkmax; /* host max bus clock */ 255 u_int sc_busclk; /* host bus clock */ 256 int sc_buswidth; /* host bus width */ 257 258 callout_t sc_card_detect_ch; /* polling card insert/remove */ 259 }; 260 261 /* 262 * Attach devices at the sdmmc bus. 263 */ 264 struct sdmmc_attach_args { 265 uint16_t manufacturer; 266 uint16_t product; 267 int interface; 268 struct sdmmc_function *sf; 269 }; 270 271 struct sdmmc_product { 272 uint16_t pp_vendor; 273 uint16_t pp_product; 274 const char *pp_cisinfo[4]; 275 }; 276 277 #ifndef IPL_SDMMC 278 #define IPL_SDMMC IPL_BIO 279 #endif 280 281 #ifndef splsdmmc 282 #define splsdmmc() splbio() 283 #endif 284 285 #define SDMMC_LOCK(sc) 286 #define SDMMC_UNLOCK(sc) 287 288 #ifdef SDMMC_DEBUG 289 extern int sdmmcdebug; 290 #endif 291 292 void sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *); 293 void sdmmc_del_task(struct sdmmc_task *); 294 295 struct sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *); 296 void sdmmc_function_free(struct sdmmc_function *); 297 int sdmmc_set_bus_power(struct sdmmc_softc *, uint32_t, uint32_t); 298 int sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *); 299 int sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_function *, 300 struct sdmmc_command *); 301 void sdmmc_go_idle_state(struct sdmmc_softc *); 302 int sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *); 303 int sdmmc_set_relative_addr(struct sdmmc_softc *, struct sdmmc_function *); 304 305 void sdmmc_intr_enable(struct sdmmc_function *); 306 void sdmmc_intr_disable(struct sdmmc_function *); 307 void *sdmmc_intr_establish(device_t, int (*)(void *), void *, const char *); 308 void sdmmc_intr_disestablish(void *); 309 void sdmmc_intr_task(void *); 310 311 int sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response, 312 struct sdmmc_function *); 313 int sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response, 314 struct sdmmc_function *); 315 void sdmmc_print_cid(struct sdmmc_cid *); 316 #ifdef SDMMC_DUMP_CSD 317 void sdmmc_print_csd(sdmmc_response, struct sdmmc_csd *); 318 #endif 319 void sdmmc_dump_data(const char *, void *, size_t); 320 321 int sdmmc_io_enable(struct sdmmc_softc *); 322 void sdmmc_io_scan(struct sdmmc_softc *); 323 int sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *); 324 uint8_t sdmmc_io_read_1(struct sdmmc_function *, int); 325 uint16_t sdmmc_io_read_2(struct sdmmc_function *, int); 326 uint32_t sdmmc_io_read_4(struct sdmmc_function *, int); 327 int sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int); 328 void sdmmc_io_write_1(struct sdmmc_function *, int, uint8_t); 329 void sdmmc_io_write_2(struct sdmmc_function *, int, uint16_t); 330 void sdmmc_io_write_4(struct sdmmc_function *, int, uint32_t); 331 int sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int); 332 int sdmmc_io_function_enable(struct sdmmc_function *); 333 void sdmmc_io_function_disable(struct sdmmc_function *); 334 335 int sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *); 336 void sdmmc_print_cis(struct sdmmc_function *); 337 void sdmmc_check_cis_quirks(struct sdmmc_function *); 338 339 int sdmmc_mem_enable(struct sdmmc_softc *); 340 void sdmmc_mem_scan(struct sdmmc_softc *); 341 int sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *); 342 int sdmmc_mem_send_op_cond(struct sdmmc_softc *, uint32_t, uint32_t *); 343 int sdmmc_mem_send_if_cond(struct sdmmc_softc *, uint32_t, uint32_t *); 344 int sdmmc_mem_set_blocklen(struct sdmmc_softc *, struct sdmmc_function *, 345 int); 346 int sdmmc_mem_read_block(struct sdmmc_function *, uint32_t, u_char *, 347 size_t); 348 int sdmmc_mem_write_block(struct sdmmc_function *, uint32_t, u_char *, 349 size_t); 350 351 #endif /* _SDMMCVAR_H_ */ 352
Indexes created Sat Oct 18 16:10:06 GMT 2025