sdmmcvar.h revision 1.25
1 /* $NetBSD: sdmmcvar.h,v 1.25 2017/06/24 11:27:33 jmcneill Exp $ */ 2 /* $OpenBSD: sdmmcvar.h,v 1.13 2009/01/09 10:55:22 jsg Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Uwe Stuehler <uwe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef _SDMMCVAR_H_ 21 #define _SDMMCVAR_H_ 22 23 #ifdef _KERNEL_OPT 24 #include "opt_sdmmc.h" 25 #endif 26 27 #include <sys/queue.h> 28 #include <sys/mutex.h> 29 #include <sys/callout.h> 30 #include <sys/evcnt.h> 31 32 #include <sys/bus.h> 33 34 #include <dev/sdmmc/sdmmcchip.h> 35 #include <dev/sdmmc/sdmmcreg.h> 36 37 #define SDMMC_SECTOR_SIZE_SB 9 38 #define SDMMC_SECTOR_SIZE (1 << SDMMC_SECTOR_SIZE_SB) /* =512 */ 39 40 struct sdmmc_csd { 41 int csdver; /* CSD structure format */ 42 u_int mmcver; /* MMC version (for CID format) */ 43 int capacity; /* total number of sectors */ 44 int read_bl_len; /* block length for reads */ 45 int write_bl_len; /* block length for writes */ 46 int r2w_factor; 47 int tran_speed; /* transfer speed (kbit/s) */ 48 int ccc; /* Card Command Class for SD */ 49 /* ... */ 50 }; 51 52 struct sdmmc_ext_csd { 53 uint8_t rev; 54 uint8_t rst_n_function; /* RST_n_FUNCTION */ 55 }; 56 57 struct sdmmc_cid { 58 int mid; /* manufacturer identification number */ 59 int oid; /* OEM/product identification number */ 60 char pnm[8]; /* product name (MMC v1 has the longest) */ 61 int rev; /* product revision */ 62 int psn; /* product serial number */ 63 int mdt; /* manufacturing date */ 64 }; 65 66 struct sdmmc_scr { 67 int sd_spec; 68 int bus_width; 69 }; 70 71 typedef uint32_t sdmmc_response[4]; 72 73 struct sdmmc_softc; 74 75 struct sdmmc_task { 76 void (*func)(void *arg); 77 void *arg; 78 int onqueue; 79 struct sdmmc_softc *sc; 80 TAILQ_ENTRY(sdmmc_task) next; 81 }; 82 83 #define sdmmc_init_task(xtask, xfunc, xarg) \ 84 do { \ 85 (xtask)->func = (xfunc); \ 86 (xtask)->arg = (xarg); \ 87 (xtask)->onqueue = 0; \ 88 (xtask)->sc = NULL; \ 89 } while (/*CONSTCOND*/0) 90 91 #define sdmmc_task_pending(xtask) ((xtask)->onqueue) 92 93 struct sdmmc_command { 94 struct sdmmc_task c_task; /* task queue entry */ 95 uint16_t c_opcode; /* SD or MMC command index */ 96 uint32_t c_arg; /* SD/MMC command argument */ 97 sdmmc_response c_resp; /* response buffer */ 98 bus_dmamap_t c_dmamap; 99 int c_dmaseg; /* DMA segment number */ 100 int c_dmaoff; /* offset in DMA segment */ 101 void *c_data; /* buffer to send or read into */ 102 int c_datalen; /* length of data buffer */ 103 int c_blklen; /* block length */ 104 int c_flags; /* see below */ 105 #define SCF_ITSDONE (1U << 0) /* command is complete */ 106 #define SCF_RSP_PRESENT (1U << 1) 107 #define SCF_RSP_BSY (1U << 2) 108 #define SCF_RSP_136 (1U << 3) 109 #define SCF_RSP_CRC (1U << 4) 110 #define SCF_RSP_IDX (1U << 5) 111 #define SCF_CMD_READ (1U << 6) /* read command (data expected) */ 112 /* non SPI */ 113 #define SCF_CMD_AC (0U << 8) 114 #define SCF_CMD_ADTC (1U << 8) 115 #define SCF_CMD_BC (2U << 8) 116 #define SCF_CMD_BCR (3U << 8) 117 #define SCF_CMD_MASK (3U << 8) 118 /* SPI */ 119 #define SCF_RSP_SPI_S1 (1U << 10) 120 #define SCF_RSP_SPI_S2 (1U << 11) 121 #define SCF_RSP_SPI_B4 (1U << 12) 122 #define SCF_RSP_SPI_BSY (1U << 13) 123 /* Probing */ 124 #define SCF_TOUT_OK (1U << 14) /* command timeout expected */ 125 /* Transfer hints */ 126 #define SCF_XFER_SDHC (1U << 15) /* card is SDHC */ 127 /* response types */ 128 #define SCF_RSP_R0 0 /* none */ 129 #define SCF_RSP_R1 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 130 #define SCF_RSP_R1B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 131 #define SCF_RSP_R2 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_136) 132 #define SCF_RSP_R3 (SCF_RSP_PRESENT) 133 #define SCF_RSP_R4 (SCF_RSP_PRESENT) 134 #define SCF_RSP_R5 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 135 #define SCF_RSP_R5B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY) 136 #define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 137 #define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX) 138 #define SCF_RSP_MASK (0x1f << 1) 139 /* SPI */ 140 #define SCF_RSP_SPI_R1 (SCF_RSP_SPI_S1) 141 #define SCF_RSP_SPI_R1B (SCF_RSP_SPI_S1|SCF_RSP_SPI_BSY) 142 #define SCF_RSP_SPI_R2 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2) 143 #define SCF_RSP_SPI_R3 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 144 #define SCF_RSP_SPI_R4 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 145 #define SCF_RSP_SPI_R5 (SCF_RSP_SPI_S1|SCF_RSP_SPI_S2) 146 #define SCF_RSP_SPI_R7 (SCF_RSP_SPI_S1|SCF_RSP_SPI_B4) 147 #define SCF_RSP_SPI_MASK (0xf << 10) 148 int c_error; /* errno value on completion */ 149 150 /* Host controller owned fields for data xfer in progress */ 151 int c_resid; /* remaining I/O */ 152 u_char *c_buf; /* remaining data */ 153 }; 154 155 /* 156 * Decoded PC Card 16 based Card Information Structure (CIS), 157 * per card (function 0) and per function (1 and greater). 158 */ 159 struct sdmmc_cis { 160 uint16_t manufacturer; 161 #define SDMMC_VENDOR_INVALID 0xffff 162 uint16_t product; 163 #define SDMMC_PRODUCT_INVALID 0xffff 164 uint8_t function; 165 #define SDMMC_FUNCTION_INVALID 0xff 166 u_char cis1_major; 167 u_char cis1_minor; 168 char cis1_info_buf[256]; 169 char *cis1_info[4]; 170 }; 171 172 /* 173 * Structure describing either an SD card I/O function or a SD/MMC 174 * memory card from a "stack of cards" that responded to CMD2. For a 175 * combo card with one I/O function and one memory card, there will be 176 * two of these structures allocated. Each card slot has such a list 177 * of sdmmc_function structures. 178 */ 179 struct sdmmc_function { 180 /* common members */ 181 struct sdmmc_softc *sc; /* card slot softc */ 182 uint16_t rca; /* relative card address */ 183 int interface; /* SD/MMC:0, SDIO:standard interface */ 184 int width; /* bus width */ 185 int flags; 186 #define SFF_ERROR 0x0001 /* function is poo; ignore it */ 187 #define SFF_SDHC 0x0002 /* SD High Capacity card */ 188 SIMPLEQ_ENTRY(sdmmc_function) sf_list; 189 /* SD card I/O function members */ 190 int number; /* I/O function number or -1 */ 191 device_t child; /* function driver */ 192 struct sdmmc_cis cis; /* decoded CIS */ 193 /* SD/MMC memory card members */ 194 struct sdmmc_csd csd; /* decoded CSD value */ 195 struct sdmmc_ext_csd ext_csd; /* decoded EXT_CSD value */ 196 struct sdmmc_cid cid; /* decoded CID value */ 197 sdmmc_response raw_cid; /* temp. storage for decoding */ 198 uint32_t raw_scr[2]; 199 struct sdmmc_scr scr; /* decoded SCR value */ 200 201 void *bbuf; /* bounce buffer */ 202 bus_dmamap_t bbuf_dmap; /* DMA map for bounce buffer */ 203 bus_dmamap_t sseg_dmap; /* DMA map for single segment */ 204 }; 205 206 /* 207 * Structure describing a single SD/MMC/SDIO card slot. 208 */ 209 struct sdmmc_softc { 210 device_t sc_dev; /* base device */ 211 #define SDMMCDEVNAME(sc) (device_xname(sc->sc_dev)) 212 213 sdmmc_chipset_tag_t sc_sct; /* host controller chipset tag */ 214 sdmmc_spi_chipset_tag_t sc_spi_sct; 215 sdmmc_chipset_handle_t sc_sch; /* host controller chipset handle */ 216 bus_dma_tag_t sc_dmat; 217 bus_dmamap_t sc_dmap; 218 #define SDMMC_MAXNSEGS ((MAXPHYS / PAGE_SIZE) + 1) 219 220 struct kmutex sc_mtx; /* lock around host controller */ 221 int sc_dying; /* bus driver is shutting down */ 222 223 uint32_t sc_flags; 224 #define SMF_INITED 0x0001 225 #define SMF_SD_MODE 0x0002 /* host in SD mode (MMC otherwise) */ 226 #define SMF_IO_MODE 0x0004 /* host in I/O mode (SD mode only) */ 227 #define SMF_MEM_MODE 0x0008 /* host in memory mode (SD or MMC) */ 228 #define SMF_CARD_PRESENT 0x4000 /* card presence noticed */ 229 #define SMF_CARD_ATTACHED 0x8000 /* card driver(s) attached */ 230 #define SMF_UHS_MODE 0x10000 /* host in UHS mode */ 231 232 uint32_t sc_caps; /* host capability */ 233 #define SMC_CAPS_AUTO_STOP __BIT(0) /* send CMD12 automagically by host */ 234 #define SMC_CAPS_4BIT_MODE __BIT(1) /* 4-bits data bus width */ 235 #define SMC_CAPS_DMA __BIT(2) /* DMA transfer */ 236 #define SMC_CAPS_SPI_MODE __BIT(3) /* SPI mode */ 237 #define SMC_CAPS_POLL_CARD_DET __BIT(4) /* Polling card detect */ 238 #define SMC_CAPS_SINGLE_ONLY __BIT(5) /* only single read/write */ 239 #define SMC_CAPS_8BIT_MODE __BIT(6) /* 8-bits data bus width */ 240 #define SMC_CAPS_MULTI_SEG_DMA __BIT(7) /* multiple segment DMA transfer */ 241 #define SMC_CAPS_SD_HIGHSPEED __BIT(8) /* SD high-speed timing */ 242 #define SMC_CAPS_MMC_HIGHSPEED __BIT(9) /* MMC high-speed timing */ 243 #define SMC_CAPS_MMC_DDR52 __BIT(10) /* MMC HS DDR52 timing */ 244 /* __BIT(11) */ 245 #define SMC_CAPS_UHS_SDR50 __BIT(12) /* UHS SDR50 timing */ 246 #define SMC_CAPS_UHS_SDR104 __BIT(13) /* UHS SDR104 timing */ 247 #define SMC_CAPS_UHS_DDR50 __BIT(14) /* UHS DDR50 timing */ 248 #define SMC_CAPS_UHS_MASK (SMC_CAPS_UHS_SDR50 \ 249 | SMC_CAPS_UHS_SDR104 \ 250 | SMC_CAPS_UHS_DDR50) 251 #define SMC_CAPS_MMC_HS200 __BIT(15) /* eMMC HS200 timing */ 252 253 /* function */ 254 int sc_function_count; /* number of I/O functions (SDIO) */ 255 struct sdmmc_function *sc_card; /* selected card */ 256 struct sdmmc_function *sc_fn0; /* function 0, the card itself */ 257 SIMPLEQ_HEAD(, sdmmc_function) sf_head; /* list of card functions */ 258 259 /* task queue */ 260 struct lwp *sc_tskq_lwp; /* asynchronous tasks */ 261 TAILQ_HEAD(, sdmmc_task) sc_tskq; /* task thread work queue */ 262 struct kmutex sc_tskq_mtx; 263 struct kcondvar sc_tskq_cv; 264 265 /* discover task */ 266 struct sdmmc_task sc_discover_task; /* card attach/detach task */ 267 struct kmutex sc_discover_task_mtx; 268 269 /* interrupt task */ 270 struct sdmmc_task sc_intr_task; /* card interrupt task */ 271 struct kmutex sc_intr_task_mtx; 272 TAILQ_HEAD(, sdmmc_intr_handler) sc_intrq; /* interrupt handlers */ 273 274 u_int sc_clkmin; /* host min bus clock */ 275 u_int sc_clkmax; /* host max bus clock */ 276 u_int sc_busclk; /* host bus clock */ 277 bool sc_busddr; /* host bus clock is in DDR mode */ 278 int sc_buswidth; /* host bus width */ 279 const char *sc_transfer_mode; /* current transfer mode */ 280 281 callout_t sc_card_detect_ch; /* polling card insert/remove */ 282 283 /* event counters */ 284 struct evcnt sc_ev_xfer; /* xfer count */ 285 struct evcnt sc_ev_xfer_aligned[8]; /* aligned xfer counts */ 286 struct evcnt sc_ev_xfer_unaligned; /* unaligned xfer count */ 287 struct evcnt sc_ev_xfer_error; /* error xfer count */ 288 }; 289 290 /* 291 * Attach devices at the sdmmc bus. 292 */ 293 struct sdmmc_attach_args { 294 uint16_t manufacturer; 295 uint16_t product; 296 int interface; 297 struct sdmmc_function *sf; 298 }; 299 300 struct sdmmc_product { 301 uint16_t pp_vendor; 302 uint16_t pp_product; 303 const char *pp_cisinfo[4]; 304 }; 305 306 #ifndef IPL_SDMMC 307 #define IPL_SDMMC IPL_BIO 308 #endif 309 310 #ifndef splsdmmc 311 #define splsdmmc() splbio() 312 #endif 313 314 #define SDMMC_LOCK(sc) 315 #define SDMMC_UNLOCK(sc) 316 317 #ifdef SDMMC_DEBUG 318 extern int sdmmcdebug; 319 #endif 320 321 void sdmmc_add_task(struct sdmmc_softc *, struct sdmmc_task *); 322 void sdmmc_del_task(struct sdmmc_task *); 323 324 struct sdmmc_function *sdmmc_function_alloc(struct sdmmc_softc *); 325 void sdmmc_function_free(struct sdmmc_function *); 326 int sdmmc_set_bus_power(struct sdmmc_softc *, uint32_t, uint32_t); 327 int sdmmc_mmc_command(struct sdmmc_softc *, struct sdmmc_command *); 328 int sdmmc_app_command(struct sdmmc_softc *, struct sdmmc_function *, 329 struct sdmmc_command *); 330 void sdmmc_stop_transmission(struct sdmmc_softc *); 331 void sdmmc_go_idle_state(struct sdmmc_softc *); 332 int sdmmc_select_card(struct sdmmc_softc *, struct sdmmc_function *); 333 int sdmmc_set_relative_addr(struct sdmmc_softc *, struct sdmmc_function *); 334 335 void sdmmc_intr_enable(struct sdmmc_function *); 336 void sdmmc_intr_disable(struct sdmmc_function *); 337 void *sdmmc_intr_establish(device_t, int (*)(void *), void *, const char *); 338 void sdmmc_intr_disestablish(void *); 339 void sdmmc_intr_task(void *); 340 341 int sdmmc_decode_csd(struct sdmmc_softc *, sdmmc_response, 342 struct sdmmc_function *); 343 int sdmmc_decode_cid(struct sdmmc_softc *, sdmmc_response, 344 struct sdmmc_function *); 345 void sdmmc_print_cid(struct sdmmc_cid *); 346 #ifdef SDMMC_DUMP_CSD 347 void sdmmc_print_csd(sdmmc_response, struct sdmmc_csd *); 348 #endif 349 void sdmmc_dump_data(const char *, void *, size_t); 350 351 int sdmmc_io_enable(struct sdmmc_softc *); 352 void sdmmc_io_scan(struct sdmmc_softc *); 353 int sdmmc_io_init(struct sdmmc_softc *, struct sdmmc_function *); 354 uint8_t sdmmc_io_read_1(struct sdmmc_function *, int); 355 uint16_t sdmmc_io_read_2(struct sdmmc_function *, int); 356 uint32_t sdmmc_io_read_4(struct sdmmc_function *, int); 357 int sdmmc_io_read_multi_1(struct sdmmc_function *, int, u_char *, int); 358 void sdmmc_io_write_1(struct sdmmc_function *, int, uint8_t); 359 void sdmmc_io_write_2(struct sdmmc_function *, int, uint16_t); 360 void sdmmc_io_write_4(struct sdmmc_function *, int, uint32_t); 361 int sdmmc_io_write_multi_1(struct sdmmc_function *, int, u_char *, int); 362 int sdmmc_io_function_enable(struct sdmmc_function *); 363 void sdmmc_io_function_disable(struct sdmmc_function *); 364 365 int sdmmc_read_cis(struct sdmmc_function *, struct sdmmc_cis *); 366 void sdmmc_print_cis(struct sdmmc_function *); 367 void sdmmc_check_cis_quirks(struct sdmmc_function *); 368 369 int sdmmc_mem_enable(struct sdmmc_softc *); 370 void sdmmc_mem_scan(struct sdmmc_softc *); 371 int sdmmc_mem_init(struct sdmmc_softc *, struct sdmmc_function *); 372 int sdmmc_mem_send_op_cond(struct sdmmc_softc *, uint32_t, uint32_t *); 373 int sdmmc_mem_send_if_cond(struct sdmmc_softc *, uint32_t, uint32_t *); 374 int sdmmc_mem_set_blocklen(struct sdmmc_softc *, struct sdmmc_function *, 375 int); 376 int sdmmc_mem_read_block(struct sdmmc_function *, uint32_t, u_char *, 377 size_t); 378 int sdmmc_mem_write_block(struct sdmmc_function *, uint32_t, u_char *, 379 size_t); 380 int sdmmc_mem_discard(struct sdmmc_function *, off_t, off_t); 381 382 #endif /* _SDMMCVAR_H_ */ 383
Indexes created Sun Oct 19 02:09:48 GMT 2025