smbiosvar.h revision 1.1 1 1.1 jmcneill /* $NetBSD: smbiosvar.h,v 1.1 2021/07/21 23:16:09 jmcneill Exp $ */
2 1.1 jmcneill /*
3 1.1 jmcneill * Copyright (c) 2006 Gordon Willem Klok <gklok (at) cogeco.ca>
4 1.1 jmcneill * Copyright (c) 2005 Jordan Hargrave
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
17 1.1 jmcneill * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.1 jmcneill * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.1 jmcneill * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR
20 1.1 jmcneill * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.1 jmcneill * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.1 jmcneill * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.1 jmcneill * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.1 jmcneill * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #ifndef _DEV_SMBIOSVAR_H
30 1.1 jmcneill #define _DEV_SMBIOSVAR_H
31 1.1 jmcneill
32 1.1 jmcneill #define SMBIOS_UUID_NPRESENT 0x1
33 1.1 jmcneill #define SMBIOS_UUID_NSET 0x2
34 1.1 jmcneill
35 1.1 jmcneill /*
36 1.1 jmcneill * Section 3.5 of "UUIDs and GUIDs" found at
37 1.1 jmcneill * http://www.opengroup.org/dce/info/draft-leach-uuids-guids-01.txt
38 1.1 jmcneill * specifies the string repersentation of a UUID.
39 1.1 jmcneill */
40 1.1 jmcneill #define SMBIOS_UUID_REP "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x"
41 1.1 jmcneill #define SMBIOS_UUID_REPLEN 37 /* 16 zero padded values, 4 hyphens, 1 null */
42 1.1 jmcneill
43 1.1 jmcneill struct smbios_entry {
44 1.1 jmcneill uint8_t rev;
45 1.1 jmcneill uint8_t mjr;
46 1.1 jmcneill uint8_t min;
47 1.1 jmcneill uint8_t doc;
48 1.1 jmcneill uint8_t *addr;
49 1.1 jmcneill uint32_t len;
50 1.1 jmcneill uint16_t count;
51 1.1 jmcneill };
52 1.1 jmcneill
53 1.1 jmcneill struct smbhdr {
54 1.1 jmcneill uint32_t sig; /* "_SM_" */
55 1.1 jmcneill uint8_t checksum; /* Entry point checksum */
56 1.1 jmcneill uint8_t len; /* Entry point structure length */
57 1.1 jmcneill uint8_t majrev; /* Specification major revision */
58 1.1 jmcneill uint8_t minrev; /* Specification minor revision */
59 1.1 jmcneill uint16_t mss; /* Maximum Structure Size */
60 1.1 jmcneill uint8_t epr; /* Entry Point Revision */
61 1.1 jmcneill uint8_t fa[5]; /* value determined by EPR */
62 1.1 jmcneill uint8_t sasig[5]; /* Secondary Anchor "_DMI_" */
63 1.1 jmcneill uint8_t sachecksum; /* Secondary Checksum */
64 1.1 jmcneill uint16_t size; /* Length of structure table in bytes */
65 1.1 jmcneill uint32_t addr; /* Structure table address */
66 1.1 jmcneill uint16_t count; /* Number of SMBIOS structures */
67 1.1 jmcneill uint8_t rev; /* BCD revision */
68 1.1 jmcneill } __packed;
69 1.1 jmcneill
70 1.1 jmcneill struct smb3hdr {
71 1.1 jmcneill uint8_t sig[5]; /* "_SM3_" */
72 1.1 jmcneill uint8_t checksum; /* Entry point structure checksum */
73 1.1 jmcneill uint8_t len; /* Entry point structure length */
74 1.1 jmcneill uint8_t majrev; /* Specification major revision */
75 1.1 jmcneill uint8_t minrev; /* Specification minor revision */
76 1.1 jmcneill uint8_t docrev; /* docrec of Specification */
77 1.1 jmcneill uint8_t eprev; /* Entry point structure revision */
78 1.1 jmcneill #define SMBIOS3_EPREV_RESERVED 0
79 1.1 jmcneill #define SMBIOS3_EPREV_3_0 1 /* SMBIOS 3.0 */
80 1.1 jmcneill uint8_t reverved;
81 1.1 jmcneill uint32_t size; /* Length of structure table in bytes */
82 1.1 jmcneill uint64_t addr; /* Structure table address */
83 1.1 jmcneill } __packed;
84 1.1 jmcneill
85 1.1 jmcneill struct smbtblhdr {
86 1.1 jmcneill uint8_t type;
87 1.1 jmcneill uint8_t size;
88 1.1 jmcneill uint16_t handle;
89 1.1 jmcneill } __packed;
90 1.1 jmcneill
91 1.1 jmcneill struct smbtable {
92 1.1 jmcneill struct smbtblhdr *hdr;
93 1.1 jmcneill void *tblhdr;
94 1.1 jmcneill uint32_t cookie;
95 1.1 jmcneill };
96 1.1 jmcneill
97 1.1 jmcneill #define SMBIOS_TYPE_BIOS 0
98 1.1 jmcneill #define SMBIOS_TYPE_SYSTEM 1
99 1.1 jmcneill #define SMBIOS_TYPE_BASEBOARD 2
100 1.1 jmcneill #define SMBIOS_TYPE_ENCLOSURE 3
101 1.1 jmcneill #define SMBIOS_TYPE_PROCESSOR 4
102 1.1 jmcneill #define SMBIOS_TYPE_MEMCTRL 5
103 1.1 jmcneill #define SMBIOS_TYPE_MEMMOD 6
104 1.1 jmcneill #define SMBIOS_TYPE_CACHE 7
105 1.1 jmcneill #define SMBIOS_TYPE_PORT 8
106 1.1 jmcneill #define SMBIOS_TYPE_SLOTS 9
107 1.1 jmcneill #define SMBIOS_TYPE_OBD 10
108 1.1 jmcneill #define SMBIOS_TYPE_OEM 11
109 1.1 jmcneill #define SMBIOS_TYPE_SYSCONFOPT 12
110 1.1 jmcneill #define SMBIOS_TYPE_BIOSLANG 13
111 1.1 jmcneill #define SMBIOS_TYPE_GROUPASSOC 14
112 1.1 jmcneill #define SMBIOS_TYPE_SYSEVENTLOG 15
113 1.1 jmcneill #define SMBIOS_TYPE_PHYMEM 16
114 1.1 jmcneill #define SMBIOS_TYPE_MEMDEV 17
115 1.1 jmcneill #define SMBIOS_TYPE_ECCINFO32 18
116 1.1 jmcneill #define SMBIOS_TYPE_MEMMAPARRAYADDR 19
117 1.1 jmcneill #define SMBIOS_TYPE_MEMMAPDEVADDR 20
118 1.1 jmcneill #define SMBIOS_TYPE_INBUILTPOINT 21
119 1.1 jmcneill #define SMBIOS_TYPE_PORTBATT 22
120 1.1 jmcneill #define SMBIOS_TYPE_SYSRESET 23
121 1.1 jmcneill #define SMBIOS_TYPE_HWSECUIRTY 24
122 1.1 jmcneill #define SMBIOS_TYPE_PWRCTRL 25
123 1.1 jmcneill #define SMBIOS_TYPE_VOLTPROBE 26
124 1.1 jmcneill #define SMBIOS_TYPE_COOLING 27
125 1.1 jmcneill #define SMBIOS_TYPE_TEMPPROBE 28
126 1.1 jmcneill #define SMBIOS_TYPE_CURRENTPROBE 29
127 1.1 jmcneill #define SMBIOS_TYPE_OOB_REMOTEACCESS 30
128 1.1 jmcneill #define SMBIOS_TYPE_BIS 31
129 1.1 jmcneill #define SMBIOS_TYPE_SBI 32
130 1.1 jmcneill #define SMBIOS_TYPE_ECCINFO64 33
131 1.1 jmcneill #define SMBIOS_TYPE_MGMTDEV 34
132 1.1 jmcneill #define SMBIOS_TYPE_MGTDEVCOMP 35
133 1.1 jmcneill #define SMBIOS_TYPE_MGTDEVTHRESH 36
134 1.1 jmcneill #define SMBIOS_TYPE_MEMCHANNEL 37
135 1.1 jmcneill #define SMBIOS_TYPE_IPMIDEV 38
136 1.1 jmcneill #define SMBIOS_TYPE_SPS 39
137 1.1 jmcneill #define SMBIOS_TYPE_INACTIVE 126
138 1.1 jmcneill #define SMBIOS_TYPE_EOT 127
139 1.1 jmcneill
140 1.1 jmcneill /*
141 1.1 jmcneill * SMBIOS Structure Type 0 "BIOS Information"
142 1.1 jmcneill * DMTF Specification DSP0134 Section: 3.3.1 p.g. 34
143 1.1 jmcneill */
144 1.1 jmcneill struct smbios_struct_bios {
145 1.1 jmcneill uint8_t vendor; /* string */
146 1.1 jmcneill uint8_t version; /* string */
147 1.1 jmcneill uint16_t startaddr;
148 1.1 jmcneill uint8_t release; /* string */
149 1.1 jmcneill uint8_t romsize;
150 1.1 jmcneill uint64_t characteristics;
151 1.1 jmcneill uint32_t charext;
152 1.1 jmcneill uint8_t major_rel;
153 1.1 jmcneill uint8_t minor_rel;
154 1.1 jmcneill uint8_t ecf_mjr_rel; /* embedded controller firmware */
155 1.1 jmcneill uint8_t ecf_min_rel; /* embedded controller firmware */
156 1.1 jmcneill } __packed;
157 1.1 jmcneill
158 1.1 jmcneill /*
159 1.1 jmcneill * SMBIOS Structure Type 1 "System Information"
160 1.1 jmcneill * DMTF Specification DSP0134 Section 3.3.2 p.g. 35
161 1.1 jmcneill */
162 1.1 jmcneill
163 1.1 jmcneill struct smbios_sys {
164 1.1 jmcneill /* SMBIOS spec 2.0+ */
165 1.1 jmcneill uint8_t vendor; /* string */
166 1.1 jmcneill uint8_t product; /* string */
167 1.1 jmcneill uint8_t version; /* string */
168 1.1 jmcneill uint8_t serial; /* string */
169 1.1 jmcneill /* SMBIOS spec 2.1+ */
170 1.1 jmcneill uint8_t uuid[16];
171 1.1 jmcneill uint8_t wakeup;
172 1.1 jmcneill /* SMBIOS spec 2.4+ */
173 1.1 jmcneill uint8_t sku; /* string */
174 1.1 jmcneill uint8_t family; /* string */
175 1.1 jmcneill } __packed;
176 1.1 jmcneill
177 1.1 jmcneill /*
178 1.1 jmcneill * SMBIOS Structure Type 2 "Base Board (Module) Information"
179 1.1 jmcneill * DMTF Specification DSP0134 Section 3.3.3 p.g. 37
180 1.1 jmcneill */
181 1.1 jmcneill struct smbios_board {
182 1.1 jmcneill uint8_t vendor; /* string */
183 1.1 jmcneill uint8_t product; /* string */
184 1.1 jmcneill uint8_t version; /* string */
185 1.1 jmcneill uint8_t serial; /* string */
186 1.1 jmcneill uint8_t asset; /* string */
187 1.1 jmcneill uint8_t feature; /* feature flags */
188 1.1 jmcneill uint8_t location; /* location in chassis */
189 1.1 jmcneill uint16_t handle; /* chassis handle */
190 1.1 jmcneill uint8_t type; /* board type */
191 1.1 jmcneill uint8_t noc; /* number of contained objects */
192 1.1 jmcneill } __packed;
193 1.1 jmcneill
194 1.1 jmcneill /*
195 1.1 jmcneill * SMBIOS Structure Type 3 "System Enclosure or Chassis"
196 1.1 jmcneill * DMTF Specification DSP0134 Section 3.1.1 p.g. 37
197 1.1 jmcneill */
198 1.1 jmcneill struct smbios_chassis {
199 1.1 jmcneill uint8_t vendor; /* string */
200 1.1 jmcneill uint8_t shape;
201 1.1 jmcneill uint8_t version; /* string */
202 1.1 jmcneill uint8_t serial; /* string */
203 1.1 jmcneill uint8_t asset; /* string */
204 1.1 jmcneill uint8_t bustate;
205 1.1 jmcneill uint8_t psstate;
206 1.1 jmcneill uint8_t thstate;
207 1.1 jmcneill uint8_t security;
208 1.1 jmcneill uint32_t oemdata;
209 1.1 jmcneill uint8_t height;
210 1.1 jmcneill uint8_t powercords;
211 1.1 jmcneill uint8_t noc; /* number of contained objects */
212 1.1 jmcneill } __packed;
213 1.1 jmcneill
214 1.1 jmcneill /*
215 1.1 jmcneill * SMBIOS Structure Type 4 "Processor Information"
216 1.1 jmcneill * DMTF Specification DSP0134 Section 3.1.1 p.g. 42
217 1.1 jmcneill */
218 1.1 jmcneill struct smbios_processor {
219 1.1 jmcneill uint8_t socket; /* string */
220 1.1 jmcneill uint8_t type;
221 1.1 jmcneill uint8_t family;
222 1.1 jmcneill uint8_t vendor; /* string */
223 1.1 jmcneill uint64_t cpuid;
224 1.1 jmcneill uint8_t version; /* string */
225 1.1 jmcneill uint8_t voltage;
226 1.1 jmcneill uint16_t clkspeed;
227 1.1 jmcneill uint16_t maxspeed;
228 1.1 jmcneill uint16_t curspeed;
229 1.1 jmcneill uint8_t status;
230 1.1 jmcneill uint8_t upgrade;
231 1.1 jmcneill uint8_t l1cache;
232 1.1 jmcneill uint8_t l2cache;
233 1.1 jmcneill uint8_t l3cache;
234 1.1 jmcneill uint8_t serial; /* string */
235 1.1 jmcneill uint8_t asset; /* string */
236 1.1 jmcneill uint8_t part; /* string */
237 1.1 jmcneill uint8_t cores; /* cores per socket */
238 1.1 jmcneill uint8_t enabled; /* enabled cores per socket */
239 1.1 jmcneill uint8_t threads; /* threads per socket */
240 1.1 jmcneill uint16_t characteristics;
241 1.1 jmcneill uint16_t family2; /* for values >= 255 */
242 1.1 jmcneill uint16_t cores2; /* for values >= 255 */
243 1.1 jmcneill uint16_t enabled2; /* for values >= 255 */
244 1.1 jmcneill uint16_t threads2; /* for values >= 255 */
245 1.1 jmcneill } __packed;
246 1.1 jmcneill
247 1.1 jmcneill /*
248 1.1 jmcneill * SMBIOS Structure Type 9 "Expansion slot"
249 1.1 jmcneill */
250 1.1 jmcneill struct smbios_slot {
251 1.1 jmcneill uint8_t designation;
252 1.1 jmcneill uint8_t type;
253 1.1 jmcneill uint8_t width;
254 1.1 jmcneill uint8_t usage;
255 1.1 jmcneill uint8_t length;
256 1.1 jmcneill uint8_t slotid[2];
257 1.1 jmcneill uint8_t characteristics[2];
258 1.1 jmcneill } __packed;
259 1.1 jmcneill
260 1.1 jmcneill #define SMBIOS_SLOT_ISA 0x03
261 1.1 jmcneill #define SMBIOS_SLOT_EISA 0x05
262 1.1 jmcneill
263 1.1 jmcneill /*
264 1.1 jmcneill * SMBIOS Structure Type 38 "IPMI Information"
265 1.1 jmcneill * DMTF Specification DSP0134 Section 3.3.39 p.g. 91
266 1.1 jmcneill */
267 1.1 jmcneill struct smbios_ipmi {
268 1.1 jmcneill uint8_t smipmi_if_type; /* IPMI Interface Type */
269 1.1 jmcneill uint8_t smipmi_if_rev; /* BCD IPMI Revision */
270 1.1 jmcneill uint8_t smipmi_i2c_address; /* I2C address of BMC */
271 1.1 jmcneill uint8_t smipmi_nvram_address; /* I2C address of NVRAM
272 1.1 jmcneill * storage */
273 1.1 jmcneill uint64_t smipmi_base_address; /* Base address of BMC (BAR
274 1.1 jmcneill * format */
275 1.1 jmcneill uint8_t smipmi_base_flags; /* Flags field:
276 1.1 jmcneill * bit 7:6 : register spacing
277 1.1 jmcneill * 00 = byte
278 1.1 jmcneill * 01 = dword
279 1.1 jmcneill * 02 = word
280 1.1 jmcneill * bit 4 : Lower bit BAR
281 1.1 jmcneill * bit 3 : IRQ valid
282 1.1 jmcneill * bit 2 : N/A
283 1.1 jmcneill * bit 1 : Interrupt polarity
284 1.1 jmcneill * bit 0 : Interrupt trigger */
285 1.1 jmcneill uint8_t smipmi_irq; /* IRQ if applicable */
286 1.1 jmcneill } __packed;
287 1.1 jmcneill
288 1.1 jmcneill extern struct smbios_entry smbios_entry;
289 1.1 jmcneill
290 1.1 jmcneill int smbios2_check_header(const uint8_t *);
291 1.1 jmcneill int smbios3_check_header(const uint8_t *);
292 1.1 jmcneill int smbios_find_table(uint8_t, struct smbtable *);
293 1.1 jmcneill char *smbios_get_string(struct smbtable *, uint8_t, char *, size_t);
294 1.1 jmcneill
295 1.1 jmcneill #endif
296