smbiosvar.h revision 1.2.4.2
1 /* $NetBSD: smbiosvar.h,v 1.2.4.2 2021/08/01 22:42:21 thorpej Exp $ */ 2 /* 3 * Copyright (c) 2006 Gordon Willem Klok <gklok (at) cogeco.ca> 4 * Copyright (c) 2005 Jordan Hargrave 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _DEV_SMBIOSVAR_H 30 #define _DEV_SMBIOSVAR_H 31 32 #define SMBIOS_UUID_NPRESENT 0x1 33 #define SMBIOS_UUID_NSET 0x2 34 35 /* 36 * Section 3.5 of "UUIDs and GUIDs" found at 37 * http://www.opengroup.org/dce/info/draft-leach-uuids-guids-01.txt 38 * specifies the string repersentation of a UUID. 39 */ 40 #define SMBIOS_UUID_REP "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x" 41 #define SMBIOS_UUID_REPLEN 37 /* 16 zero padded values, 4 hyphens, 1 null */ 42 43 struct smbios_entry { 44 paddr_t hdrphys; 45 paddr_t tabphys; 46 uint8_t rev; 47 uint8_t mjr; 48 uint8_t min; 49 uint8_t doc; 50 uint8_t *addr; 51 uint32_t len; 52 uint16_t count; 53 }; 54 55 struct smbhdr { 56 uint32_t sig; /* "_SM_" */ 57 uint8_t checksum; /* Entry point checksum */ 58 uint8_t len; /* Entry point structure length */ 59 uint8_t majrev; /* Specification major revision */ 60 uint8_t minrev; /* Specification minor revision */ 61 uint16_t mss; /* Maximum Structure Size */ 62 uint8_t epr; /* Entry Point Revision */ 63 uint8_t fa[5]; /* value determined by EPR */ 64 uint8_t sasig[5]; /* Secondary Anchor "_DMI_" */ 65 uint8_t sachecksum; /* Secondary Checksum */ 66 uint16_t size; /* Length of structure table in bytes */ 67 uint32_t addr; /* Structure table address */ 68 uint16_t count; /* Number of SMBIOS structures */ 69 uint8_t rev; /* BCD revision */ 70 } __packed; 71 72 struct smb3hdr { 73 uint8_t sig[5]; /* "_SM3_" */ 74 uint8_t checksum; /* Entry point structure checksum */ 75 uint8_t len; /* Entry point structure length */ 76 uint8_t majrev; /* Specification major revision */ 77 uint8_t minrev; /* Specification minor revision */ 78 uint8_t docrev; /* docrec of Specification */ 79 uint8_t eprev; /* Entry point structure revision */ 80 #define SMBIOS3_EPREV_RESERVED 0 81 #define SMBIOS3_EPREV_3_0 1 /* SMBIOS 3.0 */ 82 uint8_t reverved; 83 uint32_t size; /* Length of structure table in bytes */ 84 uint64_t addr; /* Structure table address */ 85 } __packed; 86 87 struct smbtblhdr { 88 uint8_t type; 89 uint8_t size; 90 uint16_t handle; 91 } __packed; 92 93 struct smbtable { 94 struct smbtblhdr *hdr; 95 void *tblhdr; 96 uint32_t cookie; 97 }; 98 99 #define SMBIOS_TYPE_BIOS 0 100 #define SMBIOS_TYPE_SYSTEM 1 101 #define SMBIOS_TYPE_BASEBOARD 2 102 #define SMBIOS_TYPE_ENCLOSURE 3 103 #define SMBIOS_TYPE_PROCESSOR 4 104 #define SMBIOS_TYPE_MEMCTRL 5 105 #define SMBIOS_TYPE_MEMMOD 6 106 #define SMBIOS_TYPE_CACHE 7 107 #define SMBIOS_TYPE_PORT 8 108 #define SMBIOS_TYPE_SLOTS 9 109 #define SMBIOS_TYPE_OBD 10 110 #define SMBIOS_TYPE_OEM 11 111 #define SMBIOS_TYPE_SYSCONFOPT 12 112 #define SMBIOS_TYPE_BIOSLANG 13 113 #define SMBIOS_TYPE_GROUPASSOC 14 114 #define SMBIOS_TYPE_SYSEVENTLOG 15 115 #define SMBIOS_TYPE_PHYMEM 16 116 #define SMBIOS_TYPE_MEMDEV 17 117 #define SMBIOS_TYPE_ECCINFO32 18 118 #define SMBIOS_TYPE_MEMMAPARRAYADDR 19 119 #define SMBIOS_TYPE_MEMMAPDEVADDR 20 120 #define SMBIOS_TYPE_INBUILTPOINT 21 121 #define SMBIOS_TYPE_PORTBATT 22 122 #define SMBIOS_TYPE_SYSRESET 23 123 #define SMBIOS_TYPE_HWSECUIRTY 24 124 #define SMBIOS_TYPE_PWRCTRL 25 125 #define SMBIOS_TYPE_VOLTPROBE 26 126 #define SMBIOS_TYPE_COOLING 27 127 #define SMBIOS_TYPE_TEMPPROBE 28 128 #define SMBIOS_TYPE_CURRENTPROBE 29 129 #define SMBIOS_TYPE_OOB_REMOTEACCESS 30 130 #define SMBIOS_TYPE_BIS 31 131 #define SMBIOS_TYPE_SBI 32 132 #define SMBIOS_TYPE_ECCINFO64 33 133 #define SMBIOS_TYPE_MGMTDEV 34 134 #define SMBIOS_TYPE_MGTDEVCOMP 35 135 #define SMBIOS_TYPE_MGTDEVTHRESH 36 136 #define SMBIOS_TYPE_MEMCHANNEL 37 137 #define SMBIOS_TYPE_IPMIDEV 38 138 #define SMBIOS_TYPE_SPS 39 139 #define SMBIOS_TYPE_INACTIVE 126 140 #define SMBIOS_TYPE_EOT 127 141 142 /* 143 * SMBIOS Structure Type 0 "BIOS Information" 144 * DMTF Specification DSP0134 Section: 3.3.1 p.g. 34 145 */ 146 struct smbios_struct_bios { 147 uint8_t vendor; /* string */ 148 uint8_t version; /* string */ 149 uint16_t startaddr; 150 uint8_t release; /* string */ 151 uint8_t romsize; 152 uint64_t characteristics; 153 uint32_t charext; 154 uint8_t major_rel; 155 uint8_t minor_rel; 156 uint8_t ecf_mjr_rel; /* embedded controller firmware */ 157 uint8_t ecf_min_rel; /* embedded controller firmware */ 158 } __packed; 159 160 /* 161 * SMBIOS Structure Type 1 "System Information" 162 * DMTF Specification DSP0134 Section 3.3.2 p.g. 35 163 */ 164 165 struct smbios_sys { 166 /* SMBIOS spec 2.0+ */ 167 uint8_t vendor; /* string */ 168 uint8_t product; /* string */ 169 uint8_t version; /* string */ 170 uint8_t serial; /* string */ 171 /* SMBIOS spec 2.1+ */ 172 uint8_t uuid[16]; 173 uint8_t wakeup; 174 /* SMBIOS spec 2.4+ */ 175 uint8_t sku; /* string */ 176 uint8_t family; /* string */ 177 } __packed; 178 179 /* 180 * SMBIOS Structure Type 2 "Base Board (Module) Information" 181 * DMTF Specification DSP0134 Section 3.3.3 p.g. 37 182 */ 183 struct smbios_board { 184 uint8_t vendor; /* string */ 185 uint8_t product; /* string */ 186 uint8_t version; /* string */ 187 uint8_t serial; /* string */ 188 uint8_t asset; /* string */ 189 uint8_t feature; /* feature flags */ 190 uint8_t location; /* location in chassis */ 191 uint16_t handle; /* chassis handle */ 192 uint8_t type; /* board type */ 193 uint8_t noc; /* number of contained objects */ 194 } __packed; 195 196 /* 197 * SMBIOS Structure Type 3 "System Enclosure or Chassis" 198 * DMTF Specification DSP0134 Section 3.1.1 p.g. 37 199 */ 200 struct smbios_chassis { 201 uint8_t vendor; /* string */ 202 uint8_t shape; 203 uint8_t version; /* string */ 204 uint8_t serial; /* string */ 205 uint8_t asset; /* string */ 206 uint8_t bustate; 207 uint8_t psstate; 208 uint8_t thstate; 209 uint8_t security; 210 uint32_t oemdata; 211 uint8_t height; 212 uint8_t powercords; 213 uint8_t noc; /* number of contained objects */ 214 } __packed; 215 216 /* 217 * SMBIOS Structure Type 4 "Processor Information" 218 * DMTF Specification DSP0134 Section 3.1.1 p.g. 42 219 */ 220 struct smbios_processor { 221 uint8_t socket; /* string */ 222 uint8_t type; 223 uint8_t family; 224 uint8_t vendor; /* string */ 225 uint64_t cpuid; 226 uint8_t version; /* string */ 227 uint8_t voltage; 228 uint16_t clkspeed; 229 uint16_t maxspeed; 230 uint16_t curspeed; 231 uint8_t status; 232 uint8_t upgrade; 233 uint8_t l1cache; 234 uint8_t l2cache; 235 uint8_t l3cache; 236 uint8_t serial; /* string */ 237 uint8_t asset; /* string */ 238 uint8_t part; /* string */ 239 uint8_t cores; /* cores per socket */ 240 uint8_t enabled; /* enabled cores per socket */ 241 uint8_t threads; /* threads per socket */ 242 uint16_t characteristics; 243 uint16_t family2; /* for values >= 255 */ 244 uint16_t cores2; /* for values >= 255 */ 245 uint16_t enabled2; /* for values >= 255 */ 246 uint16_t threads2; /* for values >= 255 */ 247 } __packed; 248 249 /* 250 * SMBIOS Structure Type 9 "Expansion slot" 251 */ 252 struct smbios_slot { 253 uint8_t designation; 254 uint8_t type; 255 uint8_t width; 256 uint8_t usage; 257 uint8_t length; 258 uint8_t slotid[2]; 259 uint8_t characteristics[2]; 260 } __packed; 261 262 #define SMBIOS_SLOT_ISA 0x03 263 #define SMBIOS_SLOT_EISA 0x05 264 265 /* 266 * SMBIOS Structure Type 38 "IPMI Information" 267 * DMTF Specification DSP0134 Section 3.3.39 p.g. 91 268 */ 269 struct smbios_ipmi { 270 uint8_t smipmi_if_type; /* IPMI Interface Type */ 271 uint8_t smipmi_if_rev; /* BCD IPMI Revision */ 272 uint8_t smipmi_i2c_address; /* I2C address of BMC */ 273 uint8_t smipmi_nvram_address; /* I2C address of NVRAM 274 * storage */ 275 uint64_t smipmi_base_address; /* Base address of BMC (BAR 276 * format */ 277 uint8_t smipmi_base_flags; /* Flags field: 278 * bit 7:6 : register spacing 279 * 00 = byte 280 * 01 = dword 281 * 02 = word 282 * bit 4 : Lower bit BAR 283 * bit 3 : IRQ valid 284 * bit 2 : N/A 285 * bit 1 : Interrupt polarity 286 * bit 0 : Interrupt trigger */ 287 uint8_t smipmi_irq; /* IRQ if applicable */ 288 } __packed; 289 290 extern struct smbios_entry smbios_entry; 291 292 int smbios2_check_header(const uint8_t *); 293 int smbios3_check_header(const uint8_t *); 294 int smbios_find_table(uint8_t, struct smbtable *); 295 char *smbios_get_string(struct smbtable *, uint8_t, char *, size_t); 296 297 #endif 298
Indexes created Tue Oct 14 01:09:49 GMT 2025