mcp3k.c revision 1.1 1 1.1 phx /* $NetBSD: mcp3k.c,v 1.1 2015/08/18 15:54:20 phx Exp $ */
2 1.1 phx
3 1.1 phx /*-
4 1.1 phx * Copyright (c) 2015 The NetBSD Foundation, Inc.
5 1.1 phx * All rights reserved.
6 1.1 phx *
7 1.1 phx * This code is derived from software contributed to The NetBSD Foundation
8 1.1 phx * by Frank Wille.
9 1.1 phx *
10 1.1 phx * Redistribution and use in source and binary forms, with or without
11 1.1 phx * modification, are permitted provided that the following conditions
12 1.1 phx * are met:
13 1.1 phx * 1. Redistributions of source code must retain the above copyright
14 1.1 phx * notice, this list of conditions and the following disclaimer.
15 1.1 phx * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 phx * notice, this list of conditions and the following disclaimer in the
17 1.1 phx * documentation and/or other materials provided with the distribution.
18 1.1 phx *
19 1.1 phx * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 phx * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 phx * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 phx * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 phx * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 phx * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 phx * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 phx * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 phx * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 phx * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 phx * POSSIBILITY OF SUCH DAMAGE.
30 1.1 phx */
31 1.1 phx
32 1.1 phx /*
33 1.1 phx * Microchip MCP3x0x SAR analog to digital converters.
34 1.1 phx * The driver supports various ADCs with different resolutions, operation
35 1.1 phx * modes and number of input channels.
36 1.1 phx * The reference voltage Vref defaults to the maximum output value in mV,
37 1.1 phx * but can be changed via sysctl(3).
38 1.1 phx *
39 1.1 phx * MCP3001: http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf
40 1.1 phx * MCP3002: http://ww1.microchip.com/downloads/en/DeviceDoc/21294E.pdf
41 1.1 phx * MCP3004/3008: http://ww1.microchip.com/downloads/en/DeviceDoc/21295C.pdf
42 1.1 phx * MCP3201: http://ww1.microchip.com/downloads/en/DeviceDoc/21290D.pdf
43 1.1 phx * MCP3204/3208: http://ww1.microchip.com/downloads/en/DeviceDoc/21298c.pdf
44 1.1 phx * MCP3301: http://ww1.microchip.com/downloads/en/DeviceDoc/21700E.pdf
45 1.1 phx * MPC3302/3304: http://ww1.microchip.com/downloads/en/DeviceDoc/21697F.pdf
46 1.1 phx */
47 1.1 phx
48 1.1 phx #include <sys/param.h>
49 1.1 phx #include <sys/systm.h>
50 1.1 phx #include <sys/device.h>
51 1.1 phx #include <sys/kernel.h>
52 1.1 phx #include <sys/types.h>
53 1.1 phx #include <sys/sysctl.h>
54 1.1 phx
55 1.1 phx #include <dev/sysmon/sysmonvar.h>
56 1.1 phx #include <dev/spi/spivar.h>
57 1.1 phx
58 1.1 phx #define M3K_MAX_SENSORS 16 /* 8 single-ended & 8 diff. */
59 1.1 phx
60 1.1 phx /* mcp3x0x model description */
61 1.1 phx struct mcp3kadc_model {
62 1.1 phx uint32_t name;
63 1.1 phx uint8_t bits;
64 1.1 phx uint8_t channels;
65 1.1 phx uint8_t lead; /* leading bits to ignore */
66 1.1 phx uint8_t flags;
67 1.1 phx #define M3K_SGLDIFF 0x01 /* single-ended/differential */
68 1.1 phx #define M3K_D2D1D0 0x02 /* 3 channel select bits */
69 1.1 phx #define M3K_MSBF 0x04 /* MSBF select bit */
70 1.1 phx #define M3K_SIGNED 0x80 /* result is signed */
71 1.1 phx #define M3K_CTRL_NEEDED (M3K_SGLDIFF | M3K_D2D1D0 | M3K_MSBF)
72 1.1 phx };
73 1.1 phx
74 1.1 phx struct mcp3kadc_softc {
75 1.1 phx device_t sc_dev;
76 1.1 phx struct spi_handle *sc_sh;
77 1.1 phx int sc_model;
78 1.1 phx uint32_t sc_adc_max;
79 1.1 phx int32_t sc_vref_mv;
80 1.1 phx
81 1.1 phx struct sysmon_envsys *sc_sme;
82 1.1 phx envsys_data_t sc_sensors[M3K_MAX_SENSORS];
83 1.1 phx };
84 1.1 phx
85 1.1 phx static int mcp3kadc_match(device_t, cfdata_t, void *);
86 1.1 phx static void mcp3kadc_attach(device_t, device_t, void *);
87 1.1 phx static void mcp3kadc_envsys_refresh(struct sysmon_envsys *,
88 1.1 phx envsys_data_t *);
89 1.1 phx static int sysctl_mcp3kadc_vref(SYSCTLFN_ARGS);
90 1.1 phx
91 1.1 phx CFATTACH_DECL_NEW(mcp3kadc, sizeof(struct mcp3kadc_softc),
92 1.1 phx mcp3kadc_match, mcp3kadc_attach, NULL, NULL);
93 1.1 phx
94 1.1 phx static struct mcp3kadc_model mcp3k_models[] = {
95 1.1 phx {
96 1.1 phx .name = 3001,
97 1.1 phx .bits = 10,
98 1.1 phx .channels = 1,
99 1.1 phx .lead = 3,
100 1.1 phx .flags = 0
101 1.1 phx },
102 1.1 phx {
103 1.1 phx .name = 3002,
104 1.1 phx .bits = 10,
105 1.1 phx .channels = 2,
106 1.1 phx .lead = 2,
107 1.1 phx .flags = M3K_SGLDIFF | M3K_MSBF
108 1.1 phx },
109 1.1 phx {
110 1.1 phx .name = 3004,
111 1.1 phx .bits = 10,
112 1.1 phx .channels = 4,
113 1.1 phx .lead = 2,
114 1.1 phx .flags = M3K_SGLDIFF | M3K_D2D1D0
115 1.1 phx },
116 1.1 phx {
117 1.1 phx .name = 3008,
118 1.1 phx .bits = 10,
119 1.1 phx .channels = 8,
120 1.1 phx .lead = 2,
121 1.1 phx .flags = M3K_SGLDIFF | M3K_D2D1D0
122 1.1 phx },
123 1.1 phx {
124 1.1 phx .name = 3201,
125 1.1 phx .bits = 12,
126 1.1 phx .channels = 1,
127 1.1 phx .lead = 3,
128 1.1 phx .flags = 0
129 1.1 phx },
130 1.1 phx {
131 1.1 phx .name = 3202,
132 1.1 phx .bits = 12,
133 1.1 phx .channels = 2,
134 1.1 phx .lead = 2,
135 1.1 phx .flags = M3K_SGLDIFF | M3K_MSBF
136 1.1 phx },
137 1.1 phx {
138 1.1 phx .name = 3204,
139 1.1 phx .bits = 12,
140 1.1 phx .channels = 4,
141 1.1 phx .lead = 2,
142 1.1 phx .flags = M3K_SGLDIFF | M3K_D2D1D0
143 1.1 phx },
144 1.1 phx {
145 1.1 phx .name = 3208,
146 1.1 phx .bits = 12,
147 1.1 phx .channels = 8,
148 1.1 phx .lead = 2,
149 1.1 phx .flags = M3K_SGLDIFF | M3K_D2D1D0
150 1.1 phx },
151 1.1 phx {
152 1.1 phx .name = 3301,
153 1.1 phx .bits = 13,
154 1.1 phx .channels = 1,
155 1.1 phx .lead = 3,
156 1.1 phx .flags = M3K_SIGNED
157 1.1 phx },
158 1.1 phx {
159 1.1 phx .name = 3302,
160 1.1 phx .bits = 13,
161 1.1 phx .channels = 4,
162 1.1 phx .lead = 2,
163 1.1 phx .flags = M3K_SIGNED | M3K_SGLDIFF | M3K_D2D1D0
164 1.1 phx },
165 1.1 phx {
166 1.1 phx .name = 3204,
167 1.1 phx .bits = 13,
168 1.1 phx .channels = 8,
169 1.1 phx .lead = 2,
170 1.1 phx .flags = M3K_SIGNED | M3K_SGLDIFF | M3K_D2D1D0
171 1.1 phx },
172 1.1 phx };
173 1.1 phx
174 1.1 phx static int
175 1.1 phx mcp3kadc_match(device_t parent, cfdata_t cf, void *aux)
176 1.1 phx {
177 1.1 phx struct spi_attach_args *sa = aux;
178 1.1 phx
179 1.1 phx if (strcmp(cf->cf_name, "mcp3kadc") != 0)
180 1.1 phx return 0;
181 1.1 phx
182 1.1 phx /* configure for 1MHz */
183 1.1 phx if (spi_configure(sa->sa_handle, SPI_MODE_0, 1000000))
184 1.1 phx return 0;
185 1.1 phx
186 1.1 phx return 1;
187 1.1 phx }
188 1.1 phx
189 1.1 phx static void
190 1.1 phx mcp3kadc_attach(device_t parent, device_t self, void *aux)
191 1.1 phx {
192 1.1 phx const struct sysctlnode *rnode, *node;
193 1.1 phx struct spi_attach_args *sa;
194 1.1 phx struct mcp3kadc_softc *sc;
195 1.1 phx struct mcp3kadc_model *model;
196 1.1 phx int ch, i;
197 1.1 phx
198 1.1 phx sa = aux;
199 1.1 phx sc = device_private(self);
200 1.1 phx sc->sc_dev = self;
201 1.1 phx sc->sc_sh = sa->sa_handle;
202 1.1 phx
203 1.1 phx /* device flags define the model */
204 1.1 phx sc->sc_model = device_cfdata(sc->sc_dev)->cf_flags;
205 1.1 phx model = &mcp3k_models[sc->sc_model];
206 1.1 phx
207 1.1 phx aprint_naive(": Analog to Digital converter\n");
208 1.1 phx aprint_normal(": MCP%u %u-channel %u-bit ADC\n",
209 1.1 phx (unsigned)model->name, (unsigned)model->channels,
210 1.1 phx (unsigned)model->bits);
211 1.1 phx
212 1.1 phx /* set a default Vref in mV according to the chip's ADC resolution */
213 1.1 phx sc->sc_vref_mv = 1 << ((model->flags & M3K_SIGNED) ?
214 1.1 phx model->bits - 1 : model->bits);
215 1.1 phx
216 1.1 phx /* remember maximum value for this ADC - also used for masking */
217 1.1 phx sc->sc_adc_max = (1 << model->bits) - 1;
218 1.1 phx
219 1.1 phx /* attach voltage sensors to envsys */
220 1.1 phx sc->sc_sme = sysmon_envsys_create();
221 1.1 phx
222 1.1 phx /* adc difference from two neighbouring channels */
223 1.1 phx for (ch = 0; ch < model->channels; ch++) {
224 1.1 phx KASSERT(ch < M3K_MAX_SENSORS);
225 1.1 phx sc->sc_sensors[ch].units = ENVSYS_SVOLTS_DC;
226 1.1 phx sc->sc_sensors[ch].state = ENVSYS_SINVALID;
227 1.1 phx if (model->channels == 1)
228 1.1 phx strlcpy(sc->sc_sensors[ch].desc, "adc diff ch0",
229 1.1 phx sizeof(sc->sc_sensors[ch].desc));
230 1.1 phx else
231 1.1 phx snprintf(sc->sc_sensors[ch].desc,
232 1.1 phx sizeof(sc->sc_sensors[ch].desc),
233 1.1 phx "adc diff ch%d-ch%d", ch, ch ^ 1);
234 1.1 phx sc->sc_sensors[ch].private = ch;
235 1.1 phx sysmon_envsys_sensor_attach(sc->sc_sme, &sc->sc_sensors[ch]);
236 1.1 phx }
237 1.1 phx
238 1.1 phx if (model->flags & M3K_SGLDIFF) {
239 1.1 phx /* adc from single ended channels */
240 1.1 phx for (i = 0; i < model->channels; i++, ch++) {
241 1.1 phx KASSERT(ch < M3K_MAX_SENSORS);
242 1.1 phx sc->sc_sensors[ch].units = ENVSYS_SVOLTS_DC;
243 1.1 phx sc->sc_sensors[ch].state = ENVSYS_SINVALID;
244 1.1 phx snprintf(sc->sc_sensors[ch].desc,
245 1.1 phx sizeof(sc->sc_sensors[ch].desc),
246 1.1 phx "adc single ch%d", i);
247 1.1 phx sc->sc_sensors[ch].private = ch;
248 1.1 phx sysmon_envsys_sensor_attach(sc->sc_sme,
249 1.1 phx &sc->sc_sensors[ch]);
250 1.1 phx }
251 1.1 phx }
252 1.1 phx
253 1.1 phx sc->sc_sme->sme_name = device_xname(self);
254 1.1 phx sc->sc_sme->sme_refresh = mcp3kadc_envsys_refresh;
255 1.1 phx sc->sc_sme->sme_cookie = sc;
256 1.1 phx if (sysmon_envsys_register(sc->sc_sme)) {
257 1.1 phx aprint_error_dev(self, "unable to register with sysmon\n");
258 1.1 phx sysmon_envsys_destroy(sc->sc_sme);
259 1.1 phx }
260 1.1 phx
261 1.1 phx /* create a sysctl node for adjusting the ADC's reference voltage */
262 1.1 phx rnode = node = NULL;
263 1.1 phx sysctl_createv(NULL, 0, NULL, &rnode,
264 1.1 phx CTLFLAG_READWRITE,
265 1.1 phx CTLTYPE_NODE, device_xname(sc->sc_dev), NULL,
266 1.1 phx NULL, 0, NULL, 0,
267 1.1 phx CTL_HW, CTL_CREATE, CTL_EOL);
268 1.1 phx
269 1.1 phx if (rnode != NULL)
270 1.1 phx sysctl_createv(NULL, 0, NULL, &node,
271 1.1 phx CTLFLAG_READWRITE | CTLFLAG_OWNDESC,
272 1.1 phx CTLTYPE_INT, "vref",
273 1.1 phx SYSCTL_DESCR("ADC reference voltage"),
274 1.1 phx sysctl_mcp3kadc_vref, 0, (void *)sc, 0,
275 1.1 phx CTL_HW, rnode->sysctl_num, CTL_CREATE, CTL_EOL);
276 1.1 phx }
277 1.1 phx
278 1.1 phx static void
279 1.1 phx mcp3kadc_envsys_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
280 1.1 phx {
281 1.1 phx struct mcp3kadc_softc *sc;
282 1.1 phx struct mcp3kadc_model *model;
283 1.1 phx uint8_t buf[2], ctrl;
284 1.1 phx int32_t val, scale;
285 1.1 phx
286 1.1 phx sc = sme->sme_cookie;
287 1.1 phx model = &mcp3k_models[sc->sc_model];
288 1.1 phx scale = sc->sc_adc_max + 1;
289 1.1 phx
290 1.1 phx if (model->flags & M3K_CTRL_NEEDED) {
291 1.1 phx /* we need to send some control bits first */
292 1.1 phx ctrl = 1; /* start bit */
293 1.1 phx
294 1.1 phx if (model->flags & M3K_SGLDIFF) {
295 1.1 phx /* bit set to select single-ended mode */
296 1.1 phx ctrl <<= 1;
297 1.1 phx ctrl |= edata->private >= model->channels;
298 1.1 phx }
299 1.1 phx
300 1.1 phx if (model->flags & M3K_D2D1D0) {
301 1.1 phx /* 3 bits select the channel */
302 1.1 phx ctrl <<= 3;
303 1.1 phx ctrl |= edata->private & (model->channels - 1);
304 1.1 phx } else {
305 1.1 phx /* 1 bit selects between two channels */
306 1.1 phx ctrl <<= 1;
307 1.1 phx ctrl |= edata->private & 1;
308 1.1 phx }
309 1.1 phx
310 1.1 phx if (model->flags & M3K_MSBF) {
311 1.1 phx /* bit select MSB first format */
312 1.1 phx ctrl <<= 1;
313 1.1 phx ctrl |= 1;
314 1.1 phx }
315 1.1 phx
316 1.1 phx /* send control bits, receive ADC data */
317 1.1 phx if (spi_send_recv(sc->sc_sh, 1, &ctrl, 2, buf) != 0) {
318 1.1 phx edata->state = ENVSYS_SINVALID;
319 1.1 phx return;
320 1.1 phx }
321 1.1 phx } else {
322 1.1 phx
323 1.1 phx /* just read data from the ADC */
324 1.1 phx if (spi_recv(sc->sc_sh, 2, buf) != 0) {
325 1.1 phx edata->state = ENVSYS_SINVALID;
326 1.1 phx return;
327 1.1 phx }
328 1.1 phx }
329 1.1 phx
330 1.1 phx /* extract big-endian ADC data from buffer */
331 1.1 phx val = (buf[0] << 8) | buf[1];
332 1.1 phx val = (val >> (16 - (model->bits + model->lead))) & sc->sc_adc_max;
333 1.1 phx
334 1.1 phx /* sign-extend the result, when needed */
335 1.1 phx if (model->flags & M3K_SIGNED) {
336 1.1 phx if (val & (1 << (model->bits - 1)))
337 1.1 phx val -= sc->sc_adc_max + 1;
338 1.1 phx scale >>= 1; /* MSB is the sign */
339 1.1 phx }
340 1.1 phx
341 1.1 phx /* scale the value for Vref and convert to mV */
342 1.1 phx edata->value_cur = (sc->sc_vref_mv * val / scale) * 1000;
343 1.1 phx edata->state = ENVSYS_SVALID;
344 1.1 phx }
345 1.1 phx
346 1.1 phx static int
347 1.1 phx sysctl_mcp3kadc_vref(SYSCTLFN_ARGS)
348 1.1 phx {
349 1.1 phx struct sysctlnode node;
350 1.1 phx struct mcp3kadc_softc *sc;
351 1.1 phx int32_t t;
352 1.1 phx int error;
353 1.1 phx
354 1.1 phx node = *rnode;
355 1.1 phx sc = node.sysctl_data;
356 1.1 phx
357 1.1 phx t = sc->sc_vref_mv;
358 1.1 phx node.sysctl_data = &t;
359 1.1 phx
360 1.1 phx error = sysctl_lookup(SYSCTLFN_CALL(&node));
361 1.1 phx if (error || newp == NULL)
362 1.1 phx return error;
363 1.1 phx if (t <= 0)
364 1.1 phx return EINVAL;
365 1.1 phx
366 1.1 phx sc->sc_vref_mv = t;
367 1.1 phx return 0;
368 1.1 phx }
369