spi.c revision 1.17.2.2 1 1.17.2.2 thorpej /* $NetBSD: spi.c,v 1.17.2.2 2021/06/17 04:46:30 thorpej Exp $ */
2 1.1 gdamore
3 1.1 gdamore /*-
4 1.1 gdamore * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
5 1.1 gdamore * Copyright (c) 2006 Garrett D'Amore.
6 1.1 gdamore * All rights reserved.
7 1.1 gdamore *
8 1.1 gdamore * Portions of this code were written by Garrett D'Amore for the
9 1.1 gdamore * Champaign-Urbana Community Wireless Network Project.
10 1.1 gdamore *
11 1.1 gdamore * Redistribution and use in source and binary forms, with or
12 1.1 gdamore * without modification, are permitted provided that the following
13 1.1 gdamore * conditions are met:
14 1.1 gdamore * 1. Redistributions of source code must retain the above copyright
15 1.1 gdamore * notice, this list of conditions and the following disclaimer.
16 1.1 gdamore * 2. Redistributions in binary form must reproduce the above
17 1.1 gdamore * copyright notice, this list of conditions and the following
18 1.1 gdamore * disclaimer in the documentation and/or other materials provided
19 1.1 gdamore * with the distribution.
20 1.1 gdamore * 3. All advertising materials mentioning features or use of this
21 1.1 gdamore * software must display the following acknowledgements:
22 1.1 gdamore * This product includes software developed by the Urbana-Champaign
23 1.1 gdamore * Independent Media Center.
24 1.1 gdamore * This product includes software developed by Garrett D'Amore.
25 1.1 gdamore * 4. Urbana-Champaign Independent Media Center's name and Garrett
26 1.1 gdamore * D'Amore's name may not be used to endorse or promote products
27 1.1 gdamore * derived from this software without specific prior written permission.
28 1.1 gdamore *
29 1.1 gdamore * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
30 1.1 gdamore * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
31 1.1 gdamore * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32 1.1 gdamore * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 1.1 gdamore * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
34 1.1 gdamore * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
35 1.1 gdamore * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
36 1.1 gdamore * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 1.1 gdamore * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38 1.1 gdamore * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
39 1.1 gdamore * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 1.1 gdamore * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
41 1.1 gdamore * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 1.1 gdamore */
43 1.1 gdamore
44 1.1 gdamore #include <sys/cdefs.h>
45 1.17.2.2 thorpej __KERNEL_RCSID(0, "$NetBSD: spi.c,v 1.17.2.2 2021/06/17 04:46:30 thorpej Exp $");
46 1.1 gdamore
47 1.1 gdamore #include "locators.h"
48 1.1 gdamore
49 1.1 gdamore #include <sys/param.h>
50 1.1 gdamore #include <sys/systm.h>
51 1.1 gdamore #include <sys/device.h>
52 1.10 mlelstv #include <sys/conf.h>
53 1.17.2.1 thorpej #include <sys/kmem.h>
54 1.5 rmind #include <sys/mutex.h>
55 1.5 rmind #include <sys/condvar.h>
56 1.1 gdamore #include <sys/errno.h>
57 1.1 gdamore
58 1.1 gdamore #include <dev/spi/spivar.h>
59 1.10 mlelstv #include <dev/spi/spi_io.h>
60 1.10 mlelstv
61 1.10 mlelstv #include "ioconf.h"
62 1.10 mlelstv #include "locators.h"
63 1.1 gdamore
64 1.1 gdamore struct spi_softc {
65 1.17.2.1 thorpej device_t sc_dev;
66 1.1 gdamore struct spi_controller sc_controller;
67 1.1 gdamore int sc_mode;
68 1.1 gdamore int sc_speed;
69 1.10 mlelstv int sc_slave;
70 1.1 gdamore int sc_nslaves;
71 1.1 gdamore struct spi_handle *sc_slaves;
72 1.17.2.1 thorpej kmutex_t sc_slave_state_lock;
73 1.10 mlelstv kmutex_t sc_lock;
74 1.10 mlelstv kcondvar_t sc_cv;
75 1.17.2.2 thorpej kmutex_t sc_dev_lock;
76 1.10 mlelstv int sc_flags;
77 1.10 mlelstv #define SPIC_BUSY 1
78 1.10 mlelstv };
79 1.10 mlelstv
80 1.10 mlelstv static dev_type_open(spi_open);
81 1.10 mlelstv static dev_type_close(spi_close);
82 1.10 mlelstv static dev_type_ioctl(spi_ioctl);
83 1.10 mlelstv
84 1.10 mlelstv const struct cdevsw spi_cdevsw = {
85 1.10 mlelstv .d_open = spi_open,
86 1.10 mlelstv .d_close = spi_close,
87 1.10 mlelstv .d_read = noread,
88 1.10 mlelstv .d_write = nowrite,
89 1.10 mlelstv .d_ioctl = spi_ioctl,
90 1.10 mlelstv .d_stop = nostop,
91 1.10 mlelstv .d_tty = notty,
92 1.10 mlelstv .d_poll = nopoll,
93 1.10 mlelstv .d_mmap = nommap,
94 1.10 mlelstv .d_kqfilter = nokqfilter,
95 1.10 mlelstv .d_discard = nodiscard,
96 1.17.2.2 thorpej .d_flag = D_OTHER | D_MPSAFE
97 1.1 gdamore };
98 1.1 gdamore
99 1.1 gdamore /*
100 1.1 gdamore * SPI slave device. We have one of these per slave.
101 1.1 gdamore */
102 1.1 gdamore struct spi_handle {
103 1.17.2.1 thorpej struct spi_softc *sh_sc; /* static */
104 1.17.2.1 thorpej struct spi_controller *sh_controller; /* static */
105 1.17.2.1 thorpej int sh_slave; /* static */
106 1.17.2.1 thorpej int sh_mode; /* locked by owning child */
107 1.17.2.1 thorpej int sh_speed; /* locked by owning child */
108 1.17.2.1 thorpej int sh_flags; /* ^^ slave_state_lock ^^ */
109 1.17.2.1 thorpej #define SPIH_ATTACHED __BIT(0)
110 1.17.2.1 thorpej #define SPIH_DIRECT __BIT(1)
111 1.1 gdamore };
112 1.1 gdamore
113 1.10 mlelstv #define SPI_MAXDATA 4096
114 1.10 mlelstv
115 1.1 gdamore /*
116 1.1 gdamore * API for bus drivers.
117 1.1 gdamore */
118 1.1 gdamore
119 1.1 gdamore int
120 1.1 gdamore spibus_print(void *aux, const char *pnp)
121 1.1 gdamore {
122 1.1 gdamore
123 1.1 gdamore if (pnp != NULL)
124 1.1 gdamore aprint_normal("spi at %s", pnp);
125 1.1 gdamore
126 1.1 gdamore return (UNCONF);
127 1.1 gdamore }
128 1.1 gdamore
129 1.1 gdamore
130 1.1 gdamore static int
131 1.3 xtraeme spi_match(device_t parent, cfdata_t cf, void *aux)
132 1.1 gdamore {
133 1.5 rmind
134 1.1 gdamore return 1;
135 1.1 gdamore }
136 1.1 gdamore
137 1.1 gdamore static int
138 1.17.2.1 thorpej spi_print_direct(void *aux, const char *pnp)
139 1.1 gdamore {
140 1.1 gdamore struct spi_attach_args *sa = aux;
141 1.1 gdamore
142 1.17.2.1 thorpej if (pnp != NULL) {
143 1.17.2.1 thorpej aprint_normal("%s%s%s%s at %s slave %d",
144 1.17.2.1 thorpej sa->sa_name ? sa->sa_name : "(unknown)",
145 1.17.2.1 thorpej sa->sa_clist ? " (" : "",
146 1.17.2.1 thorpej sa->sa_clist ? sa->sa_clist : "",
147 1.17.2.1 thorpej sa->sa_clist ? ")" : "",
148 1.17.2.1 thorpej pnp, sa->sa_handle->sh_slave);
149 1.17.2.1 thorpej } else {
150 1.1 gdamore aprint_normal(" slave %d", sa->sa_handle->sh_slave);
151 1.17.2.1 thorpej }
152 1.1 gdamore
153 1.17.2.1 thorpej return UNCONF;
154 1.1 gdamore }
155 1.1 gdamore
156 1.1 gdamore static int
157 1.17.2.1 thorpej spi_print(void *aux, const char *pnp)
158 1.1 gdamore {
159 1.17.2.1 thorpej struct spi_attach_args *sa = aux;
160 1.1 gdamore
161 1.17.2.1 thorpej aprint_normal(" slave %d", sa->sa_handle->sh_slave);
162 1.1 gdamore
163 1.17.2.1 thorpej return UNCONF;
164 1.1 gdamore }
165 1.1 gdamore
166 1.1 gdamore /*
167 1.17.2.1 thorpej * Direct and indrect for SPI are pretty similar, so we can collapse
168 1.17.2.1 thorpej * them into a single function.
169 1.12 tnn */
170 1.12 tnn static void
171 1.17.2.1 thorpej spi_attach_child(struct spi_softc *sc, struct spi_attach_args *sa,
172 1.17.2.1 thorpej int chip_select, cfdata_t cf)
173 1.12 tnn {
174 1.17.2.1 thorpej struct spi_handle *sh;
175 1.17.2.1 thorpej device_t newdev = NULL;
176 1.17.2.1 thorpej bool is_direct = cf == NULL;
177 1.17.2.1 thorpej const int skip_flags = is_direct ? SPIH_ATTACHED
178 1.17.2.1 thorpej : (SPIH_ATTACHED | SPIH_DIRECT);
179 1.17.2.1 thorpej const int claim_flags = skip_flags ^ SPIH_DIRECT;
180 1.17.2.1 thorpej int locs[SPICF_NLOCS] = { 0 };
181 1.12 tnn
182 1.17.2.1 thorpej if (chip_select < 0 ||
183 1.17.2.1 thorpej chip_select >= sc->sc_controller.sct_nslaves) {
184 1.12 tnn return;
185 1.17.2.1 thorpej }
186 1.12 tnn
187 1.17.2.1 thorpej sh = &sc->sc_slaves[chip_select];
188 1.17.2.1 thorpej
189 1.17.2.1 thorpej mutex_enter(&sc->sc_slave_state_lock);
190 1.17.2.1 thorpej if (ISSET(sh->sh_flags, skip_flags)) {
191 1.17.2.1 thorpej mutex_exit(&sc->sc_slave_state_lock);
192 1.17.2.1 thorpej return;
193 1.12 tnn }
194 1.17.2.1 thorpej
195 1.17.2.1 thorpej /* Keep others off of this chip select. */
196 1.17.2.1 thorpej SET(sh->sh_flags, claim_flags);
197 1.17.2.1 thorpej mutex_exit(&sc->sc_slave_state_lock);
198 1.17.2.1 thorpej
199 1.17.2.1 thorpej locs[SPICF_SLAVE] = chip_select;
200 1.17.2.1 thorpej sa->sa_handle = sh;
201 1.17.2.1 thorpej
202 1.17.2.1 thorpej if (is_direct) {
203 1.17.2.1 thorpej newdev = config_found(sc->sc_dev, sa, spi_print_direct,
204 1.17.2.1 thorpej /* CFARG_SUBMATCH, config_stdsubmatch, XXX */
205 1.17.2.1 thorpej CFARG_LOCATORS, locs,
206 1.17.2.1 thorpej CFARG_DEVHANDLE, sa->sa_devhandle,
207 1.17.2.1 thorpej CFARG_EOL);
208 1.17.2.1 thorpej } else {
209 1.17.2.1 thorpej if (config_probe(sc->sc_dev, cf, &sa)) {
210 1.17.2.1 thorpej newdev = config_attach(sc->sc_dev, cf, &sa, spi_print,
211 1.17.2.1 thorpej CFARG_LOCATORS, locs,
212 1.17.2.1 thorpej CFARG_EOL);
213 1.17.2.1 thorpej }
214 1.12 tnn }
215 1.12 tnn
216 1.17.2.1 thorpej if (newdev == NULL) {
217 1.17.2.1 thorpej /*
218 1.17.2.1 thorpej * Clear our claim on this chip select (yes, just
219 1.17.2.1 thorpej * the ATTACHED flag; we want to keep indirects off
220 1.17.2.1 thorpej * of chip selects for which there is a device tree
221 1.17.2.1 thorpej * node).
222 1.17.2.1 thorpej */
223 1.17.2.1 thorpej mutex_enter(&sc->sc_slave_state_lock);
224 1.17.2.1 thorpej CLR(sh->sh_flags, SPIH_ATTACHED);
225 1.17.2.1 thorpej mutex_exit(&sc->sc_slave_state_lock);
226 1.17.2.1 thorpej }
227 1.12 tnn }
228 1.12 tnn
229 1.17.2.1 thorpej static int
230 1.17.2.1 thorpej spi_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
231 1.12 tnn {
232 1.17.2.1 thorpej struct spi_softc *sc = device_private(parent);
233 1.12 tnn struct spi_attach_args sa;
234 1.12 tnn
235 1.17.2.1 thorpej if (cf->cf_loc[SPICF_SLAVE] == SPICF_SLAVE_DEFAULT) {
236 1.17.2.1 thorpej /* No wildcards for indirect on SPI. */
237 1.17.2.1 thorpej return 0;
238 1.12 tnn }
239 1.17.2.1 thorpej
240 1.17.2.1 thorpej memset(&sa, 0, sizeof(sa));
241 1.17.2.1 thorpej spi_attach_child(sc, &sa, cf->cf_loc[SPICF_SLAVE], cf);
242 1.17.2.1 thorpej
243 1.17.2.1 thorpej return 0;
244 1.17.2.1 thorpej }
245 1.17.2.1 thorpej
246 1.17.2.1 thorpej static bool
247 1.17.2.1 thorpej spi_enumerate_devices_callback(device_t self,
248 1.17.2.1 thorpej struct spi_enumerate_devices_args *args)
249 1.17.2.1 thorpej {
250 1.17.2.1 thorpej struct spi_softc *sc = device_private(self);
251 1.17.2.1 thorpej
252 1.17.2.1 thorpej spi_attach_child(sc, args->sa, args->chip_select, NULL);
253 1.17.2.1 thorpej
254 1.17.2.1 thorpej return true; /* keep enumerating */
255 1.12 tnn }
256 1.12 tnn
257 1.12 tnn int
258 1.12 tnn spi_compatible_match(const struct spi_attach_args *sa, const cfdata_t cf,
259 1.12 tnn const struct device_compatible_entry *compats)
260 1.12 tnn {
261 1.17.2.1 thorpej if (sa->sa_clist != NULL) {
262 1.17.2.1 thorpej return device_compatible_match_strlist(sa->sa_clist,
263 1.17.2.1 thorpej sa->sa_clist_size, compats);
264 1.17.2.1 thorpej }
265 1.12 tnn
266 1.17.2.1 thorpej /*
267 1.17.2.1 thorpej * In this case, we're using indirect configuration, but SPI
268 1.17.2.1 thorpej * has no real addressing system, and we've filtered out
269 1.17.2.1 thorpej * wildcarded chip selects in spi_search(), so we have no
270 1.17.2.1 thorpej * choice but to trust the user-specified config.
271 1.17.2.1 thorpej */
272 1.12 tnn return 1;
273 1.12 tnn }
274 1.12 tnn
275 1.1 gdamore static void
276 1.3 xtraeme spi_attach(device_t parent, device_t self, void *aux)
277 1.1 gdamore {
278 1.1 gdamore struct spi_softc *sc = device_private(self);
279 1.1 gdamore struct spibus_attach_args *sba = aux;
280 1.1 gdamore int i;
281 1.1 gdamore
282 1.17.2.1 thorpej sc->sc_dev = self;
283 1.17.2.1 thorpej
284 1.1 gdamore aprint_naive(": SPI bus\n");
285 1.1 gdamore aprint_normal(": SPI bus\n");
286 1.1 gdamore
287 1.17.2.2 thorpej mutex_init(&sc->sc_dev_lock, MUTEX_DEFAULT, IPL_NONE);
288 1.15 kardel mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM);
289 1.17.2.1 thorpej mutex_init(&sc->sc_slave_state_lock, MUTEX_DEFAULT, IPL_NONE);
290 1.10 mlelstv cv_init(&sc->sc_cv, "spictl");
291 1.10 mlelstv
292 1.1 gdamore sc->sc_controller = *sba->sba_controller;
293 1.8 rkujawa sc->sc_nslaves = sba->sba_controller->sct_nslaves;
294 1.17.2.1 thorpej
295 1.1 gdamore /* allocate slave structures */
296 1.17.2.1 thorpej sc->sc_slaves = kmem_zalloc(sizeof(*sc->sc_slaves) * sc->sc_nslaves,
297 1.17.2.1 thorpej KM_SLEEP);
298 1.1 gdamore
299 1.1 gdamore sc->sc_speed = 0;
300 1.2 gdamore sc->sc_mode = -1;
301 1.10 mlelstv sc->sc_slave = -1;
302 1.1 gdamore
303 1.1 gdamore /*
304 1.1 gdamore * Initialize slave handles
305 1.1 gdamore */
306 1.1 gdamore for (i = 0; i < sc->sc_nslaves; i++) {
307 1.1 gdamore sc->sc_slaves[i].sh_slave = i;
308 1.1 gdamore sc->sc_slaves[i].sh_sc = sc;
309 1.1 gdamore sc->sc_slaves[i].sh_controller = &sc->sc_controller;
310 1.1 gdamore }
311 1.1 gdamore
312 1.17.2.1 thorpej /*
313 1.17.2.1 thorpej * Attempt to enumerate the devices on the bus using the
314 1.17.2.1 thorpej * platform device tree.
315 1.17.2.1 thorpej */
316 1.17.2.1 thorpej struct spi_attach_args sa = { 0 };
317 1.17.2.1 thorpej struct spi_enumerate_devices_args enumargs = {
318 1.17.2.1 thorpej .sa = &sa,
319 1.17.2.1 thorpej .callback = spi_enumerate_devices_callback,
320 1.17.2.1 thorpej };
321 1.17.2.1 thorpej device_call(self, "spi-enumerate-devices", &enumargs);
322 1.17.2.1 thorpej
323 1.12 tnn /* Then do any other devices the user may have manually wired */
324 1.17 thorpej config_search(self, NULL,
325 1.17 thorpej CFARG_SEARCH, spi_search,
326 1.17 thorpej CFARG_EOL);
327 1.1 gdamore }
328 1.1 gdamore
329 1.17.2.1 thorpej CFATTACH_DECL_NEW(spi, sizeof(struct spi_softc),
330 1.17.2.1 thorpej spi_match, spi_attach, NULL, NULL);
331 1.17.2.1 thorpej
332 1.10 mlelstv static int
333 1.10 mlelstv spi_open(dev_t dev, int flag, int fmt, lwp_t *l)
334 1.10 mlelstv {
335 1.10 mlelstv struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
336 1.10 mlelstv
337 1.10 mlelstv if (sc == NULL)
338 1.10 mlelstv return ENXIO;
339 1.10 mlelstv
340 1.10 mlelstv return 0;
341 1.10 mlelstv }
342 1.10 mlelstv
343 1.10 mlelstv static int
344 1.10 mlelstv spi_close(dev_t dev, int flag, int fmt, lwp_t *l)
345 1.10 mlelstv {
346 1.10 mlelstv
347 1.10 mlelstv return 0;
348 1.10 mlelstv }
349 1.10 mlelstv
350 1.10 mlelstv static int
351 1.10 mlelstv spi_ioctl(dev_t dev, u_long cmd, void *data, int flag, lwp_t *l)
352 1.10 mlelstv {
353 1.10 mlelstv struct spi_softc *sc = device_lookup_private(&spi_cd, minor(dev));
354 1.10 mlelstv struct spi_handle *sh;
355 1.10 mlelstv spi_ioctl_configure_t *sic;
356 1.10 mlelstv spi_ioctl_transfer_t *sit;
357 1.10 mlelstv uint8_t *sbuf, *rbuf;
358 1.10 mlelstv int error;
359 1.10 mlelstv
360 1.10 mlelstv if (sc == NULL)
361 1.10 mlelstv return ENXIO;
362 1.10 mlelstv
363 1.17.2.2 thorpej mutex_enter(&sc->sc_dev_lock);
364 1.17.2.2 thorpej
365 1.10 mlelstv switch (cmd) {
366 1.10 mlelstv case SPI_IOCTL_CONFIGURE:
367 1.10 mlelstv sic = (spi_ioctl_configure_t *)data;
368 1.10 mlelstv if (sic->sic_addr < 0 || sic->sic_addr >= sc->sc_nslaves) {
369 1.10 mlelstv error = EINVAL;
370 1.10 mlelstv break;
371 1.10 mlelstv }
372 1.10 mlelstv sh = &sc->sc_slaves[sic->sic_addr];
373 1.10 mlelstv error = spi_configure(sh, sic->sic_mode, sic->sic_speed);
374 1.10 mlelstv break;
375 1.10 mlelstv case SPI_IOCTL_TRANSFER:
376 1.10 mlelstv sit = (spi_ioctl_transfer_t *)data;
377 1.10 mlelstv if (sit->sit_addr < 0 || sit->sit_addr >= sc->sc_nslaves) {
378 1.10 mlelstv error = EINVAL;
379 1.10 mlelstv break;
380 1.10 mlelstv }
381 1.11 mlelstv if ((sit->sit_send && sit->sit_sendlen == 0)
382 1.11 mlelstv || (sit->sit_recv && sit->sit_recv == 0)) {
383 1.11 mlelstv error = EINVAL;
384 1.11 mlelstv break;
385 1.11 mlelstv }
386 1.10 mlelstv sh = &sc->sc_slaves[sit->sit_addr];
387 1.10 mlelstv sbuf = rbuf = NULL;
388 1.10 mlelstv error = 0;
389 1.11 mlelstv if (sit->sit_send && sit->sit_sendlen <= SPI_MAXDATA) {
390 1.17.2.1 thorpej sbuf = kmem_alloc(sit->sit_sendlen, KM_SLEEP);
391 1.10 mlelstv error = copyin(sit->sit_send, sbuf, sit->sit_sendlen);
392 1.10 mlelstv }
393 1.11 mlelstv if (sit->sit_recv && sit->sit_recvlen <= SPI_MAXDATA) {
394 1.17.2.1 thorpej rbuf = kmem_alloc(sit->sit_recvlen, KM_SLEEP);
395 1.10 mlelstv }
396 1.10 mlelstv if (error == 0) {
397 1.10 mlelstv if (sbuf && rbuf)
398 1.10 mlelstv error = spi_send_recv(sh,
399 1.10 mlelstv sit->sit_sendlen, sbuf,
400 1.10 mlelstv sit->sit_recvlen, rbuf);
401 1.10 mlelstv else if (sbuf)
402 1.10 mlelstv error = spi_send(sh,
403 1.10 mlelstv sit->sit_sendlen, sbuf);
404 1.10 mlelstv else if (rbuf)
405 1.10 mlelstv error = spi_recv(sh,
406 1.10 mlelstv sit->sit_recvlen, rbuf);
407 1.10 mlelstv }
408 1.10 mlelstv if (rbuf) {
409 1.10 mlelstv if (error == 0)
410 1.10 mlelstv error = copyout(rbuf, sit->sit_recv,
411 1.10 mlelstv sit->sit_recvlen);
412 1.17.2.1 thorpej kmem_free(rbuf, sit->sit_recvlen);
413 1.10 mlelstv }
414 1.10 mlelstv if (sbuf) {
415 1.17.2.1 thorpej kmem_free(sbuf, sit->sit_sendlen);
416 1.10 mlelstv }
417 1.10 mlelstv break;
418 1.10 mlelstv default:
419 1.10 mlelstv error = ENODEV;
420 1.10 mlelstv break;
421 1.10 mlelstv }
422 1.10 mlelstv
423 1.17.2.2 thorpej mutex_exit(&sc->sc_dev_lock);
424 1.17.2.2 thorpej
425 1.10 mlelstv return error;
426 1.10 mlelstv }
427 1.10 mlelstv
428 1.17.2.1 thorpej /*
429 1.17.2.1 thorpej * API for device drivers.
430 1.17.2.1 thorpej *
431 1.17.2.1 thorpej * We provide wrapper routines to decouple the ABI for the SPI
432 1.17.2.1 thorpej * device drivers from the ABI for the SPI bus drivers.
433 1.17.2.1 thorpej */
434 1.1 gdamore
435 1.1 gdamore /*
436 1.1 gdamore * Configure. This should be the first thing that the SPI driver
437 1.1 gdamore * should do, to configure which mode (e.g. SPI_MODE_0, which is the
438 1.1 gdamore * same as Philips Microwire mode), and speed. If the bus driver
439 1.1 gdamore * cannot run fast enough, then it should just configure the fastest
440 1.1 gdamore * mode that it can support. If the bus driver cannot run slow
441 1.1 gdamore * enough, then the device is incompatible and an error should be
442 1.1 gdamore * returned.
443 1.1 gdamore */
444 1.1 gdamore int
445 1.1 gdamore spi_configure(struct spi_handle *sh, int mode, int speed)
446 1.1 gdamore {
447 1.1 gdamore
448 1.10 mlelstv sh->sh_mode = mode;
449 1.10 mlelstv sh->sh_speed = speed;
450 1.10 mlelstv return 0;
451 1.10 mlelstv }
452 1.10 mlelstv
453 1.10 mlelstv /*
454 1.10 mlelstv * Acquire controller
455 1.10 mlelstv */
456 1.10 mlelstv static void
457 1.10 mlelstv spi_acquire(struct spi_handle *sh)
458 1.10 mlelstv {
459 1.10 mlelstv struct spi_softc *sc = sh->sh_sc;
460 1.10 mlelstv
461 1.10 mlelstv mutex_enter(&sc->sc_lock);
462 1.10 mlelstv while ((sc->sc_flags & SPIC_BUSY) != 0)
463 1.10 mlelstv cv_wait(&sc->sc_cv, &sc->sc_lock);
464 1.10 mlelstv sc->sc_flags |= SPIC_BUSY;
465 1.10 mlelstv mutex_exit(&sc->sc_lock);
466 1.10 mlelstv }
467 1.10 mlelstv
468 1.10 mlelstv /*
469 1.10 mlelstv * Release controller
470 1.10 mlelstv */
471 1.10 mlelstv static void
472 1.10 mlelstv spi_release(struct spi_handle *sh)
473 1.10 mlelstv {
474 1.10 mlelstv struct spi_softc *sc = sh->sh_sc;
475 1.10 mlelstv
476 1.10 mlelstv mutex_enter(&sc->sc_lock);
477 1.10 mlelstv sc->sc_flags &= ~SPIC_BUSY;
478 1.10 mlelstv cv_broadcast(&sc->sc_cv);
479 1.10 mlelstv mutex_exit(&sc->sc_lock);
480 1.1 gdamore }
481 1.1 gdamore
482 1.1 gdamore void
483 1.1 gdamore spi_transfer_init(struct spi_transfer *st)
484 1.1 gdamore {
485 1.1 gdamore
486 1.15 kardel mutex_init(&st->st_lock, MUTEX_DEFAULT, IPL_VM);
487 1.10 mlelstv cv_init(&st->st_cv, "spixfr");
488 1.5 rmind
489 1.1 gdamore st->st_flags = 0;
490 1.1 gdamore st->st_errno = 0;
491 1.1 gdamore st->st_done = NULL;
492 1.1 gdamore st->st_chunks = NULL;
493 1.1 gdamore st->st_private = NULL;
494 1.1 gdamore st->st_slave = -1;
495 1.1 gdamore }
496 1.1 gdamore
497 1.1 gdamore void
498 1.1 gdamore spi_chunk_init(struct spi_chunk *chunk, int cnt, const uint8_t *wptr,
499 1.1 gdamore uint8_t *rptr)
500 1.1 gdamore {
501 1.1 gdamore
502 1.1 gdamore chunk->chunk_write = chunk->chunk_wptr = wptr;
503 1.6 mrg chunk->chunk_read = chunk->chunk_rptr = rptr;
504 1.1 gdamore chunk->chunk_rresid = chunk->chunk_wresid = chunk->chunk_count = cnt;
505 1.1 gdamore chunk->chunk_next = NULL;
506 1.1 gdamore }
507 1.1 gdamore
508 1.1 gdamore void
509 1.1 gdamore spi_transfer_add(struct spi_transfer *st, struct spi_chunk *chunk)
510 1.1 gdamore {
511 1.1 gdamore struct spi_chunk **cpp;
512 1.1 gdamore
513 1.1 gdamore /* this is an O(n) insert -- perhaps we should use a simpleq? */
514 1.1 gdamore for (cpp = &st->st_chunks; *cpp; cpp = &(*cpp)->chunk_next);
515 1.1 gdamore *cpp = chunk;
516 1.1 gdamore }
517 1.1 gdamore
518 1.1 gdamore int
519 1.1 gdamore spi_transfer(struct spi_handle *sh, struct spi_transfer *st)
520 1.1 gdamore {
521 1.10 mlelstv struct spi_softc *sc = sh->sh_sc;
522 1.1 gdamore struct spi_controller *tag = sh->sh_controller;
523 1.1 gdamore struct spi_chunk *chunk;
524 1.10 mlelstv int error;
525 1.1 gdamore
526 1.1 gdamore /*
527 1.1 gdamore * Initialize "resid" counters and pointers, so that callers
528 1.1 gdamore * and bus drivers don't have to.
529 1.1 gdamore */
530 1.1 gdamore for (chunk = st->st_chunks; chunk; chunk = chunk->chunk_next) {
531 1.1 gdamore chunk->chunk_wresid = chunk->chunk_rresid = chunk->chunk_count;
532 1.1 gdamore chunk->chunk_wptr = chunk->chunk_write;
533 1.1 gdamore chunk->chunk_rptr = chunk->chunk_read;
534 1.1 gdamore }
535 1.1 gdamore
536 1.1 gdamore /*
537 1.10 mlelstv * Match slave and parameters to handle
538 1.1 gdamore */
539 1.1 gdamore st->st_slave = sh->sh_slave;
540 1.1 gdamore
541 1.10 mlelstv /*
542 1.10 mlelstv * Reserve controller during transaction
543 1.10 mlelstv */
544 1.10 mlelstv spi_acquire(sh);
545 1.10 mlelstv
546 1.10 mlelstv st->st_spiprivate = (void *)sh;
547 1.10 mlelstv
548 1.10 mlelstv /*
549 1.10 mlelstv * Reconfigure controller
550 1.10 mlelstv *
551 1.10 mlelstv * XXX backends don't configure per-slave parameters
552 1.10 mlelstv * Whenever we switch slaves or change mode or speed, we
553 1.10 mlelstv * need to tell the backend.
554 1.10 mlelstv */
555 1.10 mlelstv if (sc->sc_slave != sh->sh_slave
556 1.10 mlelstv || sc->sc_mode != sh->sh_mode
557 1.10 mlelstv || sc->sc_speed != sh->sh_speed) {
558 1.10 mlelstv error = (*tag->sct_configure)(tag->sct_cookie,
559 1.10 mlelstv sh->sh_slave, sh->sh_mode, sh->sh_speed);
560 1.10 mlelstv if (error)
561 1.10 mlelstv return error;
562 1.10 mlelstv }
563 1.10 mlelstv sc->sc_mode = sh->sh_mode;
564 1.10 mlelstv sc->sc_speed = sh->sh_speed;
565 1.10 mlelstv sc->sc_slave = sh->sh_slave;
566 1.10 mlelstv
567 1.10 mlelstv error = (*tag->sct_transfer)(tag->sct_cookie, st);
568 1.10 mlelstv
569 1.10 mlelstv return error;
570 1.1 gdamore }
571 1.1 gdamore
572 1.1 gdamore void
573 1.1 gdamore spi_wait(struct spi_transfer *st)
574 1.1 gdamore {
575 1.10 mlelstv struct spi_handle *sh = st->st_spiprivate;
576 1.1 gdamore
577 1.5 rmind mutex_enter(&st->st_lock);
578 1.4 jym while (!(st->st_flags & SPI_F_DONE)) {
579 1.5 rmind cv_wait(&st->st_cv, &st->st_lock);
580 1.1 gdamore }
581 1.5 rmind mutex_exit(&st->st_lock);
582 1.7 jakllsch cv_destroy(&st->st_cv);
583 1.7 jakllsch mutex_destroy(&st->st_lock);
584 1.10 mlelstv
585 1.10 mlelstv /*
586 1.10 mlelstv * End transaction
587 1.10 mlelstv */
588 1.10 mlelstv spi_release(sh);
589 1.1 gdamore }
590 1.1 gdamore
591 1.1 gdamore void
592 1.1 gdamore spi_done(struct spi_transfer *st, int err)
593 1.1 gdamore {
594 1.1 gdamore
595 1.5 rmind mutex_enter(&st->st_lock);
596 1.1 gdamore if ((st->st_errno = err) != 0) {
597 1.1 gdamore st->st_flags |= SPI_F_ERROR;
598 1.1 gdamore }
599 1.1 gdamore st->st_flags |= SPI_F_DONE;
600 1.1 gdamore if (st->st_done != NULL) {
601 1.1 gdamore (*st->st_done)(st);
602 1.1 gdamore } else {
603 1.5 rmind cv_broadcast(&st->st_cv);
604 1.1 gdamore }
605 1.5 rmind mutex_exit(&st->st_lock);
606 1.1 gdamore }
607 1.1 gdamore
608 1.1 gdamore /*
609 1.1 gdamore * Some convenience routines. These routines block until the work
610 1.1 gdamore * is done.
611 1.1 gdamore *
612 1.1 gdamore * spi_recv - receives data from the bus
613 1.1 gdamore *
614 1.1 gdamore * spi_send - sends data to the bus
615 1.1 gdamore *
616 1.1 gdamore * spi_send_recv - sends data to the bus, and then receives. Note that this is
617 1.1 gdamore * done synchronously, i.e. send a command and get the response. This is
618 1.1 gdamore * not full duplex. If you wnat full duplex, you can't use these convenience
619 1.1 gdamore * wrappers.
620 1.1 gdamore */
621 1.1 gdamore int
622 1.1 gdamore spi_recv(struct spi_handle *sh, int cnt, uint8_t *data)
623 1.1 gdamore {
624 1.1 gdamore struct spi_transfer trans;
625 1.1 gdamore struct spi_chunk chunk;
626 1.1 gdamore
627 1.1 gdamore spi_transfer_init(&trans);
628 1.1 gdamore spi_chunk_init(&chunk, cnt, NULL, data);
629 1.1 gdamore spi_transfer_add(&trans, &chunk);
630 1.1 gdamore
631 1.1 gdamore /* enqueue it and wait for it to complete */
632 1.1 gdamore spi_transfer(sh, &trans);
633 1.1 gdamore spi_wait(&trans);
634 1.1 gdamore
635 1.1 gdamore if (trans.st_flags & SPI_F_ERROR)
636 1.1 gdamore return trans.st_errno;
637 1.1 gdamore
638 1.1 gdamore return 0;
639 1.1 gdamore }
640 1.1 gdamore
641 1.1 gdamore int
642 1.1 gdamore spi_send(struct spi_handle *sh, int cnt, const uint8_t *data)
643 1.1 gdamore {
644 1.1 gdamore struct spi_transfer trans;
645 1.1 gdamore struct spi_chunk chunk;
646 1.1 gdamore
647 1.1 gdamore spi_transfer_init(&trans);
648 1.1 gdamore spi_chunk_init(&chunk, cnt, data, NULL);
649 1.1 gdamore spi_transfer_add(&trans, &chunk);
650 1.1 gdamore
651 1.1 gdamore /* enqueue it and wait for it to complete */
652 1.1 gdamore spi_transfer(sh, &trans);
653 1.1 gdamore spi_wait(&trans);
654 1.1 gdamore
655 1.1 gdamore if (trans.st_flags & SPI_F_ERROR)
656 1.1 gdamore return trans.st_errno;
657 1.1 gdamore
658 1.1 gdamore return 0;
659 1.1 gdamore }
660 1.1 gdamore
661 1.1 gdamore int
662 1.1 gdamore spi_send_recv(struct spi_handle *sh, int scnt, const uint8_t *snd,
663 1.1 gdamore int rcnt, uint8_t *rcv)
664 1.1 gdamore {
665 1.1 gdamore struct spi_transfer trans;
666 1.1 gdamore struct spi_chunk chunk1, chunk2;
667 1.1 gdamore
668 1.1 gdamore spi_transfer_init(&trans);
669 1.1 gdamore spi_chunk_init(&chunk1, scnt, snd, NULL);
670 1.1 gdamore spi_chunk_init(&chunk2, rcnt, NULL, rcv);
671 1.1 gdamore spi_transfer_add(&trans, &chunk1);
672 1.1 gdamore spi_transfer_add(&trans, &chunk2);
673 1.1 gdamore
674 1.1 gdamore /* enqueue it and wait for it to complete */
675 1.1 gdamore spi_transfer(sh, &trans);
676 1.1 gdamore spi_wait(&trans);
677 1.1 gdamore
678 1.1 gdamore if (trans.st_flags & SPI_F_ERROR)
679 1.1 gdamore return trans.st_errno;
680 1.1 gdamore
681 1.1 gdamore return 0;
682 1.1 gdamore }
683